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AU2001283549A1 - Software-to-hardware compiler - Google Patents

Software-to-hardware compiler

Info

Publication number
AU2001283549A1
AU2001283549A1 AU2001283549A AU8354901A AU2001283549A1 AU 2001283549 A1 AU2001283549 A1 AU 2001283549A1 AU 2001283549 A AU2001283549 A AU 2001283549A AU 8354901 A AU8354901 A AU 8354901A AU 2001283549 A1 AU2001283549 A1 AU 2001283549A1
Authority
AU
Australia
Prior art keywords
software
hardware compiler
compiler
hardware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001283549A
Inventor
Paul Metzgen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp filed Critical Altera Corp
Publication of AU2001283549A1 publication Critical patent/AU2001283549A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/323Translation or migration, e.g. logic to logic, hardware description language [HDL] translation or netlist translation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/327Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/34Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/34Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G06F30/343Logical level

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Communication Control (AREA)
AU2001283549A 2000-08-07 2001-08-07 Software-to-hardware compiler Abandoned AU2001283549A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US22347100P 2000-08-07 2000-08-07
US60/223,471 2000-08-07
PCT/US2001/041624 WO2002013004A2 (en) 2000-08-07 2001-08-07 Software-to-hardware compiler

Publications (1)

Publication Number Publication Date
AU2001283549A1 true AU2001283549A1 (en) 2002-02-18

Family

ID=22836634

Family Applications (2)

Application Number Title Priority Date Filing Date
AU2001283549A Abandoned AU2001283549A1 (en) 2000-08-07 2001-08-07 Software-to-hardware compiler
AU2001281164A Abandoned AU2001281164A1 (en) 2000-08-07 2001-08-07 Inter-device communication interface

Family Applications After (1)

Application Number Title Priority Date Filing Date
AU2001281164A Abandoned AU2001281164A1 (en) 2000-08-07 2001-08-07 Inter-device communication interface

Country Status (4)

Country Link
US (3) US7257780B2 (en)
EP (2) EP1356401A2 (en)
AU (2) AU2001283549A1 (en)
WO (2) WO2002013004A2 (en)

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Also Published As

Publication number Publication date
WO2002013072A2 (en) 2002-02-14
EP1356401A2 (en) 2003-10-29
US20020100032A1 (en) 2002-07-25
US8473926B2 (en) 2013-06-25
WO2002013004A2 (en) 2002-02-14
US20070169033A1 (en) 2007-07-19
WO2002013072A8 (en) 2003-10-23
US20020124238A1 (en) 2002-09-05
WO2002013072A3 (en) 2003-08-21
AU2001281164A1 (en) 2002-02-18
US7257780B2 (en) 2007-08-14
WO2002013004A3 (en) 2003-08-21
US7219342B2 (en) 2007-05-15
EP1356400A2 (en) 2003-10-29

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