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NL8501773A - Werkwijze voor het vervaardigen van halfgeleiderinrichtingen. - Google Patents

Werkwijze voor het vervaardigen van halfgeleiderinrichtingen. Download PDF

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Publication number
NL8501773A
NL8501773A NL8501773A NL8501773A NL8501773A NL 8501773 A NL8501773 A NL 8501773A NL 8501773 A NL8501773 A NL 8501773A NL 8501773 A NL8501773 A NL 8501773A NL 8501773 A NL8501773 A NL 8501773A
Authority
NL
Netherlands
Prior art keywords
layer
semiconductor
semiconductor body
thin
magnetic
Prior art date
Application number
NL8501773A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8501773A priority Critical patent/NL8501773A/nl
Priority to US06/874,748 priority patent/US4983251A/en
Priority to JP13938486A priority patent/JP2608548B2/ja
Priority to CN86105660.4A priority patent/CN1004669B/zh
Priority to ES556144A priority patent/ES8707023A1/es
Priority to DE8686201062T priority patent/DE3676367D1/de
Priority to EP19860201062 priority patent/EP0209173B1/en
Priority to CA000511986A priority patent/CA1245776A/en
Priority to AU58854/86A priority patent/AU585355B2/en
Publication of NL8501773A publication Critical patent/NL8501773A/nl

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • H10P90/1914—
    • H10W10/181—
    • H10W70/093—
    • H10W72/30—
    • H10W90/00—
    • H10W72/073—
    • H10W72/07337—
    • H10W72/834—
    • H10W90/22—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
NL8501773A 1985-06-20 1985-06-20 Werkwijze voor het vervaardigen van halfgeleiderinrichtingen. NL8501773A (nl)

Priority Applications (9)

Application Number Priority Date Filing Date Title
NL8501773A NL8501773A (nl) 1985-06-20 1985-06-20 Werkwijze voor het vervaardigen van halfgeleiderinrichtingen.
US06/874,748 US4983251A (en) 1985-06-20 1986-06-16 Method of manufacturing semiconductor devices
JP13938486A JP2608548B2 (ja) 1985-06-20 1986-06-17 半導体デバイスの製造方法
CN86105660.4A CN1004669B (zh) 1985-06-20 1986-06-17 半导体器件的制造方法
ES556144A ES8707023A1 (es) 1985-06-20 1986-06-17 Un metodo para fabricar un dispositivo semiconductor
DE8686201062T DE3676367D1 (de) 1985-06-20 1986-06-18 Verfahren zur herstellung von halbleiteranordnungen mittels einer mechanischen verbindung von zwei koerpern.
EP19860201062 EP0209173B1 (en) 1985-06-20 1986-06-18 Method of manufacturing semiconductor devices comprising the mechanical connection of two bodies
CA000511986A CA1245776A (en) 1985-06-20 1986-06-19 Bonding-activating operation to manufacture semiconductor devices
AU58854/86A AU585355B2 (en) 1985-06-20 1986-06-20 Method of manufacturing semiconductor devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8501773 1985-06-20
NL8501773A NL8501773A (nl) 1985-06-20 1985-06-20 Werkwijze voor het vervaardigen van halfgeleiderinrichtingen.

Publications (1)

Publication Number Publication Date
NL8501773A true NL8501773A (nl) 1987-01-16

Family

ID=19846169

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8501773A NL8501773A (nl) 1985-06-20 1985-06-20 Werkwijze voor het vervaardigen van halfgeleiderinrichtingen.

Country Status (9)

Country Link
US (1) US4983251A (es)
EP (1) EP0209173B1 (es)
JP (1) JP2608548B2 (es)
CN (1) CN1004669B (es)
AU (1) AU585355B2 (es)
CA (1) CA1245776A (es)
DE (1) DE3676367D1 (es)
ES (1) ES8707023A1 (es)
NL (1) NL8501773A (es)

Families Citing this family (145)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8700033A (nl) * 1987-01-09 1988-08-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting van het type halfgeleider op isolator.
JP2542609B2 (ja) * 1987-03-16 1996-10-09 富士通株式会社 半導体装置の製造方法
JPS63306618A (ja) * 1987-06-08 1988-12-14 Sanyo Electric Co Ltd Ｓｏｉ構造の形成方法
JP2703231B2 (ja) * 1987-09-02 1998-01-26 株式会社東芝 シリコン半導体基板の製造方法
JP2685819B2 (ja) * 1988-03-31 1997-12-03 株式会社東芝 誘電体分離半導体基板とその製造方法
NL8800953A (nl) * 1988-04-13 1989-11-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderlichaam.
US5354695A (en) * 1992-04-08 1994-10-11 Leedy Glenn J Membrane dielectric isolation IC fabrication
JPH0237771A (ja) * 1988-07-28 1990-02-07 Fujitsu Ltd Ｓｏｉ基板
NL8802028A (nl) * 1988-08-16 1990-03-16 Philips Nv Werkwijze voor het vervaardigen van een inrichting.
US6025060A (en) * 1988-08-30 2000-02-15 Onyx Optics, Inc. Method and apparatus for composite gemstones
US5846638A (en) * 1988-08-30 1998-12-08 Onyx Optics, Inc. Composite optical and electro-optical devices
US5147808A (en) * 1988-11-02 1992-09-15 Universal Energy Systems, Inc. High energy ion implanted silicon on insulator structure
NL8900388A (nl) * 1989-02-17 1990-09-17 Philips Nv Werkwijze voor het verbinden van twee voorwerpen.
US5383993A (en) * 1989-09-01 1995-01-24 Nippon Soken Inc. Method of bonding semiconductor substrates
JP2825322B2 (ja) * 1989-09-13 1998-11-18 株式会社東芝 誘電体分離構造を有する半導体基板の製造方法
US5213993A (en) * 1989-09-13 1993-05-25 Kabushiki Kaisha Tobisha Method of manufacturing semiconductor substrate dielectric isolating structure
JP2831745B2 (ja) * 1989-10-31 1998-12-02 富士通株式会社 半導体装置及びその製造方法
JP2929651B2 (ja) * 1990-03-14 1999-08-03 株式会社ブリヂストン ゴム系複合材料の製造方法
JP2897055B2 (ja) * 1990-03-14 1999-05-31 株式会社ブリヂストン ゴム系複合材料の製造方法
JPH0636413B2 (ja) * 1990-03-29 1994-05-11 信越半導体株式会社 半導体素子形成用基板の製造方法
USRE36890E (en) * 1990-07-31 2000-10-03 Motorola, Inc. Gradient chuck method for wafer bonding employing a convex pressure
US5131968A (en) * 1990-07-31 1992-07-21 Motorola, Inc. Gradient chuck method for wafer bonding employing a convex pressure
JPH0719738B2 (ja) * 1990-09-06 1995-03-06 信越半導体株式会社 接合ウェーハ及びその製造方法
US6171512B1 (en) 1991-02-15 2001-01-09 Canon Kabushiki Kaisha Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution
EP0499488B9 (en) * 1991-02-15 2004-01-28 Canon Kabushiki Kaisha Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution
US5395788A (en) * 1991-03-15 1995-03-07 Shin Etsu Handotai Co., Ltd. Method of producing semiconductor substrate
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
JPH0817166B2 (ja) * 1991-04-27 1996-02-21 信越半導体株式会社 超薄膜ｓｏｉ基板の製造方法及び製造装置
US5256581A (en) * 1991-08-28 1993-10-26 Motorola, Inc. Silicon film with improved thickness control
JPH05198739A (ja) * 1991-09-10 1993-08-06 Mitsubishi Electric Corp 積層型半導体装置およびその製造方法
EP0536790B1 (en) * 1991-10-11 2004-03-03 Canon Kabushiki Kaisha Method for producing semiconductor articles
SE469863B (sv) * 1991-10-15 1993-09-27 Asea Brown Boveri Halvledarkomponent, halvledarskiva för framställning av halvledarkomponent samt förfarande för framställning av sådan halvledarskiva
EP0547684A3 (en) * 1991-12-18 1996-11-06 Koninkl Philips Electronics Nv Method of manufacturing a semiconductor body comprising a carrier wafer and a monocrystalline semiconducting top layer
JP2602597B2 (ja) * 1991-12-27 1997-04-23 信越半導体株式会社 薄膜ｓｏｉ基板の製造方法
US5290715A (en) * 1991-12-31 1994-03-01 U.S. Philips Corporation Method of making dielectrically isolated metal base transistors and permeable base transistors
JP3191972B2 (ja) * 1992-01-31 2001-07-23 キヤノン株式会社 半導体基板の作製方法及び半導体基板
US5234860A (en) * 1992-03-19 1993-08-10 Eastman Kodak Company Thinning of imaging device processed wafers
US6714625B1 (en) * 1992-04-08 2004-03-30 Elm Technology Corporation Lithography device for semiconductor circuit pattern generation
US5213986A (en) * 1992-04-10 1993-05-25 North American Philips Corporation Process for making thin film silicon-on-insulator wafers employing wafer bonding and wafer thinning
US5427638A (en) * 1992-06-04 1995-06-27 Alliedsignal Inc. Low temperature reaction bonding
US5407506A (en) * 1992-06-04 1995-04-18 Alliedsignal Inc. Reaction bonding through activation by ion bombardment
US5227313A (en) * 1992-07-24 1993-07-13 Eastman Kodak Company Process for making backside illuminated image sensors
JP3192000B2 (ja) * 1992-08-25 2001-07-23 キヤノン株式会社 半導体基板及びその作製方法
US5260233A (en) * 1992-11-06 1993-11-09 International Business Machines Corporation Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding
US5268065A (en) * 1992-12-21 1993-12-07 Motorola, Inc. Method for thinning a semiconductor wafer
JPH06350376A (ja) * 1993-01-25 1994-12-22 Matsushita Electric Ind Co Ltd 気密封止された圧電デバイスおよび気密封止パッケージ
US5647932A (en) * 1993-05-18 1997-07-15 Matsushita Electric Industrial Co., Ltd. Method of processing a piezoelectric device
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
JP3806151B2 (ja) * 1993-07-13 2006-08-09 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 第１物体の第２物体への結合方法
US5354717A (en) * 1993-07-29 1994-10-11 Motorola, Inc. Method for making a substrate structure with improved heat dissipation
US5310451A (en) * 1993-08-19 1994-05-10 International Business Machines Corporation Method of forming an ultra-uniform silicon-on-insulator layer
US6004865A (en) * 1993-09-06 1999-12-21 Hitachi, Ltd. Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
US5512375A (en) * 1993-10-14 1996-04-30 Intevac, Inc. Pseudomorphic substrates
US5360752A (en) * 1993-10-28 1994-11-01 Loral Federal Systems Company Method to radiation harden the buried oxide in silicon-on-insulator structures
EP0651449B1 (en) * 1993-11-01 2002-02-13 Matsushita Electric Industrial Co., Ltd. Electronic component and method for producing the same
DE69409215T2 (de) * 1993-12-06 1998-07-16 Matsushita Electric Ind Co Ltd Hybrid Magnetstruktur und deren Herstellungsverfahren
JP3298291B2 (ja) * 1994-03-07 2002-07-02 富士電機株式会社 複合素子および貼り合わせ基板の製造方法
JP2895743B2 (ja) * 1994-03-25 1999-05-24 信越半導体株式会社 Ｓｏｉ基板の製造方法
US5600130A (en) * 1994-06-17 1997-02-04 The Regents Of The University Of Colorado Two-dimensional optoelectronic array module
DE4427515C1 (de) * 1994-08-03 1995-08-24 Siemens Ag Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung
DE4433846C2 (de) * 1994-09-22 1999-06-02 Fraunhofer Ges Forschung Verfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur
US5637802A (en) * 1995-02-28 1997-06-10 Rosemount Inc. Capacitive pressure sensor for a pressure transmitted where electric field emanates substantially from back sides of plates
US6484585B1 (en) 1995-02-28 2002-11-26 Rosemount Inc. Pressure sensor for a pressure transmitter
US5681775A (en) * 1995-11-15 1997-10-28 International Business Machines Corporation Soi fabrication process
KR100228719B1 (ko) * 1996-05-27 1999-11-01 윤덕용 전기 화학적 식각방법을 이용하는 soi형 반도체 소자 및 이를 이용한 능동구동 액정표시장치의 제조방법
DE19704546A1 (de) * 1997-02-06 1998-08-13 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US6191007B1 (en) * 1997-04-28 2001-02-20 Denso Corporation Method for manufacturing a semiconductor substrate
US20070122997A1 (en) * 1998-02-19 2007-05-31 Silicon Genesis Corporation Controlled process and resulting device
US6033974A (en) * 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
US6245161B1 (en) * 1997-05-12 2001-06-12 Silicon Genesis Corporation Economical silicon-on-silicon hybrid wafer assembly
US5936984A (en) * 1997-05-21 1999-08-10 Onxy Optics, Inc. Laser rods with undoped, flanged end-caps for end-pumped laser applications
JP3431454B2 (ja) * 1997-06-18 2003-07-28 株式会社東芝 半導体装置の製造方法
US6548382B1 (en) * 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
US6136667A (en) * 1997-10-08 2000-10-24 Lucent Technologies Inc. Method for bonding two crystalline substrates together
US6458619B1 (en) 1998-02-05 2002-10-01 Integration Associates, Inc. Process for producing an isolated planar high speed pin photodiode with improved capacitance
US6548878B1 (en) * 1998-02-05 2003-04-15 Integration Associates, Inc. Method for producing a thin distributed photodiode structure
JPH11251207A (ja) * 1998-03-03 1999-09-17 Canon Inc Ｓｏｉ基板及びその製造方法並びにその製造設備
US6365488B1 (en) * 1998-03-05 2002-04-02 Industrial Technology Research Institute Method of manufacturing SOI wafer with buried layer
US6753586B1 (en) 1998-03-09 2004-06-22 Integration Associates Inc. Distributed photodiode structure having majority dopant gradient and method for making same
US5933750A (en) * 1998-04-03 1999-08-03 Motorola, Inc. Method of fabricating a semiconductor device with a thinned substrate
JP3358550B2 (ja) * 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
US6160824A (en) * 1998-11-02 2000-12-12 Maxios Laser Corporation Laser-pumped compound waveguide lasers and amplifiers
EP1041624A1 (en) 1999-04-02 2000-10-04 Interuniversitair Microelektronica Centrum Vzw Method of transferring ultra-thin substrates and application of the method to the manufacture of a multilayer thin film device
JP2003506883A (ja) * 1999-08-10 2003-02-18 シリコン ジェネシス コーポレイション 低打ち込みドーズ量を用いて多層基板を製造するための劈開プロセス
US6500732B1 (en) 1999-08-10 2002-12-31 Silicon Genesis Corporation Cleaving process to fabricate multilayered substrates using low implantation doses
US6263941B1 (en) 1999-08-10 2001-07-24 Silicon Genesis Corporation Nozzle for cleaving substrates
US6500694B1 (en) * 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6984571B1 (en) * 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6622757B2 (en) * 1999-11-30 2003-09-23 Veeder-Root Company Fueling system vapor recovery and containment performance monitor and method of operation thereof
US6561038B2 (en) 2000-01-06 2003-05-13 Rosemount Inc. Sensor with fluid isolation barrier
US6508129B1 (en) 2000-01-06 2003-01-21 Rosemount Inc. Pressure sensor capsule with improved isolation
DE60108217T2 (de) 2000-01-06 2005-12-29 Rosemount Inc., Eden Prairie Kornwachstumsverfahren zur herstellung einer elektrischen verbindung für mikroelektromechanische systeme (mems)
US6505516B1 (en) 2000-01-06 2003-01-14 Rosemount Inc. Capacitive pressure sensing with moving dielectric
US6520020B1 (en) 2000-01-06 2003-02-18 Rosemount Inc. Method and apparatus for a direct bonded isolated pressure sensor
US6544862B1 (en) 2000-01-14 2003-04-08 Silicon Genesis Corporation Particle distribution method and resulting structure for a layer transfer process
AU2001230982A1 (en) * 2000-01-18 2001-07-31 Xros, Inc., Nortel Networks Wafer bonding techniques to minimize built-in stress of silicon microstructures and micro-mirrors
US6902987B1 (en) 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
US6563133B1 (en) * 2000-08-09 2003-05-13 Ziptronix, Inc. Method of epitaxial-like wafer bonding at low temperature and bonded structure
FR2817395B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
US7407869B2 (en) * 2000-11-27 2008-08-05 S.O.I.Tec Silicon On Insulator Technologies Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material
US6748994B2 (en) * 2001-04-11 2004-06-15 Avery Dennison Corporation Label applicator, method and label therefor
WO2003010806A2 (en) * 2001-07-26 2003-02-06 Massachusetts Institute Of Technology Semiconductor substrate bonding by mass transport growth fusion
SG139508A1 (en) * 2001-09-10 2008-02-29 Micron Technology Inc Wafer dicing device and method
SG102639A1 (en) * 2001-10-08 2004-03-26 Micron Technology Inc Apparatus and method for packing circuits
US6848316B2 (en) * 2002-05-08 2005-02-01 Rosemount Inc. Pressure sensor assembly
AU2003234403A1 (en) * 2002-05-16 2003-12-02 Nova Research, Inc. Methods of fabricating magnetoresistive memory devices
SG142115A1 (en) * 2002-06-14 2008-05-28 Micron Technology Inc Wafer level packaging
AU2003255254A1 (en) * 2002-08-08 2004-02-25 Glenn J. Leedy Vertical system integration
US8187377B2 (en) * 2002-10-04 2012-05-29 Silicon Genesis Corporation Non-contact etch annealing of strained layers
JP4794810B2 (ja) * 2003-03-20 2011-10-19 シャープ株式会社 半導体装置の製造方法
SG119185A1 (en) * 2003-05-06 2006-02-28 Micron Technology Inc Method for packaging circuits and packaged circuits
US7109092B2 (en) 2003-05-19 2006-09-19 Ziptronix, Inc. Method of room temperature covalent bonding
US7354815B2 (en) * 2003-11-18 2008-04-08 Silicon Genesis Corporation Method for fabricating semiconductor devices using strained silicon bearing material
US7545481B2 (en) * 2003-11-24 2009-06-09 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method
WO2005054953A2 (en) * 2003-11-24 2005-06-16 Carl-Zeiss Smt Ag Holding device for an optical element in an objective
FR2863405B1 (fr) * 2003-12-08 2006-02-03 Commissariat Energie Atomique Collage moleculaire de composants microelectroniques sur un film polymere
JP2005203685A (ja) * 2004-01-19 2005-07-28 Oki Electric Ind Co Ltd 半導体装置，及び半導体装置の製造方法
US7198549B2 (en) * 2004-06-16 2007-04-03 Cabot Microelectronics Corporation Continuous contour polishing of a multi-material surface
US7601649B2 (en) * 2004-08-02 2009-10-13 Micron Technology, Inc. Zirconium-doped tantalum oxide films
JP2006156950A (ja) * 2004-10-29 2006-06-15 Sharp Corp 半導体発光素子の製造方法
JP2006294957A (ja) * 2005-04-13 2006-10-26 Shin Etsu Handotai Co Ltd 貼り合わせｓｏｉウエーハの製造方法及び貼り合わせｓｏｉウエーハ
JP5124931B2 (ja) * 2005-10-14 2013-01-23 信越半導体株式会社 多層ｓｏｉウエーハの製造方法
JP5130621B2 (ja) * 2005-11-24 2013-01-30 ソニー株式会社 半導体基板の製造方法
US7909069B2 (en) * 2006-05-04 2011-03-22 Veeder-Root Company System and method for automatically adjusting an ORVR compatible stage II vapor recovery system to maintain a desired air-to-liquid (A/L) ratio
US7811900B2 (en) * 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
US8993410B2 (en) 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
JP5138244B2 (ja) * 2007-03-20 2013-02-06 日本電信電話株式会社 電子デバイス用基板の製造方法
US8598700B2 (en) 2008-06-27 2013-12-03 Qualcomm Incorporated Active thermal control for stacked IC devices
US8330126B2 (en) * 2008-08-25 2012-12-11 Silicon Genesis Corporation Race track configuration and method for wafering silicon solar substrates
KR101548173B1 (ko) * 2008-09-18 2015-08-31 삼성전자주식회사 실리콘 다이렉트 본딩(ｓｄｂ)을 이용한 임시 웨이퍼 임시 본딩 방법, 및 그 본딩 방법을 이용한 반도체 소자 및 반도체 소자 제조 방법
DE102008060275B4 (de) * 2008-12-03 2012-10-31 Austriamicrosystems Ag Verfahren zum Strukturieren eines gebondeten Wafers
US8329557B2 (en) * 2009-05-13 2012-12-11 Silicon Genesis Corporation Techniques for forming thin films by implantation with reduced channeling
CN103560105A (zh) * 2013-11-22 2014-02-05 上海新傲科技股份有限公司 边缘光滑的半导体衬底的制备方法
US9583525B2 (en) 2015-06-02 2017-02-28 Semiconductor Components Industries, Llc Die stacked image sensors and related methods
JP6632462B2 (ja) * 2016-04-28 2020-01-22 信越化学工業株式会社 複合ウェーハの製造方法
CN106784073A (zh) * 2016-12-29 2017-05-31 苏州爱彼光电材料有限公司 电光器件
FR3079661B1 (fr) * 2018-03-29 2026-01-02 Soitec Silicon On Insulator Procede de fabrication d'un substrat pour filtre radiofrequence
US10978508B2 (en) 2018-10-16 2021-04-13 L3 Cincinnati Electronics Corporation Infrared detector having a directly bonded silicon substrate present on top thereof
US11347001B2 (en) * 2020-04-01 2022-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method of fabricating the same
US11340512B2 (en) * 2020-04-27 2022-05-24 Raytheon Bbn Technologies Corp. Integration of electronics with Lithium Niobate photonics
WO2022094587A1 (en) 2020-10-29 2022-05-05 Invensas Bonding Technologies, Inc. Direct bonding methods and structures

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3577044A (en) * 1966-03-08 1971-05-04 Ibm Integrated semiconductor devices and fabrication methods therefor
US3909332A (en) * 1973-06-04 1975-09-30 Gen Electric Bonding process for dielectric isolation of single crystal semiconductor structures
US3997381A (en) * 1975-01-10 1976-12-14 Intel Corporation Method of manufacture of an epitaxial semiconductor layer on an insulating substrate
US3974006A (en) * 1975-03-21 1976-08-10 Valentin Rodriguez Method of obtaining high temperature resistant assemblies comprising isolated silicon islands bonded to a substrate
JPS5320872A (en) * 1976-08-11 1978-02-25 Nippon Telegr & Teleph Corp <Ntt> Production of impatt diode
DE2738614A1 (de) * 1976-09-01 1978-03-02 Hitachi Ltd Verfahren zum herstellen von halbleitersubstraten fuer integrierte halbleiterschaltkreise
JPS5810869B2 (ja) * 1977-11-05 1983-02-28 三菱電機株式会社 可変容量ダイオ−ドの製造方法
DE2842492C2 (de) * 1978-09-29 1986-04-17 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Herstellung einer aus einem Halbleiter-Glas-Verbundwerkstoff bestehenden Photokathode
JPS5730374A (en) * 1980-07-29 1982-02-18 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS5769523A (en) * 1980-10-17 1982-04-28 Matsushita Electric Ind Co Ltd Manufacture of magnetic head
JPS5884458A (ja) * 1981-11-13 1983-05-20 Toshiba Corp 半導体基板の製造方法
JPS58123770A (ja) * 1982-01-18 1983-07-23 Semiconductor Energy Lab Co Ltd 絶縁ゲイト型半導体装置およびその作製方法
DE3311553C2 (de) * 1983-03-30 1985-11-14 Kernforschungsanlage Jülich GmbH, 5170 Jülich Verfahren zum Verbinden von Formteilen mit Siliziumkarbidoberfläche
JPS6051700A (ja) * 1983-08-31 1985-03-23 Toshiba Corp シリコン結晶体の接合方法
US4465547A (en) * 1983-09-29 1984-08-14 General Electric Company Method of bonding a poly (vinylidene fluoride) solid to a solid substrate
JPH0616537B2 (ja) * 1983-10-31 1994-03-02 株式会社東芝 半導体基体の製造方法
JPS60120577A (ja) * 1983-12-05 1985-06-28 Semiconductor Energy Lab Co Ltd 半導体装置用電極の作製方法
JPS61191038A (ja) * 1985-02-20 1986-08-25 Toshiba Corp 薄膜部を有するＳｉキヤビテイ構造の製造方法
US4714517A (en) * 1986-05-08 1987-12-22 National Semiconductor Corporation Copper cleaning and passivating for tape automated bonding
US4689111A (en) * 1986-10-28 1987-08-25 International Business Machines Corp. Process for promoting the interlaminate adhesion of polymeric materials to metal surfaces

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AU5885486A (en) 1986-12-24
CN86105660A (zh) 1987-02-25
ES556144A0 (es) 1987-07-01
AU585355B2 (en) 1989-06-15
ES8707023A1 (es) 1987-07-01
JPS61294846A (ja) 1986-12-25
CA1245776A (en) 1988-11-29
DE3676367D1 (de) 1991-02-07
US4983251A (en) 1991-01-08
EP0209173A1 (en) 1987-01-21
JP2608548B2 (ja) 1997-05-07
CN1004669B (zh) 1989-06-28

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