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MX2016011779A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents

Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Info

Publication number
MX2016011779A
MX2016011779A MX2016011779A MX2016011779A MX2016011779A MX 2016011779 A MX2016011779 A MX 2016011779A MX 2016011779 A MX2016011779 A MX 2016011779A MX 2016011779 A MX2016011779 A MX 2016011779A MX 2016011779 A MX2016011779 A MX 2016011779A
Authority
MX
Mexico
Prior art keywords
data processing
ldpc codes
processing device
processing method
bits
Prior art date
Application number
MX2016011779A
Other languages
English (en)
Other versions
MX376800B (es
Inventor
Shinohara Yuji
Yamamoto Makiko
Ikegaya Ryoji
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MX2016011779A publication Critical patent/MX2016011779A/es
Publication of MX376800B publication Critical patent/MX376800B/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356—Unequal error protection [UEP]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Algebra (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

La presente invención se refiere a un dispositivo de procesamiento de datos y a un método de procesamiento de datos los cuales pueden garantizar una excelente calidad de comunicación en transmisión de datos utilizando códigos de LDPC. En el intercalado por grupos, la longitud de código N es de 64800 bits, y los códigos de LDPC con una tasa de codificación r de 9/15, 11/15 o 13/15 se intercalan en unidades de grupos de bits de 360 bits. En el desintercalado por grupos, la secuencia de códigos de LDPC después del intercalado por grupos se regresa a la secuencia original. Esta invención puede aplicarse, por ejemplo, cuando se realice transmisión de datos, etc., utilizando códigos de LDPC.
MX2016011779A 2014-03-19 2015-03-06 Dispositivo de procesamiento de datos y método de procesamiento de datos. MX376800B (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014056461A JP2015179960A (ja) 2014-03-19 2014-03-19 データ処理装置、及び、データ処理方法
PCT/JP2015/056597 WO2015141489A1 (ja) 2014-03-19 2015-03-06 データ処理装置、及び、データ処理方法

Publications (2)

Publication Number Publication Date
MX2016011779A true MX2016011779A (es) 2016-10-31
MX376800B MX376800B (es) 2025-03-07

Family

ID=54144462

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2016011779A MX376800B (es) 2014-03-19 2015-03-06 Dispositivo de procesamiento de datos y método de procesamiento de datos.

Country Status (6)

Country Link
US (3) US20170093435A1 (es)
JP (1) JP2015179960A (es)
KR (5) KR101752121B1 (es)
CA (1) CA2941450C (es)
MX (1) MX376800B (es)
WO (1) WO2015141489A1 (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015045897A1 (ja) * 2013-09-26 2015-04-02 ソニー株式会社 データ処理装置、及びデータ処理方法
JP2015179960A (ja) * 2014-03-19 2015-10-08 ソニー株式会社 データ処理装置、及び、データ処理方法
JP6820192B2 (ja) * 2016-12-19 2021-01-27 日本放送協会 送信装置及び受信装置
JP6820193B2 (ja) * 2016-12-19 2021-01-27 日本放送協会 送信装置及び受信装置
DE102017116280B4 (de) * 2017-07-19 2024-02-22 Infineon Technologies Ag Speicheranordnung
EP3963723A4 (en) 2019-09-10 2022-07-20 Samsung Electronics Co., Ltd. METHOD AND DEVICE FOR DECODING DATA IN A COMMUNICATION OR BROADCASTING SYSTEM
CN114765570A (zh) * 2021-01-15 2022-07-19 华为技术有限公司 一种数据传输方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7334181B2 (en) 2003-09-04 2008-02-19 The Directv Group, Inc. Method and system for providing short block length low density parity check (LDPC) codes
US7555696B2 (en) * 2004-12-09 2009-06-30 General Instrument Corporation Method and apparatus for forward error correction in a content distribution system
US7451361B2 (en) * 2005-01-27 2008-11-11 General Instrument Corporation Method and apparatus for forward error correction in a content distribution system
JP4622654B2 (ja) * 2005-04-25 2011-02-02 ソニー株式会社 復号装置および復号方法
DE602006011240D1 (de) * 2005-06-21 2010-02-04 Samsung Electronics Co Ltd Vorrichtung und Methode zum Übermitteln/Empfangen von Daten in einem Mehrantennenkommunikationssystem unter Verwendung eines strukturierten Low Density Parity Check (LDPC) Codes
KR101435681B1 (ko) * 2007-11-08 2014-09-02 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서데이터 송수신 장치 및 방법
US8402337B2 (en) * 2007-11-26 2013-03-19 Sony Corporation Data processing apparatus and data processing method as well as encoding apparatus and encoding method
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TWI427936B (zh) * 2009-05-29 2014-02-21 Sony Corp 接收設備，接收方法，程式，及接收系統
JP5664919B2 (ja) 2011-06-15 2015-02-04 ソニー株式会社 データ処理装置、及び、データ処理方法
WO2014123018A1 (ja) * 2013-02-08 2014-08-14 ソニー株式会社 データ処理装置、及びデータ処理方法
KR20160061328A (ko) * 2013-09-26 2016-05-31 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법
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JP2015156532A (ja) * 2014-02-19 2015-08-27 ソニー株式会社 データ処理装置、及び、データ処理方法
JP2015156534A (ja) * 2014-02-19 2015-08-27 ソニー株式会社 データ処理装置、及び、データ処理方法
JP2015170912A (ja) * 2014-03-05 2015-09-28 ソニー株式会社 データ処理装置、及び、データ処理方法
JP2015179960A (ja) * 2014-03-19 2015-10-08 ソニー株式会社 データ処理装置、及び、データ処理方法

Also Published As

Publication number Publication date
WO2015141489A1 (ja) 2015-09-24
KR20200001626A (ko) 2020-01-06
US20170093435A1 (en) 2017-03-30
JP2015179960A (ja) 2015-10-08
CA2941450A1 (en) 2015-09-24
CA2941450C (en) 2021-11-16
KR20170076799A (ko) 2017-07-04
KR20180133557A (ko) 2018-12-14
KR101752121B1 (ko) 2017-06-28
US11239863B2 (en) 2022-02-01
KR20160124141A (ko) 2016-10-26
KR20190103491A (ko) 2019-09-04
US20200304152A1 (en) 2020-09-24
US10659080B2 (en) 2020-05-19
KR102113965B1 (ko) 2020-05-21
KR102062378B1 (ko) 2020-02-17
KR101929144B1 (ko) 2018-12-13
US20180337693A1 (en) 2018-11-22
KR102022212B1 (ko) 2019-09-17
MX376800B (es) 2025-03-07

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