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MX2016003551A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents

Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Info

Publication number
MX2016003551A
MX2016003551A MX2016003551A MX2016003551A MX2016003551A MX 2016003551 A MX2016003551 A MX 2016003551A MX 2016003551 A MX2016003551 A MX 2016003551A MX 2016003551 A MX2016003551 A MX 2016003551A MX 2016003551 A MX2016003551 A MX 2016003551A
Authority
MX
Mexico
Prior art keywords
data processing
group
ldpc code
code
processing device
Prior art date
Application number
MX2016003551A
Other languages
English (en)
Inventor
Yuji Shinohara
Makiko Yamamoto
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MX2016003551A publication Critical patent/MX2016003551A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0033—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the transmitter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Quality & Reliability (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

Esta tecnología pertenece a un dispositivo de procesamiento de datos y a un método de procesamiento de datos que hace posible asegurar una buena calidad de comunicación cuando se utiliza un código de LDPC para transmitir datos. En el intercalado por grupos, un código de LDPC que tiene una longitud de código de 16,200 bits y una tasa de código de 6/15, 7/15, 8/15, o 9/15 se intercala en una base por grupo de bits, cada grupo de bits tiene 360 bits de longitud. En el desintercalado por grupos, el código de LDPC desintercalado se restablece al orden original del mismo. Esta tecnología puede aplicarse, por ejemplo, para transmisión de datos o similares utilizando un código de LDPC.
MX2016003551A 2013-09-26 2014-09-12 Dispositivo de procesamiento de datos y metodo de procesamiento de datos. MX2016003551A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013199088 2013-09-26
PCT/JP2014/074199 WO2015045900A1 (ja) 2013-09-26 2014-09-12 データ処理装置、及びデータ処理方法

Publications (1)

Publication Number Publication Date
MX2016003551A true MX2016003551A (es) 2016-07-21

Family

ID=52743042

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2016003551A MX2016003551A (es) 2013-09-26 2014-09-12 Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Country Status (8)

Country Link
US (1) US20160315636A1 (es)
EP (1) EP3051706A4 (es)
JP (1) JPWO2015045900A1 (es)
KR (1) KR20160061330A (es)
CN (1) CN105580281A (es)
CA (1) CA2924781A1 (es)
MX (1) MX2016003551A (es)
WO (1) WO2015045900A1 (es)

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GB201312243D0 (en) * 2013-07-08 2013-08-21 Samsung Electronics Co Ltd Non-Uniform Constellations
WO2015016672A1 (en) * 2013-08-01 2015-02-05 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
KR101929298B1 (ko) * 2013-09-20 2018-12-17 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법
EP3148090A4 (en) * 2014-05-21 2018-02-21 Sony Corporation Data processing device and data processing method
KR102453474B1 (ko) 2015-02-27 2022-10-14 한국전자통신연구원 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법
WO2016137254A1 (ko) 2015-02-27 2016-09-01 한국전자통신연구원 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법
KR102553322B1 (ko) * 2015-04-20 2023-07-10 한국전자통신연구원 레이어드 디비전 멀티플렉싱을 이용한 방송 신호 프레임 생성 장치 및 방송 신호 프레임 생성 방법
US20160336968A1 (en) * 2015-05-11 2016-11-17 Comtech Ef Data Corp. System and method for encoding and decoding using a plurality of constellations within a single fec block
US9870818B1 (en) * 2016-10-04 2018-01-16 Qualcomm Incorporated Separate read and write address decoding in a memory system to support simultaneous memory read and write operations
JP6895052B2 (ja) 2017-02-20 2021-06-30 ソニーグループ株式会社 送信装置、送信方法、受信装置、及び、受信方法
JP6930375B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法

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JP4224777B2 (ja) 2003-05-13 2009-02-18 ソニー株式会社 復号方法および復号装置、並びにプログラム
JP3875693B2 (ja) * 2004-03-24 2007-01-31 株式会社東芝 Ｌｐｃ符号を用いた符号化ビットのマッピング方法及び送信装置
WO2005107124A1 (en) * 2004-04-28 2005-11-10 Samsung Electronics Co., Ltd. Apparatus and method for coding/decoding block low density parity check code with variable block length
US7543197B2 (en) * 2004-12-22 2009-06-02 Qualcomm Incorporated Pruned bit-reversal interleaver
DE602006011240D1 (de) * 2005-06-21 2010-02-04 Samsung Electronics Co Ltd Vorrichtung und Methode zum Übermitteln/Empfangen von Daten in einem Mehrantennenkommunikationssystem unter Verwendung eines strukturierten Low Density Parity Check (LDPC) Codes
CN101488819B (zh) * 2008-01-15 2013-02-27 华为技术有限公司 一种低密度奇偶校验码编码调制方法及装置
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Also Published As

Publication number Publication date
US20160315636A1 (en) 2016-10-27
CN105580281A (zh) 2016-05-11
KR20160061330A (ko) 2016-05-31
EP3051706A4 (en) 2017-06-14
JPWO2015045900A1 (ja) 2017-03-09
EP3051706A1 (en) 2016-08-03
WO2015045900A1 (ja) 2015-04-02
CA2924781A1 (en) 2015-04-02

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