Odreitz et al., 2023 - Google Patents
Impact of Supply Voltage and Operating Point in IC PDN ModelingOdreitz et al., 2023
- Document ID
- 10337321739169449642
- Author
- Odreitz K
- Maier C
- Minichmair F
- Deutschmann B
- Publication year
- Publication venue
- 2023 International Symposium on Electromagnetic Compatibility–EMC Europe
External Links
Snippet
The effect of different supply voltages and operating points on the impedance characteristics of an integrated circuit is analyzed in this paper. The approach presented is based on S- parameter measurements of a simple but representative electronic circuit, a 74HC14 hex …
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequence
- G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequence by preliminary fault modelling, e.g. analysis, simulation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuit
- G01R31/31903—Tester hardware, i.e. output processing circuit tester configuration
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31718—Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2836—Fault-finding or characterising
- G01R31/2839—Fault-finding or characterising using signal generators, power supplies or circuit analysers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2822—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere of microwave or radiofrequency circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. varying supply voltage
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/28—Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks using network analysers Measuring transient response
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/001—Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5081—Layout analysis, e.g. layout verification, design rule check
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the preceding groups
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Levant et al. | EMC assessment at chip and PCB level: Use of the ICEM model for jitter analysis in an integrated PLL | |
Zhou et al. | Transient response of ESD protection devices for a high-speed I/O interface | |
Dghais et al. | New multiport I/O model for power-aware signal integrity analysis | |
Khan et al. | Validation of IC conducted emission and immunity models including aging and thermal stress | |
Mertens et al. | A flexible simulation model for system level ESD stresses with application to ESD design and troubleshooting | |
KR102028921B1 (en) | Device for measuring integrated circuit current and method for measuring integrated circuit current using the device | |
Odreitz et al. | Impact of Supply Voltage and Operating Point in IC PDN Modeling | |
Zhang et al. | Enabling automatic model generation of RF components: A practical application of neural networks | |
Ben Dhia et al. | IC immunity modeling process validation using on-chip measurements | |
Miropolsky et al. | Comparability of RF immunity test methods for IC design purposes | |
Baba et al. | A review on techniques and modelling methodologies used for checking electromagnetic interference in integrated circuits | |
Gil et al. | Characterization and modelling of EMI susceptibility in integrated circuits at high frequency | |
Naik et al. | S-parameter modeling and analysis of RGLC interconnect for signal integrity | |
Pues et al. | Translation of automotive module RF immunity test limits into equivalent IC test limits using S-parameter IC models | |
Chang et al. | Wideband conducted electromagnetic emission measurements using IPD chip probes | |
Berbel et al. | Modeling technique of the conducted emission of integrated circuit under different temperatures | |
Mandhana et al. | Power delivery system performance optimization of a printed circuit board with multiple microprocessors | |
Alilou et al. | Immunity modelling of electronics board | |
Barchanski et al. | A Macromodeling Approach for EMC Simulations of Power Electronics Systems | |
Erdin et al. | Pin-capacitor spacing as a design guide to power delivery networks | |
Kireev et al. | Effect of delay in package traces on CDM stress and peak current | |
Notermans et al. | Predicting System Level ESD Performance. | |
Britto et al. | EMC analysis of PCB using ICEM model | |
Deobarro et al. | On-chip sampling and EMC modeling of I/Os switching to evaluate conducted RF disturbances propagation | |
Landinger et al. | Layout Parasitics Extraction of DC–DC Converters for Virtual Reference Designs in InfineonSpice |