WO2024111285A1 - Multilayer substrate and method for producing multilayer substrate - Google Patents
Multilayer substrate and method for producing multilayer substrate Download PDFInfo
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- WO2024111285A1 WO2024111285A1 PCT/JP2023/037449 JP2023037449W WO2024111285A1 WO 2024111285 A1 WO2024111285 A1 WO 2024111285A1 JP 2023037449 W JP2023037449 W JP 2023037449W WO 2024111285 A1 WO2024111285 A1 WO 2024111285A1
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- protective layer
- axis
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- laminate
- negative direction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
Definitions
- the present invention relates to a multilayer substrate having a structure in which multiple insulating layers are stacked.
- a known example of a conventional invention related to a multilayer board is the method of manufacturing a printed wiring board described in Patent Document 1.
- the purpose of this method of manufacturing a printed wiring board is to reduce the amount of undercut in the resist layer.
- the undercut in the resist layer is explained below.
- the resist layer is formed by the following procedure: Photosensitive resist is applied to the substrate.
- the photosensitive resist is hardened by irradiating it with light through a mask.
- the unhardened photosensitive resist is removed.
- a portion in the shadow of the mask is generated during exposure.
- the photosensitive resist is not irradiated with sufficient light. Therefore, the photosensitive resist does not harden sufficiently in the portion in the shadow of the mask.
- FIG. 1(b) of Patent Document 1 the end face of the resist layer is inclined obliquely in the vertical direction.
- the phenomenon in which the end face of the resist layer is inclined obliquely in the vertical direction is called undercut. When such undercut occurs, the resist layer is easily peeled off from the substrate.
- the object of the present invention is to provide a new multilayer board and a method for manufacturing a multilayer board that can prevent peeling of the protective layer.
- a multilayer substrate includes a laminate, a protective layer, and one or more internal conductors.
- the laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
- the laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface;
- a material of the protective layer is different from a material of the plurality of insulator layers;
- the one or more internal conductors are provided inside the multilayer substrate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and extend along the edge of the protective layer when viewed in the negative direction of the Z axis;
- a protrusion is provided on the front main surface of the laminate, When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the one or more internal conductors, and has a linear shape extending along the edge of the protective
- a multilayer substrate includes a laminate, a protective layer, and a plurality of internal conductors.
- the laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
- the laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers a portion of the positive principal surface, a material of the protective layer is different from a material of the plurality of insulator layers;
- the plurality of internal conductors are provided inside the multilayer substrate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and are arranged along the edge of the protective layer when viewed in the negative direction of the Z axis;
- a protrusion is provided on the front main surface of the laminate, When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the plurality of internal conductors, and has a linear shape extending along the edge of the protective
- a method for manufacturing a multilayer substrate includes the steps of: a bonding step of bonding the laminate; a protective layer forming step of forming a protective layer on the laminated body; Equipped with The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis, The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface; a material of the protective layer is different from a material of the plurality of insulator layers; one or more internal conductors are provided within the multilayer substrate; In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors, In the protective layer forming step, the protective layer is formed on the positive main surface such that an edge of the protective layer overlaps the protrusion when viewed in the negative direction of the Z axis.
- a method for manufacturing a multilayer substrate includes the steps of: a bonding step of bonding the laminate; a protective layer forming step of forming a protective layer on the laminated body; a cutting step of cutting the laminate on which the protective layer is formed; Equipped with The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis, The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface; a material of the protective layer is different from a material of the plurality of insulator layers; one or more internal conductors are provided within the laminate; In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors, In the protective layer forming step, the protective layer is formed on the positive main surface such that the protective layer covers the protrusion when viewed in the negative direction of the Z
- the multilayer board and the method for manufacturing the multilayer board according to the present invention can prevent the protective layer from peeling off.
- FIG. 1 is an exploded perspective view of a multilayer substrate 10.
- FIG. FIG. 2 is a cross-sectional view and a top view of the multilayer substrate 10.
- FIG. FIG. 3 is a front view of the multilayer board 10 when in use.
- FIG. 4 is a cross-sectional view of the multilayer substrate 10 during its manufacture.
- FIG. 5 is a cross-sectional view of the multilayer substrate 10 during its manufacture.
- FIG. 6 is a cross-sectional view and a top view of the multi-layer substrate 10a.
- FIG. 7 is a cross-sectional view of the multilayer substrate 10b.
- FIG. 8 is a cross-sectional view of the multilayer substrate 10c.
- FIG. 9 is a cross-sectional view and a top view of the multi-layer substrate 10d.
- FIG. 10 is a cross-sectional view and a top view of the multi-layer substrate 10e.
- FIG. 11 is a cross-sectional view and a top view of the multi-layer substrate 10f.
- FIG. 12 is a rear view of the multilayer board 10f during use.
- FIG. 13 is a cross-sectional view of the multilayer substrate 10 during its manufacture.
- FIG. 14 is a cross-sectional view of the multilayer substrate 10 during its manufacture.
- FIG. 15 is a cross-sectional view of the multilayer substrate 10 during its manufacture.
- FIG. 16 is a top view of the motherboard 100.
- FIG. 1 is an exploded perspective view of the multilayer substrate 10.
- Fig. 2 is a cross-sectional view and a top view of the multilayer substrate 10.
- Fig. 2 shows a cross-section taken along line A-A in Fig. 1.
- Fig. 3 is a front view of the multilayer substrate 10 when in use. Note that in Fig. 1, reference symbols are given only to representative interlayer connection conductors v3, v4 among the multiple interlayer connection conductors v3, v4.
- the stacking direction of the laminate 12 of the multilayer substrate 10 is defined as the up-down direction.
- the up-down direction coincides with the Z-axis direction.
- the up-down direction is the positive direction of the Z-axis.
- the down-down direction is the negative direction of the Z-axis.
- the direction in which the signal conductor layer 20 of the multilayer substrate 10 extends is defined as the left-right direction.
- the line width direction of the signal conductor layer 20 when viewed in the up-down direction is defined as the front-rear direction.
- the up-down direction, front-rear direction, and left-right direction are perpendicular to each other. Note that the up-down direction and the down-down direction may be interchanged, the left-right direction and the right-left direction may be interchanged, and the front-rear direction and the back-rear direction may be interchanged.
- X is a part or member of the multilayer substrate 10.
- each part of X is defined as follows.
- the front part of X means the front half of X.
- the rear part of X means the rear half of X.
- the left part of X means the left half of X.
- the right part of X means the right half of X.
- the upper part of X means the upper half of X.
- the lower part of X means the lower half of X.
- the front end of X means the front end of X.
- the rear end of X means the rear end of X.
- the left end of X means the left end of X.
- the right end of X means the right end of X.
- the upper end of X means the upper end of X.
- the lower end of X means the lower end of X.
- the front end of X means the front end of X and its vicinity.
- the rear end of X means the rear end of X and its vicinity.
- the left end of X means the left end of X and its vicinity.
- the right end of X means the right end of X and its vicinity.
- the upper end of X means the upper end of X and its vicinity.
- the lower end of X means the lower end of X and its vicinity.
- the multilayer board 10 transmits high-frequency signals.
- the multilayer board 10 is used to electrically connect two circuits in electronic devices such as smartphones.
- the multilayer board 10 includes a laminate 12, protective layers 18a and 18b, a signal conductor layer 20, a first ground conductor layer 22, a second ground conductor layer 24, mounting electrodes 26a and 26b, internal conductors 28a, 28b, 30a, 30b, 32a, and 32b, interlayer connection conductors v1 and v2, and a plurality of interlayer connection conductors v3 and v4.
- the laminate 12 has a plate shape. Therefore, the laminate 12 has an upper main surface (positive main surface) and a lower main surface (negative main surface) located below the upper main surface (positive main surface) (negative side of the Z axis).
- the upper and lower main surfaces of the laminate 12 have a rectangular shape with long sides extending along the left-right axis. Therefore, the left-right length of the laminate 12 is longer than the front-rear length of the laminate 12.
- the laminate 12 is flexible.
- the laminate 12 has a structure in which the insulating layers 16a to 16d are stacked along the vertical axis (Z-axis).
- the insulating layers 16a to 16d are arranged in this order from top to bottom.
- the material of the insulating layers 16a to 16d is, for example, a thermoplastic resin.
- the thermoplastic resin is, for example, a liquid crystal polymer.
- the insulating layers 16a to 16d are fused together with adjacent layers vertically.
- a high-frequency signal is transmitted to the signal conductor layer 20.
- the signal conductor layer 20 is located on the upper main surface of the insulator layer 16c.
- the signal conductor layer 20 has a linear shape that extends along the left-right axis.
- the first ground conductor layer 22 is provided in the laminate 12 as shown in FIG. 1.
- the first ground conductor layer 22 is located above the signal conductor layer 20 and overlaps with the signal conductor layer 20 when viewed in a downward direction.
- the first ground conductor layer 22 is located on the upper main surface of the insulator layer 16a.
- the first ground conductor layer 22 also covers substantially the entire upper main surface of the insulator layer 16a.
- a ground potential is connected to the first ground conductor layer 22.
- the second ground conductor layer 24 is provided in the laminate 12 as shown in FIG. 1.
- the second ground conductor layer 24 is located below the signal conductor layer 20 and overlaps with the signal conductor layer 20 when viewed in the downward direction.
- the second ground conductor layer 24 is located on the lower main surface of the insulator layer 16d.
- the second ground conductor layer 24 also covers substantially the entire lower main surface of the insulator layer 16d.
- a ground potential is connected to the second ground conductor layer 24.
- the signal conductor layer 20, the first ground conductor layer 22, and the second ground conductor layer 24 as described above have a stripline structure.
- the mounting electrode 26a is located on the upper main surface (front main surface) of the laminate 12. More specifically, the mounting electrode 26a is located at the left end of the upper main surface of the insulator layer 16a. When viewed in the vertical direction, the mounting electrode 26a overlaps with the left end of the signal conductor layer 20. When viewed in the vertical direction, the mounting electrode 26a has a rectangular shape.
- the mounting electrode 26a is an external terminal through which high-frequency signals are input and output.
- the mounting electrode 26a is not in contact with the first ground conductor layer 22.
- the structure of the mounting electrode 26b is symmetrical to the structure of the mounting electrode 26a, so a description of it will be omitted.
- the interlayer connection conductor v1 electrically connects the mounting electrode 26a and the left end of the signal conductor layer 20.
- the interlayer connection conductor v1 penetrates the insulator layers 16a and 16b in the vertical direction.
- the upper end of the interlayer connection conductor v1 contacts the mounting electrode 26a.
- the lower end of the interlayer connection conductor v1 contacts the left end of the signal conductor layer 20.
- the structure of the mounting electrode 26b and the interlayer connection conductor v2 is symmetrical to the structure of the mounting electrode 26a and the interlayer connection conductor v1, so a description thereof will be omitted.
- the multiple interlayer connection conductors v3 electrically connect the first ground conductor layer 22 and the second ground conductor layer 24. More specifically, the multiple interlayer connection conductors v3 are located in front of the signal conductor layer 20 as shown in FIG. 1. The multiple interlayer connection conductors v3 are aligned in a row in the left-right direction. The multiple interlayer connection conductors v3 penetrate the insulator layers 16a to 16d in the up-down direction. The upper ends of the multiple interlayer connection conductors v3 are in contact with the first ground conductor layer 22. The lower ends of the multiple interlayer connection conductors v3 are in contact with the second ground conductor layer 24.
- the multiple interlayer connection conductors v4 electrically connect the first ground conductor layer 22 and the second ground conductor layer 24. More specifically, the multiple interlayer connection conductors v4 are located behind the signal conductor layer 20 as shown in FIG. 1. The multiple interlayer connection conductors v4 are aligned in a row in the left-right direction. The multiple interlayer connection conductors v4 penetrate the insulator layers 16a to 16d in the up-down direction. The upper ends of the multiple interlayer connection conductors v4 are in contact with the first ground conductor layer 22. The lower ends of the multiple interlayer connection conductors v4 are in contact with the second ground conductor layer 24.
- the signal conductor layer 20, the first ground conductor layer 22, the second ground conductor layer 24, the interlayer connection conductors v1, v2, the multiple interlayer connection conductors v3, and the multiple interlayer connection conductors v4 as described above are one or more circuit conductors that form an electric circuit.
- the protective layer 18a covers a portion of the upper main surface (positive main surface in the Z-axis direction) of the laminate 12. As a result, the protective layer 18a protects the first ground conductor layer 22.
- the protective layer 18a has rectangular openings h1 to h6. Therefore, the protective layer 18a has six ring-shaped edges E when viewed downward (negative direction of the Z-axis).
- the opening h1 overlaps with the mounting electrode 26a when viewed in the up-down direction. That is, the mounting electrode 26a is located in an area surrounded by the ring-shaped edges E when viewed downward (negative direction of the Z-axis). As a result, the mounting electrode 26a is exposed to the outside from the multilayer substrate 10.
- the opening h2 is located in front of the opening h1. A portion of the first ground conductor layer 22 is exposed to the outside from the multilayer substrate 10 through the opening h2.
- the opening h3 is located behind the opening h1. A portion of the first ground conductor layer 22 is exposed to the outside from the multilayer substrate 10 through the opening h3. As a result, a portion of the first ground conductor layer 22 functions as a ground terminal. Note that the structure of the openings h4 to h6 is symmetrical to the structure of the openings h1 to h3, so a description of it will be omitted.
- the protective layer 18b covers the lower main surface of the laminate 12. In this way, the protective layer 18b protects the second ground conductor layer 24.
- the material of the protective layers 18a and 18b is different from the material of the insulating layers 16a to 16d.
- the protective layers 18a and 18b are what is known as solder resist.
- the material of the solder resist is a composition containing an alkali-soluble resin, a photopolymerization initiator, an epoxy resin to improve heat resistance, and inorganic powder.
- the internal conductors 28a, 30a, and 32a are provided inside the laminate 12.
- the internal conductors 28a, 30a, and 32a are located at the left end of the upper main surface of the insulator layer 16b.
- each of the internal conductors 28a, 30a, and 32a overlaps with the edge E of the protective layer 18a when viewed downward (negative direction of the Z axis).
- each of the internal conductors 28a, 30a, and 32a extends along the edge E of the protective layer 18a when viewed downward (negative direction of the Z axis).
- each of the internal conductors 28a, 30a, and 32a has a ring shape that follows the ring-shaped edge E of the openings h1, h2, and h3 of the protective layer 18a when viewed downward (negative direction of the Z axis). Therefore, the internal conductors 28a, 30a, and 32a have a rectangular ring shape when viewed downward.
- the structure of the internal conductors 28b, 30b, and 32b is symmetrical to the structure of the internal conductors 28a, 30a, and 32a, so a description thereof will be omitted.
- the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b described above are not electrically connected in series with one or more circuit conductors.
- the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b do not transmit high-frequency signals, are not connected to a ground potential, or are not connected to a power supply potential.
- the potential of the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b is a floating potential.
- the signal conductor layer 20, the first ground conductor layer 22, the second ground conductor layer 24, the mounting electrodes 26a, 26b, and the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b described above are formed, for example, by etching metal foil provided on the upper or lower main surfaces of the insulator layers 16a to 16d.
- the metal foil is, for example, copper foil.
- the signal conductor layer 20, the first ground conductor layer 22, the second ground conductor layer 24, the mounting electrodes 26a, 26b (at least one or more circuit conductors), and the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b are metal foils provided on the main surfaces of the insulator layers 16a to 16d.
- the interlayer connection conductors v1 to v4 are, for example, via hole conductors.
- the via hole conductors are produced by forming through holes in the insulator layers 16a to 16d, filling the through holes with conductive paste, and sintering the conductive paste.
- the material of the interlayer connection conductors v1 to v4 is a mixture of resin and metal.
- the upper main surface (positive main surface) of the laminate 12 has protrusions P1 to P6 (only protrusion P1 is shown in FIG. 2).
- Protrusions P1 to P3 are located at the left end of the upper main surface of the insulator layer 16a.
- Protrusions P4 to P6 are located at the right end of the upper main surface of the insulator layer 16a.
- each of the protrusions P1 to P6 overlaps with the edge E of the openings h1 to h6 in the protective layer 18a and the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b.
- each of the protrusions P1 to P6 has a linear shape extending along the internal conductors 28a, 28b, 30a, 30b, 32a, 32b and the edge E of the openings h1 to h6 of the protective layer 18a. Therefore, each of the protrusions P1 to P6 has a ring shape that follows the ring-shaped edge E of the internal conductors 28a, 28b, 30a, 30b, 32a, 32b and the openings h1 to h6 when viewed downward (negative direction of the Z axis).
- the length of each of the linear protrusions P1 to P6 is longer than the width of the linear protrusions P1 to P6. Because the protrusions P1 to P6 are provided as described above, the thickness T1 of the protective layer 18a at the portions where the protective layer 18a overlaps with the protrusions P1 to P6 when viewed downward (negative direction of the Z axis) is smaller than the thickness T2 of the protective layer 18a at the portions where the protective layer 18a does not overlap with the protrusions P1 to P6 when viewed downward (negative direction of the Z axis).
- the multilayer substrate 10 described above has flexibility. Therefore, as shown in FIG. 3, the multilayer substrate 10 can be bent. Specifically, the multilayer substrate 10 has a first section A1 and a second section A2. The protrusions P1 to P3 are located in the second section A2. The second section A2 is bent when viewed in the forward direction (the positive direction of the Y-axis perpendicular to the Z-axis).
- the insulator layers 16a to 16d with metal foil attached to the upper or lower principal surface. Then, pattern the metal foil to form the signal conductor layer 20, the first ground conductor layer 22, the second ground conductor layer 24, the mounting electrodes 26a, 26b, and the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b.
- the insulator layers 16a to 16d are arranged from top to bottom in this order.
- the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b are provided inside the laminate 12.
- the laminate in which the insulator layers 16a to 16d are stacked is compressed (compression bonding process).
- compression bonding process an isotropic press is used.
- thermocompression bonding process a heat treatment is also performed.
- the insulator layer 16a is pushed upward by the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b.
- protrusions P1 to P6 are formed on the upper main surface (front main surface) of the laminate 12 in the portions that overlap with the internal conductors 28a, 28b, 30a, 30b, 32a, and 32b.
- protective layers 18a and 18b are formed on the laminate 12 that has been pressed (protective layer forming process).
- the protective layer 18a is formed on the upper main surface (positive main surface) of the laminate 12 so that the edge E of the protective layer 18a overlaps the protrusions P1 to P6 when viewed downward (negative direction of the Z axis).
- the photosensitive material of the protective layers 18a and 18b is applied to the entire upper main surface and the entire lower main surface of the laminate 12 by screen printing.
- the thickness T1 of the material of the protective layer 18a at the portion where the protective layer 18a overlaps the protrusions P1 to P6 when viewed downward (negative direction of the Z axis) is smaller than the thickness T2 of the material of the protective layer 18a at the portion where the protective layer 18a does not overlap the protrusions P1 to P6 when viewed downward (negative direction of the Z axis).
- the material of the protective layers 18a and 18b is exposed to light.
- the uncured material of the protective layers 18a and 18b is removed. This forms the protective layer 18a with a shape in which the edge E of the protective layer 18a overlaps with the protrusions P1 to P6.
- the internal conductor 28a is provided inside the laminate 12, and overlaps the edge E of the protective layer 18a when viewed in the downward direction, and extends along the edge E of the protective layer 18a when viewed in the downward direction.
- a protrusion P1 that overlaps with the internal conductor 28a when viewed in the downward direction is formed.
- the protective layer 18a is formed on the upper main surface of the laminate 12 having such a protrusion P1.
- the thickness T1 of the protective layer 18a at the portion where the protective layer 18a overlaps with the protrusion P1 when viewed in the downward direction is smaller than the thickness T2 of the protective layer 18a at the portion where the protective layer 18a does not overlap with the protrusion P1 when viewed in the downward direction.
- the thickness in the vertical direction of the edge E of the protective layer 18a is small. Therefore, the amount of undercut occurring in the protective layer 18a is reduced. Therefore, according to the multilayer board 10, peeling of the protective layer 18a can be suppressed.
- the multilayer substrate 10 can prevent peeling of the protective layer 18a without adding a new process. More specifically, in the multilayer substrate 10, the internal conductor 28a is formed in order to form the protrusion P1. At least a portion of the one or more circuit conductors and the internal conductor 28a are metal foils provided on the main surfaces of the insulator layers 16a to 16d. In other words, the process of forming the internal conductor 28a can be carried out in the same manner as the process of forming at least a portion of the one or more circuit conductors. Therefore, it is not necessary to add a new process to form the internal conductor 28a.
- the protrusion P1 is located in the second section A2. This effectively prevents peeling of the protective layer 18a.
- the multilayer substrate 10 makes it easy for the protrusion P1 to be formed. More specifically, the mounting electrode 26a is located in an area surrounded by the edge E of the ring shape of the opening h1 when viewed from below.
- the internal conductor 28a has a ring shape that follows the edge E of the ring shape of the opening h1 when viewed from below.
- the hard mounting electrode 26a is pressed downward, and the mounting electrode 26a and its surroundings are recessed downward. Meanwhile, the portion of the upper main surface of the laminate 12 where the internal conductor 28a is present is pressed upward by the internal conductor 28a. As a result, the protrusion P1 is easy to be formed.
- FIG. 6 is a cross-sectional view and a top view of the multilayer substrate 10a.
- the multilayer substrate 10a differs from the multilayer substrate 10 in that it further includes an internal conductor 34a and a plurality of first connecting conductors v10.
- the multilayer substrate 10a further includes an internal conductor 34a. Therefore, the number of internal conductors is multiple. In addition, when viewed in the downward direction (negative direction of the Z axis), the internal conductors 28a and 34a overlap each other. When viewed in the downward direction, the internal conductor 34a has the same shape as the internal conductor 28a. The internal conductor 34a is located on the upper main surface of the insulator layer 16c.
- the multilayer substrate 10a further includes a plurality of first connecting conductors v10.
- the plurality of first connecting conductors v10 penetrate the insulator layer 16b (any of the plurality of insulator layers 16a to 16d) along the vertical axis (Z axis), and connect the internal conductor 28a and the internal conductor 34a (two of the plurality of internal conductors). When viewed in the downward direction, the plurality of first connecting conductors v10 are arranged at equal intervals along the internal conductors 28a and 34a.
- the other structure of the multilayer substrate 10a is the same as that of the multilayer substrate 10, so a description thereof will be omitted. Multilayer board 10a can achieve the same effects as multilayer board 10.
- the internal conductor 34a and the multiple first connecting conductors v10 are located below the internal conductor 28a. This makes it easier to form the protrusion P1.
- Fig. 7 is a cross-sectional view of the multilayer substrate 10b.
- the multilayer board 10b differs from the multilayer board 10 in the following respects:
- the edge E of the protective layer 18a is a straight line extending along the front-rear axis.
- the multilayer board 10b further includes internal conductors 34a, 36a, 38a, a surface conductor 40a, a first connecting conductor v10, a second connecting conductor v12, a third connecting conductor v14, and a fourth connecting conductor v16.
- the internal conductors 34a, 36a, 38a are located on the upper main surfaces of the insulator layers 16c to 16e. When viewed from below, the internal conductors 34a, 36a, 38a overlap the edge E of the protective layer 18a. Therefore, when viewed from below, the internal conductors 34a, 36a, 38a extend along the front-to-rear axis. When viewed from below, the internal conductors 34a, 36a, 38a overlap each other.
- the surface conductor 40a is located on the upper main surface (positive main surface) of the laminate 12, and overlaps with the edge E of the protective layer 18a when viewed downward (negative direction of the Z axis). Therefore, the surface conductor 40a extends along the front-to-rear axis when viewed downward. The surface conductor 40a overlaps with the internal conductors 34a, 36a, and 38a when viewed downward.
- the multiple first connecting conductors v10 penetrate the insulator layer 16b (any of the multiple insulator layers 16a to 16d) along the vertical axis (Z-axis) and connect the internal conductor 28a and the internal conductor 34a (two of the multiple internal conductors). When viewed in the downward direction, the multiple first connecting conductors v10 are aligned along the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a.
- the second connecting conductors v12 penetrate the insulator layer 16c (any of the insulator layers 16a to 16d) along the vertical axis (Z axis), and connect the internal conductor 34a and the internal conductor 36a (two of the internal conductors).
- the second connecting conductors v12 are located below the first connecting conductors v10 (negative side of the Z axis), and overlap with the first connecting conductors v10 when viewed in the downward direction (negative direction of the Z axis).
- the second connecting conductors v12 are aligned along the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a when viewed in the downward direction.
- the multiple third connecting conductors v14 penetrate the insulator layer 16d (any of the multiple insulator layers 16a to 16d) along the up-down axis (Z-axis), and connect the internal conductor 36a and the internal conductor 38a (two of the multiple internal conductors).
- the multiple third connecting conductors v14 are located below the multiple first connecting conductors v10 (negative side of the Z-axis), and overlap with the multiple first connecting conductors v10 when viewed in the downward direction (negative direction of the Z-axis).
- the multiple third connecting conductors v14 are lined up along the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a when viewed in the downward direction.
- the multiple fourth connecting conductors v16 penetrate the insulator layer 16a (any of the multiple insulator layers 16a to 16d) along the vertical axis (Z axis) and connect the surface conductor 40a and the internal conductor 28a.
- the multiple fourth connecting conductors v16 overlap with the multiple first connecting conductors v10 when viewed in the downward direction (negative direction of the Z axis).
- the multiple fourth connecting conductors v16 are aligned along the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a when viewed in the downward direction.
- the rest of the structure of the multilayer board 10b is the same as that of the multilayer board 10, so a description will be omitted.
- the multilayer board 10b can achieve the same effects as the multilayer board 10.
- the multilayer substrate 10b in addition to the internal conductor 28a, internal conductors 34a, 36a, 38a, a surface conductor 40a, a plurality of first connecting conductors v10, a plurality of second connecting conductors v12, a plurality of third connecting conductors v14, and a plurality of fourth connecting conductors v16 are provided. This makes it easier to form the protrusion P1.
- Fig. 8 is a cross-sectional view of the multilayer substrate 10c.
- Multilayer board 10c differs from multilayer board 10 in that an undercut occurs at edge E of opening h1 in protective layer 18a.
- thickness T1 of protective layer 18a at the portion where protective layer 18a overlaps with protrusion P1 when viewed from below is smaller than thickness T2 of protective layer 18a at the portion where protective layer 18a does not overlap with protrusion P1 when viewed from below. Therefore, the amount of undercut at edge E of opening h1 in protective layer 18a is smaller in multilayer board 10b.
- the rest of the structure of multilayer board 10c is the same as multilayer board 10, so a description will be omitted. Multilayer board 10c can achieve the same effects as multilayer board 10.
- FIG. 9 shows a cross-sectional view and a top view of the multi-layer substrate 10d.
- the multilayer board 10d differs from the multilayer board 10b in that it has multiple internal conductors 28a instead of the internal conductor 28a, and does not have the internal conductors 34a, 36a, 38a, the surface conductor 40a, the first connecting conductor v10, the second connecting conductor v12, the third connecting conductor v14, and the fourth connecting conductor v16.
- the multiple internal conductors 28a are provided inside the laminate 12.
- the multiple internal conductors 28a overlap the edge E of the protective layer 18b when viewed downward (negative direction of the Z axis), and are arranged at equal intervals along the edge E of the protective layer 18a when viewed downward (negative direction of the Z axis).
- the multiple first connecting conductors v10 are not in contact with each other.
- the other structure of the multilayer board 10d is the same as that of the multilayer board 10, so a description will be omitted.
- the multilayer board 10d can achieve the same effect as the multilayer board 10. This makes it difficult for the protective layer 18a to peel off at the edge E where it overlaps with the multiple internal conductors 28a.
- Fig. 10 is a cross-sectional view and a top view of the multilayer substrate 10e.
- the multilayer board 10e differs from the multilayer board 10d in that it has a plurality of first connecting conductors v10 instead of a plurality of internal conductors 28a.
- the plurality of first connecting conductors v10 are a plurality of internal conductors.
- the plurality of first connecting conductors v10 penetrate the insulator layer 16b along the up-down axis.
- the plurality of first connecting conductors v10 overlap with the edge E of the protective layer 18b when viewed downward (negative direction of the Z axis), and are arranged at equal intervals along the edge E of the protective layer 18a when viewed downward (negative direction of the Z axis).
- the plurality of first connecting conductors v10 are not in contact with adjacent ones.
- the other structure of the multilayer board 10e is the same as that of the multilayer board 10d, so a description thereof will be omitted.
- the multilayer board 10e can achieve the same effect as the multilayer board 10d.
- FIG. 11 is a cross-sectional view of the multilayer substrate 10f and a top view of the multilayer substrate 10f.
- Fig. 12 is a rear view of the multilayer substrate 10f when in use.
- Multilayer board 10f differs from multilayer board 10d in that laminate 12 is cut at protrusion P1 and that internal conductor 28a has a linear shape when viewed downward.
- Such multilayer board 10f can be bent as shown in FIG. 12.
- multilayer board 10 has first section A1 and second section A2.
- Protrusion P1 is located in second section A2.
- Second section A2 is bent when viewed in the forward direction (positive direction of Y-axis perpendicular to Z-axis).
- Other structure of multilayer board 10f is the same as multilayer board 10d, so description will be omitted.
- Figures 13, 14, and 15 are cross-sectional views of the multilayer substrate 10 during manufacturing.
- Figure 16 is a top view of the mother substrate 100.
- the insulator layers 16a to 16e With metal foil attached to the upper or lower principal surface. Then, pattern the metal foil to form the signal conductor layer 20, the first ground conductor layer 22, the second ground conductor layer 24, the mounting electrodes 26a and 26b, and the internal conductor 28a.
- the insulator layers 16a to 16e are arranged from top to bottom in this order. Then, the laminate in which the insulator layers 16a to 16e are stacked is compressed (compression bonding process). In the compression bonding process, an isotropic press is used. In addition, in the thermocompression bonding process, a heat treatment is also performed. At this time, as shown in FIG. 14, the insulator layer 16a is pushed upward by the internal conductor 28a. As a result, in the compression bonding process, protrusions P1 are formed on each of the portions of the upper main surface (front main surface) of the laminate 12 that overlap with the internal conductor 28a. In addition, the internal conductor 28a is provided inside the laminate 12.
- protective layers 18a and 18b are formed on the laminate 12 that has been pressed (protective layer forming process).
- the protective layer 18a is formed on the upper main surface (positive main surface) of the laminate 12 so that the protective layer 18a covers the protrusion P1 when viewed downward (negative direction of the Z axis).
- the material of the protective layers 18a and 18b is applied to the upper and lower main surfaces of the laminate 12 by screen printing.
- the thickness T1 of the protective layer 18a at the portion where the protective layer 18a overlaps with the protrusion P1 when viewed downward (negative direction of the Z axis) is smaller than the thickness T2 of the protective layer 18a at the portion where the protective layer 18a does not overlap with the protrusion P1 when viewed downward (negative direction of the Z axis).
- the laminate 12 on which the protective layers 18a and 18b are formed is cut (cutting process).
- the laminate 12 is cut so that the protrusion P1 is divided when viewed downward (negative direction of the Z axis).
- the mother board 100 is cut along the internal conductor 28a as shown in FIG. 16.
- the multilayer board 10f is completed.
- the multilayer board according to the present invention is not limited to the multilayer boards 10, 10a to 10f, and may be modified within the scope of the invention.
- the structures of the multilayer boards 10, 10a to 10f may be combined in any desired manner.
- protective layer 18b is not a required component.
- a protrusion may be provided on the lower main surface of the laminate 12, and the edge of the protective layer 18b may overlap the protrusion.
- the signal conductor layer 20, the first ground conductor layer 22, and the second ground conductor layer 24 are not essential components.
- the material of the insulator layers 16a to 16e may be, for example, ceramic.
- the protective layer 18a only needs to cover at least a portion of the upper main surface of the laminate 12. Therefore, the protective layer 18a may cover the entire upper main surface of the laminate 12. In this case, a protrusion P1 is present near the outer edge of the upper main surface of the laminate 12. This prevents the protective layer 18a from peeling off from the outer edge of the upper main surface of the laminate 12.
- the potential of the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a does not have to be a floating potential.
- the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a may be connected to a ground potential, for example. However, if the potential of the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a is a floating potential, the internal conductors 28a, 34a, 36a, 38a and the surface conductor 40a are less likely to affect the surrounding electric circuits.
- first connecting conductor v10 may be provided in the multilayer substrate 10e.
- adjacent first connecting conductors v10 may be in contact with each other.
- the present invention has the following structure:
- the multilayer substrate includes a laminate, a protective layer, and one or more internal conductors
- the laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
- the laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface;
- a material of the protective layer is different from a material of the plurality of insulator layers;
- the one or more internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and extend along the edge of the protective layer when viewed in the negative direction of the Z axis;
- a protrusion is provided on the front main surface of the laminate, When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the one or more internal conductors, and has a linear shape extending along the edge of the protective layer;
- the multilayer substrate further comprises one or more circuit conductors forming an electrical circuit; the one or more inner conductors are not electrically connected in series with the one or more circuit conductors; A multilayer substrate according to (1).
- the multilayer substrate further comprises one or more circuit conductors forming an electrical circuit; At least a portion of the one or more circuit conductors and the one or more internal conductors are metal foils provided on the main surfaces of the plurality of insulating layers.
- the number of the one or more internal conductors is plural, When viewed in the negative direction of the Z axis, the multiple internal conductors overlap each other.
- the multilayer substrate further includes a first connection conductor, The first connection conductor passes through any one of the plurality of insulating layers along the Z-axis and connects two of the plurality of internal conductors.
- the multilayer substrate further includes a second connection conductor, the second connecting conductor penetrates any one of the plurality of insulating layers along the Z-axis, connects two of the plurality of internal conductors, is located on the negative side of the Z-axis relative to the first connecting conductor, and overlaps with the first connecting conductor when viewed in the negative direction of the Z-axis.
- the one or more internal conductors are connecting conductors that pass through any one of the plurality of insulating layers along the Z-axis.
- the multilayer substrate has a first section and a second section, The protrusion is located in the second section, The second section is bent when viewed in a positive direction of a Y axis perpendicular to the Z axis.
- the multilayer substrate further includes a surface conductor, the surface conductor is located on the positive principal surface and overlaps an edge of the protective layer when viewed in the negative direction of the Z axis;
- the multilayer substrate further includes a mounting electrode, the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis, the mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis, the internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis, The protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
- a multilayer substrate according to any one of (1) to (9).
- the multilayer substrate includes a laminate, a protective layer, and a plurality of internal conductors.
- the laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
- the laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers a portion of the positive principal surface, a material of the protective layer is different from a material of the plurality of insulator layers;
- the plurality of internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and are arranged along the edge of the protective layer when viewed in the negative direction of the Z axis;
- a protrusion is provided on the front main surface of the laminate, When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the plurality of internal conductors, and has a linear shape extending along the edge of the protective layer;
- the manufacturing method of the multilayer board is as follows: a bonding step of bonding the laminate; a protective layer forming step of forming a protective layer on the laminated body; Equipped with The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis, The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface; a material of the protective layer is different from a material of the plurality of insulator layers; One or more internal conductors are provided within the laminate; In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors, In the protective layer forming step, the protective layer is formed on the positive main surface such that an edge of the protective layer overlaps the protrusion when viewed in the negative direction of the Z axis. A method for manufacturing a multilayer board.
- the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis, a mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis;
- the protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis,
- the internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
- the manufacturing method of the multilayer board is as follows: a bonding step of bonding the laminate; a protective layer forming step of forming a protective layer on the laminated body; a cutting step of cutting the laminate on which the protective layer is formed; Equipped with The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis, The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface, the protective layer covers at least a portion of the positive main surface; a material of the protective layer is different from a material of the plurality of insulator layers; One or more internal conductors are provided within the laminate; In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors, In the protective layer forming step, the protective layer is formed on the positive main surface such that the protective layer covers the protrusion when viewed in the negative direction of the Z axis, In the cutting step
- Multilayer board 12 Laminated bodies 16a to 16e: Insulator layers 18a, 18b: Protective layer 20: Signal conductor layer 22: First ground conductor layer 24: Second ground conductor layer 26a, 26b: Mounting electrodes 28a, 28b, 30a, 30b, 32a, 32b, 34a, 36a, 38a: Internal conductor 40a: Surface conductor A1: First section A2: Second section E: Edges P1 to P6: Protrusions h1 to h6: Opening v10: First connecting conductor v12: Second connecting conductor v14: Third connecting conductor v16: Fourth connecting conductor
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Abstract
Description
本発明は、複数の絶縁体層が積層された構造を有する多層基板に関する。 The present invention relates to a multilayer substrate having a structure in which multiple insulating layers are stacked.
従来の多層基板に関する発明としては、例えば、特許文献1に記載のプリント配線基板の製造方法が知られている。このプリント配線基板の製造方法では、レジスト層のアンダーカット量を低減することを目的としている。レジスト層のアンダーカットについて以下に説明する。 A known example of a conventional invention related to a multilayer board is the method of manufacturing a printed wiring board described in Patent Document 1. The purpose of this method of manufacturing a printed wiring board is to reduce the amount of undercut in the resist layer. The undercut in the resist layer is explained below.
レジスト層は以下の手順により形成される。感光性レジストを基板に塗布する。マスクを介して光を照射することにより、感光性レジストを硬化させる。最後に、未硬化の感光性レジストを除去する。ここで、マスクの縁近傍では、マスクの影となる部分が露光時に発生する。このマスクの影となる部分では、感光性レジストに十分な光が照射されない。そのため、マスクの影となる部分において、感光性レジストが十分に硬化しない。その結果、特許文献1の図1(b)に示すように、レジスト層の端面が上下方向に対して斜めに傾く。レジスト層の端面が上下方向に対して斜めに傾く現象をアンダーカットと呼ぶ。このようなアンダーカットが発生すると、レジスト層が基板から剥がれやすい。 The resist layer is formed by the following procedure: Photosensitive resist is applied to the substrate. The photosensitive resist is hardened by irradiating it with light through a mask. Finally, the unhardened photosensitive resist is removed. Here, near the edge of the mask, a portion in the shadow of the mask is generated during exposure. In this portion in the shadow of the mask, the photosensitive resist is not irradiated with sufficient light. Therefore, the photosensitive resist does not harden sufficiently in the portion in the shadow of the mask. As a result, as shown in FIG. 1(b) of Patent Document 1, the end face of the resist layer is inclined obliquely in the vertical direction. The phenomenon in which the end face of the resist layer is inclined obliquely in the vertical direction is called undercut. When such undercut occurs, the resist layer is easily peeled off from the substrate.
そこで、特許文献1に記載のプリント配線基板の製造方法のように、レジスト層のアンダーカット量を低減する発明が提案されている。これにより、特許文献1に記載のプリント配線基板の製造方法では、レジスト層の剥がれを抑制している。 In light of this, an invention has been proposed that reduces the amount of undercut in the resist layer, as in the method of manufacturing a printed wiring board described in Patent Document 1. As a result, the method of manufacturing a printed wiring board described in Patent Document 1 suppresses peeling of the resist layer.
以上のように、レジスト層の剥がれを抑制できる多層基板が求められている。 As described above, there is a demand for multilayer substrates that can prevent peeling of the resist layer.
そこで、本発明の目的は、保護層の剥がれを抑制できる新たな多層基板及び多層基板の製造方法を提供することである。 The object of the present invention is to provide a new multilayer board and a method for manufacturing a multilayer board that can prevent peeling of the protective layer.
本発明の一形態に係る多層基板は、積層体と、保護層と、1以上の内部導体と、を備え、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記1以上の内部導体は、前記多層基板の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って延びており、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記1以上の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さく、
前記Z軸の負方向に見て、線形状の前記突起の長さは、線形状の前記突起の幅より長い。
A multilayer substrate according to one embodiment of the present invention includes a laminate, a protective layer, and one or more internal conductors.
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
the one or more internal conductors are provided inside the multilayer substrate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and extend along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the one or more internal conductors, and has a linear shape extending along the edge of the protective layer;
a thickness of the protective layer at a portion where the protective layer overlaps with the protrusion as viewed in the negative direction of the Z axis is smaller than a thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion as viewed in the negative direction of the Z axis,
When viewed in the negative direction of the Z axis, the length of the linear protrusion is greater than the width of the linear protrusion.
本発明の一形態に係る多層基板は、積層体と、保護層と、複数の内部導体と、を備え、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記複数の内部導体は、前記多層基板の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って並んでおり、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記複数の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さい。
A multilayer substrate according to one embodiment of the present invention includes a laminate, a protective layer, and a plurality of internal conductors.
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers a portion of the positive principal surface,
a material of the protective layer is different from a material of the plurality of insulator layers;
the plurality of internal conductors are provided inside the multilayer substrate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and are arranged along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the plurality of internal conductors, and has a linear shape extending along the edge of the protective layer;
The thickness of the protective layer at a portion where the protective layer overlaps with the protrusion when viewed in the negative direction of the Z axis is smaller than the thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion when viewed in the negative direction of the Z axis.
本発明の一形態に係る多層基板の製造方法は、
積層体を圧着する圧着工程と、
圧着された前記積層体に保護層を形成する保護層形成工程と、
を備えており、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
1以上の内部導体が、前記多層基板の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起を形成し、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層の縁が前記突起と重なるように、前記保護層を前記正主面に形成する。
A method for manufacturing a multilayer substrate according to one embodiment of the present invention includes the steps of:
a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
one or more internal conductors are provided within the multilayer substrate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that an edge of the protective layer overlaps the protrusion when viewed in the negative direction of the Z axis.
本発明の一形態に係る多層基板の製造方法は、
積層体を圧着する圧着工程と、
圧着された前記積層体に保護層を形成する保護層形成工程と、
前記保護層が形成された前記積層体をカットするカット工程と、
を備え、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は前記複数の絶縁体層の材料とは異なっており、
1以上の内部導体は前記積層体の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起を形成し、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層が前記突起を覆うように、前記保護層を前記正主面に形成し、
前記カット工程では、前記Z軸の負方向に見て、前記突起が分割されるように前記積層体をカットする。
A method for manufacturing a multilayer substrate according to one embodiment of the present invention includes the steps of:
a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
a cutting step of cutting the laminate on which the protective layer is formed;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
one or more internal conductors are provided within the laminate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that the protective layer covers the protrusion when viewed in the negative direction of the Z axis,
In the cutting step, the laminate is cut so that the protrusion is divided when viewed in the negative direction of the Z axis.
本発明に係る多層基板及び多層基板の製造方法によれば、保護層の剥がれを抑制できる。 The multilayer board and the method for manufacturing the multilayer board according to the present invention can prevent the protective layer from peeling off.
(実施形態)
[多層基板の構造]
以下に、本発明の実施形態に係る多層基板10の構造について図面を参照しながら説明する。図1は多層基板10の分解斜視図である。図2は多層基板10の断面図及び多層基板10の上面図である。図2では、図1のA-Aにおける断面を示した。図3は多層基板10の使用時における正面図である。なお、図1では、複数の層間接続導体v3,v4の内の代表的な層間接続導体v3,v4にのみ参照符号を付した。
(Embodiment)
[Multilayer board structure]
The structure of a
本明細書において、方向を以下のように定義する。多層基板10の積層体12の積層方向を上下方向と定義する。また、上下方向はZ軸方向と一致する。上方向はZ軸の正方向である。下方向はZ軸の負方向である。また、多層基板10の信号導体層20が延びている方向を左右方向と定義する。また、上下方向に見て、信号導体層20の線幅方向を前後方向と定義する。上下方向、前後方向及び左右方向は、互いに直交している。なお、上下方向の上方向と下方向とが入れ替わってもよいし、左右方向の左方向と右方向とが入れ替わってもよいし、前後方向の前方向と後方向とが入れ替わってもよい。
In this specification, directions are defined as follows. The stacking direction of the
以下では、Xは多層基板10の部品又は部材である。本明細書において、特に断りのない場合には、Xの各部について以下のように定義する。Xの前部とはXの前半分を意味する。Xの後部とはXの後半分を意味する。Xの左部とはXの左半分を意味する。Xの右部とはXの右半分を意味する。Xの上部とはXの上半分を意味する。Xの下部とはXの下半分を意味する。Xの前端とはXの前方向の端を意味する。Xの後端とはXの後方向の端を意味する。Xの左端とはXの左方向の端を意味する。Xの右端とはXの右方向の端を意味する。Xの上端とはXの上方向の端を意味する。Xの下端とはXの下方向の端を意味する。Xの前端部とはXの前端及びその近傍を意味する。Xの後端部とはXの後端及びその近傍を意味する。Xの左端部とはXの左端及びその近傍を意味する。Xの右端部とはXの右端及びその近傍を意味する。Xの上端部とはXの上端及びその近傍を意味する。Xの下端部とはXの下端及びその近傍を意味する。
In the following, X is a part or member of the
まず、図1を参照しながら、多層基板10の構造について説明する。多層基板10は高周波信号を伝送する。多層基板10は、スマートフォン等の電子機器において、2つの回路を電気的に接続するために用いられる。多層基板10は、図1に示すように、積層体12、保護層18a,18b、信号導体層20、第1グランド導体層22、第2グランド導体層24、実装電極26a,26b、内部導体28a,28b,30a,30b,32a,32b、層間接続導体v1,v2及び複数の層間接続導体v3,v4を備えている。
First, the structure of the
積層体12は板形状を有している。従って、積層体12は、上主面(正主面)、及び、上主面(正主面)より下(Z軸の負側)に位置する下主面(負主面)を有している。積層体12の上主面及び下主面は、左右軸に沿って延びる長辺を有する長方形状を有している。従って、積層体12の左右方向の長さは、積層体12の前後方向の長さより長い。積層体12は可撓性を有している。 The laminate 12 has a plate shape. Therefore, the laminate 12 has an upper main surface (positive main surface) and a lower main surface (negative main surface) located below the upper main surface (positive main surface) (negative side of the Z axis). The upper and lower main surfaces of the laminate 12 have a rectangular shape with long sides extending along the left-right axis. Therefore, the left-right length of the laminate 12 is longer than the front-rear length of the laminate 12. The laminate 12 is flexible.
積層体12は、図1に示すように、絶縁体層16a~16dが上下軸(Z軸)に沿って積層された構造を有している。絶縁体層16a~16dは、上から下へとこの順に並んでいる。絶縁体層16a~16dの材料は、例えば、熱可塑性樹脂である。熱可塑性樹脂は、例えば、液晶ポリマである。そして、絶縁体層16a~16dは、上下に隣り合うもの同士で融着している。
As shown in FIG. 1, the laminate 12 has a structure in which the insulating
信号導体層20には高周波信号が伝送される。信号導体層20は、図1に示すように、絶縁体層16cの上主面に位置している。信号導体層20は、左右軸に沿って延びる線形状を有している。
A high-frequency signal is transmitted to the
第1グランド導体層22は、図1に示すように、積層体12に設けられている。第1グランド導体層22は、信号導体層20より上に位置し、かつ、下方向に見て、信号導体層20と重なっている。本実施形態では、第1グランド導体層22は絶縁体層16aの上主面に位置している。また、第1グランド導体層22は絶縁体層16aの上主面の略全面を覆っている。第1グランド導体層22にはグランド電位が接続される。
The first ground conductor layer 22 is provided in the laminate 12 as shown in FIG. 1. The first ground conductor layer 22 is located above the
第2グランド導体層24は、図1に示すように、積層体12に設けられている。第2グランド導体層24は、信号導体層20より下に位置し、かつ、下方向に見て、信号導体層20と重なっている。本実施形態では、第2グランド導体層24は絶縁体層16dの下主面に位置している。また、第2グランド導体層24は絶縁体層16dの下主面の略全面を覆っている。第2グランド導体層24にはグランド電位が接続される。以上のような信号導体層20、第1グランド導体層22及び第2グランド導体層24は、ストリップライン構造を有している。
The second
実装電極26aは、図1に示すように、積層体12の上主面(正主面)に位置している。より詳細には、実装電極26aは、絶縁体層16aの上主面の左端部に位置している。実装電極26aは、上下方向に見て、信号導体層20の左端部と重なっている。実装電極26aは、上下方向に見て、長方形状を有している。実装電極26aは、高周波信号が入出力する外部端子である。実装電極26aは、第1グランド導体層22に接触していない。実装電極26bの構造は、実装電極26aの構造と左右対称であるので説明を省略する。
As shown in FIG. 1, the mounting
層間接続導体v1は、図1及び図2に示すように、実装電極26aと信号導体層20の左端部とを電気的に接続している。層間接続導体v1は、絶縁体層16a,16bを上下方向に貫通している。層間接続導体v1の上端は実装電極26aに接している。層間接続導体v1の下端は信号導体層20の左端部に接している。実装電極26b及び層間接続導体v2の構造は、実装電極26a及び層間接続導体v1の構造と左右対称であるので、説明を省略する。
As shown in Figures 1 and 2, the interlayer connection conductor v1 electrically connects the mounting
複数の層間接続導体v3は、第1グランド導体層22と第2グランド導体層24とを電気的に接続している。より詳細には、複数の層間接続導体v3は、図1に示すように、信号導体層20より前に位置している。複数の層間接続導体v3は左右方向に一列に並んでいる。複数の層間接続導体v3は、絶縁体層16a~16dを上下方向に貫通している。複数の層間接続導体v3の上端は、第1グランド導体層22に接している。複数の層間接続導体v3の下端は第2グランド導体層24に接している。
The multiple interlayer connection conductors v3 electrically connect the first ground conductor layer 22 and the second
複数の層間接続導体v4は、第1グランド導体層22と第2グランド導体層24とを電気的に接続している。より詳細には、複数の層間接続導体v4は、図1に示すように、信号導体層20より後に位置している。複数の層間接続導体v4は左右方向に一列に並んでいる。複数の層間接続導体v4は、絶縁体層16a~16dを上下方向に貫通している。複数の層間接続導体v4の上端は第1グランド導体層22に接している。複数の層間接続導体v4の下端は第2グランド導体層24に接している。
The multiple interlayer connection conductors v4 electrically connect the first ground conductor layer 22 and the second
以上のような信号導体層20、第1グランド導体層22、第2グランド導体層24、層間接続導体v1,v2、複数の層間接続導体v3及び複数の層間接続導体v4は、電気回路を形成する1以上の回路導体である。
The
保護層18aは、積層体12の上主面(Z軸の正主面)の一部分を覆っている。これにより、保護層18aは、第1グランド導体層22を保護している。ただし、保護層18aには、長方形状の開口h1~h6が設けられている。従って、保護層18aは、下方向(Z軸の負方向)に見て、6個の環形状の縁Eを有している。開口h1は、上下方向に見て、実装電極26aと重なっている。すなわち、実装電極26aは、下方向(Z軸の負方向)に見て、環形状の縁Eに囲まれた領域に位置している。これにより、実装電極26aは多層基板10から外部に露出している。開口h2は開口h1の前に位置している。第1グランド導体層22の一部分は開口h2を介して多層基板10から外部に露出している。開口h3は開口h1の後に位置している。第1グランド導体層22の一部分は開口h3を介して多層基板10から外部に露出している。これにより、第1グランド導体層22の一部分はグランド端子として機能する。なお、開口h4~h6の構造は、開口h1~h3の構造と左右対称であるので説明を省略する。
The
保護層18bは積層体12の下主面を覆っている。これにより、保護層18bは第2グランド導体層24を保護している。
The
以上のような保護層18a,18bの材料は、絶縁体層16a~16dの材料と異なっている。保護層18a,18bは、いわゆるソルダーレジストである。ソルダーレジストの材料は、アルカリ溶解性樹脂や、光重合開始剤、耐熱性を高めるためのエポキシ樹脂や無機粉体を配合した組成物等である。
The material of the
内部導体28a,30a,32aは積層体12の内部に設けられている。本実施形態では、内部導体28a,30a,32aは絶縁体層16bの上主面の左端部に位置している。内部導体28a,30a,32aのそれぞれは、図2に示すように、下方向(Z軸の負方向)に見て、保護層18aの縁Eと重なっている。更に、内部導体28a,30a,32aのそれぞれは、下方向(Z軸の負方向)に見て、保護層18aの縁Eに沿って延びている。本実施形態では、内部導体28a,30a,32aのそれぞれは、下方向(Z軸の負方向)に見て、保護層18aの開口h1,h2,h3の環形状の縁Eに沿う環形状を有している。従って、内部導体28a,30a,32aは、下方向に見て、長方形状の環形状を有している。内部導体28b,30b,32bの構造は、内部導体28a,30a,32aの構造と左右対称であるので説明を省略する。以上のような内部導体28a,28b,30a,30b,32a,32bは1以上の回路導体と電気的に直列に接続されていない。従って、内部導体28a,28b,30a,30b,32a,32bは、高周波信号が伝送されたり、グランド電位に接続されたり、電源電位に接続されたりしない。内部導体28a,28b,30a,30b,32a,32bの電位は浮遊電位である。
The
以上のような信号導体層20、第1グランド導体層22、第2グランド導体層24、実装電極26a,26b、内部導体28a,28b,30a,30b,32a,32bは、例えば、絶縁体層16a~16dの上主面又は下主面に設けられた金属箔にエッチングが施されることにより形成されている。金属箔は、例えば、銅箔である。このように、信号導体層20、第1グランド導体層22、第2グランド導体層24、実装電極26a,26b(少なくとも一部の1以上の回路導体)及び内部導体28a,28b,30a,30b,32a,32bは、絶縁体層16a~16dの主面に設けられている金属箔である。
The
また、層間接続導体v1~v4は、例えば、ビアホール導体である。ビアホール導体は、絶縁体層16a~16dに貫通孔を形成し、貫通孔に導電性ペーストを充填し、導電性ペーストを焼結させることにより作製される。層間接続導体v1~v4の材料は樹脂と金属との混合物である。 The interlayer connection conductors v1 to v4 are, for example, via hole conductors. The via hole conductors are produced by forming through holes in the insulator layers 16a to 16d, filling the through holes with conductive paste, and sintering the conductive paste. The material of the interlayer connection conductors v1 to v4 is a mixture of resin and metal.
ところで、積層体12の上主面(正主面)には、図2に示すように、突起P1~P6(図2では、突起P1のみ図示)が設けられている。突起P1~P3は絶縁体層16aの上主面の左端部に位置している。突起P4~P6は絶縁体層16aの上主面の右端部に位置している。下方向(Z軸の負方向)に見て、突起P1~P6のそれぞれは、保護層18aの開口h1~h6の縁E及び内部導体28a,28b,30a,30b,32a,32bと重なっている。
As shown in FIG. 2, the upper main surface (positive main surface) of the laminate 12 has protrusions P1 to P6 (only protrusion P1 is shown in FIG. 2). Protrusions P1 to P3 are located at the left end of the upper main surface of the
また、突起P1~P6のそれぞれは、内部導体28a,28b,30a,30b,32a,32b及び保護層18aの開口h1~h6の縁Eに沿って延びる線形状を有している。従って、突起P1~P6のそれぞれは、下方向(Z軸の負方向)に見て、内部導体28a,28b,30a,30b,32a,32b及び開口h1~h6の環形状の縁Eに沿う環形状を有している。これにより、下方向(Z軸の負方向)に見て、線形状の突起P1~P6の長さのそれぞれは、線形状の突起P1~P6の幅より長い。以上のような突起P1~P6が設けられていることにより、下方向(Z軸の負方向)に見て保護層18aが突起P1~P6と重なる部分の保護層18aの厚みT1は、下方向(Z軸の負方向)に見て保護層18aが突起P1~P6と重ならない部分の保護層18aの厚みT2より小さい。
Furthermore, each of the protrusions P1 to P6 has a linear shape extending along the
以上のような多層基板10は可撓性を有している。従って、図3に示すように、多層基板10は屈曲できる。具体的には、多層基板10は第1区間A1及び第2区間A2を有している。突起P1~P3は第2区間A2に位置している。第2区間A2は、前方向(Z軸に直交するY軸の正方向)に見て、屈曲している。
The
[多層基板10の製造方法]
次に、多層基板10の製造方法について図面を参照しながら説明する。図4及び図5は多層基板10の製造時の断面図である。
[Method of manufacturing multilayer substrate 10]
Next, a method for manufacturing the
まず、上主面又は下主面に金属箔が張り付けられた絶縁体層16a~16dを準備する。そして、金属箔にパターニングを施すことにより、信号導体層20、第1グランド導体層22、第2グランド導体層24、実装電極26a,26b、内部導体28a,28b,30a,30b,32a,32bを形成する。
First, prepare the insulator layers 16a to 16d with metal foil attached to the upper or lower principal surface. Then, pattern the metal foil to form the
次に、図4に示すように、絶縁体層16a~16dを上から下へとこの順に並べる。これにより、内部導体28a,28b,30a,30b,32a,32bが、積層体12の内部に設けられる。そして、絶縁体層16a~16dが積層された積層体を圧着する(圧着工程)。圧着工程では、等方向プレスが用いられる。また、熱圧着工程では、加熱処理も施される。図5に示すように、内部導体28a,28b,30a,30b,32a,32bにより絶縁体層16aが上方向に押し上げられる。その結果、圧着工程では、積層体12の上主面(正主面)において、内部導体28a,28b,30a,30b,32a,32bと重なる部分のそれぞれに突起P1~P6が形成される。
Next, as shown in FIG. 4, the insulator layers 16a to 16d are arranged from top to bottom in this order. As a result, the
次に、図2に示すように、圧着された積層体12に保護層18a,18bを形成する(保護層形成工程)。保護層形成工程では、下方向(Z軸の負方向)に見て、保護層18aの縁Eが突起P1~P6と重なるように、保護層18aを積層体12の上主面(正主面)に形成する。具体的には、感光性を有する保護層18a,18bの材料をスクリーン印刷により、積層体12の上主面の全面及び下主面の全面に塗布する。この際、下方向(Z軸の負方向)に見て保護層18aが突起P1~P6と重なる部分の保護層18aの材料の厚みT1は、下方向(Z軸の負方向)に見て保護層18aが突起P1~P6と重ならない部分の保護層18aの材料の厚みT2より小さい。この後、保護層18a,18bの材料に対して露光を行う。最後に、未硬化の保護層18a,18bの材料を除去する。これにより、保護層18aの縁Eが突起P1~P6と重なる形状を有する保護層18aが形成される。以上の工程を経て、多層基板10が完成する。
2,
[効果]
多層基板10によれば、保護層18aの剥がれを抑制できる。より詳細には、内部導体28aは、積層体12の内部に設けられ、かつ、下方向に見て、保護層18aの縁Eと重なっており、かつ、下方向に見て、保護層18aの縁Eに沿って延びている。これにより、下方向に見て、内部導体28aと重なる突起P1が形成される。そして、このような突起P1を有する積層体12の上主面に保護層18aが形成される。その結果、下方向に見て保護層18aが突起P1と重なる部分の保護層18aの厚みT1は、下方向に見て保護層18aが突起P1と重ならない部分の保護層18aの厚みT2より小さくなる。以上のような多層基板10では、保護層18aの縁Eの上下方向の厚みが小さい。そのため、保護層18aに発生するアンダーカット量が小さくなる。よって、多層基板10によれば、保護層18aの剥がれを抑制できる。
[effect]
According to the
多層基板10によれば、新たな工程を追加することなく、保護層18aの剥がれを抑制できる。より詳細には、多層基板10では、突起P1が形成されるために、内部導体28aが形成されている。少なくとも一部の1以上の回路導体及び内部導体28aは、絶縁体層16a~16dの主面に設けられている金属箔である。すなわち、内部導体28aの形成工程は、少なくとも一部の1以上の回路導体の形成工程と同様に実行できる。よって、内部導体28aの形成のために新たな工程を追加しなくてもよい。
The
第2区間A2が屈曲するので、第2区間A2では保護層18aの剥離が生じやすい。そこで、突起P1が、第2区間A2に位置している。これにより、保護層18aの剥離が効果的に抑制される。
Since the second section A2 is bent, peeling of the
多層基板10によれば、突起P1が形成されやすい。より詳細には、実装電極26aは、下方向に見て、開口h1の環形状の縁Eに囲まれた領域に位置している。そして、内部導体28aは、下方向に見て、開口h1の環形状の縁Eに沿う環形状を有している。これにより、積層体12の圧着工程において、硬い実装電極26aが下方向に押されて、実装電極26a及びその周囲が下方向に窪む。一方、積層体12の上主面において内部導体28aが存在する部分は、内部導体28aにより上方向に押される。その結果、突起P1が形成されやすい。
The
(第1変形例)
以下に、第1変形例に係る多層基板10aについて図面を参照しながら説明する。図6は多層基板10aの断面図及び多層基板10aの上面図である。
(First Modification)
A
多層基板10aは、内部導体34a及び複数の第1接続導体v10を更に備えている点において多層基板10と相違する。
The
多層基板10aは内部導体34aを更に備えている。従って、内部導体の数は複数である。また、下方向(Z軸の負方向)に見て、内部導体28a,34aは互いに重なっている。内部導体34aは、下方向に見て、内部導体28aと同じ形状を有している。内部導体34aは絶縁体層16cの上主面に位置している。多層基板10aは複数の第1接続導体v10を更に備えている。複数の第1接続導体v10は、絶縁体層16b(複数の絶縁体層16a~16dのいずれか)を上下軸(Z軸)に沿って貫通しており、かつ、内部導体28aと内部導体34aと(複数の内部導体の内の2つ)を接続している。複数の第1接続導体v10は、下方向に見て、内部導体28a,34aに沿って等間隔で並んでいる。多層基板10aのその他の構造は多層基板10と同じであるので説明を省略する。多層基板10aは多層基板10と同じ効果を奏することができる。
The
多層基板10aによれば、内部導体34a及び複数の第1接続導体v10が内部導体28aの下に位置している。これにより、突起P1が形成されやすくなる。
In the
(第2変形例)
以下に、第2変形例に係る多層基板10bについて図面を参照しながら説明する。図7は多層基板10bの断面図である。
(Second Modification)
A
多層基板10bは、以下の点において多層基板10と相違する。保護層18aの縁Eが前後軸に沿って延びる直線である。多層基板10bは、内部導体34a,36a,38a、表面導体40a、第1接続導体v10、第2接続導体v12、第3接続導体v14及び第4接続導体v16を更に備えている。
The
内部導体34a,36a,38aのそれぞれは、絶縁体層16c~16eの上主面に位置している。内部導体34a,36a,38aは、下方向に見て、保護層18aの縁Eと重なっている。そのため、内部導体34a,36a,38aは、下方向に見て、前後軸に沿って延びている。内部導体34a,36a,38aは、下方向に見て、互いに重なっている。
The
表面導体40aは、積層体12の上主面(正主面)に位置し、かつ、下方向(Z軸の負方向)に見て、保護層18aの縁Eと重なっている。そのため、表面導体40aは、下方向に見て、前後軸に沿って延びている。表面導体40aは、下方向に見て、内部導体34a,36a,38aと重なっている。
The
複数の第1接続導体v10は、絶縁体層16b(複数の絶縁体層16a~16dのいずれか)を上下軸(Z軸)に沿って貫通しており、かつ、内部導体28aと内部導体34aと(複数の内部導体の内の2つ)を接続している。複数の第1接続導体v10は、下方向に見て、内部導体28a,34a,36a,38a及び表面導体40aに沿って並んでいる。
The multiple first connecting conductors v10 penetrate the
複数の第2接続導体v12は、絶縁体層16c(複数の絶縁体層16a~16dのいずれか)を上下軸(Z軸)に沿って貫通しており、かつ、内部導体34aと内部導体36aと(複数の内部導体の内の2つ)を接続している。複数の第2接続導体v12は、複数の第1接続導体v10より下(Z軸の負側)に位置しており、かつ、下方向(Z軸の負方向)に見て、複数の第1接続導体v10と重なっている。複数の第2接続導体v12は、下方向に見て、内部導体28a,34a,36a,38a及び表面導体40aに沿って並んでいる。
The second connecting conductors v12 penetrate the
複数の第3接続導体v14は、絶縁体層16d(複数の絶縁体層16a~16dのいずれか)を上下軸(Z軸)に沿って貫通しており、かつ、内部導体36aと内部導体38aと(複数の内部導体の内の2つ)を接続している。複数の第3接続導体v14は、複数の第1接続導体v10より下(Z軸の負側)に位置しており、かつ、下方向(Z軸の負方向)に見て、複数の第1接続導体v10と重なっている。複数の第3接続導体v14は、下方向に見て、内部導体28a,34a,36a,38a及び表面導体40aに沿って並んでいる。
The multiple third connecting conductors v14 penetrate the
複数の第4接続導体v16は、絶縁体層16a(複数の絶縁体層16a~16dのいずれか)を上下軸(Z軸)に沿って貫通しており、かつ、表面導体40aと内部導体28aとを接続している。複数の第4接続導体v16は、下方向(Z軸の負方向)に見て、複数の第1接続導体v10と重なっている。複数の第4接続導体v16は、下方向に見て、内部導体28a,34a,36a,38a及び表面導体40aに沿って並んでいる。多層基板10bのその他の構造は多層基板10と同じであるので説明を省略する。多層基板10bは多層基板10と同じ効果を奏することができる。
The multiple fourth connecting conductors v16 penetrate the
多層基板10bによれば、内部導体28aに加えて、内部導体34a,36a,38a、表面導体40a、複数の第1接続導体v10、複数の第2接続導体v12、複数の第3接続導体v14及び複数の第4接続導体v16が設けられている。これにより、突起P1が形成されやすくなる。
In the
(第3変形例)
以下に、第3変形例に係る多層基板10cについて図面を参照しながら説明する。図8は多層基板10cの断面図である。
(Third Modification)
A
多層基板10cによれば、保護層18aの開口h1の縁Eにアンダーカットが発生している点において多層基板10と相違する。ただし、下方向に見て保護層18aが突起P1と重なる部分の保護層18aの厚みT1は、下方向に見て保護層18aが突起P1と重ならない部分の保護層18aの厚みT2より小さい。そのため、多層基板10bにおいて保護層18aの開口h1の縁Eでのアンダーカット量は少ない。多層基板10cのその他の構造は多層基板10と同じであるので説明を省略する。多層基板10cは多層基板10と同じ効果を奏することができる。
(第4変形例)
以下に、第4変形例に係る多層基板10dについて図面を参照しながら説明する。図9は多層基板10dの断面図及び多層基板10dの上面図である。
(Fourth Modification)
A
多層基板10dは、内部導体28aの代わりに複数の内部導体28aを備えている点、及び、内部導体34a,36a,38a、表面導体40a、第1接続導体v10、第2接続導体v12、第3接続導体v14及び第4接続導体v16を備えていない点において多層基板10bと相違する。複数の内部導体28aは積層体12の内部に設けられている。複数の内部導体28aは、下方向(Z軸の負方向)に見て、保護層18bの縁Eと重なっており、かつ、下方向(Z軸の負方向)に見て、保護層18aの縁Eに沿って等間隔に並んでいる。複数の第1接続導体v10は、隣り合うもの同士で接触していない。多層基板10dのその他の構造は多層基板10と同じであるので説明を省略する。多層基板10dは多層基板10と同じ効果を奏することができる。これにより、複数の内部導体28aと重なる縁Eにおいて、保護層18aが剥がれにくくなる。
The
(第5変形例)
以下に、第5変形例に係る多層基板10eについて図面を参照しながら説明する。図10は多層基板10eの断面図及び多層基板10eの上面図である。
(Fifth Modification)
A
多層基板10eは、複数の内部導体28aの代わりに複数の第1接続導体v10を備えている点において多層基板10dと相違する。複数の第1接続導体v10は複数の内部導体である。複数の第1接続導体v10は絶縁体層16bを上下軸に沿って貫通している。複数の第1接続導体v10は、下方向(Z軸の負方向)に見て、保護層18bの縁Eと重なっており、かつ、下方向(Z軸の負方向)に見て、保護層18aの縁Eに沿って等間隔に並んでいる。複数の第1接続導体v10は隣り合うもの同士で接触していない。多層基板10eのその他の構造は多層基板10dと同じであるので説明を省略する。多層基板10eは多層基板10dと同じ効果を奏することができる。
The
(第6変形例)
以下に、第6変形例に係る多層基板10fについて図面を参照しながら説明する。図11は多層基板10fの断面図及び多層基板10fの上面図である。図12は使用時の多層基板10fの背面図である。
(Sixth Modification)
A
多層基板10fは、突起P1において積層体12がカットされている点、及び、下方向に見て、内部導体28aが線形状を有している点において多層基板10dと相違する。このような多層基板10fは、図12に示すように、屈曲できる。具体的には、多層基板10は第1区間A1及び第2区間A2を有している。突起P1は第2区間A2に位置している。第2区間A2は、前方向(Z軸に直交するY軸の正方向)に見て、屈曲している。多層基板10fのその他の構造は多層基板10dと同じであるので説明を省略する。
次に、多層基板10fの製造方法について図面を参照しながら説明する。図13、図14及び図15は多層基板10の製造時の断面図である。図16はマザー基板100の上面図である。
Next, the manufacturing method of the
まず、上主面又は下主面に金属箔が張り付けられた絶縁体層16a~16eを準備する。そして、金属箔にパターニングを施すことにより、信号導体層20、第1グランド導体層22、第2グランド導体層24、実装電極26a,26b、内部導体28aを形成する。
First, prepare the insulator layers 16a to 16e with metal foil attached to the upper or lower principal surface. Then, pattern the metal foil to form the
次に、図13に示すように、絶縁体層16a~16eを上から下へとこの順に並べる。そして、絶縁体層16a~16eが積層された積層体を圧着する(圧着工程)。圧着工程では等方向プレスが用いられる。また、熱圧着工程では、加熱処理も施される。このとき、図14に示すように、内部導体28aにより絶縁体層16aが上方向に押し上げられる。その結果、圧着工程では、積層体12の上主面(正主面)において、内部導体28aと重なる部分のそれぞれに突起P1が形成される。また、内部導体28aが積層体12の内部に設けられる。
Next, as shown in FIG. 13, the insulator layers 16a to 16e are arranged from top to bottom in this order. Then, the laminate in which the insulator layers 16a to 16e are stacked is compressed (compression bonding process). In the compression bonding process, an isotropic press is used. In addition, in the thermocompression bonding process, a heat treatment is also performed. At this time, as shown in FIG. 14, the
次に、図15に示すように、圧着された積層体12に保護層18a,18bを形成する(保護層形成工程)。保護層形成工程では、下方向(Z軸の負方向)に見て、保護層18aが突起P1を覆うように、保護層18aを積層体12の上主面(正主面)に形成する。具体的には、保護層18a,18bの材料をスクリーン印刷により、積層体12の上主面及び下主面により塗布する。下方向(Z軸の負方向)に見て保護層18aが突起P1と重なる部分の保護層18aの厚みT1は、下方向(Z軸の負方向)に見て保護層18aが突起P1と重ならない部分の保護層18aの厚みT2より小さい。
Next, as shown in FIG. 15,
次に、図11に示すように、保護層18a,18bが形成された積層体12をカットする(カット工程)。カット工程では、下方向(Z軸の負方向)に見て、突起P1が分割されるように積層体12をカットする。カット工程では、図16に示すように、内部導体28aに沿ってマザー基板100をカットする。以上の工程を経て、多層基板10fが完成する。
Next, as shown in FIG. 11, the laminate 12 on which the
(その他の実施形態)
本発明に係る多層基板は、多層基板10,10a~10fに限らずその要旨の範囲内において変更可能である。なお、多層基板10,10a~10fの構造を任意に組み合わせてもよい。
Other Embodiments
The multilayer board according to the present invention is not limited to the
なお、保護層18bは必須の構成要件ではない。
Note that
なお、積層体12の下主面に突起が設けられ、保護層18bの縁が突起と重なっていてもよい。
In addition, a protrusion may be provided on the lower main surface of the laminate 12, and the edge of the
なお、信号導体層20、第1グランド導体層22及び第2グランド導体層24は必須の構成要件ではない。
Note that the
なお、絶縁体層16a~16eの材料は、例えば、セラミックであってもよい。 The material of the insulator layers 16a to 16e may be, for example, ceramic.
保護層18aは積層体12の上主面の少なくとも一部分を覆っていればよい。従って、保護層18aは積層体12の上主面の全体を覆っていてもよい。この場合、積層体12の上主面の外縁近傍に突起P1が存在する。これにより、積層体12の上主面の外縁から保護層18aが剥がれることが抑制される。
The
なお、内部導体28a,34a,36a,38a及び表面導体40aの電位は浮遊電位でなくてもよい。内部導体28a,34a,36a,38a及び表面導体40aは、例えば、グランド電位に接続されていてもよい。ただし、内部導体28a,34a,36a,38a及び表面導体40aの電位が浮遊電位である場合、内部導体28a,34a,36a,38a及び表面導体40aが周囲の電気回路に影響を及ぼしにくくなる。
The potential of the
なお、多層基板10eにおいて、第1接続導体v10は一つだけ設けられてもよい。
In addition, only one first connecting conductor v10 may be provided in the
なお、多層基板10a,10eにおいて、複数の第1接続導体v10は隣り合うもの同士で接触していてもよい。
In addition, in the
本発明は以下の構造を備える。 The present invention has the following structure:
(1)
多層基板は、積層体と、保護層と、1以上の内部導体と、を備えており、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記1以上の内部導体は、前記積層体の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って延びており、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記1以上の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さく、
前記Z軸の負方向に見て、線形状の前記突起の長さは、線形状の前記突起の幅より長い、
多層基板。
(1)
The multilayer substrate includes a laminate, a protective layer, and one or more internal conductors,
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
the one or more internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and extend along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the one or more internal conductors, and has a linear shape extending along the edge of the protective layer;
a thickness of the protective layer at a portion where the protective layer overlaps with the protrusion as viewed in the negative direction of the Z axis is smaller than a thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion as viewed in the negative direction of the Z axis,
When viewed in the negative direction of the Z axis, the length of the linear protrusion is longer than the width of the linear protrusion.
Multilayer board.
(2)
前記多層基板は、電気回路を形成する1以上の回路導体を、更に備えており、
前記1以上の内部導体は、前記1以上の回路導体と電気的に直列に接続されていない、
(1)に記載の多層基板。
(2)
The multilayer substrate further comprises one or more circuit conductors forming an electrical circuit;
the one or more inner conductors are not electrically connected in series with the one or more circuit conductors;
A multilayer substrate according to (1).
(3)
前記多層基板は、電気回路を形成する1以上の回路導体を、更に備えており、
少なくとも一部の前記1以上の回路導体及び前記1以上の内部導体は、前記複数の絶縁体層の主面に設けられている金属箔である、
(1)又は(2)に記載の多層基板。
(3)
The multilayer substrate further comprises one or more circuit conductors forming an electrical circuit;
At least a portion of the one or more circuit conductors and the one or more internal conductors are metal foils provided on the main surfaces of the plurality of insulating layers.
A multilayer substrate according to (1) or (2).
(4)
前記1以上の内部導体の数は、複数であり、
前記Z軸の負方向に見て、前記複数の内部導体は、互いに重なっている、
(1)ないし(3)のいずれかに記載の多層基板。
(4)
The number of the one or more internal conductors is plural,
When viewed in the negative direction of the Z axis, the multiple internal conductors overlap each other.
A multilayer substrate according to any one of (1) to (3).
(5)
前記多層基板は、第1接続導体を、更に備えており、
前記第1接続導体は、前記複数の絶縁体層のいずれかを前記Z軸に沿って貫通しており、かつ、前記複数の内部導体の内の2つを接続している、
(4)に記載の多層基板。
(5)
The multilayer substrate further includes a first connection conductor,
The first connection conductor passes through any one of the plurality of insulating layers along the Z-axis and connects two of the plurality of internal conductors.
A multilayer substrate according to (4).
(6)
前記多層基板は、第2接続導体を、更に備えており、
前記第2接続導体は、前記複数の絶縁体層のいずれかを前記Z軸に沿って貫通しており、かつ、前記複数の内部導体の内の2つを接続しており、かつ、前記第1接続導体より前記Z軸の負側に位置しており、かつ、前記Z軸の負方向に見て、前記第1接続導体と重なっている、
(5)に記載の多層基板。
(6)
The multilayer substrate further includes a second connection conductor,
the second connecting conductor penetrates any one of the plurality of insulating layers along the Z-axis, connects two of the plurality of internal conductors, is located on the negative side of the Z-axis relative to the first connecting conductor, and overlaps with the first connecting conductor when viewed in the negative direction of the Z-axis.
A multilayer substrate according to (5).
(7)
前記1以上の内部導体は、前記複数の絶縁体層のいずれかを前記Z軸に沿って貫通する接続導体である、
(1)又は(2)に記載の多層基板。
(7)
The one or more internal conductors are connecting conductors that pass through any one of the plurality of insulating layers along the Z-axis.
A multilayer substrate according to (1) or (2).
(8)
前記多層基板は、第1区間及び第2区間を有しており、
前記突起は、前記第2区間に位置しており、
前記第2区間は、前記Z軸に直交するY軸の正方向に見て、屈曲している、
(1)ないし(7)のいずれかに記載の多層基板。
(8)
The multilayer substrate has a first section and a second section,
The protrusion is located in the second section,
The second section is bent when viewed in a positive direction of a Y axis perpendicular to the Z axis.
A multilayer substrate according to any one of (1) to (7).
(9)
前記多層基板は、表面導体を、更に備えており、
前記表面導体は、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっている、
(1)ないし(8)のいずれかに記載の多層基板。
(9)
The multilayer substrate further includes a surface conductor,
the surface conductor is located on the positive principal surface and overlaps an edge of the protective layer when viewed in the negative direction of the Z axis;
A multilayer substrate according to any one of (1) to (8).
(10)
前記多層基板は、実装電極を、更に備えており、
前記保護層は、前記Z軸の負方向に見て、環形状の縁を有しており、
前記実装電極は、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記環形状の縁に囲まれた領域に位置しており、
前記内部導体は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有しており、
前記突起は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有している、
(1)ないし(9)のいずれかに記載の多層基板。
(10)
The multilayer substrate further includes a mounting electrode,
the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis,
the mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis,
the internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis,
The protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
A multilayer substrate according to any one of (1) to (9).
(11)
多層基板は、積層体と、保護層と、複数の内部導体と、を備えており、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記複数の内部導体は、前記積層体の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って並んでおり、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記複数の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さい、
多層基板。
(11)
The multilayer substrate includes a laminate, a protective layer, and a plurality of internal conductors.
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers a portion of the positive principal surface,
a material of the protective layer is different from a material of the plurality of insulator layers;
the plurality of internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and are arranged along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the plurality of internal conductors, and has a linear shape extending along the edge of the protective layer;
a thickness of the protective layer at a portion where the protective layer overlaps with the protrusion when viewed in the negative direction of the Z axis is smaller than a thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion when viewed in the negative direction of the Z axis;
Multilayer board.
(12)
多層基板の製造方法は、
積層体を圧着する圧着工程と、
圧着された前記積層体に保護層を形成する保護層形成工程と、
を備えており、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
1以上の内部導体が、前記積層体の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起が形成され、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層の縁が前記突起と重なるように、前記保護層を前記正主面に形成する、
多層基板の製造方法。
(12)
The manufacturing method of the multilayer board is as follows:
a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
One or more internal conductors are provided within the laminate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that an edge of the protective layer overlaps the protrusion when viewed in the negative direction of the Z axis.
A method for manufacturing a multilayer board.
(13)
前記保護層は、前記Z軸の負方向に見て、環形状の縁を有しており、
実装電極が、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記環形状の縁に囲まれた領域に位置しており、
前記突起は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有しており、
前記内部導体は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有している、
(12)に記載の多層基板の製造方法。
(13)
the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis,
a mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis;
The protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis,
The internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
A method for manufacturing a multilayer substrate according to (12).
(14)
多層基板の製造方法は、
積層体を圧着する圧着工程と、
圧着された前記積層体に保護層を形成する保護層形成工程と、
前記保護層が形成された前記積層体をカットするカット工程と、
を備えており、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
1以上の内部導体が、前記積層体の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起が形成され、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層が前記突起を覆うように、前記保護層を前記正主面に形成し、
前記カット工程では、前記Z軸の負方向に見て、前記突起が分割されるように前記積層体をカットする、
多層基板の製造方法。
(14)
The manufacturing method of the multilayer board is as follows:
a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
a cutting step of cutting the laminate on which the protective layer is formed;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
One or more internal conductors are provided within the laminate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that the protective layer covers the protrusion when viewed in the negative direction of the Z axis,
In the cutting step, the laminate is cut so that the protrusion is divided when viewed in the negative direction of the Z axis.
A method for manufacturing a multilayer board.
10,10a~10f:多層基板
12:積層体
16a~16e:絶縁体層
18a,18b:保護層
20:信号導体層
22:第1グランド導体層
24:第2グランド導体層
26a,26b:実装電極
28a,28b,30a,30b,32a,32b,34a,36a,38a:内部導体
40a:表面導体
A1:第1区間
A2:第2区間
E:縁
P1~P6:突起
h1~h6:開口
v10:第1接続導体
v12:第2接続導体
v14:第3接続導体
v16:第4接続導体
Claims (15)
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記1以上の内部導体は、前記積層体の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って延びており、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記1以上の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さく、
前記Z軸の負方向に見て、線形状の前記突起の長さは、線形状の前記突起の幅より長い、
多層基板。 A laminate, a protective layer, and one or more internal conductors,
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
the one or more internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and extend along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the one or more internal conductors, and has a linear shape extending along the edge of the protective layer;
a thickness of the protective layer at a portion where the protective layer overlaps with the protrusion as viewed in the negative direction of the Z axis is smaller than a thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion as viewed in the negative direction of the Z axis,
When viewed in the negative direction of the Z axis, the length of the linear protrusion is longer than the width of the linear protrusion.
Multilayer board.
前記1以上の内部導体は、前記1以上の回路導体と電気的に直列に接続されていない、
請求項1に記載の多層基板。 one or more circuit conductors forming an electrical circuit;
the one or more inner conductors are not electrically connected in series with the one or more circuit conductors;
The multilayer substrate according to claim 1 .
少なくとも一部の前記1以上の回路導体及び前記1以上の内部導体は、前記複数の絶縁体層の主面に設けられている金属箔である、
請求項1に記載の多層基板。 one or more circuit conductors forming an electrical circuit;
At least a portion of the one or more circuit conductors and the one or more internal conductors are metal foils provided on the main surfaces of the plurality of insulating layers.
The multilayer substrate according to claim 1 .
請求項2に記載の多層基板。 At least a portion of the one or more circuit conductors and the one or more internal conductors are metal foils provided on the main surfaces of the plurality of insulating layers.
The multilayer substrate according to claim 2 .
前記Z軸の負方向に見て、前記複数の内部導体は、互いに重なっている、
請求項1から請求項4のいずれかに記載の多層基板。 The number of the one or more internal conductors is plural,
When viewed in the negative direction of the Z axis, the multiple internal conductors overlap each other.
The multilayer substrate according to any one of claims 1 to 4.
前記第1接続導体は、前記複数の絶縁体層のいずれかを前記Z軸に沿って貫通しており、かつ、前記複数の内部導体の内の2つを接続している、
請求項4に記載の多層基板。 A first connecting conductor is provided,
The first connection conductor passes through any one of the plurality of insulating layers along the Z-axis and connects two of the plurality of internal conductors.
The multilayer substrate according to claim 4.
前記第2接続導体は、前記複数の絶縁体層のいずれかを前記Z軸に沿って貫通しており、かつ、前記複数の内部導体の内の2つを接続しており、かつ、前記第1接続導体より前記Z軸の負側に位置しており、かつ、前記Z軸の負方向に見て、前記第1接続導体と重なっている、
請求項6に記載の多層基板。 A second connecting conductor is provided.
the second connecting conductor penetrates any one of the plurality of insulating layers along the Z-axis, connects two of the plurality of internal conductors, is located on the negative side of the Z-axis relative to the first connecting conductor, and overlaps with the first connecting conductor when viewed in the negative direction of the Z-axis.
The multilayer substrate according to claim 6.
請求項1から請求項7のいずれかに記載の多層基板。 The one or more internal conductors are connecting conductors that pass through any one of the plurality of insulating layers along the Z-axis.
The multilayer substrate according to any one of claims 1 to 7.
前記突起は、前記第2区間に位置しており、
前記第2区間は、前記Z軸に直交するY軸の正方向に見て、屈曲している、
請求項1から請求項8のいずれかに記載の多層基板。 A first section and a second section,
The protrusion is located in the second section,
The second section is bent when viewed in a positive direction of a Y axis perpendicular to the Z axis.
The multilayer substrate according to any one of claims 1 to 8.
前記表面導体は、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっている、
請求項1から請求項9のいずれかに記載の多層基板。 A surface conductor is provided.
the surface conductor is located on the positive principal surface and overlaps an edge of the protective layer when viewed in the negative direction of the Z axis;
The multilayer substrate according to any one of claims 1 to 9.
前記保護層は、前記Z軸の負方向に見て、環形状の縁を有しており、
前記実装電極は、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記環形状の縁に囲まれた領域に位置しており、
前記内部導体は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有しており、
前記突起は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有している、
請求項1から請求項10のいずれかに記載の多層基板。 A mounting electrode is provided,
the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis,
the mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis,
the internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis,
The protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
The multilayer substrate according to any one of claims 1 to 10.
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
前記複数の内部導体は、前記積層体の内部に設けられ、かつ、前記Z軸の負方向に見て、前記保護層の縁と重なっており、かつ、前記Z軸の負方向に見て、前記保護層の縁に沿って並んでおり、
前記積層体の前記正主面には、突起が設けられており、
前記Z軸の負方向に見て、前記突起は、前記保護層の縁及び前記複数の内部導体と重なっており、かつ、前記保護層の縁に沿って延びる線形状を有しており、
前記Z軸の負方向に見て前記保護層が前記突起と重なる部分の前記保護層の厚みは、前記Z軸の負方向に見て前記保護層が前記突起と重ならない部分の前記保護層の厚みより小さい、
多層基板。 The laminate includes a protective layer and a plurality of internal conductors.
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers a portion of the positive principal surface,
a material of the protective layer is different from a material of the plurality of insulator layers;
the plurality of internal conductors are provided inside the laminate, overlap an edge of the protective layer when viewed in the negative direction of the Z axis, and are arranged along the edge of the protective layer when viewed in the negative direction of the Z axis;
A protrusion is provided on the front main surface of the laminate,
When viewed in the negative direction of the Z axis, the protrusion overlaps an edge of the protective layer and the plurality of internal conductors, and has a linear shape extending along the edge of the protective layer;
a thickness of the protective layer at a portion where the protective layer overlaps with the protrusion when viewed in the negative direction of the Z axis is smaller than a thickness of the protective layer at a portion where the protective layer does not overlap with the protrusion when viewed in the negative direction of the Z axis;
Multilayer board.
圧着された前記積層体に保護層を形成する保護層形成工程と、
を備え、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は、前記複数の絶縁体層の材料と異なっており、
1以上の内部導体が、前記積層体の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起を形成し、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層の縁が前記突起と重なるように、前記保護層を前記正主面に形成する、
多層基板の製造方法。 a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
One or more internal conductors are provided within the laminate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that an edge of the protective layer overlaps with the protrusion when viewed in the negative direction of the Z axis.
A method for manufacturing a multilayer board.
実装電極が、前記正主面に位置し、かつ、前記Z軸の負方向に見て、前記環形状の縁に囲まれた領域に位置しており、
前記突起は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有しており、
前記内部導体は、前記Z軸の負方向に見て、前記環形状の縁に沿う環形状を有している、
請求項13に記載の多層基板の製造方法。 the protective layer has a ring-shaped edge when viewed in the negative direction of the Z axis,
a mounting electrode is located on the positive principal surface and in a region surrounded by an edge of the ring shape when viewed in the negative direction of the Z axis;
The protrusion has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis,
The internal conductor has a ring shape along an edge of the ring shape when viewed in the negative direction of the Z axis.
The method for manufacturing a multilayer substrate according to claim 13.
圧着された前記積層体に保護層を形成する保護層形成工程と、
前記保護層が形成された前記積層体をカットするカット工程と、
を備え、
前記積層体は、複数の絶縁体層がZ軸に沿って積層された構造を有しており、
前記積層体は、正主面、及び、前記正主面より前記Z軸の負側に位置する負主面を有しており、
前記保護層は、前記正主面の少なくとも一部分を覆っており、
前記保護層の材料は前記複数の絶縁体層の材料とは異なっており、
1以上の内部導体は前記積層体の内部に設けられており、
前記圧着工程では、前記積層体の前記正主面において、前記1以上の内部導体と重なる部分に突起を形成し、
前記保護層形成工程では、前記Z軸の負方向に見て、前記保護層が前記突起を覆うように、前記保護層を前記正主面に形成し、
前記カット工程では、前記Z軸の負方向に見て、前記突起が分割されるように前記積層体をカットする、
多層基板の製造方法。 a bonding step of bonding the laminate;
a protective layer forming step of forming a protective layer on the laminated body;
a cutting step of cutting the laminate on which the protective layer is formed;
Equipped with
The laminate has a structure in which a plurality of insulating layers are laminated along the Z axis,
The laminate has a positive principal surface and a negative principal surface located on the negative side of the Z axis from the positive principal surface,
the protective layer covers at least a portion of the positive main surface;
a material of the protective layer is different from a material of the plurality of insulator layers;
one or more internal conductors are provided within the laminate;
In the compression bonding step, a protrusion is formed on the main surface of the laminate at a portion overlapping the one or more internal conductors,
In the protective layer forming step, the protective layer is formed on the positive main surface such that the protective layer covers the protrusion when viewed in the negative direction of the Z axis,
In the cutting step, the laminate is cut so that the protrusion is divided when viewed in the negative direction of the Z axis.
A method for manufacturing a multilayer board.
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| JP2022186212 | 2022-11-22 | ||
| JP2022-186212 | 2022-11-22 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014069258A1 (en) * | 2012-10-31 | 2014-05-08 | 株式会社村田製作所 | High-frequency signal line and manufacturing method therefor |
| JP2015032691A (en) * | 2013-08-02 | 2015-02-16 | 株式会社村田製作所 | Resin multilayer substrate and method for producing the same |
| WO2020009029A1 (en) * | 2018-07-02 | 2020-01-09 | 株式会社村田製作所 | Flexible substrate, method for manufacturing same, and electronic device |
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- 2023-10-16 WO PCT/JP2023/037449 patent/WO2024111285A1/en not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014069258A1 (en) * | 2012-10-31 | 2014-05-08 | 株式会社村田製作所 | High-frequency signal line and manufacturing method therefor |
| JP2015032691A (en) * | 2013-08-02 | 2015-02-16 | 株式会社村田製作所 | Resin multilayer substrate and method for producing the same |
| WO2020009029A1 (en) * | 2018-07-02 | 2020-01-09 | 株式会社村田製作所 | Flexible substrate, method for manufacturing same, and electronic device |
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