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WO2019082450A1 - Epitaxial wafer manufacturing method - Google Patents

Epitaxial wafer manufacturing method

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WO2019082450A1
WO2019082450A1 PCT/JP2018/025857 JP2018025857W WO2019082450A1 WO 2019082450 A1 WO2019082450 A1 WO 2019082450A1 JP 2018025857 W JP2018025857 W JP 2018025857W WO 2019082450 A1 WO2019082450 A1 WO 2019082450A1
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substrate
storage unit
back surface
atmosphere
concentration
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French (fr)
Japanese (ja)
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亮輔 岩本
大西 理
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Shin Etsu Handotai Co Ltd
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Shin Etsu Handotai Co Ltd
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Priority to CN201880060125.XA priority Critical patent/CN111095487B/en
Priority to KR1020207003605A priority patent/KR102585395B1/en
Publication of WO2019082450A1 publication Critical patent/WO2019082450A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • H10P14/20
    • H10P14/24
    • H10P14/2905
    • H10P14/3411
    • H10P14/3442
    • H10P14/36
    • H10P70/15
    • H10P72/0436
    • H10P72/3306
    • H10P72/3404
    • H10P90/124

Definitions

  • a CVD (Chemical Vapor Deposition) apparatus etc. are known as a substrate processing apparatus used for a manufacturing process of semiconductor substrates, such as a silicon semiconductor substrate.
  • a method of vapor phase epitaxial growth of an epitaxial layer made of single crystal silicon on the surface of a silicon semiconductor substrate has been developed.
  • the substrate is horizontally disposed on the susceptor housed in the reactor for epitaxial growth, and then the substrate is heated at a high temperature by a heat source such as a halogen lamp while rotating the susceptor around a vertical rotation axis 1000 ° C. to 1200 ° C.) and flow silicon source gas.
  • silicon generated by thermal decomposition (and reduction) of the reaction gas is deposited on the substrate surface, and an epitaxial layer made of single crystal silicon is grown on the substrate surface.
  • the present inventor estimates that the occurrence of the back surface halo is different depending on the exposure time of the substrate (the time from cleaning to epitaxial growth) and the difference in the halo generation tendency due to the difference in the exposure environment due to the influence of the exposure atmosphere of the substrate. did. Therefore, when the exposure atmosphere was evaluated, there is a correlation between the concentration of NO 2 and NO 3 in the exposure atmosphere and the generation of the back surface halo, in particular, the exposure atmosphere having a total concentration of NO 2 and NO 3 of 140 ng / m 3 or less. It has been found that the generation of the back surface halo can be suppressed by using the back surface polished silicon substrate stored in the present invention, resulting in the present invention.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Inorganic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

裏面が研磨されたシリコン半導体基板を準備し、準備した基板を洗浄した後、複数枚を1ロットとして基板保管部2に入れる。基板保管部2の雰囲気中のNOとNOの合計濃度が140ng/m以下となるように管理する。基板保管部2に保管された基板を1枚ずつ反応炉5に搬送してシリコンエピタキシャル層を気相成長させる。これにより、基板洗浄後からの時間経過に依存した裏面ハローの発生を抑制し、高品位なエピタキシャルウェーハの製造が可能となる方法を提供する。After preparing a silicon semiconductor substrate whose back surface is polished and cleaning the prepared substrate, a plurality of wafers are put into the substrate storage unit 2 as one lot. The total concentration of NO 2 and NO 3 in the atmosphere of the substrate storage unit 2 is controlled to be 140 ng / m 3 or less. The substrates stored in the substrate storage unit 2 are transported one by one to the reaction furnace 5 to grow a silicon epitaxial layer in a vapor phase. As a result, it is possible to provide a method which makes it possible to manufacture a high quality epitaxial wafer by suppressing the generation of the back surface halo depending on the passage of time after substrate cleaning.

Description

エピタキシャルウェーハの製造方法Method of manufacturing epitaxial wafer

 本発明はシリコン半導体基板上にシリコンエピタキシャル層を形成してエピタキシャルウェーハを得る方法に関する。 The present invention relates to a method of forming a silicon epitaxial layer on a silicon semiconductor substrate to obtain an epitaxial wafer.

 従来より、シリコン半導体基板などの半導体基板の製造工程に用いられる基板処理装置として、CVD(Chemical Vapour Deposition)装置などが知られている。シリコン半導体基板のエピタキシャル処理の一例として、シリコン半導体基板の表面に、単結晶シリコンからなるエピタキシャル層を気相エピタキシャル成長させる手法が開発されている。その製造方法としては、エピタキシャル成長用反応炉に収納されたサセプタに、基板を水平配置し、その後、垂直な回転軸を中心にしてサセプタを回転させながら基板を、ハロゲンランプなどの熱源により高温加熱(1000℃~1200℃)し、シリコンソースガスを流す。これにより、基板表面に反応ガスの熱分解(および還元)によって生成されたシリコンが析出し、基板表面に単結晶シリコンからなるエピタキシャル層が成長する。 Conventionally, a CVD (Chemical Vapor Deposition) apparatus etc. are known as a substrate processing apparatus used for a manufacturing process of semiconductor substrates, such as a silicon semiconductor substrate. As an example of the epitaxial processing of a silicon semiconductor substrate, a method of vapor phase epitaxial growth of an epitaxial layer made of single crystal silicon on the surface of a silicon semiconductor substrate has been developed. As the manufacturing method, the substrate is horizontally disposed on the susceptor housed in the reactor for epitaxial growth, and then the substrate is heated at a high temperature by a heat source such as a halogen lamp while rotating the susceptor around a vertical rotation axis 1000 ° C. to 1200 ° C.) and flow silicon source gas. Thereby, silicon generated by thermal decomposition (and reduction) of the reaction gas is deposited on the substrate surface, and an epitaxial layer made of single crystal silicon is grown on the substrate surface.

 ここで、通常、エピタキシャルウェーハの製造は高清浄度に保たれたクリーンルーム内で行われるが、クリーンルームに関し、特許文献1、2には、クリーンルーム等の清浄作業空間からの排気を取り入れて清浄化を行った後、該清浄作業空間に循環供給するにあたり、該清浄化としてアンモニア、窒素酸化物(NOx)、硫黄酸化物(SOx)等の各種汚染物質を一定濃度以下にすることが記載されている。例えば汚染物質の1つとして窒素酸化物(NOx)について言えば1ppb以下(特許文献1)、0.1ppb以下(特許文献2)にすることが記載されている。 Here, although the manufacture of epitaxial wafers is normally performed in a clean room maintained at high cleanliness, in regard to clean rooms, Patent Documents 1 and 2 introduce exhaust air from a clean work space such as a clean room to perform cleaning. It is described that various contaminants such as ammonia, nitrogen oxides (NOx), sulfur oxides (SOx), etc. are made to have a certain concentration or less as the cleaning in circulating supply to the cleaning work space after carrying out. . For example, when it comes to nitrogen oxide (NOx) as one of the pollutants, it is described that it is 1 ppb or less (Patent Document 1) and 0.1 ppb or less (Patent Document 2).

特開2009-138977号公報JP 2009-138977 特開2009-138978号公報JP, 2009-138978, A

 ところで、シリコン半導体基板上にシリコンエピタキシャル層を形成する際に、基板裏面がシリコン研磨面である場合、シリコンソースガスの裏面への回り込み等によって、裏面にも微量なPoly-Siが堆積することがある。その微量なPoly-Siの発生が基板裏面内でムラがある場合にハローと呼ばれるクモリ、面荒れが発生すると考えられている。裏面ハローの発生は基板洗浄後からエピタキシャル反応を行うまでの時間が長くなるにつれて、顕著になり、ハローパターンも濃くなる傾向が有る。裏面ハローの発生は外観不良によるシリコンエピタキシャル工程の歩留り悪化につながり、課題となっている。仮に特許文献1、2に提案のクリーンルーム内でエピタキシャルウェーハの製造を行ったとしても上記課題は存在し、すなわち基板洗浄後からエピタキシャル反応を行うまでの時間が長くなるにつれて、裏面ハローが顕著になり、ハローパターンも濃くなる。 By the way, when forming a silicon epitaxial layer on a silicon semiconductor substrate, when the back surface of the substrate is a polished surface of silicon, a trace amount of Poly-Si may be deposited also on the back surface due to penetration of silicon source gas to the back surface. is there. It is considered that when the generation of a slight amount of Poly-Si is uneven in the back surface of the substrate, a cloud called a halo and surface roughening occur. The generation of the back surface halo becomes remarkable as the time from the substrate cleaning to the epitaxial reaction becomes longer, and the halo pattern tends to be dark. The generation of the back surface halo leads to the deterioration of the yield of the silicon epitaxial process due to the appearance defect and is a problem. Even if epitaxial wafers are manufactured in the clean room proposed in Patent Documents 1 and 2, the above problems still exist, that is, the back surface halo becomes remarkable as the time from the substrate cleaning to the epitaxial reaction becomes longer. , Hello pattern also darkens.

 本開示は、上記課題を鑑みなされたものであり、基板洗浄後からの時間経過に依存した裏面ハローの発生を抑制し、高品位なエピタキシャルウェーハの製造が可能となる方法を提供することを目的とする。 The present disclosure has been made in view of the above problems, and it is an object of the present disclosure to provide a method capable of suppressing the generation of a back surface halo depending on the passage of time after substrate cleaning and manufacturing a high quality epitaxial wafer. I assume.

 本発明者は、裏面ハローの発生が基板の暴露時間(洗浄後からエピタキシャル成長に至るまでの時間)によって異なること、暴露環境の違いによるハロー発生傾向の違いから、基板の暴露雰囲気の影響によると推定した。そこで、暴露雰囲気を評価したところ、暴露雰囲気中のNO及びNOの濃度と裏面ハローの発生に相関があること、特にNOとNOの濃度の合計が140ng/m以下の暴露雰囲気で保管された裏面研磨シリコン基板を用いることで裏面ハローの発生が抑制できることを見出し、本発明に至った。 The present inventor estimates that the occurrence of the back surface halo is different depending on the exposure time of the substrate (the time from cleaning to epitaxial growth) and the difference in the halo generation tendency due to the difference in the exposure environment due to the influence of the exposure atmosphere of the substrate. did. Therefore, when the exposure atmosphere was evaluated, there is a correlation between the concentration of NO 2 and NO 3 in the exposure atmosphere and the generation of the back surface halo, in particular, the exposure atmosphere having a total concentration of NO 2 and NO 3 of 140 ng / m 3 or less. It has been found that the generation of the back surface halo can be suppressed by using the back surface polished silicon substrate stored in the present invention, resulting in the present invention.

 すなわち、本開示の一態様によるエピタキシャルウェーハの製造方法は、裏面研磨されたシリコン半導体基板を洗浄後にNOとNOの濃度の合計が140ng/m以下の環境雰囲気中で保管し、該シリコン半導体基板上にシリコンエピタキシャル層を気相成長させる製造方法である。 That is, in the method of manufacturing an epitaxial wafer according to one aspect of the present disclosure, after cleaning the back-polished silicon semiconductor substrate, the total concentration of NO 2 and NO 3 is stored in an environmental atmosphere of 140 ng / m 3 or less This is a manufacturing method of vapor-phase growing a silicon epitaxial layer on a semiconductor substrate.

 本開示の一態様によれば、裏面ハローの発生を抑制した高品位なエピタキシャルウェーハの製造が可能となる。 According to one aspect of the present disclosure, it is possible to manufacture a high quality epitaxial wafer in which the occurrence of the back surface halo is suppressed.

 また、NOとNOの濃度の合計が10ng/m以下の環境雰囲気中でシリコン半導体基板を保管するのがより好ましい。これによれば、シリコン半導体基板上にシリコンエピタキシャル層を気相成長させた際に、基板裏面におけるヘイズレベルをより一層抑制でき、裏面ハローの発生をより一層抑制できる。 Further, it is more preferable to store the silicon semiconductor substrate in an environmental atmosphere in which the total concentration of NO 2 and NO 3 is 10 ng / m 3 or less. According to this, when the silicon epitaxial layer is vapor-phase grown on the silicon semiconductor substrate, the haze level on the back surface of the substrate can be further suppressed, and the generation of the back surface halo can be further suppressed.

枚葉式エピタキシャル成長装置の概略構成図である。It is a schematic block diagram of a single wafer type epitaxial growth apparatus. エピタキシャルウェーハの製造手順を示したフローチャートである。It is the flowchart which showed the manufacturing procedure of the epitaxial wafer. 実施例、比較例における評価手順を示したフローチャートである。It is the flowchart which showed the evaluation procedure in an Example and a comparative example. 基板洗浄後の暴露雰囲気中のNO濃度と、エピタキシャルウェーハの裏面におけるDWN-HazePeak値の関係を示した図である。And NO 2 concentration in the exposure atmosphere after the substrate cleaning is a diagram showing the relationship of DWN-HazePeak value of the back surface of the epitaxial wafer. 基板洗浄後の暴露雰囲気中のNO濃度と、エピタキシャルウェーハの裏面におけるDWN-HazePeak値の関係を示した図である。And NO 3 concentration in the exposure atmosphere after the substrate cleaning is a diagram showing the relationship of DWN-HazePeak value of the back surface of the epitaxial wafer.

 以下、本発明の実施形態を図面を参照しながら説明する。本実施形態では、枚葉式エピタキシャル成長装置を用いたエピタキシャルウェーハの製造に本発明を適用した例を説明する。先ず、図1を参照して枚葉式エピタキシャル成長装置の構成を説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the present embodiment, an example in which the present invention is applied to the manufacture of an epitaxial wafer using a single wafer type epitaxial growth apparatus will be described. First, the configuration of a single wafer type epitaxial growth apparatus will be described with reference to FIG.

 図1の枚葉式エピタキシャル成長装置1は、洗浄後のシリコン半導体基板W(以下、単に基板Wと記載する場合がある)が複数枚を1ロットとして保管される基板保管部2と、その基板保管部2に隣接するように設けられた搬送路3と、搬送路3内に設けられ基板保管部2に保管された基板Wの1つを後述の反応炉5に搬送する搬送ロボット4と、搬送路3に隣接するように設けられて搬送ロボット4により搬送された基板Wの表面上にシリコンエピタキシャル層を気相成長させる反応を行うための反応炉5と、反応炉5内に設けられて基板Wの表裏面が水平となるように基板Wが載置されるサセプタ6と、反応炉5の周囲に設けられて反応炉5内を加熱するランプ7とを備えている。また、エピタキシャル成長装置1は、エピタキシャル成長の際にサセプタ6を回転させる駆動部(図示外)も備えている。 In the single wafer type epitaxial growth apparatus 1 of FIG. 1, a substrate storage unit 2 in which a plurality of cleaned silicon semiconductor substrates W (hereinafter, may be simply referred to as a substrate W) are stored as one lot and the substrates are stored. A transport path 3 provided adjacent to the portion 2, a transport robot 4 for transporting one of the substrates W provided in the transport path 3 and stored in the substrate storage portion 2 to a reaction furnace 5 described later, and transport A reaction furnace 5 provided adjacent to the passage 3 for performing a reaction of vapor-phase growing a silicon epitaxial layer on the surface of the substrate W transferred by the transfer robot 4 and provided in the reaction furnace 5 A susceptor 6 on which the substrate W is mounted so that the front and back surfaces of W are horizontal, and a lamp 7 provided around the reaction furnace 5 to heat the inside of the reaction furnace 5 are provided. The epitaxial growth apparatus 1 also includes a drive unit (not shown) for rotating the susceptor 6 during epitaxial growth.

 サセプタ6は、円盤状に形成されて上面が水平となるようにサポートシャフト8により支持されている。サセプタ6の上面には、基板Wを載置するためのポケット部61が形成されている。ポケット部61は、基板Wよりも若干大きい直径の円形に形成されている。またポケット部61は、例えば基板Wの裏面外周部のみと接触し、それ以外の基板裏面部位との間では隙間を形成するように段差形状に形成される。なお、ポケット部61は基板Wの裏面全面と接触するように形成されたものとしても良い。 The susceptor 6 is supported by a support shaft 8 so as to be formed in a disk shape and whose upper surface is horizontal. In the upper surface of the susceptor 6, a pocket portion 61 for mounting the substrate W is formed. The pocket portion 61 is formed in a circle having a diameter slightly larger than that of the substrate W. Further, the pocket portion 61 is formed in a stepped shape so as to contact only the back surface outer peripheral portion of the substrate W, for example, and to form a gap with the other substrate back surface portion. The pocket portion 61 may be formed to be in contact with the entire back surface of the substrate W.

 基板保管部2と搬送路3の間にはゲートバルブ(図示外)が設けられている。ゲートバルブが閉じられている時には基板保管部2と搬送路3の間は基板Wの出入りが不能に遮断される。ゲートバルブが開いた時には基板保管部2と搬送路3の間は基板Wの出入りが可能に導通する。同様に、搬送路3と反応炉5の間にも、それらの導通、遮断を切り替えるためのゲートバルブ(図示外)が設けられている。 A gate valve (not shown) is provided between the substrate storage unit 2 and the transport path 3. When the gate valve is closed, the substrate W is blocked between the substrate storage unit 2 and the transport path 3 so as not to be accessible. When the gate valve is opened, the substrate W can be conducted between the substrate storage unit 2 and the transport path 3 so that the substrate W can enter and leave. Similarly, also between the transport path 3 and the reaction furnace 5, a gate valve (not shown) for switching between conduction and shut-off thereof is provided.

 基板保管部2、搬送路3及び反応炉5は大気から遮断されている。また基板保管部2に異物(水分、酸素、金属等)が混入するのを防止するために、基板保管部2には窒素等の不活性ガスに置換するための構成が設けられている。具体的には、基板保管部2内を真空引きするポンプ(図示外)や、基板保管部2内に窒素等の不活性ガスを導入するガス管(図示外)が接続されている。このガス管は、窒素等の不活性ガス(基板保管部2の雰囲気ガス)を貯蔵する容器(図示外)に接続されている。同様に、搬送路3にも窒素等の不活性ガスを導入するガス管(図示外)が接続されている。なお、図1には、基板保管部2内の雰囲気を評価するために、純水等の捕集液を入れたインピンジャー10と、基板保管部2内の雰囲気の一部をインピンジャー10内に導く管11とを図示している。 The substrate storage unit 2, the transport path 3 and the reactor 5 are shielded from the atmosphere. Further, in order to prevent foreign matter (water, oxygen, metal, etc.) from mixing into the substrate storage unit 2, the substrate storage unit 2 is provided with a configuration for substituting with an inert gas such as nitrogen. Specifically, a pump (not shown) for evacuating the substrate storage unit 2 and a gas pipe (not shown) for introducing an inert gas such as nitrogen into the substrate storage unit 2 are connected. The gas pipe is connected to a container (not shown) for storing an inert gas (atmospheric gas of the substrate storage unit 2) such as nitrogen. Similarly, a gas pipe (not shown) for introducing an inert gas such as nitrogen is also connected to the transport path 3. In FIG. 1, in order to evaluate the atmosphere in the substrate storage unit 2, an impinger 10 containing a collection liquid such as pure water and a part of the atmosphere in the substrate storage 2 are arranged in the impinger 10. And a tube 11 leading to the

 次に、本実施形態のエピタキシャルウェーハの製造手順を説明する。図2はその手順を示したフローチャートである。先ず、シリコン半導体基板Wを準備する(S1)。準備する基板Wの直径、結晶方位、導電型、抵抗率等は特に限定されない。準備する基板Wとして、表面、裏面の両方に対して鏡面研磨加工が施されたポリッシュドウェーハを準備する。 Next, the manufacturing procedure of the epitaxial wafer of the present embodiment will be described. FIG. 2 is a flowchart showing the procedure. First, a silicon semiconductor substrate W is prepared (S1). The diameter, crystal orientation, conductivity type, resistivity, etc. of the substrate W to be prepared are not particularly limited. As a substrate W to be prepared, a polished wafer is prepared which has been mirror-polished on both the front and back surfaces.

 ポリッシュドウェーハの一般的な製造方法を説明すると、チョクラルスキー(Czochralski;CZ)法等を使用して特定の結晶方位を持った単結晶インゴットを製造する(単結晶成長工程)。製造した単結晶インゴットの側面を研削して外径を整え、単結晶インゴットの外周に結晶方位を示すノッチを1つ形成する(円筒研削工程)。単結晶インゴットを特定の結晶方位に沿って薄円板状のウェーハにスライスし(スライス工程)、該スライスしたウェーハの割れ、欠けを防止するためにその外周部を面取りする(面取り工程)。その後、面取りしたウェーハの両面を同時に研削して平坦化し(両頭研削工程)、面取り及び研削されたウェーハに残留する加工歪みをエッチングして除去する(エッチング工程)。更に、ウェーハ表面及び裏面を研磨して鏡面化する(研磨工程)。これらの工程を経てポリッシュドウェーハが得られる。 A general manufacturing method of a polished wafer will be described. A single crystal ingot having a specific crystal orientation is manufactured using a Czochralski (CZ) method or the like (single crystal growth step). The side surface of the manufactured single crystal ingot is ground to adjust the outer diameter, and one notch indicating the crystal orientation is formed on the outer periphery of the single crystal ingot (cylindrical grinding process). The single crystal ingot is sliced into thin disk-like wafers along a specific crystal orientation (slicing step), and its outer peripheral portion is chamfered (chamfering step) in order to prevent cracking and chipping of the sliced wafer. Thereafter, both surfaces of the chamfered wafer are ground and planarized at the same time (double-head grinding process), and processing distortion remaining on the chamfered and ground wafer is etched and removed (etching process). Further, the front and back surfaces of the wafer are polished to mirror finish (polishing step). A polished wafer is obtained through these steps.

 次に、準備した基板W(ポリッシュドウェーハ)に対してSC-1洗浄及びSC-2洗浄等から構成されるRCA洗浄などの洗浄を行って、基板Wから研磨剤や異物等を除去する(S2)。 Next, the prepared substrate W (polished wafer) is subjected to cleaning such as RCA cleaning including SC-1 cleaning, SC-2 cleaning, etc. to remove the polishing agent and foreign substances from the substrate W (see FIG. S2).

 次に、洗浄後の基板Wを複数枚を1ロットとして基板保管部2にセットし、エピタキシャル反応を行うまでこの基板保管部2にて待機させる(S3)。このとき、基板保管部2内の雰囲気中のNOとNOの濃度の合計が140ng/m以下となるように該雰囲気を管理する。例えばNO、NOの各濃度が70ng/m以下となるように管理すれば、NOとNOの濃度の合計は140ng/m以下となる。なお、NO、NOの合計濃度が140ng/m以下となっているならば、NO、NOの一方の濃度が70ng/mを超えていたとしてもよい。なお、基板保管部2内の雰囲気中のNOとNOの合計濃度を10ng/m以下とするのがより好ましい。後述の実施例で示すように、合計濃度を10ng/m以下とすることで、得られるエピタキシャルウェーハの裏面におけるヘイズレベルをより一層抑制できるからである。 Next, a plurality of substrates W after cleaning are set as one lot in the substrate storage unit 2, and the substrate storage unit 2 is caused to stand by until an epitaxial reaction is performed (S3). At this time, the atmosphere is controlled such that the total concentration of NO 2 and NO 3 in the atmosphere in the substrate storage unit 2 is 140 ng / m 3 or less. For example, the concentration of NO 2, NO 3 is be managed such that the 70 ng / m 3 or less, the total concentration of NO 2 and NO 3 becomes 140 ng / m 3 or less. Incidentally, if the total concentration of NO 2, NO 3 is in the 140 ng / m 3 or less, one of the concentrations of NO 2, NO 3 may be exceeded 70 ng / m 3. The total concentration of NO 2 and NO 3 in the atmosphere in the substrate storage unit 2 is more preferably 10 ng / m 3 or less. By setting the total concentration to 10 ng / m 3 or less, as shown in Examples described later, the haze level on the back surface of the obtained epitaxial wafer can be further suppressed.

 なお、上記合計濃度が140ng/m以下となっているかは例えば以下のようにして確認することができる。すなわち、基板保管部2内の雰囲気の一部をポンプ(図示外)等により管11を通してインピンジャー10内の純水等の捕集液に通気して該捕集液に溶け込ませる。この捕集液中のNO イオン濃度及びNO イオン濃度をイオンクロマトグラフィ分析等の手法により測定する。得られたNO イオン濃度及びNO イオン濃度をそれぞれ基板保管部2の雰囲気中のNO濃度及びNO濃度を示すものとなるように換算し、換算後のNO濃度及びNO濃度の合計が140ng/m以下であることを確認する。 In addition, it can be confirmed as follows, for example whether the said total density | concentration is 140 ng / m < 3 > or less. That is, a part of the atmosphere in the substrate storage unit 2 is vented to a collection liquid such as pure water in the impinger 10 through the pipe 11 by a pump (not shown) or the like, and dissolved in the collection liquid. Ion concentration and NO 3 - - NO 2 in the collected liquid in ion concentration measured by a technique such as ion chromatographic analysis. The resulting NO 2 - ion concentration and NO 3 - ion concentration is converted to respective concentrations as an indication NO 2 concentration and NO 3 concentration in the atmosphere of substrate storage section 2, after conversion NO 2 concentration and NO 3 Make sure that the total concentration is 140 ng / m 3 or less.

 NO、NO濃度の低減は、例えば、基板保管部2内をポンプにて真空引きした後、窒素等の高純度不活性ガスを基板保管部2内に導入することが考えられる。また、基板保管部2の循環雰囲気中のNOxを捕集、除去するケミカルフィルターをガス導入管に設けて、循環雰囲気の純度を改善することも考えられる。 For reducing the concentration of NO 2 and NO 3 , for example, it is conceivable to introduce a high purity inert gas such as nitrogen into the substrate storage unit 2 after evacuating the inside of the substrate storage unit 2 with a pump. It is also conceivable to improve the purity of the circulation atmosphere by providing a chemical filter for collecting and removing NOx in the circulation atmosphere of the substrate storage unit 2 in the gas introduction pipe.

 次に、基板保管部2に保管された基板Wの中から1つを選択して、選択した基板Wを反応炉5に搬送する(S4)。具体的には、基板保管部2と搬送路3の間のゲートバルブ及び搬送路3と反応炉5の間のゲートバルブをそれぞれ開いて、搬送ロボット4に基板保管部2に保管された基板Wの1つを反応炉5まで搬送させて、搬送した基板Wをサセプタ6のポケット部61に載置させる。その後、各ゲートバルブを閉じる。図1の例では、基板保管部2に、基板Wを上下方向に収容するカセット(図示外)が設けられ、このカセットの下側に収容された基板Wから順番に反応が行われる例を示している。なお、搬送路3内の雰囲気は、例えば窒素等の不活性ガスに置換されている。 Next, one of the substrates W stored in the substrate storage unit 2 is selected, and the selected substrate W is transported to the reaction furnace 5 (S4). Specifically, the substrate W stored in the substrate storage unit 2 by the transfer robot 4 by opening the gate valve between the substrate storage unit 2 and the transfer passage 3 and the gate valve between the transfer passage 3 and the reaction furnace 5 respectively. The substrate W is transferred to the reaction furnace 5, and the transferred substrate W is placed on the pocket portion 61 of the susceptor 6. Then close each gate valve. In the example of FIG. 1, the substrate storage unit 2 is provided with a cassette (not shown) for storing the substrate W in the vertical direction, and an example is shown in which reactions are sequentially performed from the substrate W stored under this cassette. ing. In addition, the atmosphere in the conveyance path 3 is substituted by inert gas, such as nitrogen, for example.

 次に、反応炉5において基板Wの表面上にシリコン単結晶膜を気相成長により形成する(S5)。具体的には、サセプタ6を回転させつつ、ランプ7により基板Wを熱処理温度(例えば1050℃~1200℃)まで加熱する。次に、反応炉5内に水素ガスを導入して、基板Wの表面に形成されている自然酸化膜を除去するための気相エッチングを行う。なお、この気相エッチングは次工程である気相成長の直前まで行われる。次に、基板Wを気相成長温度(例えば1050℃~1180℃)まで降温し、反応炉5内に、気相成長ガス、つまり原料ガス(例えばトリクロロシラン)、キャリアガス(例えば水素)及び必要に応じてドーパントガス(例えばPH)をそれぞれ略水平に供給することによって基板Wの表面上に所定膜厚のシリコン単結晶膜を気相成長させシリコンエピタキシャルウェーハとする。 Next, in the reaction furnace 5, a silicon single crystal film is formed on the surface of the substrate W by vapor phase growth (S5). Specifically, the substrate W is heated to a heat treatment temperature (for example, 1050 ° C. to 1200 ° C.) by the lamp 7 while rotating the susceptor 6. Next, hydrogen gas is introduced into the reaction furnace 5 to perform vapor phase etching for removing the natural oxide film formed on the surface of the substrate W. Note that this vapor phase etching is performed until just before vapor phase growth which is the next step. Next, the substrate W is cooled to a vapor phase growth temperature (for example, 1050 ° C. to 1180 ° C.), and a vapor phase growth gas, ie, source gas (for example, trichlorosilane), carrier gas (for example, hydrogen) and necessary Accordingly, a dopant gas (for example, PH 3 ) is supplied substantially horizontally, respectively, to vapor-phase grow a silicon single crystal film of a predetermined film thickness on the surface of the substrate W, thereby forming a silicon epitaxial wafer.

 その後、反応炉5を取り出し温度(例えば650℃)まで降温した後、ゲートバルブを開いて、搬送ロボット4により、反応炉5からシリコンエピタキシャルウェーハを搬出する(S6)。そして、搬出したシリコンエピタキシャルウェーハをクーリングチャンバー室(図示外)に搬送して、そのクーリングチャンバー室にて冷却した後、エピタキシャル成長装置1外に搬出する。 Thereafter, the reactor 5 is taken out and cooled to a temperature (for example, 650 ° C.), and then the gate valve is opened, and the silicon epitaxial wafer is unloaded from the reactor 5 by the transfer robot 4 (S6). Then, the carried-out silicon epitaxial wafer is transported to a cooling chamber chamber (not shown), cooled in the cooling chamber chamber, and then carried out of the epitaxial growth apparatus 1.

 上記S4~S6の工程を、基板保管部2に保管された1ロット分の基板Wに対して順番に1枚ずつ実施する。 The steps S4 to S6 are carried out one by one on the substrate W for one lot stored in the substrate storage unit 2.

 以上が本実施形態のエピタキシャルウェーハの製造手順である。ここで、従来では、ロットの初期の基板では裏面ハローは発生しないが、ロット後半になるに従い(基板保管部での保管時間が長くなるに従い)、裏面ハローが発生する傾向が有る。一方、本実施形態では、雰囲気中のNO、NOの合計濃度が140ng/m以下に管理された基板保管部2で保管された基板を用いるので、下記実施例で示すように、基板保管部2での保管時間が長くなったとしても、裏面ハローの発生(ヘイズレベル)を抑制した高品位なエピタキシャルウェーハを得ることができる。 The above is the manufacturing procedure of the epitaxial wafer of this embodiment. Here, conventionally, the back surface halo is not generated in the initial stage substrate of the lot, but the back surface halo tends to be generated in the second half of the lot (as the storage time in the substrate storage section becomes longer). On the other hand, in the present embodiment, since the substrate stored in the substrate storage unit 2 in which the total concentration of NO 2 and NO 3 in the atmosphere is 140 ng / m 3 or less is used, as shown in the following example, Even if the storage time in the storage unit 2 is long, it is possible to obtain a high quality epitaxial wafer in which the occurrence of the back surface halo (haze level) is suppressed.

 なお、基板保管部2の雰囲気に存在するNO、NOの低減により裏面ハローを抑制できることのメカニズムについて推定すると、基板保管部2の雰囲気にNO、NOが存在することで、基板の表面、裏面が酸化性雰囲気に曝されて徐々に酸化が進み、表面、裏面に酸化膜が形成される。酸化膜の付き方は、雰囲気ガスの基板への流れ方、当たり方によって、面内で酸化膜が厚い場所、薄い場所ができると予想される。この酸化膜が、エピタキシャル成長前の熱処理で完全に取れず、取り切れた場所と残った場所とで、基板裏面でのPoly-Siの付着量にムラができることでハローが発生する。したがって、NOとNOの合計濃度が140ng/m以下となるように基板保管部2の雰囲気を管理することで、基板保管部2内が酸化性雰囲気になることを抑制し、ハロー発生を抑制できると考えられる。 Note that the reduction of NO 2, NO 3 present in the atmosphere of a substrate storage section 2 when estimating the mechanism of the back surface halo can be suppressed, that is NO 2, NO 3 present in the atmosphere of a substrate storage section 2, of the substrate The front surface and the back surface are exposed to the oxidizing atmosphere and oxidation progresses gradually to form an oxide film on the front surface and the back surface. It is expected that depending on how the atmosphere gas flows to and from the substrate, the oxide film can be formed in places where the oxide film is thick and thin in the plane. This oxide film can not be completely removed by heat treatment before epitaxial growth, and due to unevenness in the amount of adhesion of Poly-Si on the back surface of the substrate between the removed portion and the remaining portion, halo occurs. Therefore, by controlling the atmosphere of the substrate storage unit 2 so that the total concentration of NO 2 and NO 3 is 140 ng / m 3 or less, the substrate storage unit 2 is prevented from becoming an oxidizing atmosphere, and halo generation occurs. It is thought that it can control.

 以下、実施例及び比較例を挙げて本発明をさらに具体的に説明するが、これらは本発明を限定するものではない。 Hereinafter, the present invention will be more specifically described by way of examples and comparative examples, but these are not intended to limit the present invention.

 (実施例、比較例)
 図1と同様の構成の枚葉式エピタキシャル成長装置において、直径300mm、主表面の面方位(100)のP型シリコン単結晶基板を用いて成膜を行った。シリコン単結晶基板は裏面研磨されている基板を準備した。その後、実施例としてNOとNOの合計濃度が140ng/m以下となるよう雰囲気を管理した2例の基板保管部と、比較例としてNOとNOの合計濃度が140ng/mを超える雰囲気の2例の基板保管部にそれぞれ準備した基板を洗浄後6時間暴露し、同一装置でエピタキシャル成長を行った。その際、基板保管部のNO濃度及びNO濃度の測定をイオンクロマトグラフィ分析で行った。具体的には、基板保管部の雰囲気をポンプで引き上げて、インピンジャー内の純水に通気して溶け込ませ、この純水中のNO イオン濃度及びNO イオン濃度をイオンクロマトグラフィにより測定した。得られた純水中のNO イオン濃度及びNO イオン濃度をそれぞれ基板保管部の雰囲気中のNO濃度及びNO濃度を示すものとなるよう換算した。なお、上記6時間は、1ロットの後半の基板における雰囲気暴露時間を想定している。
(Example, comparative example)
In the single wafer type epitaxial growth apparatus having the same configuration as that of FIG. 1, film formation was performed using a P-type silicon single crystal substrate with a diameter of 300 mm and a plane orientation of (100) on the main surface. The silicon single crystal substrate prepared the back-polished substrate. Thereafter, as an example, the substrate storage unit of two examples in which the atmosphere was controlled so that the total concentration of NO 2 and NO 3 is 140 ng / m 3 or less, and the total concentration of NO 2 and NO 3 as a comparative example 140 ng / m 3 The prepared substrates were exposed to the substrate storage parts in two cases of atmospheres exceeding 6 hours for 6 hours after cleaning, and epitaxial growth was performed in the same apparatus. At that time, the measurement of the NO 2 concentration and the NO 3 concentration in the substrate storage part was performed by ion chromatography analysis. Specifically, the atmosphere of the substrate storage unit is pumped up, aerated into pure water in the impinger and dissolved, and the NO 2 - ion concentration and the NO 3 - ion concentration in the pure water are measured by ion chromatography did. The NO 2 - ion concentration and the NO 3 - ion concentration in the obtained pure water were converted so as to indicate the NO 2 concentration and the NO 3 concentration in the atmosphere of the substrate storage unit, respectively. In addition, the said six hours assume the atmosphere exposure time in the board | substrate of the latter half of 1 lot.

 エピタキシャル層成膜では、原料ガスをTCS(トリクロロシラン)とし、TCSの流量を10L/minとし、キャリアガスとして水素の流量を50L/minとし、膜厚10μmのノンドープ層の反応を行った。そして、反応したエピタキシャルウェーハの裏面外観評価、ヘイズレベルを評価した。なお、ヘイズとは、エピタキシャルウェーハの表面、裏面に発生した微小な凹凸であり、暗室内で集光ランプ等を用いてエピタキシャルウェーハの表面、裏面を観察すると、光が乱反射して白く曇って見えるものである。ヘイズレベルは裏面ハローの発生に相関する指標であり、ヘイズレベルが大きいと裏面ハローが発生する可能性が高い。 In the epitaxial layer film formation, the source gas was TCS (trichlorosilane), the flow rate of TCS was 10 L / min, the flow rate of hydrogen as a carrier gas was 50 L / min, and a reaction of a non-doped layer with a film thickness of 10 μm was performed. Then, the back surface appearance evaluation of the reacted epitaxial wafer and the haze level were evaluated. In addition, haze is a minute unevenness generated on the surface and the back surface of the epitaxial wafer, and when the surface and the back surface of the epitaxial wafer are observed using a condensing lamp or the like in a dark room, light is irregularly reflected and appears white cloudy It is a thing. The haze level is an index correlating to the occurrence of the back surface halo, and when the haze level is large, the back surface halo is likely to occur.

 裏面外観評価は暗室にて、集光灯下(20万ルクス)での裏面観察、評価を行った。ヘイズレベルは、KLATencor社のパーティクルカウンタSP1におけるDW(Darkfield Wide)モードにて得られるDWN-HazePeak値にて評価した。 Back surface appearance evaluation was performed in a dark room, under the focusing lamp (200,000 lux), and was subjected to back surface observation and evaluation. The haze level was evaluated by the DWN-HazePeak value obtained in the DW (Darkfield Wide) mode in particle counter SP1 of KLATencor.

 また、参考例として、基板洗浄後10分以内にエピタキシャル反応をしたエピタキシャルウェーハも準備し、同評価を行った。参考例では、実施例の2例及び比較例の2例の各NO濃度及びNO濃度の暴露雰囲気に対して、基板洗浄後10分以内にエピタキシャル反応を行った。 In addition, as a reference example, an epitaxial wafer having an epitaxial reaction within 10 minutes after substrate cleaning was also prepared and subjected to the same evaluation. In the reference example, an epitaxial reaction was performed within 10 minutes after substrate cleaning with respect to the exposure atmosphere of each of the NO 2 concentration and the NO 3 concentration of the two examples of the example and the two examples of the comparative example.

 上記評価手順を図3に示す。図3において、実施例におけるS31の工程は、図2のS3の工程と同じであり、すなわち、基板保管部の雰囲気中のNO濃度及びNO濃度の合計が140ng/m以下となるように管理した。これに対して、比較例におけるS31の工程では、基板保管部の雰囲気中のNO濃度及びNO濃度の合計が140ng/mを超えるように管理した。また、図3では、S6の工程の後にS7の工程(上記裏面外観評価及びヘイズレベル評価)を追加している。それ以外は、図2の手順と同じである。 The above evaluation procedure is shown in FIG. In FIG. 3, the process of S31 in the embodiment is the same as the process of S3 of FIG. 2, that is, the total of the NO 2 concentration and the NO 3 concentration in the atmosphere of the substrate storage unit is 140 ng / m 3 or less I managed to. On the other hand, in the step of S31 in the comparative example, the total of the NO 2 concentration and the NO 3 concentration in the atmosphere of the substrate storage unit was controlled to exceed 140 ng / m 3 . Moreover, in FIG. 3, the process (the said back surface external appearance evaluation and haze level evaluation) of S7 is added after the process of S6. Other than that, it is the same as the procedure of FIG.

 (参考例)
 参考例では、いずれのNO濃度及びNO濃度においても、ウェーハ裏面にハローと思われるクモリは確認されず、DWN-HazePeak値は10ppm程度であった。
(Reference example)
In the reference example, no cloudiness which is considered to be a halo was observed on the back surface of the wafer at any of the NO 2 concentration and the NO 3 concentration, and the DWN-HazePeak value was about 10 ppm.

 (実施例)
 実施例でのイオンクロマトグラフィ分析により得られたNO/NO濃度(すなわち、雰囲気を溶け込ませた純水中のNO /NO イオン濃度を、基板保管部の雰囲気中のNO/NO濃度を示すものとなるよう換算したもの)は1例目では1.2/1.5(ng/m)、2例目では54.1/63.2(ng/m)であった。裏面外観評価ではいずれのウェーハもハローと思われるクモリは確認されず、DWN-HazePeak値も10ppm以下と参考例と同等の品質であった。特に、1例目のほうがより低い値(8ppm以下)を示し、より良い結果であった。
(Example)
NO 2 / NO 3 concentration obtained by ion chromatography analysis in Example (i.e., pure water was dissolve atmosphere NO 2 - / NO 3 - ion concentration, NO in the atmosphere of the substrate storage section 2 / It is 1.2 / 1.5 (ng / m 3 ) in the first case, 54.1 / 63.2 (ng / m 3 ) in the second case, and converted to show the concentration of NO 3 there were. In the back surface appearance evaluation, no cloudiness which is considered to be a halo was confirmed in any of the wafers, and the DWN-HazePeak value was 10 ppm or less, which was the same quality as the reference example. In particular, the first case showed a lower value (8 ppm or less), which was a better result.

 (比較例)
 比較例でのイオンクロマトグラフィ分析により得られたNO/NO濃度(すなわち、雰囲気を溶け込ませた純水中のNO /NO イオン濃度を、基板保管部の雰囲気中のNO/NO濃度を示すものとなるよう換算したもの)は1例目では161.0/122.7(ng/m)、2例目では451.2/223.8(ng/m)であった。裏面外観評価ではいずれのウェーハもハローと思われるクモリが確認され、DWN-HazePeak値は1例目では33.5ppm、2例目では59.8ppmと参考例と比べて、悪化した。
(Comparative example)
NO 2 / NO 3 concentration obtained by ion chromatography analysis of the comparative example (i.e., pure water was dissolve atmosphere NO 2 - / NO 3 - ion concentration, NO in the atmosphere of the substrate storage section 2 / NO 3 which was converted to be a indicates the concentration) 161.0 / 122.7 at first case (ng / m 3), in the second case at 451.2 / 223.8 (ng / m 3 ) there were. In the back surface appearance evaluation, any wafer was considered to be a halo, and the DWN-HazePeak value was 33.5 ppm in the first case and 59.8 ppm in the second case, which was worse than in the reference example.

 実施例と比較例でのNOxイオン濃度とDWN-HazePeak値の関係を図4、図5に示す。図4はNO濃度とDWN-HazePeak値の関係を示し、図5はNO濃度とDWN-HazePeak値の関係を示している。図4、図5より、NO、NOの減少に伴って、DWN-HazePeak値が低下しており、70ng/m付近以下では参考例と同等でDWN-HazePeak値に変動が無いことが分かる。 The relationship between the NOx ion concentration and the DWN-HazePeak value in the example and the comparative example is shown in FIG. 4 and FIG. FIG. 4 shows the relationship between the NO 2 concentration and the DWN-HazePeak value, and FIG. 5 shows the relationship between the NO 3 concentration and the DWN-HazePeak value. 4. From FIG. 4 and FIG. 5, the DWN-HazePeak value decreases as NO 2 and NO 3 decrease, and there is no change in the DWN-HazePeak value similar to the reference example at around 70 ng / m 3 or less I understand.

 このように、本発明を適用することで、基板保管部での保管時間(雰囲気暴露時間)が長いエピタキシャルウェーハであっても裏面ハロー低減が可能であることを示しており、特に基板保管部の雰囲気中のNO及びNOの合計濃度を140ng/m以下(より好ましくは10ng/m以下)にすることで、裏面ハロー抑制を効果的に実施できる。 Thus, by applying the present invention, it has been shown that back surface halo reduction is possible even for an epitaxial wafer having a long storage time (atmosphere exposure time) in the substrate storage unit, and in particular, the substrate storage unit the total concentration of NO 2 and NO 3 in the atmosphere 140 ng / m 3 or less (more preferably 10 ng / m 3 or less) by the can effectively implement the back surface halo suppression.

 なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は、例示であり、本発明の請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであったとしても本発明の技術的範囲に包含される。例えば基板サイズは300mmに限らず、200mm以下の基板や、300mmより大きい基板にも適用できる。また、シリコンを成膜する気相成長装置であれば、枚葉式エピタキシャル成長炉に限らず、バッチ式等に適用しても良い。 The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the claims of the present invention, and the same effects can be obtained by any embodiments. It is included in the technical scope of the invention. For example, the substrate size is not limited to 300 mm, and can be applied to a substrate of 200 mm or less or a substrate larger than 300 mm. Moreover, if it is a vapor phase growth apparatus which forms a film into silicon, you may apply not only to a single wafer type epitaxial growth furnace but to a batch type etc.

 1 枚葉式エピタキシャル成長装置
 2 基板保管部
 3 搬送路
 4 搬送ロボット
 5 反応炉
 6 サセプタ
 61 サセプタのポケット部
 7 ランプ
 8 サポートシャフト
 10 インピンジャー
Reference Signs List 1 single wafer type epitaxial growth apparatus 2 substrate storage unit 3 transfer path 4 transfer robot 5 reactor 6 susceptor 61 susceptor pocket portion 7 ramp 8 support shaft 10 impinger

Claims (2)

 裏面研磨されたシリコン半導体基板を洗浄後にNOとNOの濃度の合計が140ng/m以下の環境雰囲気中で保管し、該シリコン半導体基板上にシリコンエピタキシャル層を気相成長させることを特徴とするエピタキシャルウェーハの製造方法。 After cleaning the back-polished silicon semiconductor substrate, it is stored in an environmental atmosphere having a total concentration of NO 2 and NO 3 of 140 ng / m 3 or less, and a silicon epitaxial layer is vapor-phase grown on the silicon semiconductor substrate. Method of manufacturing an epitaxial wafer.  前記合計が10ng/m以下であることを特徴とする請求項1に記載のエピタキシャルウェーハの製造方法。 The said total is 10 ng / m < 3 > or less, The manufacturing method of the epitaxial wafer of Claim 1 characterized by the above-mentioned.
PCT/JP2018/025857 2017-10-27 2018-07-09 Epitaxial wafer manufacturing method Ceased WO2019082450A1 (en)

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