WO2018181663A1 - Liquid crystal display device - Google Patents

Abstract

The purpose of the present invention is to reduce power consumption in a liquid crystal display device in which writing to pixels of multiple colors is performed by one source bus line. A liquid crystal display device 1 is provided with multiple gate drivers 12R∙12G∙12B for driving gate bus lines GL; and a source driver 11 for driving source bus lines SL, wherein pixel electrodes P corresponding to color filters of multiple colors (RGB) are connected to one source bus line SL. Pixel electrodes of a single color are connected to each of the gate bus lines GL. The gate drivers 12R∙12G∙12B are connected to the gate bus lines GL(R)∙GL(G)∙GL(B), respectively. In one frame, the gate drivers 12R∙12G∙12B sequentially drive the gate bus lines GL color by color.

Description

Liquid crystal display

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device that performs writing to pixels of a plurality of colors through one source bus line.

2. Description of the Related Art Conventionally, a liquid crystal display device that performs writing to pixels of a plurality of colors using a single source bus line (data line) is known. For example, the following Patent Document 1 is a horizontally long liquid crystal panel including a scanning line driving circuit arranged on the long side and a data line driving circuit arranged on the short side, along the data line. A liquid crystal panel in which pixel regions are arranged in the order of RGB is disclosed.

In the above-described conventional liquid crystal panel, the data line driving circuit converts the image data corresponding to each color of RGB into dot sequential image data, changes this to line sequential image data, and further converts the line sequential image data corresponding to each color to the line sequential image data. By performing parallel-serial conversion, serial-format image data is generated for each data line, and this is DA-converted to generate an image signal of each color. Thereby, pixel signals of each color can be supplied to the pixel areas of each color arranged in the order of RGB along the data line.

JP 2001-194645 A

However, the conventional liquid crystal panel has a problem that the potential fluctuation of the source bus line (data line) is large and the power consumption becomes high. This problem is particularly noticeable when there are many monochrome display screens. That is, in the case of monochromatic display, only a specific color of RGB is bright and the other colors are dark, so that the potential difference between the image signals of each color is large. For example, assuming that the conventional liquid crystal panel is in a normally black mode and displaying a single green color on the liquid crystal panel, a high potential V _H is applied to the G (green) pixel, and R (red) A low potential V _L is applied to the pixels B and B (blue). When these potentials are serially applied to one data line in the order of RGB, the potentials of the data lines are V _L , V _H , V _L , V _L , V _H , V _L , V _L , As in V _H , V _L ..., It frequently changes between a high potential and a constant potential.

In addition, in the configuration in which pixels of three colors RGB are connected to one data line as described above, the data line is compared with the configuration in which only pixels of the same color are connected to one data line. Since the potential fluctuation frequency is tripled, the influence on power consumption is also increased.

In view of the above problems, an object of the present invention is to reduce power consumption in a liquid crystal display device that performs writing to pixels of a plurality of colors using a single source bus line.

The liquid crystal display device disclosed below is
A plurality of gate bus lines, a plurality of source bus lines, a pixel transistor connected to the gate bus line and the source bus line, a pixel electrode connected to the pixel transistor, and a pixel electrode provided corresponding to the pixel electrode A liquid crystal display device provided with a color filter,
A plurality of gate drivers for driving the gate bus lines;
A source driver for driving the source bus line,
Pixel electrodes corresponding to a plurality of color filters are connected to one source bus line,
A single color pixel electrode is connected to each of the gate bus lines,
The plurality of gate drivers are provided in the same number or more as the number of colors of the color filter,
Each of the plurality of gate drivers is connected only to a gate bus line to which a single color pixel electrode is connected,
In one frame, the plurality of gate drivers sequentially drive the gate bus lines for each color.

According to the following disclosure, it is possible to reduce power consumption in a liquid crystal display device that performs writing to pixels of a plurality of colors using a single source bus line.

FIG. 1 is a circuit diagram showing a schematic configuration of the liquid crystal display device according to the first embodiment. FIG. 2 is a timing chart showing drive signals supplied from the gate driver to the gate bus lines. FIG. 3 is a timing chart showing an example of a data signal supplied to the source bus line. FIG. 4 is an explanatory diagram showing data written from the source driver to the source bus line. FIG. 5 is a circuit diagram showing a schematic configuration of a modification of the liquid crystal display device according to the first embodiment. FIG. 6 is a circuit diagram showing a schematic configuration of the liquid crystal display device according to the second embodiment. FIG. 7 is a circuit diagram showing a schematic configuration of part of the pixel region in the liquid crystal display device according to the third embodiment. FIG. 8 shows the polarity of the data signal applied to the pixel electrode from each source bus line in a certain frame in the configuration shown in FIG. FIG. 9 shows the polarity of the data signal applied to the pixel electrode from each source bus line in the frame following the frame shown in FIG. FIG. 10 is a circuit diagram showing a schematic configuration of part of a pixel region in the liquid crystal display device according to the fourth embodiment. FIG. 11 shows the polarity of the data signal applied to the pixel electrode from each source bus line in a certain frame in the configuration shown in FIG. FIG. 12 shows the polarity of the data signal applied to the pixel electrode from each source bus line in the frame next to the frame shown in FIG. FIG. 13 is an explanatory diagram illustrating a region where no pixel transistor is arranged in the pixel region in the liquid crystal display device according to the fourth embodiment. FIG. 14 is a circuit diagram showing a schematic configuration of part of a pixel region in a liquid crystal display device according to the fifth embodiment. FIG. 15 shows the polarity of the data signal applied to the pixel electrode from each source bus line in a certain frame in the configuration shown in FIG. FIG. 16 shows the polarity of the data signal applied to the pixel electrode from each source bus line in the frame next to the frame shown in FIG. FIG. 17 is a timing chart showing an example of a data signal supplied to the source bus line.

The display device according to the first configuration is:
A plurality of gate bus lines, a plurality of source bus lines, a pixel transistor connected to the gate bus line and the source bus line, a pixel electrode connected to the pixel transistor, and a pixel electrode provided corresponding to the pixel electrode A liquid crystal display device provided with a color filter,
A plurality of gate drivers for driving the gate bus lines;
A source driver for driving the source bus line,
Pixel electrodes corresponding to a plurality of color filters are connected to one source bus line,
A single color pixel electrode is connected to each of the gate bus lines,
The plurality of gate drivers are provided in the same number or more as the number of colors of the color filter,
Each of the plurality of gate drivers is connected only to a gate bus line to which a single color pixel electrode is connected,
In one frame, the plurality of gate drivers sequentially drive the gate bus lines for each color.

The gate driver and the source driver may be formed outside or inside the display device. When forming outside, the IC that contains these drivers,
Either directly connected to the display device or indirectly connected to the display device using a flexible substrate. When these drivers are formed in the display device, it is preferable to form the drivers at the same time in the display device creation process.

According to this configuration, since the plurality of gate drivers sequentially drive the gate bus line for each color in one frame, the source driver to the source bus line represents a gradation to be written to a single color pixel. Data signals are supplied continuously. Therefore, the potential variation of the source bus line is reduced as compared with the case where data signals to be written to the pixels of a plurality of colors are supplied in the order of RGBRGB, for example. This effect is particularly noticeable when displaying a single color image. As a result, power consumption can be reduced in a liquid crystal display device that performs writing to pixels of a plurality of colors using one source bus line.

The liquid crystal display device according to the second configuration is a configuration in which, in the liquid crystal display device according to the first configuration, the plurality of gate drivers are arranged outside a pixel region in which the pixel electrodes are arranged.

A liquid crystal display device according to a third configuration is the liquid crystal display device according to the first configuration, wherein a switching element constituting at least a part of the plurality of gate drivers is arranged in a pixel region in which the pixel electrode is arranged. It is the structure which was made.

This configuration has advantages such as reducing the area of the frame region and increasing the degree of freedom in designing the external shape of the liquid crystal display device as compared with the configuration in which all the gate drivers are arranged in the frame region.

A liquid crystal display device according to a fourth configuration is the liquid crystal display device according to any one of the first to third configurations, wherein the switching element includes a semiconductor film formed of an oxide semiconductor.

A liquid crystal display device according to a fifth configuration is a configuration in which the plurality of color pixel electrodes include three colors of red, green, and blue in the liquid crystal display device according to any one of the first to fourth configurations. .

The liquid crystal display device according to a sixth configuration is a configuration in which the plurality of pixel electrodes include four or more colors in the liquid crystal display device according to any one of the first to fourth configurations. As such a configuration, for example, various pixel configurations such as RGBY, RGBW, or RGBWY can be employed.

A liquid crystal display device according to a seventh configuration is the liquid crystal display device according to any one of the first to sixth configurations, wherein only one of the left and right sides of the source bus line is connected to one source bus line. The pixel transistor and the pixel electrode are arranged.

A liquid crystal display device according to an eighth configuration is the liquid crystal display device according to any one of the first to sixth configurations, wherein the pixel transistor and the pixel are arranged on the left and right of the source bus line with respect to one source bus line. In this configuration, the electrodes are arranged at a predetermined period. According to this configuration, for example, when the liquid crystal display device is driven by source inversion, the same effect as that obtained when pseudo dot inversion driving (or inversion driving in units of several dots) is obtained can be obtained. Thereby, there is an advantage that flicker and crosstalk are suppressed.

The liquid crystal display device according to the ninth configuration is a configuration in which the liquid crystal display device according to any one of the first to eighth configurations is in a normally black mode.

The liquid crystal display device according to the tenth configuration is a configuration in which the liquid crystal display device according to any one of the first to eighth configurations is in a normally white mode.

A liquid crystal display device according to an eleventh configuration is the liquid crystal display device according to any one of the first to tenth configurations, wherein a gate bus line connected to a pixel electrode of one color among the plurality of gate drivers is provided. While the gate driver to be driven is operating, the other gate drivers are configured to pause. According to this configuration, power consumption can be further reduced by putting a gate driver that does not drive the gate bus line out of the plurality of gate drivers into a dormant state.

[Embodiment]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated. In addition, in order to make the explanation easy to understand, in the drawings referred to below, the configuration is shown in a simplified or schematic manner, or some components are omitted. Further, the dimensional ratio between the constituent members shown in each drawing does not necessarily indicate an actual dimensional ratio.

[First Embodiment]
FIG. 1 is a circuit diagram showing a schematic configuration of the liquid crystal display device according to the present embodiment. As shown in FIG. 1, the liquid crystal display device 1 includes gate bus lines GL and source bus lines SL arranged in a matrix on a substrate (active matrix substrate). In FIG. 1, the gate bus line GL extends along the X direction shown in FIG. 1, and the source bus line SL extends along the Y direction.

As shown in FIG. 1, a pixel transistor T is provided near the intersection of the gate bus line GL and the source bus line SL. The pixel transistor T is, for example, a TFT (Thin-Film-Transistor). The gate electrode of the pixel transistor T is connected to the gate bus line GL, the source electrode is connected to the source bus line SL, and the drain electrode is connected to the pixel electrode P.

The liquid crystal display device 1 of the present embodiment includes a color filter in which three colors of RGB are arranged in a stripe in the Y direction. Thereby, as shown in FIG. 1, the pixel electrode P in the first row (the uppermost row in FIG. 1) functions as a pixel displaying red (R). The pixel electrode P in the second row functions as a pixel that displays green (G). The pixel electrode P in the third row functions as a pixel that displays blue (B). Hereinafter, similarly, RGB pixels are repeatedly arranged in the Y direction.

Here, in FIG. 1, the gate lines GL to which the R pixel electrodes P are connected are denoted as GL (R1), GL (R2),... GL (Rn). Similarly, the gate line GL to which the G pixel electrode P is connected is denoted as GL (G1), GL (G2),..., GL (Gn), and the gate line GL to which the B pixel electrode P is connected. , GL (B1), GL (B2), ..., GL (Bn). In the following description, when the gate lines GL (R1), GL (R2),..., GL (Rn) to which the R pixel electrode P is connected are described without distinguishing individual gate lines. These are collectively referred to as the gate line GL (R). The same applies to the gate line GL (G) to which the G pixel electrode P is connected and the gate line GL (B) to which the B pixel electrode P is connected.

The source bus line SL is connected to the source driver 11. Of the gate bus lines GL, the gate line GL (R) to which the R pixel electrode P is connected is connected to the R pixel gate driver 12R. The gate line GL (G) to which the G pixel electrode P is connected is connected to the G pixel gate driver 12G. The gate line GL (B) to which the B pixel electrode P is connected is connected to the B pixel gate driver 12B.

In FIG. 1, an area surrounded by a broken line 13 is a pixel area in which pixels are arranged and contributes to image display. In the first embodiment, the source driver 11 and the gate drivers 12R, 12G, and 12B are arranged in a so-called frame area outside the pixel area 13.

FIG. 2 is a timing chart showing drive signals supplied from the gate drivers 12R, 12G, and 12B to the gate bus lines GL. As shown in FIG. 2, in the present embodiment, in one frame (1H period shown in FIG. 2), first, from the gate driver 12R, the gate bus lines GL (R1), GL (R2),. The selection pulse is sequentially supplied to (). Meanwhile, the gate drivers 12G and 12B are preferably stopped. Next, selection pulses are sequentially supplied from the gate driver 12G to the gate bus lines GL (G1), GL (G2),... GL (Gn). Meanwhile, it is preferable that the gate drivers 12R and 12B are stopped. Thereafter, selection pulses are sequentially supplied from the gate driver 12B to the gate bus lines GL (B1), GL (B2),... GL (Bn). Meanwhile, it is preferable that the gate drivers 12R and 12G are stopped.

FIG. 3 is a timing chart showing an example of a data signal supplied to the source bus line SL. The example shown in FIG. 3 is a data signal when the liquid crystal display device 1 is configured as a normally black mode display device and displays an image of a single green color in the pixel region 13.

As shown in FIGS. 2 and 3, in the present embodiment, the red color is supplied from the source driver 11 to the source bus line SL while the selection pulse is sequentially supplied from the gate driver 12R to the gate bus line GL (R). A low potential data signal corresponding to the gradation (zero gradation) to be displayed on the pixel is supplied. Next, while the selection pulse is sequentially supplied from the gate driver 12G to the gate bus line GL (G), the gray level (256 gray levels) displayed on the green pixel from the source driver 11 to the source bus line SL. A corresponding high potential data signal is supplied. Thereafter, while the selection pulse is sequentially supplied from the gate driver 12B to the gate bus line GL (B), the gray level (zero gray level) displayed on the blue pixel from the source driver 11 to the source bus line SL. A corresponding low potential data signal is supplied.

With the above drive control, a green color display is realized in the pixel region 13.

In this embodiment, inversion driving is performed to invert the voltage polarity of the source bus line SL every frame. For this reason, as shown in FIG. 3, in the next frame, a data signal having the same applied voltage as that of the previous frame but having an inverted polarity is supplied to the source bus line.

As apparent from FIG. 3, in the present embodiment, when displaying a green image, the potential fluctuation occurs in the source bus line SL when the color of the data signal is switched and when the polarity is inverted. Only. That is, in the present embodiment, one frame period is divided into three subframes, and in the first subframe, the gate bus lines GL (R) are sequentially selected by the gate driver 12R, while the source bus lines SL are A data signal corresponding to the gradation to be displayed on the red pixel is supplied. In the subsequent second sub-frame, the gate driver 12G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 12B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL. Therefore, when displaying a single color image of any of the three colors RGB, during the one frame period, between the first subframe and the second subframe, the second subframe, and the second subframe. Only between the three subframes, the potential of the source bus line SL varies.

In contrast, in the conventional liquid crystal panel, RGB pixels connected to one source bus line are selected pixel by pixel in the order of R, G, B, R, G, and B, Supply data signals. Therefore, for example, when displaying an image of one green color on the conventional liquid crystal panel, the potential of the red pixel (low potential), the potential of the green pixel (high potential), the blue pixel with respect to the source bus line Is repeatedly supplied in the selection cycle of the gate bus line GL. Therefore, the source bus line potential frequently fluctuates. Therefore, according to the liquid crystal display device 1 of the present embodiment, since the frequency of potential fluctuations in the source bus line SL is significantly reduced as compared with the conventional liquid crystal panel, power consumption can be reduced.

Furthermore, in the present embodiment, if the gate driver 12 that drives the gate bus line GL corresponding to another color is stopped while the gate bus line GL corresponding to any color is selectively driven, Power consumption can be further reduced.

In the present embodiment, writing is performed only for red pixels in the first subframe, only for green pixels in the second subframe, and only for blue pixels in the third subframe. For this reason, it is necessary to convert the data signal in accordance with the writing order. FIG. 4 is an explanatory diagram showing data to be written from the source driver 11 to the source bus line SL. In the liquid crystal display device 1, the input data signal is divided into data for each color component, and conversion from parallel data to serial data is performed. Thereby, as shown in FIG. 4, only the data signal corresponding to one color can be continuously written in each subframe.

1 illustrates a configuration in which all of the gate drivers 12R, 12G, and 12B are arranged only on one side in the X direction outside the pixel region 13. However, the gate drivers 12R, 12G, and 12B may be distributed on both sides of the pixel region 13.

Alternatively, one set of gate drivers 12R, 12G, and 12B may be arranged on both sides of the pixel region 13. According to this configuration, the drive signal can be supplied from both sides of the gate bus line GL. Compared to the configuration in which the drive signal is supplied from one side of the gate bus line GL as shown in FIG. There is an advantage that signal rounding of the GL drive signal can be suppressed.

The gate driver 12 and the source driver 11 may be formed monolithically on a substrate on which pixels are formed (active matrix substrate), or as a form in which driver chips are mounted on the substrate (COG: ChipCon Glass). Also good. Or it is good also as a structure which mounted the driver chip on the flexible substrate. Alternatively, a driver chip may be mounted on another substrate and connected to the active matrix substrate via a flexible substrate.

In the configuration shown in FIG. 1, since the gate bus line GL (R) straddles the gate drivers 12G and 12B, the parasitic capacitance is larger than that of the gate bus line GL (G) and the gate bus line GL (B). Therefore, in order to balance the parasitic capacitance of the gate bus line GL, the gate bus line GL (G) and the gate bus line GL (B) are extended to the gate driver 12R side as shown in FIG. Similarly to the line GL (R), the gate driver 12R may be crossed.

In the present embodiment, the liquid crystal display device 1 is in the normally black mode. However, the liquid crystal display device can be implemented as a normally white mode liquid crystal display device. The same applies to other embodiments described later.

In this embodiment and each of the embodiments described later, there are no restrictions on the semiconductor material of the TFT used as a switching element of the pixel transistor and the gate driver and the formation process thereof, and any of amorphous silicon, polysilicon, oxide semiconductor, etc. It is also possible to use. However, it is most preferable to select a material and a process capable of forming a TFT small from the viewpoints of both yield and aperture ratio.

Since amorphous silicon has low mobility, it is necessary to increase the width of the switching element. Since polysilicon has a large off-leakage current, it is necessary to lengthen the channel portion of the TFT or to arrange a plurality of TFTs in series. On the other hand, an oxide semiconductor such as an In—Ga—Zn—O-based semiconductor has higher on-time mobility than amorphous silicon and off-state leakage current smaller than that of polysilicon, so that a TFT can be formed small. As described above, a TFT including an oxide semiconductor film is preferably used.

Note that the oxide semiconductor film may contain, for example, at least one metal element of In, Ga, and Zn. For example, as described above, the oxide semiconductor film includes an In—Ga—Zn—O-based semiconductor. Here, the In—Ga—Zn—O-based semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc), and a ratio (composition ratio) of In, Ga, and Zn. Is not particularly limited, and includes, for example, In: Ga: Zn = 2: 2: 1, In: Ga: Zn = 1: 1: 1, In: Ga: Zn = 1: 1: 2, and the like. Such an oxide semiconductor film can be formed using an oxide semiconductor film containing an In—Ga—Zn—O-based semiconductor. Note that a channel-etch TFT having an active layer containing an In—Ga—Zn—O-based semiconductor may be referred to as a “CE-InGaZnO-TFT”. The In—Ga—Zn—O-based semiconductor may be either amorphous or crystalline. As the crystalline In—Ga—Zn—O-based semiconductor, a crystalline In—Ga—Zn—O-based semiconductor in which the c-axis is oriented substantially perpendicular to the layer surface is preferable.

[Second Embodiment]
FIG. 6 is a circuit diagram showing a schematic configuration of the liquid crystal display device 2 according to the second embodiment. As shown in FIG. 6, the liquid crystal display device 2 is different from the first embodiment in that a gate driver 22 is disposed in the pixel region 13. In FIG. 6, the pixel transistor T, the pixel electrode P, and the source bus line SL are not shown, but these configurations are the same as those in FIG.

In this embodiment, the switching elements constituting the gate driver 22 are distributed in the pixel region 13. A wiring 24 for supplying a clock signal and a power signal to the gate driver 22 is also disposed in the pixel region 13. In the example of FIG. 6, both a circuit that supplies various signals to the wiring 24 and a circuit (source driver) that supplies a data signal to the source bus line SL are built in the driver 14. However, the present invention is not limited to this configuration, and a circuit for supplying various signals to the wiring 24 may be provided separately from the source driver.

In the present embodiment, the gate driver 22 is preferably formed on the active matrix substrate simultaneously with the pixel transistor T and the like by a semiconductor process for forming the pixel transistor T and the like. The driver 14 can also be formed simultaneously with the pixel transistor T and the gate driver 22.

In the example of FIG. 6, one gate driver 22 is provided for one gate bus line GL. That is, the gate driver 22R1 is provided for the gate bus line GL (R1). In other words, the switching element that constitutes the gate driver 22R1 that drives the gate bus line GL (R1) is disposed in the pixel region 13 between the gate bus line GL (R1) and the end of the pixel region 13. . In addition, the switching element constituting the gate driver 22R2 that drives the gate bus line GL (R2) is disposed between the gate bus line GL (R2) and the gate bus line GL (R1) in the pixel region 13. .

Also in this embodiment, the gate bus line GL is driven as shown in FIG. 3 in the first embodiment. That is, one frame period is divided into three subframes. In the first subframe, the gate driver 22R sequentially selects the gate bus lines GL (R) and displays the red pixels on the source bus lines SL. A data signal corresponding to the gradation to be supplied is supplied. In the subsequent second subframe, the gate driver 22G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 22B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL. Therefore, also in the present embodiment, in the same manner as in the first embodiment, when displaying a single color image of any of the three colors RGB, the first subframe and the second are displayed in one frame period. The potential of the source bus line SL fluctuates only between the second subframe and between the second subframe and the third subframe.

This reduces the frequency of potential fluctuations in the source bus line SL, thereby reducing power consumption. Further, since the gate driver 22 is arranged in the pixel region 13, there are advantages that the area of the frame region is reduced and the degree of freedom in designing the external shape of the liquid crystal display device 2 is increased.

FIG. 6 shows a configuration example in which one gate bus line GL is driven by one gate driver 22, but one gate bus line GL may be driven by a plurality of gate drivers 22. For example, two or more gate drivers 22R1 are provided for the gate bus line GL (R1), and the same drive signal (see FIG. 2) is applied to the gate bus line Gl (R1) from the plurality of gate drivers 22R1. . That is, particularly when the panel size is large, the display quality deterioration due to signal rounding on the gate bus line GL can be suppressed by providing the gate driver 22 at a plurality of locations on the gate bus line GL and supplying the same drive signal. There is an effect.

FIG. 6 illustrates a configuration in which all the gate drivers 22 are arranged in the pixel region 13. However, a configuration in which some gate drivers are arranged outside the pixel region 13 may be used.

In the present embodiment, it is preferable that the switching element constituting the gate driver 22 and formed in the pixel region 13 is formed of a TFT including an oxide semiconductor film. In this case, the size of the TFT can be reduced, and a decrease in the aperture ratio due to the formation of the switching element in the pixel region 13 can be suppressed. In this case, not only the switching element of the gate driver 22 but also the pixel transistor T is preferably formed of a TFT including an oxide semiconductor film.

[Third Embodiment]
The liquid crystal display device 3 according to the third embodiment differs from the first embodiment in the connection relationship between the pixel transistor T of each pixel and the source bus line SL. The configurations of the gate bus line GL and the gate drivers 12R, 12G, and 12B are the same as those in the first embodiment.

FIG. 7 is a circuit diagram showing a schematic configuration of a part of the pixel region in the liquid crystal display device 3 according to the third embodiment. As shown in FIG. 7, in the liquid crystal display device 3, the source bus line SL to which the pixel electrode P and the pixel transistor T are connected is different for each pixel in the Y direction.

As shown in FIG. 7, when attention is paid to one source bus line SL, the pixel transistors T are alternately arranged on the left and right with respect to the source bus line SL. In comparison with this, in the first and second embodiments, the pixel transistors T are all arranged on the right side with respect to one source bus line SL.

The liquid crystal display device 3 performs source line inversion driving. That is, the polarity of the data signal applied to the source bus line SL is different for each adjacent source bus line, and the polarity is inverted every frame. FIG. 8 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in a certain frame in the configuration shown in FIG. In the figure, a positive data signal is applied to the pixel electrode P with a + symbol, and a negative data signal is applied to the pixel electrode P with a − symbol. FIG. 9 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in the frame next to the frame shown in FIG.

As shown in FIGS. 8 and 9, in the liquid crystal display device 3, by performing source line inversion driving, a pixel electrode P to which a positive data signal is applied and a pixel to which a negative data signal is applied. The electrodes P are alternately arranged vertically and horizontally. That is, the pixel transistors T are alternately arranged on the left and right sides with respect to the source bus line SL, and the source line inversion drive is performed, so that the polarity arrangement of the pixel electrode P is the same as that in the dot inversion drive.

As a result, it is possible to provide a good display quality in which flicker and crosstalk are hardly visible. Also in the present embodiment, as in the first embodiment, one frame period is divided into three subframes, and in the first subframe, the gate bus lines GL (R) are sequentially connected by the gate driver 12R. While selecting, a data signal corresponding to the gradation to be displayed on the red pixel is supplied to the source bus line SL. In the subsequent second sub-frame, the gate driver 12G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 12B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL. Therefore, when displaying a single color image of any of the three colors RGB, during the one frame period, between the first subframe and the second subframe, the second subframe, and the second subframe. Only between the three subframes, the potential of the source bus line SL varies. Therefore, similarly to the first embodiment, there is an effect that power consumption can be suppressed.

In the above description, the example in which the arrangement of the pixel electrode P with respect to the source bus line SL is different in the first embodiment has been described. However, in the second embodiment, the arrangement of the pixel electrode P with respect to the source bus line SL is changed. Even if they are different, the same effect can be obtained.

[Fourth Embodiment]
The liquid crystal display device 4 according to the fourth embodiment differs from the first embodiment in the connection relationship between the pixel transistor T of each pixel and the source bus line SL. The configurations of the gate bus line GL and the gate drivers 12R, 12G, and 12B are the same as those in the first embodiment.

FIG. 10 is a circuit diagram showing a schematic configuration of part of the pixel region in the liquid crystal display device 4 according to the fourth embodiment. As shown in FIG. 10, in the liquid crystal display device 4, the source bus line SL to which the pixel electrode P and the pixel transistor T are connected is different for each of the three RGB pixels in the Y direction. That is, when paying attention to one source bus line SL, the pixel electrodes P are alternately arranged on the left and right with respect to the source bus line SL for every three pixels of RGB. In comparison with this, in the first and second embodiments, the pixel transistors T are all arranged on the right side with respect to one source bus line SL.

The liquid crystal display device 4 performs source line inversion driving. That is, the polarity of the data signal applied to the source bus line SL is different for each adjacent source bus line, and the polarity is inverted every frame. FIG. 11 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in a certain frame in the configuration shown in FIG. In the figure, a positive data signal is applied to the pixel electrode P with a + symbol, and a negative data signal is applied to the pixel electrode P with a − symbol. FIG. 12 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in the frame next to the frame shown in FIG.

As shown in FIGS. 11 and 12, in the liquid crystal display device 4, by performing source line inversion driving, three pixels of RGB to which a positive data signal is applied and a negative data signal are applied. Three pixels of RGB are alternately arranged vertically and horizontally. In other words, the pixel transistors T are alternately arranged on the right and left sides of the three RGB pixels with respect to the source bus line SL, and by performing source line inversion driving, the same polarity as in the case of performing dot inversion driving in units of RGB three pixels. Arrangement.

As a result, it is possible to provide a good display quality in which flicker and crosstalk are hardly visible. Also in the present embodiment, as in the first embodiment, one frame period is divided into three subframes, and in the first subframe, the gate bus lines GL (R) are sequentially connected by the gate driver 12R. While selecting, a data signal corresponding to the gradation to be displayed on the red pixel is supplied to the source bus line SL. In the subsequent second sub-frame, the gate driver 12G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 12B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL. Therefore, when displaying a single color image of any of the three colors RGB, during the one frame period, between the first subframe and the second subframe, the second subframe, and the second subframe. Only between the three subframes, the potential of the source bus line SL varies. Therefore, similarly to the first embodiment, there is an effect that power consumption can be suppressed.

In the above description, the example in which the arrangement of the pixel electrode P with respect to the source bus line SL is different in the first embodiment has been described. However, in the second embodiment, the arrangement of the pixel electrode P with respect to the source bus line SL is changed. Even if they are different, the same effect can be obtained. Furthermore, as shown in FIG. 13, in the present embodiment, there is a region 41 in which the pixel transistor T is not disposed across three RGB pixels along one source bus line SL. This region 41 can be used as a region for arranging the components of the gate driver 22 described in the second embodiment. That is, there is an advantage that the degree of freedom of arrangement of the components of the gate driver 22 is increased.

[Fifth Embodiment]
The liquid crystal display device 5 according to the fifth embodiment differs from the first embodiment in the connection relationship between the pixel transistor T of each pixel and the source bus line SL. The configurations of the gate bus line GL and the gate drivers 12R, 12G, and 12B are the same as those in the first embodiment.

FIG. 14 is a circuit diagram showing a schematic configuration of a part of a pixel region in the liquid crystal display device 5 according to the fifth embodiment. As shown in FIG. 14, in the liquid crystal display device 5, the source bus line SL to which the pixel electrode P and the pixel transistor T are connected differs every two pixels in the Y direction. That is, when paying attention to one source bus line SL, the pixel electrodes P are alternately arranged on the left and right sides of the source bus line SL every two pixels. In comparison with this, in the first and second embodiments, the pixel transistors T are all arranged on the right side with respect to one source bus line SL.

The liquid crystal display device 5 performs source line inversion driving. That is, the polarity of the data signal applied to the source bus line SL is different for each adjacent source bus line, and the polarity is inverted every frame. FIG. 15 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in a certain frame in the configuration shown in FIG. In the figure, a positive data signal is applied to the pixel electrode P with a + symbol, and a negative data signal is applied to the pixel electrode P with a − symbol. FIG. 16 shows the polarity of the data signal applied to the pixel electrode P from each source bus line SL in the frame next to the frame shown in FIG.

As shown in FIGS. 15 and 16, in the liquid crystal display device 5, by performing source line inversion driving, two pixels to which a positive data signal is applied and two pixels to which a negative data signal is applied. Are alternately arranged vertically and horizontally. In other words, the pixel transistors T are alternately arranged on the left and right of every two pixels with respect to the source bus line SL, and by performing source line inversion driving, the same polarity arrangement as in the case of performing dot inversion driving in units of two pixels is obtained.

As a result, it is possible to provide a good display quality in which flicker and crosstalk are hardly visible. In addition, according to this configuration, it is possible to eliminate the drawback of dot inversion driving, in which flicker is easily seen when displaying a checkered pattern.

Also in the present embodiment, as in the first embodiment, one frame period is divided into three subframes, and in the first subframe, the gate bus lines GL (R) are sequentially connected by the gate driver 12R. While selecting, a data signal corresponding to the gradation to be displayed on the red pixel is supplied to the source bus line SL. In the subsequent second sub-frame, the gate driver 12G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 12B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL. Therefore, when displaying a single color image of any of the three colors RGB, during the one frame period, between the first subframe and the second subframe, the second subframe, and the second subframe. Only between the three subframes, the potential of the source bus line SL varies. Therefore, similarly to the first embodiment, there is an effect that power consumption can be suppressed.

In the above description, the example in which the arrangement of the pixel electrode P with respect to the source bus line SL is different in the first embodiment has been described. However, in the second embodiment, the arrangement of the pixel electrode P with respect to the source bus line SL is changed. Even if they are different, the same effect can be obtained. Furthermore, as described with reference to FIG. 13 in the fourth embodiment, in this embodiment, the pixel transistors T are arranged across two pixels along one source bus line SL. There are no areas. This region can be used as a region for arranging the components of the gate driver 22 described in the second embodiment. That is, there is an advantage that the degree of freedom of arrangement of the components of the gate driver 22 is increased.

[Sixth Embodiment]
The sixth embodiment is configured to perform dot inversion driving in the liquid crystal display device 1 according to the first embodiment.

Also in the present embodiment, as in the first embodiment, one frame period is divided into three subframes. In the first subframe, gate bus lines GL (R) are sequentially selected by the gate driver 12R. However, a data signal corresponding to the gradation to be displayed on the red pixel is supplied to the source bus line SL. In the subsequent second sub-frame, the gate driver 12G sequentially selects the gate bus line GL (G), and supplies a data signal corresponding to the gradation to be displayed on the green pixel to the source bus line SL. In the third sub-frame, the gate driver 12B sequentially selects the gate bus line GL (B), and supplies a data signal corresponding to the gradation to be displayed on the blue pixel to the source bus line SL.

Then, in the first sub-frame, the source driver 11 sends the data signal to the source bus line SL so that the data signals have opposite polarities in the pixel electrodes P adjacent in the vertical and horizontal directions among the red pixel electrodes P. Supply. In the second sub-frame, the data signal is supplied to the source bus line SL so that the data signals of the green pixel electrodes P adjacent to each other vertically and horizontally are opposite in polarity. In the third sub-frame, the data signal is supplied to the source bus line SL so that the data signals have opposite polarities in the pixel electrodes P adjacent in the vertical and horizontal directions among the blue pixel electrodes P.

FIG. 17 is a timing chart showing an example of a data signal supplied to the source bus line SL. Note that the example shown in FIG. 17 is a data signal in the case where the liquid crystal display device 1 is configured as a normally black mode display device and displays an image of one green color in the pixel region 13.

As shown in FIG. 17, in the present embodiment, the source driver 11 sends the source bus while the selection pulse is sequentially supplied from the gate driver 12R to the gate bus line GL (R) (the first subframe). A low potential data signal corresponding to the gradation (zero gradation) displayed on the red pixel is supplied to the line SL while inverting the polarity for each pixel. Next, while the selection pulse is sequentially supplied from the gate driver 12G to the gate bus line GL (G) (the second subframe), the green pixel is displayed from the source driver 11 to the source bus line SL. A high-potential data signal corresponding to the gradation (256 gradations) is supplied while inverting the polarity for each pixel. After that, while the selection pulse is sequentially supplied from the gate driver 12B to the gate bus line GL (B) (the third subframe), a blue pixel is displayed from the source driver 11 to the source bus line SL. A low potential data signal corresponding to the gradation (zero gradation) is supplied for each pixel while inverting the polarity.

As shown in FIG. 17, according to the present embodiment, although the voltage fluctuation between the positive polarity and the negative polarity is observed, the sub-frame (the first sub-frame and the second sub-frame) in which the zero gradation is written. In the frame), the potential fluctuation of the source driver SL is not so large.

In contrast, in the conventional liquid crystal panel, RGB pixels connected to one source bus line are selected pixel by pixel in the order of R, G, B, R, G, and B, Supply data signals. Therefore, for example, when displaying an image of one green color on the conventional liquid crystal panel, the potential of the red pixel (low potential), the potential of the green pixel (high potential), the blue pixel with respect to the source bus line Is repeated in the selection cycle of the gate bus line GL and is supplied in a state where the polarity is inverted for each pixel by dot inversion driving. For this reason, the potential of the source bus line frequently fluctuates. Therefore, according to the liquid crystal display device of the present embodiment, the frequency of the potential fluctuation of the source bus line SL is greatly reduced as compared with the conventional liquid crystal panel, so that the power consumption can be reduced.

The display device according to the embodiment of the present invention has been described above. However, the display device according to the present invention is not limited to the configuration of the above-described embodiment, and can be variously modified. For example, in each of the above embodiments, a liquid crystal display device including pixels of three colors of RGB is illustrated, but the color of the pixels is not limited to three colors of RGB. For example, a configuration including four or more pixels in which Y (yellow), W (white), or the like in addition to RGB is added may be used.

DESCRIPTION OF SYMBOLS 1 ... Liquid crystal display device, 11 ... Source driver, 12 ... Gate driver, 14 ... Driver, 22 ... Gate driver, SL ... Source bus line, GL ... Gate bus line, 13 ... Pixel region, T ... Pixel transistor, P ... Pixel electrode

Claims (11)

A plurality of gate bus lines, a plurality of source bus lines, a pixel transistor connected to the gate bus line and the source bus line, a pixel electrode connected to the pixel transistor, and a pixel electrode provided corresponding to the pixel electrode A liquid crystal display device provided with a color filter,
A plurality of gate drivers for driving the gate bus lines;
A source driver for driving the source bus line,
Pixel electrodes corresponding to a plurality of color filters are connected to one source bus line,
A single color pixel electrode is connected to each of the gate bus lines,
The plurality of gate drivers are provided in the same number or more as the number of colors of the color filter,
Each of the plurality of gate drivers is connected only to a gate bus line to which a single color pixel electrode is connected,
In one frame, the plurality of gate drivers sequentially drive the gate bus lines for each color. The liquid crystal display device according to claim 1, wherein the plurality of gate drivers are disposed outside a pixel region in which the pixel electrodes are disposed. The liquid crystal display device according to claim 1, wherein switching elements constituting at least a part of the plurality of gate drivers are arranged in a pixel region in which the pixel electrodes are arranged. The liquid crystal display device according to any one of claims 1 to 3, wherein the switching element includes a semiconductor film formed of an oxide semiconductor. The liquid crystal display device according to any one of claims 1 to 4, wherein the pixel electrodes of the plurality of colors include three colors of red, green, and blue. The liquid crystal display device according to any one of claims 1 to 4, wherein the plurality of pixel electrodes include four or more colors. The liquid crystal display device according to any one of claims 1 to 6, wherein the pixel transistor and the pixel electrode are arranged on only one of the left and right sides of the source bus line with respect to one source bus line. The liquid crystal display device according to any one of claims 1 to 6, wherein the pixel transistor and the pixel electrode are arranged at a predetermined cycle on the left and right of the source bus line with respect to one source bus line. The liquid crystal display device according to any one of claims 1 to 8, wherein the liquid crystal display device is in a normally black mode. The liquid crystal display device according to any one of claims 1 to 8, wherein the liquid crystal display device is in a normally white mode. 11. The gate driver for driving a gate bus line connected to a pixel electrode of one color among the plurality of gate drivers is in operation, while the other gate driver is suspended. The liquid crystal display device according to item.

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