WO2016093109A1 - プリント配線板の製造方法 - Google Patents
プリント配線板の製造方法 Download PDFInfo
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- WO2016093109A1 WO2016093109A1 PCT/JP2015/083727 JP2015083727W WO2016093109A1 WO 2016093109 A1 WO2016093109 A1 WO 2016093109A1 JP 2015083727 W JP2015083727 W JP 2015083727W WO 2016093109 A1 WO2016093109 A1 WO 2016093109A1
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- Prior art keywords
- copper foil
- layer
- wiring
- pattern
- wiring board
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
- G01N2021/95638—Inspecting patterns on the surface of objects for PCB's
Definitions
- the present invention relates to a method for manufacturing a printed wiring board.
- multilayered printed wiring boards have been widely used.
- Such a multilayer printed wiring board is used for the purpose of weight reduction and size reduction in many portable electronic devices.
- the multilayer printed wiring board is required to further reduce the thickness of the interlayer insulating layer and further reduce the weight of the wiring board.
- FIGS. 1 and 2 An example of a method for producing a printed wiring board by a coreless buildup method using a copper foil with a carrier is shown in FIGS.
- a copper foil 10 with a carrier provided with a carrier layer 12, a release layer 14, and a copper foil 16 in this order is laminated on a coreless support 18 such as a prepreg.
- a photoresist pattern 20 is formed on the copper foil 16, and a wiring pattern 24 is formed through pattern plating (electrocopper plating) 22 and peeling of the photoresist pattern 20. Then, a pre-stacking process such as a roughening process is performed on the pattern plating to form the first wiring layer 26.
- the insulating layer 28 and the carrier-attached copper foil 30 are laminated to form the buildup layer 42.
- the copper foil 36 and the insulating layer 28 immediately below it are laser processed by a carbon dioxide laser or the like.
- patterning is performed by photoresist processing, electroless copper plating, electrolytic copper plating, photoresist stripping, flash etching, or the like to form the second wiring layer 38, and this patterning is repeated as necessary to repeat the nth wiring layer. Up to 40 (n is an integer of 2 or more). Then, the coreless support 18 is peeled off together with the carrier layer 12, and the copper foils 16 and 36 exposed between the wiring patterns are removed by flash etching to obtain a predetermined wiring pattern.
- an appearance image inspection for confirming the accuracy of the position and shape of the wiring pattern is generally performed on the printed wiring board on which the wiring pattern is formed.
- an optical automatic appearance inspection (AOI) apparatus is used to irradiate predetermined light from a light source to obtain a binarized image of a wiring pattern, and a pattern of the binarized image and the design data image This is done by trying to match and evaluating match / mismatch between the two.
- the appearance image inspection is performed by removing the copper foils 16 and 36 exposed between the wiring patterns on the surface of the insulating layer 28 by flash etching, and then the insulating layer 28 is between the wiring patterns. This is done on the exposed surface.
- Patent Document 1 Japanese Patent Application Laid-Open No. 2014-116533 discloses a method for manufacturing a coreless wiring board using a peelable metal foil. This is performed after the reinforcing substrate is peeled off, the copper foil adhering to the wiring laminated portion is removed, and the dielectric layer (insulating resin layer) is exposed (final process).
- the method of inspecting the appearance of the wiring pattern portion of the first wiring layer 26 formed on the surface of the insulating layer 28 after the manufacturing of the printed wiring board (or after the manufacturing process) is temporarily Even if there is a chip having a defective portion in the wiring pattern of the first wiring layer 26 immediately after forming the first wiring layer 26 on the surface of the copper foil 16 of the coreless support, which is a process, at this stage, a defective product is identified. It will not be possible. For this reason, even if the chip non-defective rate of the first wiring layer 26 is remarkably poor and it is economically disadvantageous to proceed to the subsequent process, the process proceeds to the build-up stacking process without grasping the phenomenon.
- the above method requires the appearance inspection process of the buildup layer to be performed over the entire chip regardless of the presence or absence of a defective portion in the wiring pattern of the first wiring layer 26. Had. For this reason, if it is possible to recognize a chip in which a wiring pattern defect has occurred by performing an appearance image inspection of the wiring pattern immediately after forming the wiring pattern of the first wiring layer 26 on the surface of the copper foil 16 of the coreless support, This is advantageous because the inspection process can be simplified by skipping the inspection process after the subsequent build-up lamination process.
- the appearance image inspection after the production of the printed wiring board is performed by using the color tone contrast between the insulating layer (resin layer) and the wiring layer (copper layer), that is, the color tone contrast caused by different materials. Therefore, there is an advantage that inspection accuracy is high.
- a wiring pattern must be detected between the same kind of materials such as a copper foil and a wiring layer (copper layer). There is a problem that the inspection accuracy is greatly reduced due to the lack of color tone contrast.
- the present inventors have recently used a copper foil having a treated surface with an 8 ° diffuse reflectance SCI of 41% or less with respect to incident light, so that build-up can be performed after the photoresist is stripped.
- Acquired knowledge that appearance image inspection for wiring patterns formed on copper foil can be performed with high precision while obtaining high-definition binarized images with high contrast at an early stage before the formation of the wiring layer. .
- productivity of a printed wiring board can be improved significantly was obtained because the rejected product in the appearance image inspection can be excluded at an early stage as described above.
- the object of the present invention is to provide a high appearance image inspection for the wiring pattern formed on the copper foil at an early stage after the photoresist peeling and before the build-up wiring layer is formed in the production of the printed wiring board.
- An object of the present invention is to provide a method for manufacturing a printed wiring board that can be performed with high accuracy while obtaining a high-definition binarized image based on color tone contrast, and that can significantly improve the productivity of the printed wiring board.
- a printed wiring board manufacturing method Preparing a copper foil having a treated surface with an 8 ° diffuse reflectance SCI for incident light of 41% or less; Forming a photoresist pattern on the treated surface of the copper foil; Applying electrolytic copper plating to the copper foil on which the photoresist pattern is formed; Peeling the photoresist pattern to form a wiring pattern; A step of performing an appearance image inspection of the wiring pattern for the copper foil on which the wiring pattern is formed, A method is provided comprising:
- FIG. 1 It is a figure which shows the process of the first half in an example of the manufacturing method of the printed wiring board using the coreless buildup method.
- the present invention relates to a method for manufacturing a printed wiring board.
- the printed wiring board according to the present invention is prepared by preparing a copper foil having a predetermined treated surface on one side, forming a photoresist pattern, forming an electrolytic copper plating, and forming a photoresist pattern on the treated surface. Peeling is performed to form a wiring pattern, and an appearance image inspection of the wiring pattern is performed on the copper foil on which the wiring pattern is formed. And as a copper foil used for this series of processes, the copper foil provided with the process surface whose 8 degree diffuse reflectance SCI with respect to incident light is 41% or less is used.
- the appearance image inspection for the wiring pattern formed on the copper foil is performed while obtaining a high-definition binary image with high contrast. It can be performed with high accuracy.
- 8 degree diffuse reflectance SCI is employ
- 8 ° which has a high visual sensitivity of diffuse reflection with respect to the glossy copper surface, has proved effective for appearance image inspection on the glossy copper surface as a wiring pattern.
- the surface of the copper foil is in contrast to the first wiring layer constituting the wiring pattern, the red semiconductor There is a demand for low reflection of light.
- a copper foil having an 8 ° diffuse reflectance SCI with respect to incident light having a wavelength of 635 nm of 41% or less is very advantageous. This will be described below with reference to an example of an appearance image inspection. In the appearance image inspection, for example, conceptually shown in FIG.
- the substrate on which the wiring pattern 24 is formed is irradiated with red semiconductor light (for example, light having a peak region at a wavelength of 635 nm) from the ring-shaped light source 50,
- red semiconductor light for example, light having a peak region at a wavelength of 635 nm
- the reflected light from one wiring layer 26 and the reflected light from the copper foil 16 are received by the light receiving unit 52, and the obtained luminance data is compared with a preset threshold value so that a gap (space) and a wiring unit (line) are obtained.
- a binarized image as shown in FIG. 4 is formed, and the position of the wiring pattern 24 and the pattern pattern based on the binarized image and an image derived from design data as shown in FIG. This is done by evaluating the accuracy of the shape.
- the threshold used at this time is, in the initial setting, the entire surface of the substrate surface on which the wiring pattern 24 is formed (the surface on which the first wiring layer 26 is directly formed on the copper foil 16) or a specific sampling inspection site.
- the brightness data obtained by scanning in advance and integrating the obtained brightness data to create a brightness histogram as shown in FIG. 6 (the horizontal axis is the brightness (for example, 256 hierarchical axes) and the vertical axis is the integrated amount) are created. between parts) peak P S and the line (wiring part from) from the peak P L, between the respective peaks terminus of (between the start point of the peak corresponding to the wiring portion as the end of the peak corresponding to the gap portion) It can be determined as the median. Therefore, as shown in FIG.
- the 8 ° diffuse reflectance SCI is 41 on the treated surface of the copper foil 16 for incident light, preferably incident light having a wavelength within the peak region of the light source wavelength used for appearance image inspection (preferably incident light having a wavelength of 635 nm).
- the ratio is less than or equal to%, the peak-to-peak distance D in the luminance histogram described above significantly increases. As a result, the appearance image inspection can be performed with high accuracy while obtaining a high-definition binary image with high contrast.
- the appearance image inspection for the wiring pattern formed on the copper foil can be performed at a high level with high contrast at an early stage after the photoresist is peeled off and before the build-up wiring layer is formed. This can be performed with high accuracy while obtaining a fine binary image.
- an appearance image inspection is generally performed on a printed wiring board on which a wiring pattern is formed.
- an appearance image is obtained after the printed wiring board is manufactured (or after the manufacturing process).
- the appearance image inspection can be performed at an earlier stage.
- the appearance image inspection after the production of the printed wiring board can perform a clear appearance image inspection using the contrast between the insulating layer (resin layer) and the wiring layer (copper layer), that is, the contrast caused by different materials. Therefore, there is an advantage that inspection accuracy is high.
- the wiring pattern must be detected between the same type of material such as copper foil and wiring layer (copper layer), and the contrast between the two materials is insufficient.
- FIGS. 1 and 2 is drawn so that the build-up wiring layer 42 is formed by providing the copper foil 10 with a carrier on one side of the coreless support 18 for simplicity of explanation. It is desirable to provide the copper foil 10 with a carrier on both surfaces of the support 18 and form the build-up wiring layer 42 on both surfaces.
- the copper foil 16 has the surface whose 8 degree diffuse reflectance SCI with respect to incident light is 41% or less as mentioned above.
- a treatment surface is provided on one side of the copper foil 16 (in the case of the copper foil 10 with a carrier as shown in FIG. 1), the side opposite to the release layer 14 (that is, the outermost surface of the copper foil 10 with a carrier). Is typical, but may be provided on both sides.
- the incident light used for the evaluation of the 8 ° diffuse reflectance SCI preferably has a wavelength within the peak region of the light source wavelength used for the appearance image inspection. As described above, the appearance image inspection is preferably performed using a light source having a peak region at a wavelength of 635 nm.
- the wavelength of incident light used for the evaluation of the 8 ° diffuse reflectance SCI is 635 nm.
- the 8 ° diffuse reflectance SCI for incident light (for example, incident light having a wavelength of 635 nm) is 41% or less, preferably 20% or less, more preferably 15% or less.
- the 8 ° diffuse reflectance SCI with respect to incident light can be measured according to JISZ8722 (2012) using a commercially available spectral colorimeter (for example, SD7000, manufactured by Nippon Denshoku Industries Co., Ltd.).
- Such a treated surface having a low 8 ° diffuse reflectance SCI is preferably a surface with little diffuse reflection component of incident light (for example, incident light having a wavelength of 635 nm).
- a treatment surface having a low 8 ° diffuse reflectance SCI can be preferably realized by having a surface with few flat component regions that diffusely reflect incident light (for example, incident light having a wavelength of 635 nm).
- the surface of the copper foil is preferably copper or an alloy of copper and at least one selected from zinc, tin, cobalt, nickel, chromium and molybdenum, More preferably, it is a copper surface having a rough surface from the viewpoint of keeping the diffuse reflectance low.
- the copper foil 16 may be a known configuration employed for the copper foil with a carrier except that it has the 8 ° diffuse reflectance SCI, and is not particularly limited.
- the copper foil 16 may be formed by a wet film formation method such as an electroless plating method and an electrolytic plating method, a dry film formation method such as sputtering and chemical vapor deposition, or a combination thereof. In order to obtain a granular surface, it is preferably formed by electrolytic plating.
- the thickness of the copper foil 16 is preferably 0.05 ⁇ m to 7 ⁇ m, more preferably 0.075 ⁇ m to 5 ⁇ m, still more preferably 0.09 ⁇ m to 4 ⁇ m.
- the copper foil 16 has a grainy rough surface (that is, a rough surface composed of unevenness composed of a plurality of particles).
- the 8 ° diffuse reflectance SCI for incident light preferably incident light having a wavelength of 635 nm
- the roughened particles preferably have an average particle size D of 0.04 to 0.53 ⁇ m by image analysis, more preferably 0.08 to 0.13 ⁇ m, still more preferably 0.09 to 0.12 ⁇ m. .
- the roughened surface has an appropriate roughness and ensures excellent adhesion to the photoresist, while achieving good opening of the unnecessary areas of the photoresist during photoresist development.
- it is possible to effectively prevent line deficiency of the pattern plating 22 that may be caused by difficulty in plating due to the photoresist that cannot be fully opened. Therefore, it can be said that it is excellent in photoresist developability and pattern plating property within the above-mentioned preferable range, and is therefore suitable for fine formation of the wiring pattern 24.
- the average particle diameter D by image analysis of the roughened particles is obtained by taking an image at a magnification such that a predetermined number (for example, 1000 to 3000) of particles enters one field of view of a scanning electron microscope (SEM). Measurement is preferably performed by performing image processing with commercially available image analysis software. For example, 200 particles arbitrarily selected may be used as an object, and the average diameter of these particles may be adopted as the average particle diameter D.
- SEM scanning electron microscope
- the roughened particles preferably have a particle density ⁇ by image analysis of 4 to 200 particles / ⁇ m 2 , more preferably 40 to 170 particles / ⁇ m 2 , 70 to 100 particles / ⁇ m 2 . ⁇ m 2 .
- a photoresist development residue is likely to be generated, but if it is within the preferred range, such a development residue is difficult to occur, and therefore The developability of the photoresist pattern 20 is also excellent. Therefore, it can be said that it is suitable for fine formation of the wiring pattern 24 within the above-mentioned preferable range.
- the particle density ⁇ based on the image analysis of the roughened particles is obtained by taking an image at a magnification such that a predetermined number (for example, 1000 to 3000) of particles enters one field of view of a scanning electron microscope (SEM). It is preferable to perform measurement by performing image processing using commercially available image analysis software. For example, in a field where 200 particles enter, the value obtained by dividing the number of particles (for example, 200) by the field area is used as the particle density ⁇ . do it.
- SEM scanning electron microscope
- Specular glossiness Gs (85 °) is another index for defining roughened surface properties suitable for fine formation of the wiring pattern 24 as described above.
- the specular gloss Gs (85 °) of the treated surface is preferably 20 to 100, more preferably 30 to 90, and further preferably 40 to 80.
- the specular gloss Gs (85 °) by image analysis of the roughened particles can be measured using a commercially available gloss meter in accordance with JIS Z 8741-1997 (specular gloss-measurement method).
- the surface of the copper foil can be subjected to rust prevention treatment such as nickel-zinc / chromate treatment, coupling treatment with a silane coupling agent, etc. after the above-mentioned roughened particles are formed.
- rust prevention treatment such as nickel-zinc / chromate treatment, coupling treatment with a silane coupling agent, etc.
- the copper foil 16 is preferably provided in the form of a copper foil 10 with a carrier.
- the copper foil with carrier 10 includes the carrier layer 12, the release layer 14, and the copper foil 16 in this order.
- the copper foil 16 can be in the form of an ultra-thin copper foil.
- the carrier layer 12 is a layer (typically a foil) for supporting the copper foil 16 and improving its handleability.
- the carrier layer include an aluminum foil, a copper foil, a stainless steel (SUS) foil, a resin film, a resin film whose surface is metal-coated, and the like, preferably a copper foil.
- the copper foil may be a rolled copper foil or an electrolytic copper foil.
- the thickness of the carrier layer is typically 250 ⁇ m or less, preferably 12 ⁇ m to 200 ⁇ m.
- the release layer 14 has a function of weakening the peeling strength of the carrier foil, ensuring stability of the strength, and further suppressing interdiffusion that may occur between the carrier foil and the copper foil during press molding at a high temperature.
- the release layer is generally formed on one side of the carrier foil, but may be formed on both sides.
- the release layer may be either an organic release layer or an inorganic release layer. Examples of organic components used in the organic release layer include nitrogen-containing organic compounds, sulfur-containing organic compounds, carboxylic acids and the like. Examples of nitrogen-containing organic compounds include triazole compounds, imidazole compounds, and the like. Among these, triazole compounds are preferred in terms of easy release stability.
- triazole compounds examples include 1,2,3-benzotriazole, carboxybenzotriazole, N ′, N′-bis (benzotriazolylmethyl) urea, 1H-1,2,4-triazole and 3-amino- And 1H-1,2,4-triazole.
- sulfur-containing organic compound examples include mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol and the like.
- carboxylic acid examples include monocarboxylic acid and dicarboxylic acid.
- examples of inorganic components used in the inorganic release layer include Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn, and a chromate-treated film.
- the release layer may be formed by bringing a release layer component-containing solution into contact with at least one surface of the carrier foil and adsorbing the release layer component on the surface of the carrier foil in the solution.
- this contact may be performed by immersion in the release layer component-containing solution, spraying of the release layer component-containing solution, flowing down of the release layer component-containing solution, or the like.
- a method of forming a release layer component by a vapor phase method such as vapor deposition or sputtering.
- the release layer component may be fixed to the surface of the carrier foil by drying the release layer component-containing solution, electrodeposition of the release layer component in the release layer component-containing solution, or the like.
- the thickness of the release layer is typically 1 nm to 1 ⁇ m, preferably 5 nm to 500 nm.
- the peel strength between the release layer 14 and the carrier foil is preferably 7 gf / cm to 50 gf / cm, more preferably 10 gf / cm to 40 gf / cm, and more preferably 15 gf / cm to 30 gf / cm.
- another functional layer may be provided between the release layer 14 and the carrier layer 12 and / or the copper foil 16.
- An example of such another functional layer is an auxiliary metal layer.
- the auxiliary metal layer is preferably made of nickel and / or cobalt. By forming such an auxiliary metal layer on the surface side of the carrier layer 12 and / or the surface side of the copper foil 16, it can occur between the carrier layer 12 and the copper foil 16 during hot press molding at a high temperature or for a long time. Interdiffusion can be suppressed and the stability of the peeling strength of the carrier layer can be ensured.
- the thickness of the auxiliary metal layer is preferably 0.001 to 3 ⁇ m.
- step (b) Formation of Laminate
- the copper foil 16 or the copper foil with carrier 10 is laminated on one or both sides of the coreless support 18 to form a laminate. May be.
- This lamination may be performed in accordance with known conditions and techniques adopted for lamination of copper foil and prepreg in a normal printed wiring board manufacturing process.
- the coreless support 18 typically comprises a resin, preferably an insulating resin.
- the coreless support 18 is preferably a prepreg and / or a resin sheet, more preferably a prepreg.
- the prepreg is a general term for composite materials in which a synthetic resin is impregnated or laminated on a base material such as a synthetic resin plate, a glass plate, a glass woven fabric, a glass nonwoven fabric, and paper.
- a synthetic resin plate such as a synthetic resin plate, a glass plate, a glass woven fabric, a glass nonwoven fabric, and paper.
- the insulating resin impregnated in the prepreg include epoxy resin, cyanate resin, bismaleimide triazine resin (BT resin), polyphenylene ether resin, phenol resin and the like.
- the insulating resin that constitutes the resin sheet include insulating resins such as epoxy resins, polyimide resins, and polyester resins.
- the coreless support 18 may contain filler particles made of various inorganic particles such as silica and alumina from the viewpoint of lowering the thermal expansion coefficient and increasing rigidity.
- the thickness of the coreless support 18 is not particularly limited, but is preferably 3 to 1000 ⁇ m, more preferably 5 to 400 ⁇ m, and still more preferably 10 to 200 ⁇ m.
- a photoresist pattern 20 is formed on the surface of the copper foil 16.
- the formation of the photoresist pattern 20 may be performed by either a negative resist or a positive resist, and the photoresist may be either a film type or a liquid type.
- the developing solution may be a developing solution such as sodium carbonate, sodium hydroxide, an amine-based aqueous solution, etc., and may be carried out in accordance with various methods and conditions generally used in the production of printed wiring boards, and is not particularly limited.
- the copper electroplating 22 is applied to the copper foil 16 on which the photoresist pattern 20 is formed.
- the formation of the electrolytic copper plating 22 is not particularly limited as long as it is performed in accordance with various pattern plating methods and conditions generally used in the production of printed wiring boards such as a copper sulfate plating solution and a copper pyrophosphate plating solution.
- step (e) Stripping of photoresist pattern
- the photoresist pattern 20 is stripped to form a wiring pattern 24.
- Stripping of the photoresist pattern 20 is not particularly limited as long as an aqueous sodium hydroxide solution, an amine-based solution or an aqueous solution thereof is employed, and may be performed in accordance with various stripping methods and conditions generally used in the manufacture of printed wiring boards.
- a wiring pattern 24 in which wiring portions (lines) made of the first wiring layer 26 are arranged with a gap (space) therebetween is directly formed on the surface of the copper foil 16.
- the line / space (L / S) is highly fine, such as 13 ⁇ m or less / 13 ⁇ m or less (for example, 12 ⁇ m / 12 ⁇ m, 10 ⁇ m / 10 ⁇ m, 5 ⁇ m / 5 ⁇ m, 2 ⁇ m / 2 ⁇ m). It is preferable to form a simplified wiring pattern. According to the method of the present invention, the appearance image inspection can be performed with high accuracy in the next step (f) even for such a fine circuit.
- an appearance image inspection of the wiring pattern 24 is performed on the copper foil 16 on which the wiring pattern 24 is formed.
- the appearance image inspection is performed by optical automatic appearance inspection (AOI).
- AOI optical automatic appearance inspection
- the appearance image inspection is as described above with reference to FIG. 3 and the like, but the appearance image inspection is preferably performed using a light source having a peak region at a wavelength of 635 nm. This is because this wavelength has an advantage that it is easy to recognize an image showing a defect in a wiring pattern, a short circuit, or the like.
- the surface of the copper plating that is the first wiring layer 26 constituting the wiring pattern 24 directly formed on the copper foil 16 has a characteristic that it easily reflects red semiconductor light. For this reason, in order to obtain a high contrast in the appearance image inspection, the surface of the copper foil 16 is required to be less reflective to the red semiconductor light as opposed to the first wiring layer 26.
- the copper foil 16 having an 8 ° diffuse reflectance SCI of 41% or less with respect to incident light is very advantageous.
- the substrate on which the wiring pattern 24 is formed is irradiated with red semiconductor light (for example, light having a wavelength of 635 nm) from the ring-shaped light source 50, and the first wiring layer 26.
- red semiconductor light for example, light having a wavelength of 635 nm
- the light reflected from the copper foil 16 and the light reflected from the copper foil 16 are received by the light receiving portion 52, and the obtained luminance data is discriminated into a gap portion (space) and a wiring portion (line) in light of a preset threshold value.
- a binarized image as shown in FIG. 4 is formed, and the position and shape accuracy of the wiring pattern 24 is obtained by pattern matching based on this binarized image and an image derived from design data as shown in FIG.
- the threshold used at this time is, in the initial setting, the entire surface of the substrate on which the wiring pattern 24 is formed (the surface on which the first wiring layer 26 is directly formed on the copper foil 16) or a predetermined sampling inspection site. Are pre-scanned, and the obtained luminance data is integrated to create a luminance histogram as shown in FIG.
- the horizontal axis is the luminance (for example, 256 hierarchical axes) and the vertical axis is the integrated amount)
- the luminance histogram space ( gap) from the peak P S and the line (between the wiring portion) derived from the peak P L, between each peak end (between the start point of the peak corresponding to the wiring portion as the end of the peak corresponding to the gap portion) What is necessary is just to determine as a median of.
- a laminate that does not satisfy the intended standard may be excluded, and a laminate provided with the wiring pattern 24 having the desired accuracy may be selected and appropriately applied to the subsequent optional steps. .
- step (G) Formation of Build-up Wiring Layer
- the build-up wiring layer 42 is formed on the copper foil 16 after the appearance image inspection to produce a laminate with a build-up wiring layer.
- the insulating layer 28 and the second wiring layer 38 can be formed in order to form the build-up wiring layer 42.
- the method for forming the build-up layer after the second wiring layer 34 is not particularly limited. Subtractive methods, MSAP (modified semi-additive process) methods, SAP (semi-additive) methods, full-additive methods, and the like are available. It can be used.
- a wiring pattern can be formed.
- a wiring pattern can also be formed on the surface by a semi-additive method.
- n-th wiring layer 40 (n is an integer of 2 or more) is formed. It is preferable to obtain a laminate. This process may be repeated until a desired number of build-up wiring layers are formed. At this stage, if necessary, solder resist, bumps for mounting such as pillars, and the like may be formed on the outer layer surface. Further, an outer layer wiring pattern may be formed on the outermost layer surface of the build-up wiring layer in the subsequent multilayer wiring board processing step (i).
- a laminated body with build-up wiring layer is obtained by separating the laminated body with build-up wiring layer by a release layer 14. Is preferred. This separation can be performed by peeling off the copper foil 16 and / or the carrier layer 12.
- step (I) Processing of Multilayer Wiring Board it is preferable to process the multilayer wiring board 44 to obtain the printed wiring board 46 as step (i).
- a desired multilayer printed wiring board is processed using the multilayer wiring board 44 obtained in the separation step.
- Various known methods may be adopted as a processing method from the multilayer wiring board 44 to the multilayer printed wiring board 46.
- the copper foil 16 in the outer layer of the multilayer wiring board 44 is etched to form an outer layer circuit wiring to obtain a multilayer printed wiring board.
- the copper foil 16 in the outer layer of the multilayer wiring board 44 can be completely removed by etching and used as it is as the multilayer printed wiring board 46.
- the copper foil 16 on the outer layer of the multilayer wiring board 44 is completely removed by etching, and a circuit shape is formed on the surface of the exposed resin layer with a conductive paste, or an outer layer circuit is directly formed by a semi-additive method or the like.
- a multilayer printed wiring board can be formed.
- the copper foil 16 on the outer layer of the multilayer wiring board 44 is completely removed by etching and the first wiring layer 26 is soft-etched to obtain the first wiring layer 26 having a recess, which is mounted. It can also be used as a pad.
- the present invention will be described more specifically by the following examples.
- the example shown below is an example for demonstrating advantages, such as that a copper foil provided with a predetermined processing surface is advantageous for appearance image inspection, fine circuit formation, and the like in the manufacturing process of a printed wiring board. .
- Example 1 Manufacture of electrolytic copper foil for carrier A copper sulfate acidic copper sulfate solution having the composition shown below is used as a copper electrolyte, a titanium rotating electrode drum having a surface roughness Ra of 0.20 ⁇ m is used for the cathode, and the anode is used.
- a copper electrolyte a titanium rotating electrode drum having a surface roughness Ra of 0.20 ⁇ m is used for the cathode, and the anode is used.
- DSA dimensionally stable anode
- the drum surface side of the pickled copper foil A is CBTA aqueous solution containing 1000 ppm by weight of CBTA (carboxybenzotriazole), free sulfuric acid concentration of 150 g / L, and copper concentration of 10 g / L. It was dipped for 30 seconds at a liquid temperature of 30 ° C. and pulled up. Thus, the CBTA component was adsorbed on the drum surface side of the copper foil A, and the CBTA layer was formed as an organic release layer.
- CBTA carboxybenzotriazole
- Roughening treatment was performed on the ultrathin copper foil formed on the drum surface side of the electrolytic copper foil A for carrier by the following three-stage process.
- the first stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 11 g / L, free sulfuric acid concentration: 220 g / L, 9-phenylacridine concentration: 0 mg / L, chlorine concentration: 0 mg / L, The solution was electrolyzed (current density: 10 A / dm 2 ) at a solution temperature of 25 ° C. and washed with water.
- the second stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 65 g / L, free sulfuric acid concentration: 150 g / L, 9-phenylacridine concentration: 0 mg / L, chlorine concentration: 0 mg / L, The solution was electrolyzed (current density: 15 A / dm 2 ) at a solution temperature of 45 ° C. and washed with water.
- the third stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 13 g / L, free sulfuric acid concentration: 50 g / L, 9-phenylacridine concentration: 140 mg / L, chlorine concentration: 35 mg / l, The solution was electrolyzed (current density: 50 A / dm 2 ) at a solution temperature of 30 ° C. and washed with water.
- Rust prevention treatment consisting of inorganic rust prevention treatment and chromate treatment was performed on both surfaces of the electrolytic copper foil after the roughening treatment.
- an inorganic rust prevention treatment using a pyrophosphate bath, potassium pyrophosphate concentration 80 g / L, zinc concentration 0.2 g / L, nickel concentration 2 g / L, liquid temperature 40 ° C., current density 0.5 A / dm 2 Zinc-nickel alloy rust prevention treatment was performed.
- a chromate treatment a chromate layer was further formed on the zinc-nickel alloy rust preventive treatment. This chromate treatment was performed at a chromic acid concentration of 1 g / L, pH 11, a solution temperature of 25 ° C., and a current density of 1 A / dm 2 .
- Silane coupling agent treatment The copper foil subjected to the above rust prevention treatment was washed with water and then immediately treated with a silane coupling agent to adsorb the silane coupling agent on the rust prevention treatment layer on the roughened surface.
- a silane coupling agent treatment pure water is used as a solvent, a solution having a 3-aminopropyltrimethoxysilane concentration of 3 g / L is used, and this solution is sprayed onto the black roughened surface by showering to perform an adsorption treatment. went. After adsorption of the silane coupling agent, water was finally diffused by an electric heater to obtain a surface-treated copper foil with a carrier.
- Examples 2-4 and 6 A surface-treated copper foil with a carrier was prepared in the same manner as in Example 1 except that the roughening treatment in the two-step process was performed under the conditions shown in Table 1 instead of the roughening treatment in the three-step process described above. It was.
- Example 5 On the electrolyte solution side of the copper foil A, an organic peeling layer and an ultrathin copper foil having a thickness of 3 ⁇ m were formed by the same procedure as in Example 1. Next, the surface of the ultrathin copper foil is electrolyzed under the conditions of a solution temperature of 30 ° C. and a current density of 50 A / dm 2 using a roughening copper electrolytic solution having the composition shown below. Made.
- a rust prevention treatment and a silane coupling treatment were performed in the same procedure as in Example 1 to prepare a surface-treated copper foil with a carrier.
- Example 7 (Comparison) A surface-treated copper foil with a carrier in which an ultrathin copper foil was formed on the electrolyte surface side of the copper foil A was produced in the same manner as in Example 5 except that the roughening treatment was not performed.
- ⁇ Roughened surface properties> (Average particle diameter D and particle density ⁇ ) An image was taken at a magnification of 1000 to 3000 particles in one field of view of a scanning electron microscope (SEM) with an inclination angle of 0 ° with respect to the treated surface of the surface-treated copper foil, and the image was processed for image processing. The particle density ⁇ and the average particle diameter D were determined. For image processing, image analysis software (Mac-VIEW, manufactured by Mountec Co., Ltd.) was used. The measurement was performed on 200 particles arbitrarily selected, the average diameter of the particles was “average particle diameter D”, and the value obtained by dividing the number of particles (that is, 200 particles) by the visual field area was “particle density ⁇ ”.
- a laminate in which the first wiring layer was formed on the surface-treated copper foil with the wiring pattern was prepared. Specifically, it was performed as follows.
- Lamination on coreless laminate This coreless support is made by stacking four prepregs (Mitsubishi Gas Chemical Co., Ltd., GHPL-830NS, thickness 45 ⁇ m) made of bismaleimide / triazine resin with glass cloth.
- a coreless laminate was produced by press laminating the copper foil with carrier produced in Examples 1 to 7 on both sides with the ultrathin copper foil on the outside. This press lamination was performed at a press temperature of 220 ° C., a press time of 90 minutes, and a pressure of 40 MPa.
- a negative photoresist manufactured by Hitachi Chemical Co., Ltd., RY3625 was laminated on the ultrathin copper foil layer, and exposure (20 mJ / cm 2 ) and development (8% sodium carbonate aqueous solution, 30 ° C. shower method) were performed.
- electrolytic copper plating On the ultrathin copper foil layer patterned by the development treatment, electrolytic copper plating was formed with a thickness of 10 ⁇ m using a copper sulfate plating solution.
- the photoresist was stripped off at 60 ° C. for 5 minutes using a photoresist stripping solution (R-100S, manufactured by Mitsubishi Gas Chemical Company).
- AOI optical automatic visual inspection
- the values obtained were as shown in Table 2.
- the visibility of the wiring pattern was evaluated by the following procedure.
- a brightness histogram as shown in FIG. 6 was created by scanning the surface of the laminate on which the wiring pattern was applied, and a threshold value was set so that the space and the wiring could be identified.
- the value of this threshold between the peak P L from the space of the luminance histogram (gap) from the peak P S and the line (wiring portion), between the respective peaks terminal (the terminal end of the peak corresponding to the gap portion wirings The median value between the peak start points corresponding to the parts.
- the circuit surface on which the wiring pattern was formed was scanned to identify lines and spaces, pattern matching with design data was performed, and rating evaluation was performed according to the following four criteria.
- -AA A line / space image (hereinafter referred to as an L / S image) obtained very accurately as designed as shown in FIG. 4 -A: An L / S image obtained almost exactly, -B: L / S image obtained to an acceptable level, -C: It was difficult to distinguish lines and spaces as shown in FIG.
- Example 2 For reference, the image (A evaluation) obtained in Example 2 is shown in FIG.
- Evaluation results are shown in Table 2. From the comparison between the 256-layer peak-to-peak distance and the visibility evaluation results shown in Table 2, the longer the 256-layer peak-to-peak distance is, the better the wiring pattern visibility is, and the accuracy of the position and shape of the wiring pattern is confirmed. It turns out that it is more suitable for appearance image inspection. Further, considering the relationship with the 256-layer peak-to-peak distance shown in Table 2, the 256-layer peak-to-peak distance is preferably 85 or more, more preferably 100 or more, and even more preferably 110 or more.
- the wiring pattern formability evaluation was performed as follows. For a wiring pattern including 20 lines (10 mm in length) formed with various lines / spaces (L / S), the wiring patterns with line / space (L / S) of 8 ⁇ m / 8 ⁇ m and 7 ⁇ m / 7 ⁇ m Each was evaluated in the following three stages, taking into consideration whether there was no development residue and whether the copper electroplating was formed as a pattern.
- -B There are two or less electroplating defective parts in 20 lines
- -C There are three or more electroplating defective parts in 20 lines
- the evaluation on the adhesion / peelability of the photoresist is based on the frequency of occurrence of a resist adhesion failure portion (resist jump) or development of a resist residue defect between patterns in the 200 cylindrical patterns of the photoresist described above. This was done by rating evaluation based on three levels. -A: Less than 10 locations -B: 10 or more defective locations and less than 50 locations -C: More than 50 defective locations -D: Resist residue is generated between patterns, and independent cylindrical patterns are formed Not formed
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Abstract
Description
入射光に対する8°拡散反射率SCIが41%以下である処理表面を有してなる銅箔を用意する工程と、
前記銅箔の前記処理表面にフォトレジストパターンを形成する工程と、
前記フォトレジストパターンが形成された前記銅箔に電気銅めっきを施す工程と、
前記フォトレジストパターンを剥離して配線パターンを形成する工程と、
前記配線パターンが形成された前記銅箔に対して、配線パターンの外観画像検査を行う工程と、
を含む、方法が提供される。
銅箔16は、上述のとおり、入射光に対する8°拡散反射率SCIが41%以下である表面を有する。そのような処理表面は銅箔16の一方の側(図1のようなキャリア付銅箔10の場合には剥離層14と反対側(すなわちキャリア付銅箔10の最表面))に設けられるのが典型的であるが、両側に設けられてもよい。8°拡散反射率SCIの評価に用いられる入射光は、外観画像検査に使用される光源波長のピーク領域内の波長を有するのが好ましい。また、前述のように外観画像検査は波長635nmにピーク領域を有する光源を用いて行われるのが好ましい。したがって、8°拡散反射率SCIの評価に用いられる入射光の波長は635nmであるのが好ましい。入射光(例えば波長635nmの入射光)に対する8°拡散反射率SCIが41%以下であり、好ましくは20%以下、さらに好ましくは15%以下である。入射光に対する8°拡散反射率SCIは、市販の分光色彩計(例えば、日本電色工業株式会社製、SD7000)を用いてJISZ8722(2012)に準拠して測定することができる。このような8°拡散反射率SCIが低い処理表面は、入射光(例えば波長635nmの入射光)を拡散反射成分が少ない面であることが好ましい。換言すれば、8°拡散反射率SCIが低い処理表面は、入射光(例えば波長635nmの入射光)を拡散反射する平坦成分領域が少ない表面を有することにより好ましく実現することができる。また、外観画像検査における精度向上のためには、銅箔の表面は、銅、又は銅と亜鉛、スズ、コバルト、ニッケル、クロム及びモリブデンから選択される少なくとも一種との合金であることが好ましく、より好ましくは、粗面を有する銅表面であることが拡散反射率を低く保つ観点で好ましい。
所望により、工程(b)として、フォトレジストパターンの形成に先立ち、銅箔16又はキャリア付銅箔10をコアレス支持体18の片面又は両面に積層して積層体を形成してもよい。この積層は、通常のプリント配線板製造プロセスにおいて銅箔とプリプレグ等との積層に採用される公知の条件及び手法に従って行えばよい。コアレス支持体18は、典型的には樹脂、好ましくは絶縁性樹脂を含んでなる。コアレス支持体18はプリプレグ及び/又は樹脂シートであるのが好ましく、より好ましくはプリプレグである。プリプレグとは、合成樹脂板、ガラス板、ガラス織布、ガラス不織布、紙等の基材に合成樹脂を含浸又は積層させた複合材料の総称である。プリプレグに含浸される絶縁性樹脂の好ましい例としては、エポキシ樹脂、シアネート樹脂、ビスマレイミドトリアジン樹脂(BT樹脂)、ポリフェニレンエーテル樹脂、フェノール樹脂等が挙げられる。また、樹脂シートを構成する絶縁性樹脂の例としては、エポキシ樹脂、ポリイミド樹脂、ポリエステル樹脂等の絶縁樹脂が挙げられる。また、コアレス支持体18には熱膨脹係数を下げ、剛性を上げる等の観点からシリカ、アルミナ等の各種無機粒子からなるフィラー粒子等が含有されていてもよい。コアレス支持体18の厚さは特に限定されないが、3~1000μmが好ましく、より好ましくは5~400μmであり、さらに好ましくは10~200μmである。
この工程(c)では、銅箔16の表面にフォトレジストパターン20を形成する。フォトレジストパターン20の形成は、ネガレジスト及びポジレジストのいずれの方式で行ったもよく、フォトレジストはフィルムタイプ及び液状タイプのいずれであってもよい。また、現像液としては炭酸ナトリウム、水酸化ナトリウム、アミン系水溶液等の現像液であってよく、プリント配線板の製造に一般的に用いられる各種手法及び条件に従い行えばよく特に限定されない。
この工程(d)では、フォトレジストパターン20が形成された銅箔16に電気銅めっき22を施す。電気銅めっき22の形成は、例えば硫酸銅めっき液やピロリン酸銅めっき液等のプリント配線板の製造に一般的に用いられる各種パターンめっき手法及び条件に従い行えばよく特に限定されない。
この工程(e)では、フォトレジストパターン20を剥離して配線パターン24を形成する。フォトレジストパターン20の剥離は、水酸化ナトリウム水溶液や、アミン系溶液ないしその水溶液等が採用され、プリント配線板の製造に一般的に用いられる各種剥離手法及び条件に従い行えばよく特に限定されない。こうして、銅箔16の表面には第一配線層26からなる配線部(ライン)が間隙部(スペース)を隔てて配列された配線パターン24が直接形成されることになる。例えば、回路の微細化のためには、ライン/スペース(L/S)が13μm以下/13μm以下(例えば12μm/12μm、10μm/10μm、5μm/5μm、2μm/2μm)といった程度にまで高度に微細化された配線パターンを形成することが好ましく、このような微細回路に対しても本発明の方法によれば次の工程(f)において高精度に外観画像検査を行うことができる。
この工程(f)では、配線パターン24が形成された銅箔16に対して、配線パターン24の外観画像検査を行う。この外観画像検査により、配線パターンの位置及び形状の正確性を確認して、所期の正確性を有する配線パターン24を備えた積層体を選別することができる。外観画像検査が光学式自動外観検査(AOI)により行われるのが好ましい。外観画像検査については図3等を参照しながら前述したとおりであるが、外観画像検査は波長635nmにピーク領域を有する光源を用いて行われるのが好ましい。この波長であると、配線パターンの欠損、ショート等を示す画像を認識しやすいとの利点があるためである。特に、銅箔16上に直接形成される配線パターン24を構成する第一配線層26である銅めっきの表面は赤色半導体光を反射しやすいという特性を有する。このため、外観画像検査において高いコントラストを得るためには、銅箔16の表面は、第一配線層26とは対照的に上記赤色半導体光に対する反射が少ないことが求められる。この点、入射光(好ましくは波長635nmの入射光)に対する8°拡散反射率SCIが41%以下である銅箔16は非常に有利であることは前述したとおりである。
所望により、工程(g)として、外観画像検査後の銅箔16上にビルドアップ配線層42を形成してビルドアップ配線層付積層体を作製するのが好ましい。例えば、銅箔16上に既に形成されている第一配線層26に加え、絶縁層28及び第二配線層38が順に形成されてビルドアップ配線層42とされうる。第二配線層34以降のビルドアップ層の形成方法についての工法は特に限定されず、サブトラクティブ法、MSAP(モディファイド・セミ・アディティブ・プロセス)法、SAP(セミアディティブ)法、フルアディティブ法等が使用可能である。例えば、樹脂層及び銅箔に代表される金属箔を同時にプレス加工で張り合わせる場合は、ビアホール形成及びパネルめっき等の層間導通手段の形成と組み合わせて、当該パネルめっき層及び金属箔をエッチング加工して、配線パターンを形成することができる。また、銅箔16の表面に樹脂層のみをプレス又はラミネート加工により張り合わせる場合は、その表面にセミアディティブ法で配線パターンを形成することもできる。
所望により、工程(h)として、ビルドアップ配線層付積層体を剥離層14で分離してビルドアップ配線層42を含む多層配線板44を得るのが好ましい。この分離は、銅箔16及び/又はキャリア層12を引き剥がすことにより行うことができる。
所望により、工程(i)として、多層配線板44を加工してプリント配線板46を得るのが好ましい。この工程では、上記分離工程により得られた多層配線板44を用いて、所望の多層プリント配線板に加工する。多層配線板44から多層プリント配線板46への加工方法は公知の種々の方法を採用すればよい。例えば、多層配線板44の外層にある銅箔16をエッチングして外層回路配線を形成して、多層プリント配線板を得ることができる。また、多層配線板44の外層にある銅箔16を、完全にエッチング除去し、そのままの状態で多層プリント配線板46として使用することもできる。さらに、多層配線板44の外層にある銅箔16を、完全にエッチング除去し、露出した樹脂層の表面に、導電性ペーストで回路形状を形成する又はセミアディティブ法等で外層回路を直接形成する等して多層プリント配線板とすることも可能である。さらに、多層配線板44の外層にある銅箔16を、完全にエッチング除去するとともに第一配線層26をソフトエッチングすることで、凹部の形成された第一配線層26を得て、これを実装用のパッドとなすことも可能である。
(1)キャリア用電解銅箔の製造
銅電解液として以下に示される組成の硫酸酸性硫酸銅溶液を用い、陰極に表面粗さRaが0.20μmのチタン製の回転電極ドラムを用い、陽極にはDSA(寸法安定性陽極)を用いて、溶液温度45℃、電流密度55A/dm2で電解し、厚さ12μmのキャリア用電解銅箔A(以下、銅箔Aという)を得た。
(※ここで形成された銅箔Aに対して、後述の工程で加工を施す面について、電解時に陰極ドラムと接していた側を「ドラム面側」と、電解液と接していた側を「電解液面側」と称するものとする。)
酸洗処理された銅箔Aのドラム面側を、CBTA(カルボキシベンゾトリアゾール)1000重量ppm、フリー硫酸濃度150g/L及び銅濃度10g/Lを含むCBTA水溶液に、液温30℃で30秒間浸漬して引き上げた。こうしてCBTA成分を銅箔Aのドラム面側に吸着させて、CBTA層を有機剥離層として形成させた。
有機剥離層を形成した銅箔Aのドラム面側に対して酸性硫酸銅溶液中で、電流密度8A/dm2で厚さ3μmの極薄銅箔を有機剥離層上に形成した。
キャリア用電解銅箔Aのドラム面側に形成された極薄銅箔に対して、以下の3段階のプロセスで粗化処理を行った。
‐ 粗化処理の1段目は、粗化処理用銅電解溶液(銅濃度:11g/L、フリー硫酸濃度:220g/L、9-フェニルアクリジン濃度:0mg/L、塩素濃度:0mg/L、溶液温度:25℃)にて電解(電流密度:10A/dm2)し、水洗することにより行った。
‐ 粗化処理の2段目は、粗化処理用銅電解溶液(銅濃度:65g/L、フリー硫酸濃度:150g/L、9-フェニルアクリジン濃度:0mg/L、塩素濃度:0mg/L、溶液温度:45℃)にて電解(電流密度:15A/dm2)し、水洗することにより行った。
‐ 粗化処理の3段目は、粗化処理用銅電解溶液(銅濃度:13g/L、フリー硫酸濃度:50g/L、9-フェニルアクリジン濃度:140mg/L、塩素濃度:35mg/l、溶液温度:30℃)にて電解(電流密度:50A/dm2)し、水洗することにより行った。
粗化処理後の電解銅箔の両面に、無機防錆処理及びクロメート処理からなる防錆処理を行った。まず、無機防錆処理として、ピロリン酸浴を用い、ピロリン酸カリウム濃度80g/L、亜鉛濃度0.2g/L、ニッケル濃度2g/L、液温40℃、電流密度0.5A/dm2で亜鉛-ニッケル合金防錆処理を行った。次いで、クロメート処理として、亜鉛-ニッケル合金防錆処理の上に、更にクロメート層を形成した。このクロメート処理は、クロム酸濃度が1g/L、pH11、溶液温度25℃、電流密度1A/dm2で行った。
上記防錆処理が施された銅箔を水洗し、その後直ちにシランカップリング剤処理を行い、粗化面の防錆処理層上にシランカップリング剤を吸着させた。このシランカップリング剤処理は、純水を溶媒とし、3-アミノプロピルトリメトキシシラン濃度が3g/Lの溶液を用い、この溶液をシャワーリングにて黒色粗化面に吹き付けて吸着処理することにより行った。シランカップリング剤の吸着後、最終的に電熱器により水分を気散させ、キャリア付表面処理銅箔を得た。
上述の3段階プロセスの粗化処理の代わりに、表1に示される条件で2段階プロセスの粗化処理を行ったこと以外は、例1と同様にしてキャリア付表面処理銅箔の作製を行った。
銅箔Aの電解液面側に、例1と同様の手順により、有機剥離層及び厚さ3μmの極薄銅箔を形成した。次いで、極薄銅箔の表面に対して、以下に示される組成の粗化用銅電解溶液を用い、溶液温度30℃、電流密度50A/dm2の条件で電解して、1段階プロセスの粗化を行った。
<粗化用銅電解溶液の組成>
‐ 銅濃度:15g/L
‐ フリー硫酸濃度:55g/L
‐ 9-フェニルアクリジン濃度:140mg/L
‐ 塩素濃度:35mg/L
‐ ビス(3-スルホプロピル)ジスルフィド濃度:100ppm
粗化処理を行わなかったこと以外は例5と同様にして、銅箔Aの電解液面側に極薄銅箔が形成されたキャリア付表面処理銅箔を作製した。
例1~7において作製された表面処理銅箔の処理表面(電解銅箔の析出面側)に対して以下の評価を行った。評価結果は表2に示されるとおりであった。
(635nmでの8°拡散反射率SCI)
表面処理銅箔の処理表面に対して、波長635nmの入射光に対する8°拡散反射率SCIを、分光色彩計(日本電色工業株式会社製、SD7000)を用いてJIS Z 8722(2012)(色の測定方法-反射及び透過物体色)に準拠して測定した。
(平均粒径D及び粒子密度ρ)
表面処理銅箔の処理表面に対して傾斜角0°とし、走査型電子顕微鏡(SEM)の一視野に粒子が1000~3000個入る倍率にて像を撮影し、その像に対して画像処理にて粒子密度ρ及び平均粒径Dを求めた。画像処理は、画像解析ソフト(マウンテック社製、Mac-VIEW)を用いた。測定は任意に選択した200個の粒子を対象とし、粒子の平均直径を「平均粒径D」とし、粒子個数(すなわち200個)を視野面積で除算した値を「粒子密度ρ」とした。
表面処理銅箔の処理表面に対して光沢度計(日本電色工業株式会社製、PG-1M)を用い、JIS Z 8741(1997)(鏡面光沢度-測定方法)に準拠して角度85°の光沢度を測定した。
例1~7において作製された表面処理銅箔を用いて、コアレス支持体への積層、フォトレジスト加工、パターンめっき、及びフォトレジスト剥離等を順に施し、所定の配線パターンで第一配線層が表面処理銅箔上に形成された積層体を作製した。具体的には以下のようにして行った。
ガラスクロス入りビスマレイミド・トリアジン樹脂からなるプリプレグ(三菱ガス化学社製、GHPL-830NS、厚さ45μm)を4枚重ねてコアレス支持体とした、このコアレス支持体の両面に例1~7で作製されたキャリア付銅箔をその極薄銅箔を外側にしてプレス積層してコアレス積層体を作製した。このプレス積層は、プレス温度:220℃、プレス時間:90分、圧力:40MPaで行った。
フォトレジスト密着性の評価用に、上述の現像工程までの製造工程を行った直径7μm(ピッチ14μm)のフォトレジストの円柱状パターンを作製した状態のサンプルを用意した。また、外観画像検査特性評価用及び配線パターン形成性評価用に、上述のフォトレジスト剥離工程までの製造工程を行った、ライン/スペース(L/S)が8μm/8μm及び7μm/7μmの配線パターンを含むサンプルを用意した。フォトレジスト塗布、電気銅めっき、及びフォトレジストの剥離の具体的手順は以下のとおりとした。
極薄銅箔層上にネガ型フォトレジスト(日立化成工業社製、RY3625)を積層し、露光(20mJ/cm2)及び現像(8%炭酸ナトリウム水溶液、30℃シャワー方式)を行った。
現像処理によりパターニングが施された極薄銅箔層上に、硫酸銅めっき液により10μmの厚さで電気銅めっきを形成した。
フォトレジスト剥離液(三菱ガス化学社製、R-100S)を用いて、60℃で5分間かけてフォトレジストの剥離を行った。
(256階層ピーク間距離)
光源として635nmの赤色LEDを備えた、光学式自動外観検査(AOI)装置(大日本スクリーン製造社製、製品名:PI9500)を用意した。配線パターンが施された積層体表面をスキャンして図6に示されるような輝度ヒストグラムを作成し、図6に示されるように256階層軸におけるスペース(間隙部)のピークPSの高階層側の立ち上がり位置と、ライン(配線部)のピークPLの低階層側の立ち上がり位置との距離(すなわち256階層ピーク間距離D)を測定した。得られた値は表2に示されるとおりであった。
また、配線パターンの視認性を以下の手順により評価した。配線パターンが施された積層体表面をスキャンして図6に示されるような輝度ヒストグラムを作成し、スペースと配線を識別可能とする閾値を設けた。この閾値の値は、輝度ヒストグラムのスペース(間隙部)由来のピークPSとライン(配線部)由来のピークPLの間において、それぞれのピーク末端間(間隙部に相当するピークの終端と配線部に相当するピークの開始点の間)の中央値とした。この閾値を基づいて配線パターンが形成された回路表面をスキャンしてラインとスペースを識別して、設計データとのパターンマッチングを行い、以下の4段階の基準により格付け評価した。
‐AA:図4に示されるように設計どおりに非常に正確にライン/スペース像(以下、L/S像)が得られたもの
‐A:概ね正確にL/S像が得られたもの、
‐B:許容可能な程度にL/S像が得られたもの、
‐C:図7に示されるようにライン及びスペースの識別が困難であったもの
(配線パターン形成性評価)
配線パターン形成性評価は以下のようにして行った。様々なライン/スペース(L/S)で形成された20本(長さ10mm)のラインを含む配線パターンに対し、ライン/スペース(L/S)が8μm/8μm及び7μm/7μmの配線パターンの各々について、現像残渣がなく、かつ、電気銅めっきがパターンとして形成されているかどうかという観点を踏まえながら、以下の3段階で評価した。
‐A:電気めっき不良部が無い
‐B:20本のライン中2本以下の電気めっき不良部がある
‐C:20本のライン中3本以上の電気めっき不良部がある
‐AA:非常に良い
‐A:良い
‐B:許容可能
‐C:劣る
フォトレジストの密着性・剥離性に関する評価は、上述したフォトレジストの円柱状パターン200箇所における、現像によるレジスト密着不良部(レジスト飛び)の発生頻度ないしパターン間レジスト残渣不良の発生状況を、以下の3段階の基準で格付け評価することにより行った。
‐A:10か所未満
‐B:不良箇所が10か所以上50か所未満
‐C:不良箇所が50か所より多い
‐D:パターン間にレジスト残渣が発生し、独立した円柱状パターンが形成されていない
Claims (15)
- プリント配線板の製造方法であって、
入射光に対する8°拡散反射率SCIが41%以下である処理表面を有してなる銅箔を用意する工程と、
前記銅箔の前記処理表面にフォトレジストパターンを形成する工程と、
前記フォトレジストパターンが形成された前記銅箔に電気銅めっきを施す工程と、
前記フォトレジストパターンを剥離して配線パターンを形成する工程と、
前記配線パターンが形成された前記銅箔に対して、配線パターンの外観画像検査を行う工程と、
を含む、方法。 - 前記入射光が、前記外観画像検査に使用される光源波長のピーク領域内の波長を有する、請求項1に記載の方法。
- 前記外観画像検査が波長635nmにピーク領域を有する光源を用いて行われる、請求項1又は2に記載の方法。
- 前記入射光の波長が635nmである、請求項1~3のいずれか一項に記載の方法。
- 前記8°拡散反射率SCIが20%以下である、請求項1~4のいずれか一項に記載の方法。
- 前記処理表面に粒子状の粗面が形成されている、請求項1~5のいずれか一項に記載の方法。
- 前記粗化粒子の画像解析による平均粒径Dが0.04~0.53μmであり、前記粗化粒子の画像解析による粒子密度ρが4~200個/μm2である、請求項6に記載の方法。
- 前記処理表面の鏡面光沢度Gs(85°)が20~100である、請求項1~7のいずれか一項に記載の方法。
- 前記銅箔が0.05~7μmの厚さを有する、請求項1~8のいずれか一項に記載の方法。
- 前記外観画像検査が光学式自動外観検査(AOI)により行われる、請求項1~9のいずれか一項に記載の方法。
- 前記銅箔がキャリア付銅箔の形態で供され、該キャリア付銅箔が、キャリア層、剥離層及び前記銅箔をこの順に備えてなる、請求項1~10のいずれか一項に記載の方法。
- 前記フォトレジストパターンの形成に先立ち、前記銅箔又は前記キャリア付銅箔をコアレス支持体の片面又は両面に積層して積層体を形成する工程をさらに含む、請求項1~11のいずれか一項に記載の方法。
- 前記外観画像検査後の前記銅箔上にビルドアップ配線層を形成してビルドアップ配線層付積層体を作製する工程をさらに含む、請求項1~12のいずれか一項に記載の方法。
- 前記ビルドアップ配線層付積層体を前記剥離層で分離して前記ビルドアップ配線層を含む多層配線板を得る工程をさらに含む、請求項13に記載の方法。
- 前記銅箔又は前記多層配線板を加工してプリント配線板を得る工程をさらに含む、請求項1~14のいずれか一項に記載の方法。
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| CN101977480B (zh) * | 2010-10-14 | 2013-06-05 | 惠州中京电子科技股份有限公司 | 印刷线路板精细线路制作工艺 |
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- 2015-12-01 CN CN201580066930.XA patent/CN107003257B/zh active Active
- 2015-12-01 KR KR1020177005012A patent/KR102402300B1/ko active Active
- 2015-12-01 JP JP2016563627A patent/JP6734785B2/ja active Active
- 2015-12-03 TW TW104140558A patent/TWI617229B/zh active
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2016174998A1 (ja) * | 2015-04-28 | 2018-02-15 | 三井金属鉱業株式会社 | 粗化処理銅箔及びプリント配線板 |
| KR20180060998A (ko) * | 2016-11-28 | 2018-06-07 | 장 춘 페트로케미컬 컴퍼니 리미티드 | 다층 캐리어 포일 |
| JP2018088525A (ja) * | 2016-11-28 | 2018-06-07 | 長春石油化學股▲分▼有限公司 | 多層キャリア箔 |
| KR101958573B1 (ko) | 2016-11-28 | 2019-03-14 | 장 춘 페트로케미컬 컴퍼니 리미티드 | 다층 캐리어 포일 |
| JP2018131590A (ja) * | 2017-02-17 | 2018-08-23 | 日立化成株式会社 | コアレス基板用熱硬化性樹脂組成物、コアレス基板用プリプレグ、コアレス基板、コアレス基板の製造方法及び半導体パッケージ |
| WO2021065490A1 (ja) * | 2019-09-30 | 2021-04-08 | 株式会社フジクラ | フレキシブルプリント配線板及びその製造方法 |
| JP2021057433A (ja) * | 2019-09-30 | 2021-04-08 | 株式会社フジクラ | フレキシブルプリント配線板及びその製造方法 |
| CN113005484A (zh) * | 2019-12-19 | 2021-06-22 | 日进材料股份有限公司 | 经表面处理的铜箔、其制造方法、包括其的铜箔层叠体及包括铜箔层叠体的印刷线路板 |
| CN113005484B (zh) * | 2019-12-19 | 2024-05-03 | 乐天能源材料公司 | 经表面处理的铜箔、其制造方法、包括其的铜箔层叠体及包括铜箔层叠体的印刷线路板 |
| JP7492090B1 (ja) * | 2022-11-28 | 2024-05-28 | 福田金属箔粉工業株式会社 | 表面処理銅箔及び該表面処理銅箔を用いた銅張積層板並びにプリント配線板 |
| WO2024116475A1 (ja) * | 2022-11-28 | 2024-06-06 | 福田金属箔粉工業株式会社 | 表面処理銅箔及び該表面処理銅箔を用いた銅張積層板並びにプリント配線板 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107003257B (zh) | 2020-07-03 |
| JPWO2016093109A1 (ja) | 2017-09-14 |
| TW201633873A (zh) | 2016-09-16 |
| JP6734785B2 (ja) | 2020-08-05 |
| TWI617229B (zh) | 2018-03-01 |
| CN107003257A (zh) | 2017-08-01 |
| KR20170092519A (ko) | 2017-08-11 |
| KR102402300B1 (ko) | 2022-05-27 |
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