WO2014003003A1 - Contact d'essai électrique et alvéole d'essai électrique l'utilisant - Google Patents
Contact d'essai électrique et alvéole d'essai électrique l'utilisant Download PDFInfo
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- WO2014003003A1 WO2014003003A1 PCT/JP2013/067388 JP2013067388W WO2014003003A1 WO 2014003003 A1 WO2014003003 A1 WO 2014003003A1 JP 2013067388 W JP2013067388 W JP 2013067388W WO 2014003003 A1 WO2014003003 A1 WO 2014003003A1
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- WIPO (PCT)
- Prior art keywords
- contact
- plating layer
- electrical test
- terminal
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/71—Coupling devices for rigid printing circuits or like structures
- H01R12/712—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
- H01R12/714—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit with contacts abutting directly the printed circuit; Button contacts therefore provided on the printed circuit
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
- G01R1/0441—Details
- G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
- G01R1/0483—Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/82—Coupling devices connected with low or zero insertion force
- H01R12/85—Coupling devices connected with low or zero insertion force contact pressure producing means, contacts activated after insertion of printed circuits or like structures
- H01R12/88—Coupling devices connected with low or zero insertion force contact pressure producing means, contacts activated after insertion of printed circuits or like structures acting manually by rotating or pivoting connector housing parts
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06716—Elastic
Definitions
- the present invention relates to an electrical test contact and an electrical test socket used, for example, in a screening by burn-in test of an electronic component such as an integrated circuit (IC) or a reliability test by accelerated stress.
- IC integrated circuit
- ICs are rapidly becoming increasingly integrated and large-capacity (hereinafter collectively referred to as high-density) and highly functional and multi-functional (hereinafter collectively referred to as high-performance). It has been widely installed in various electronic devices or electronic parts such as automobiles. Such electronic components are strongly required to have high reliability, and a burn-in test in which a high voltage is applied at a high temperature is performed in order to screen a product having an initial failure or an inherent defect. Alternatively, in order to evaluate the long-term reliability of ICs, various reliability tests using accelerated stress that accompany product exposure to high temperature and high voltage, such as BT (Bias Temperature) test and TDDB (Time Dependent Dielectric Breakdown) test, etc. Is done.
- BT Bias Temperature
- TDDB Time Dependent Dielectric Breakdown
- IC terminals Lead terminals used in IC packages (hereinafter referred to as IC terminals) are becoming increasingly multi-pin or narrow pitched as the density and performance of ICs increase. Such an IC terminal is subjected to tin (Sn) plating or solder plating on the surface of the terminal. Also, solder balls or solder bumps are often used for terminals such as BGA (Ball Grid Array) terminals in CSP (Chip Size Package), wafer level CSP terminals, and flip chip connected bare chip terminals. It is coming. Here, generally used solder is made of Sn alloy or the like which is lead-free solder.
- an IC package in which an IC to be tested is enclosed is mounted on an IC socket attached to a test board such as a printed circuit board. Then, the test board is accommodated in the heating device, and the IC is inspected by energizing at a high temperature of, for example, 125 ° C. or higher.
- the circuit wiring or land (hereinafter referred to as land or the like) of the IC terminal and the test board is electrically connected through, for example, a contact pin.
- a plurality of test ICs arranged on the wafer are energized at a high temperature similar to the above using an energization inspection apparatus (hereinafter also referred to as a prober).
- the accompanying inspection is performed at once.
- the terminal of each IC chip is electrically connected to the land of the probe card or the like via a contact probe attached to a so-called probe head.
- the contact pins, contact probes, and the like are collectively referred to as electrical test contacts.
- a metal material such as copper (Cu) or Cu alloy having low resistance is used as a base material.
- a surface plating film made of a noble metal such as gold (Au), silver (Ag), palladium (Pd), platinum (Pt), or an alloy thereof is formed on the surface (for example, Patent Documents). 1 and 2).
- a reaction suppression layer reaction barrier layer
- an intermediate plating layer made of an alloy or the like is interposed.
- the conventional electrical test contact has a problem that when a burn-in test or an accelerated stress test in which the IC of the subject is placed in a high temperature environment is repeated, the contact resistance increases with the number of repetitions and an appropriate test cannot be performed. I had it. Or the change with time of the contact resistance value becomes unstable and sometimes increases at an early stage. Therefore, conventionally, when the contact resistance of the electrical test contact is increased and deviated from the standard, the electrical test contact is cleaned or replaced with a new electrical test contact. Alternatively, when the electrical test contact cannot be replaced, for example, the IC socket or the probe head is replaced with a new one.
- the present inventors repeated various trial experiments in a high temperature environment for increasing the contact resistance in the conventional electrical test contact.
- Au is locally taken into the IC terminal side of the specimen and causes a metallurgical reaction with Sn of the solder.
- Ni in the exposed underlying plating layer reacts with oxygen in the air and is oxidized to produce nickel oxide as an insulator.
- the present invention has been made in view of the above circumstances, and provides an electrical test contact that suppresses an increase in contact resistance with a terminal in a current-carrying test of a subject such as an IC in a high-temperature environment.
- the purpose is to do.
- the present invention provides an electrical test contact used for inspecting a subject by contacting a terminal of the subject, a base material made of a metal material, and a surface of the base material And a first plating layer made of nickel or a nickel-base alloy, and a contact portion that contacts the terminal of the subject is in contact with the first plating layer and is made of a second metal or gold-base alloy.
- a plating layer is formed, and a third plating layer made of palladium or a palladium-based alloy is in contact with the second plating layer only at the contact portion, and a fourth plating layer made of silver or a silver-based alloy in contact with the third plating layer And are formed by being laminated.
- the electrical test socket according to the present invention includes the electrical test contact, and is characterized in that the terminal of the subject and the test board are electrically connected to each other through the electrical test contact.
- an increase in the contact resistance between the electrical test contact and the subject terminal is suppressed as compared with the conventional case in a current-carrying inspection of the subject such as an IC in a high temperature environment.
- the life of the electrical test contact can be extended.
- the contact for electrical test is limited to the contact portion where the third plating layer and the fourth plating layer are formed, so that it can cope with the increase in the number of pins or the pitch of the IC and the cost can be easily reduced. To do.
- FIG. 2 is an enlarged cross-sectional view of a part of the electrical test contact shown in FIG. 1 other than a contact portion with an IC terminal. It is sectional drawing which expands and shows a part of contact part in the contact for an electrical test shown in FIG.
- FIG. 2 is a perspective view showing a state in which the inside is exposed by breaking a surface parallel to the side surface thereof in order to explain an example of the IC socket to which the electrical test contact shown in FIG. 1 is attached. It is a perspective view for demonstrating mounting
- FIG. 2 is a schematic cross-sectional view showing a contact state between an IC terminal of an electrical test contact shown in FIG. 1 and a lead of an IC package.
- FIG. 2 is an enlarged cross-sectional view illustrating a part of the electrical test contact according to the embodiment of FIG. It is explanatory drawing for demonstrating the relationship between the spring part 10c of the contact for electrical tests shown in FIG. 1, and the contact isolation
- FIG. 10 is a schematic cross-sectional view showing a contact state between an IC terminal of an electrical test contact according to still another embodiment of the present invention, an IC package, and a test board. It is typical sectional drawing which showed the contact state of the IC terminal of the contact for electrical testing which concerns on the further embodiment of this invention, an IC package, and a test board.
- an electrical test contact 10 which is a contact pin for an IC socket is formed by punching and plating a thin metal plate base 11 made of a metal material.
- the upper end of the electrical test contact 10 in FIG. 1 becomes the contact portion 10a that contacts the IC terminal, and the lower end of the electrical test contact 10 becomes the terminal portion 10b that is soldered to the test board.
- the details of the specific outer shape will be described later in the description of the IC socket, but the structure has a spring portion 10c, a support portion 10d, and a fixing portion 10e between the contact portion 10a and the terminal portion 10b.
- the spring part 10c is continuous with the lower part of the contact part 10a, and further has a part extending laterally therefrom, and a U-shaped curved part continuous with the part, so that the IC package 23 It fulfills the function of elastically supporting a load acting on the contact portion 10a in accordance with contact with a lead (described later). Needless to say, the cross-sectional dimension and length of the spring portion 10c can be appropriately determined in order to achieve a desired elastic support function.
- a fixing portion 10e is provided so as to branch downward from the middle of the support portion 10d, and a terminal portion 10b extends continuously from the fixing portion 10e.
- the support portion 10d may be formed as a part of the spring portion 10c.
- the first plating layer 12 made of Ni or a Ni-based alloy and the thin Au or Au on the surface of the base 11 of the thin metal plate that has been punched out in its entirety, that is, each of the above-mentioned parts.
- the second plating layer 13 made of an alloy is sequentially formed (FIG. 2A). And in the contact part 10a which contacts an IC terminal, as shown to FIG. 2B, it consists of Pd further on the 2nd plating layer 13 only in the site
- a third plating layer 14 and a fourth plating layer 15 made of Ag are sequentially stacked.
- a known discoloration prevention treatment may be performed on the entire electrical test contact 10 and the surface of a necessary portion.
- the electrical test contact 10 In the metal plating of the electrical test contact 10, first, the first plating layer 12 and the second plating layer 13 are formed on the entire substrate 11 by electrodeposition. Thereafter, the third plating layer 14 and the fourth plating layer 15 are further partially formed with respect to the contact portion 10a. As described above, the electrical test contact 10 according to the present embodiment is easy to manufacture because the number of manufacturing steps does not increase so much.
- the substrate 11 is made of copper (Cu) or Cu alloy such as Cu-beryllium (Be) alloy, Cu-titanium (Ti) alloy, Cu-Sn alloy (eg phosphor bronze), Cu-zinc. (Zn) based alloys (for example, brass).
- Cu copper
- Be Cu-beryllium
- Ti Cu-titanium
- Ti Cu-Sn alloy
- Zn Cu-zinc.
- the first plating layer 12 is a barrier layer that suppresses a solid phase reaction that is likely to occur between the base material 11 and the second plating layer 13, the third plating layer 14, and the fourth plating layer 15 that are the surface plating film.
- the thickness is appropriately set within a range of 0.3 ⁇ m to 2 ⁇ m, for example.
- the second plating layer 13 is made of Au or an Au-based alloy that is electrodeposited by an electrolytic plating method such as flash Au plating.
- the Au-based alloy include an Au—Co alloy containing a trace amount of cobalt (Co), an Au—Ni alloy, an Au—Pd alloy, an Au—Ag alloy, and an Au—Sn alloy.
- the thickness of the second plating layer 13 is less than 0.05 ⁇ m, peeling between the first plating layer 12 and the third plating layer 14 is likely to occur. Further, when the thickness exceeds 0.30 ⁇ m, the reliability of the solder joint of the terminal portion 10b with the land or the like of the test board is lowered. Therefore, it is desirable to set the thickness of the second plating layer 13 in the range of 0.05 ⁇ m to 0.30 ⁇ m as in this embodiment.
- the third plating layer 14 is formed, for example, by pure Pd or Pd—Ni alloy based on Pd, electrolytic plating of Pd—In alloy, or electroless plating.
- the Pd plating layer may contain a small amount of other inevitable impurities.
- the inevitable impurities are a trace amount of hydrogen element, oxygen element, metal element and the like mixed in the above-described electrolytic plating.
- the thickness of the third plating layer 14 is appropriately set within a range of 1 ⁇ m to 2 ⁇ m, for example.
- the fourth plating layer 15 is formed by electrolytic plating or electroless plating of pure Ag or Ag—Sb alloy, Ag—Se alloy, Ag—Au alloy, Ag—Sn alloy, etc. based on Ag.
- the fourth plating layer may contain a trace amount of inevitable impurities as described above.
- the thickness of the fourth plating layer 15 is appropriately set within a range of 1 ⁇ m to 2 ⁇ m, for example.
- the third and fourth plating layers may be provided only on the contact tops that are in direct contact with the lead of the subject. However, the third and fourth plating layers extend to the side part leading to the spring part 10c to increase the lamination area with the second plating layer. It is preferable to prevent the possibility of peeling.
- the required number of electrical test contacts 10 are mounted in an IC socket as shown in FIGS.
- the main part of the IC socket will be described below.
- an IC package in the form of, for example, QFP (Quad Flat Package) which is a surface mount type is mounted.
- Tin (Sn) -based solder is formed on the lead surface of the IC package.
- the IC socket has a substantially rectangular parallelepiped shape, and includes a socket substrate 21, a cover 22, a large number of electrical test contacts 10 and the like.
- the socket substrate 21 includes a positioning base 24 on which an IC package 23 assembled as a QFP is placed, a pedestal 25 detachable with respect to the socket substrate 21, and the like.
- a large number of gull-wing leads 23a extend from the four sides.
- the positioning table 24 is provided with an outer peripheral wall 24a on the outer periphery thereof so as to accommodate the main body of the IC package 23.
- a large number of gull wing-type leads 23a get over the outer peripheral wall 24a, and their tips can be elastically contacted with the contact portion 10a of the electrical test contact 10 as will be described later.
- a large number of electrical test contacts 10 are arranged along the outer periphery of the positioning table 24 so that the contact portions 10a surround the outer peripheral wall 24a.
- the electrical test contact 10 is fixed by fitting the fixing portion 10e into the through hole 26 penetrating from the inner bottom surface 26a of the socket substrate 21 to the outer bottom surface 26b, and the support portion 10d is fixed to the inner bottom surface 26a. Supported.
- a contact separation partition 27 is provided in a gap between the adjacent electrical test contacts 10.
- the contact separation partition 27 is disposed so that the curved portions of the adjacent spring portions 10c do not contact each other.
- Each spring portion 10c is elastically deformed in the direction of the load applied from a lead (described later) of the IC package 23, that is, the vertical direction in FIG.
- each terminal portion 10b is converted from the outer bottom surface 26b of the socket substrate 21 so as to be easily mounted on the test substrate, and extends into a plurality of rows.
- a large number of electrical test contacts 10 are used which have different branching positions of the fixing portion 10e branched from the support portion 10d so that the terminal portions 10b can be two-dimensionally arranged in a plurality of rows.
- the terminal portions 10b that are two-dimensionally arranged in a plurality of rows are soldered to wiring terminals of a test board, which will be described later.
- the cover 22 is pivotally attached to one end of the socket substrate 21 so as to close the socket substrate 21 from above. Further, the cover 22 is provided with four lead pressing walls 28 for pressing the gull-wing leads 23a of the IC package 23 from above at appropriate positions on the lower surface thereof. Then, a latch mechanism 29 is provided in one end region of the cover 22, preferably one end region facing the pivoted end of the cover 22, and the electrical test contact by the solid lid of the socket substrate 21, particularly the lead holding wall 28. Thus, the lead 23a can be reliably pressed against the ten contact portions 10a. In this way, the IC package 23 is mounted on the IC socket as shown in FIGS. 3 and 4 and used for, for example, a burn-in test.
- a large number of the above-described IC sockets are attached to a test board used for, for example, a burn-in test.
- the terminal portion 10 b of the electrical test contact 10 incorporated in each IC socket is soldered to the test board 16 by, for example, flow solder 17.
- the test board 16 is connected to the land or the like (not shown). Further, the contact portion 10a comes into contact with the corresponding gull wing type lead 23a pressed by the lead pressing wall 28, and is displaced in the pressing direction (downward) by the spring portion 10c.
- the solder used for soldering the terminal portion 10b is lead-free eutectic solder, for example, Sn-zinc (Zn) solder, Sn-Cu solder, Sn-Ag solder, Sn-bismuth (Bi). ) System solder or the like is used.
- the first plating layer 12 on the surface of the terminal portion 10b forms an alloy layer with the flow solder 17, and can be soldered to a land or the like of the test board 16.
- the second plating layer 13 may be thin enough to prevent the oxidation of Ni of the first plating layer 12 as described above.
- the contact portion 10a makes elastic contact with the solder plating layer formed on the surface of the gull-wing lead 23a by the biasing force of the spring portion 10c acting upward according to the downward displacement.
- the IC 23 is inspected at a high temperature of about 125 ° C., for example.
- the effect of the electrical test contact 10 in the burn-in test will be described.
- the third plating film 14 made of Pd or Pd base alloy covering the second plating layer 13 and the first plating made of Ag or Ag base alloy.
- Four plating films 15 are formed by laminating in this order. Then, due to the elastic contact between the electrical test contact 10 and the gull-wing lead 23a, as shown in FIG. 6B, the fourth plating layer 15 comes into contact with the Sn-based solder layer 18 of the lead 23a.
- the surface plating film is made of Au or an Au alloy as described in Patent Document 1
- the Au element is locally taken into the Sn-based solder layer 18 side of the IC terminal of the specimen.
- a metallurgical reaction of the solder with Sn occurs.
- Ni of a base plating layer comes to be exposed locally, it reacts with oxygen in air, and is oxidized.
- This Ni oxide is an insulator. Due to the generation of such Ni oxide, the contact resistance value of the electrical test contact has risen early. For this reason, it has been difficult to extend the life of electrical test contacts.
- the Sn element in the Sn-based solder layer 18 passes through the fourth plating layer 15, The third plating layer 14 is occluded.
- the Sn oxide is reduced, only the Sn element is occluded in the third plating layer 14, and oxygen is diffused to the outside.
- the burn-in test is repeated, the Sn element in the third plating layer 14 increases, and the third plating layer 14 becomes the third alloy plating layer 14a in which Pd and Sn are mixed, and the volume increases.
- Pd and Sn form a solid solution or an intermetallic compound.
- the fourth plating layer 15 has a function of diffusing Sn element but preventing diffusion of Pd element into the third plating layer 14.
- the third plating mixed layer 15 a in which the Sn element is slightly dissolved in the fourth plating layer 15 is obtained.
- the fourth plating mixed layer 15 a is not bonded to the Sn-based solder layer 18. Further, the solder does not adhere to the surface of the fourth plating mixed layer 15a. Therefore, when each burn-in test is completed, the fourth plating mixed layer 15a and the Sn-based solder layer 18 are separated from each other without peeling damage.
- the second plating layer 13 has a function of preventing the third plating layer 14 from peeling off.
- peeling occurs between them. easy. Furthermore, if the number of repetitions of the burn-in test increases, peeling due to an increase in volume of the third plating layer 14 also occurs. Since the second plating layer 13 is softer than the first plating layer 12, the third plating layer 14, and the third plating mixed layer 14a, the above-described peeling is prevented by the action of stress relaxation.
- the generation of Ni oxide or the adhesion of solder oxide (for example, Sn oxide), which has occurred in the prior art, is less likely to occur.
- the life of the electrical test contact can be extended.
- the third plating layer 14 and the fourth plating layer 15 are laminated by electrodeposition partially on the electrical test contact 10, that is, only on the contact portion 10a, and are not formed on the spring portion 10c. For this reason, it becomes easy to ensure a sufficient clearance for the contact separating partition 27 of the electrical test contact 10. And the elastic deformation to the up-down direction of the spring part 10c is fully ensured, and the required elastic contact with the IC terminal of the contact part 10a is ensured. This will be described with reference to FIG. FIG. 7 is an enlarged view obliquely downward from above the contact separation partition wall shown in FIG.
- a large number of electrical test contacts 10 must be separated from each other by, for example, the spring portions 10 c by the contact separation partition 27 so as not to contact each other.
- the effect of the electrical test contact 10 in the burn-in test becomes more prominent as the third plating layer 14 and the fourth plating layer 15 become thicker.
- the third plating layer 14 and the fourth plating layer 15 are not formed on the spring portion 10c, contact separation is performed while the third plating layer 14 and the fourth plating layer 15 are formed to have a preferable thickness.
- the clearance L between the partition walls 27 can be secured. For this reason, it becomes possible to arrange a large number of electrical test contacts 10 close to each other in accordance with the increase in the number of pins of IC terminals or the decrease in pitch.
- the third plating layer 14 and the fourth plating layer 15 are partially electrodeposited on the electrical test contact 10 and are not formed on the terminal portion 10b.
- the terminal portion 10b is mainly formed by soldering the first plating layer 12 and the second plating layer 13 on the surface of the base material 11 to form a flow solder 17 and an alloy layer to a through hole or the like of the test board 16. is doing. For this reason, in the burn-in test, no decrease in the bonding strength occurs.
- the solder bonding with the land of the test board 16 is performed with the flow solder 17 and the like.
- the bonding strength tends to be lower than in the case of solder bonding using an alloy layer with the first plating layer 12 containing Ni and the second plating layer 13 containing Au (the burn-in test). Even if not, the bonding strength tends to be low). Further, this decrease in strength becomes significant when the burn-in test is performed.
- the third plating layer 14 and the fourth plating layer 15 are partially formed in the region above the contact portion 10a including the side portion of the contact portion 10a as shown in FIG. 1 or FIG.
- the present invention is not limited to this.
- the third plating layer 14 and the fourth plating layer 15 may be formed only on the upper end surface of the contact portion 10a. That is, the region where the third plating layer 14 and the fourth plating layer 15 are formed may be limited to a portion of the contact portion 10a that substantially contacts the IC terminal.
- the electrical test contact 30 is a contact pin that is substantially linear in the vertical direction.
- the upper end in FIG. 8 becomes the contact portion 30 a that contacts the IC terminal
- the lower end becomes the terminal portion 30 b that is soldered to the test board 16 by the flow solder 17.
- a spring portion 30c that is elastically deformed in the lateral direction with respect to the longitudinal direction of the contact 30 and a support portion 30e that is supported and fixed by the IC socket are formed.
- the IC socket in this case may be modified so that the configuration described with reference to FIGS.
- the spring portion 30c with one end of the contact portion 30a is made of a base material of two elongated elastic contact pieces, and the other end is integrally joined to a tough needle-like support portion 30e. And the needle-shaped support part 30e is made into the base end, and the front-end
- the contact of the spring portion 30c of the adjacent electrical test contact 30 is It is determined not to occur.
- the entire portion described above is formed on the surface of the substrate 11 with the first plating layer 12 made of Ni or a Ni-based alloy, and the thin Au Alternatively, the second plating layer 13 made of an Au base alloy is sequentially formed. Then, in the contact portion 30a that contacts the BGA solder ball 23b described in the prior art, the second plating layer 13 is further made of a third plating layer 14 made of Pd or a Pd-based alloy and Ag or an Ag-based alloy.
- the fourth plating layer 15 is formed by sequentially laminating. Furthermore, a known discoloration prevention process may be performed.
- the electrical test contacts 40 and 50 are contact pins attached to the IC socket, but are not soldered to the test board 16.
- the electrical test contact 40 shown in FIG. 9A is made of a base material 41 formed by punching a thin plate, and its upper end in FIG. 9A is a first contact portion 40a that elastically contacts the IC terminal, and its lower end is a test board. It becomes the 2nd contact part 40b which elastically contacts 16 lands.
- the first contact part 40a is connected to the fixed part 40e through the first spring part 40c, and the second contact part 40b is connected to the fixed part 40e through the second spring part 40f.
- the electrical test contact 40 is fixed at a predetermined position in the IC socket to be attached by the fixing portion 40e.
- the configuration described with reference to FIGS. 3 and 4 may be changed so as to be compatible with the electrical test contact 40 according to the present embodiment.
- the entire portion described above is formed on the surface of the base 11 with the first plating layer 12 made of Ni or a Ni-based alloy, and the thin Au Alternatively, the second plating layer 13 made of an Au alloy is sequentially applied. Further, for example, only on the first contact portion 40a that contacts a solder bump (not shown) of the IC 23 that is a bare chip, for example, on the upper end that is a portion above the dotted line in the drawing, as an upper layer of the second plating layer 13 A third plating layer 14 made of Pd or a Pd-based alloy and a fourth plating layer 15 made of Ag or an Ag-based alloy are sequentially laminated. Furthermore, a known discoloration prevention process may be performed.
- the second contact portion 40b that contacts the land of the test board 16 for example, selectively at the lower end that is a portion below the dotted line in the drawing, Au or an Au-based alloy is further formed on the second plating layer 13.
- An additional plating layer is formed. In this region, the thickness of the second plating layer 13 is, for example, about 0.2 ⁇ m to 1 ⁇ m.
- the electrical test contact 50 shown in FIG. 9B is a contact pin extending linearly in the vertical direction of the figure.
- a barrel 50e includes a first plunger 50b serving as a first contact portion 50a whose upper end contacts the IC terminal and a second plunger 50d serving as a second contact portion 50c whose lower end contacts a land of the test board.
- the first plunger 50b and the second plunger 50d are biased in a direction protruding from the barrel 50e, that is, upward and downward, via a coil spring (not shown) in the barrel 50e.
- the electrical test contact 50 is attached to an IC socket in which the configuration described with reference to FIGS. 3 and 4 is changed to be compatible with the present embodiment.
- These plungers are made of a base material formed by cutting a metal rod, for example.
- the entire portion described above is formed on the surface of the base 11 with the first plating layer 12 made of Ni or a Ni-based alloy, and the thin Au Or it becomes the structure where the 2nd plating layer 13 which consists of Au alloy was given one by one.
- the first contact portion 50a that contacts the BGA solder ball 23b of the IC 23 assembled in the CSP for example, selectively on the upper part from the dotted line in the drawing, Pd or further as the upper layer of the second plating layer 13
- a third plating layer 14 made of a Pd-based alloy and a fourth plating layer 15 made of Ag or an Ag-based alloy are sequentially laminated.
- a known discoloration prevention process may be performed.
- the tip of the first contact portion 50a is preferably formed in a triangular groove shape having an angle of approximately 90 degrees so that the contact with the solder ball 23b is good.
- the second contact part 50c that contacts the land of the test board 16 or the like for example, selectively at the lower end that is a part below the dotted line, Au or an Au-based alloy is further formed on the second plating layer 13.
- An additional plating layer is formed.
- the thickness of the second plating layer 13 is, for example, about 0.2 ⁇ m to 1 ⁇ m.
- the base layer 11 may be exposed without forming a plating layer on the surface of the barrel 50e.
- the electrical test contacts according to the above-described embodiments have the form of contact pins attached to the IC socket, but may have the form of contact probes described in the background art section.
- Such an electrical test contact is suitably used in the so-called wafer level burn-in of a wafer level CSP in addition to the BGA and CSP described above.
- the contact which is one end of the contact probe is configured to elastically contact a solder bump made of, for example, Sn alloy solder of the IC chip of the subject arranged on the wafer. Then, the base end of the contact probe is electrically connected to, for example, a land of a prober probe card via a jumper wire or the like.
- the entire portion of the contact probe is made of the first plating layer 12 made of Ni or Ni-based alloy and the thin Au or Au alloy on the surface of the base material 11 made of a metal material.
- the second plating layer 13 is sequentially applied.
- a contact that contacts the solder bumps of the IC chip is selectively provided on the second plating layer 13 with a third plating layer 14 made of Pd or a Pd-based alloy and a fourth plating made of Ag or an Ag-based alloy.
- the layers 15 are formed by sequentially laminating. Furthermore, a known discoloration prevention process may be performed.
- the base end side of the contact probe is soldered to, for example, a jumper wire by lead-free solder.
- the part of the contact for electrical test excluding the end may be in a form in which only the first plating layer 12 is formed on the surface of the substrate 11.
- the surface of the first plating layer 12 made of Ni on the portion is slightly oxidized.
- part in an electrical test contact may arise, such a problem can be avoided by selecting the metal material of the base material 11 suitably.
- the electrical test contact of the present embodiment enables a stable and long life in an IC energization test under a high temperature environment such as a burn-in test and an accelerated stress test.
- a large number of repeated contacts and separations with the subject for the current test can be stably performed with high reliability.
- the frequency of replacement of the electrical test contact, its mounting IC socket, probe head, etc. is reduced.
- the amount of expensive Au metal used for electrical test contacts is greatly reduced.
- the manufacturing method of the electrical test contact of this embodiment is simplified. In this way, cost reduction of the electrical test contact is facilitated. This becomes prominent when the number of IC terminals is increased or the pitch is reduced.
- the present invention is similarly applied to an electrical test contact such as a spring probe used in wafer level burn-in, for example.
- the electrical test contact is useful not only for energization inspection in a high temperature environment but also for energization inspection of electronic components such as ICs at room temperature.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
- Connecting Device With Holders (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014522640A JP6006793B2 (ja) | 2012-06-25 | 2013-06-25 | 電気テスト用コンタクトおよびそれを用いた電気テスト用ソケット |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012142339 | 2012-06-25 | ||
| JP2012-142339 | 2012-06-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2014003003A1 true WO2014003003A1 (fr) | 2014-01-03 |
Family
ID=49783149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2013/067388 Ceased WO2014003003A1 (fr) | 2012-06-25 | 2013-06-25 | Contact d'essai électrique et alvéole d'essai électrique l'utilisant |
Country Status (2)
| Country | Link |
|---|---|
| JP (2) | JP6006793B2 (fr) |
| WO (1) | WO2014003003A1 (fr) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014148365A1 (fr) * | 2013-03-21 | 2014-09-25 | 株式会社エンプラス | Connecteur électrique et douille pour composant électrique |
| WO2017178105A1 (fr) * | 2016-04-13 | 2017-10-19 | Rosenberger Hochfrequenztechnik Gmbh & Co. Kg | Broche de contact et socle de test muni de broches de contact |
| US20190165504A1 (en) * | 2016-06-17 | 2019-05-30 | Kyocera Corporation | Connector |
| CN112924726A (zh) * | 2021-01-21 | 2021-06-08 | 昆仑伟思微电子(珠海)有限公司 | 一种测试装置 |
| CN113078079A (zh) * | 2020-03-26 | 2021-07-06 | Tse有限公司 | 半导体封装的测试装置 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6221031B1 (ja) * | 2016-12-16 | 2017-11-01 | 日本電産リード株式会社 | コンタクトプローブ及び電気接続治具 |
| JP7005939B2 (ja) | 2017-05-25 | 2022-01-24 | 日本電産リード株式会社 | コンタクトプローブ |
| KR102519846B1 (ko) * | 2020-03-26 | 2023-04-11 | (주)티에스이 | 반도체 패키지의 테스트 장치 |
| KR102606892B1 (ko) * | 2021-06-15 | 2023-11-29 | (주)포인트엔지니어링 | 검사 소켓용 지지 플레이트, 검사 소켓용 소켓핀 및 이들을 구비하는 검사 소켓 |
| JP7644366B2 (ja) * | 2022-07-12 | 2025-03-12 | 山一電機株式会社 | コンタクトピン及び検査用ソケット |
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| JPH09232057A (ja) * | 1996-08-07 | 1997-09-05 | Enplas Corp | Icソケット |
| WO2007034921A1 (fr) * | 2005-09-22 | 2007-03-29 | Enplas Corporation | Contact électrique et prise de composant électrique |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007271343A (ja) * | 2006-03-30 | 2007-10-18 | Sumitomo Electric Ind Ltd | コンタクトプローブおよびその製造方法 |
| JP2008063415A (ja) * | 2006-09-06 | 2008-03-21 | Sumitomo Electric Ind Ltd | 多孔質樹脂材料,その形成方法,積層シート体および検査ユニット |
| JP5289710B2 (ja) * | 2007-01-18 | 2013-09-11 | 富士フイルム株式会社 | 圧電素子及びインクジェットヘッド |
| JP5245772B2 (ja) * | 2008-12-01 | 2013-07-24 | 日立電線株式会社 | 表面処理金属材およびその製造方法 |
| TW201114114A (en) * | 2009-10-14 | 2011-04-16 | Hon Hai Prec Ind Co Ltd | Electrical connector contact and electroplating method thereof |
-
2013
- 2013-06-25 JP JP2014522640A patent/JP6006793B2/ja active Active
- 2013-06-25 WO PCT/JP2013/067388 patent/WO2014003003A1/fr not_active Ceased
-
2016
- 2016-06-06 JP JP2016112968A patent/JP6241502B2/ja active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09232057A (ja) * | 1996-08-07 | 1997-09-05 | Enplas Corp | Icソケット |
| WO2007034921A1 (fr) * | 2005-09-22 | 2007-03-29 | Enplas Corporation | Contact électrique et prise de composant électrique |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014148365A1 (fr) * | 2013-03-21 | 2014-09-25 | 株式会社エンプラス | Connecteur électrique et douille pour composant électrique |
| WO2017178105A1 (fr) * | 2016-04-13 | 2017-10-19 | Rosenberger Hochfrequenztechnik Gmbh & Co. Kg | Broche de contact et socle de test muni de broches de contact |
| CN109416374A (zh) * | 2016-04-13 | 2019-03-01 | 罗森伯格高频技术有限及两合公司 | 触针和具有触针的测试基座 |
| CN109416374B (zh) * | 2016-04-13 | 2020-02-04 | 罗森伯格高频技术有限及两合公司 | 触针和具有触针的测试基座 |
| US10641793B2 (en) | 2016-04-13 | 2020-05-05 | Rosenberger Hochfrequenztechnik Gmbh | Contact pin and test base having contact pins |
| US20190165504A1 (en) * | 2016-06-17 | 2019-05-30 | Kyocera Corporation | Connector |
| US10741948B2 (en) * | 2016-06-17 | 2020-08-11 | Kyocera Corporation | Connector capable of suppressing solder rising and flux rising |
| CN113078079A (zh) * | 2020-03-26 | 2021-07-06 | Tse有限公司 | 半导体封装的测试装置 |
| CN113078079B (zh) * | 2020-03-26 | 2023-09-22 | Tse有限公司 | 半导体封装的测试装置 |
| CN112924726A (zh) * | 2021-01-21 | 2021-06-08 | 昆仑伟思微电子(珠海)有限公司 | 一种测试装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP6241502B2 (ja) | 2017-12-06 |
| JP6006793B2 (ja) | 2016-10-12 |
| JPWO2014003003A1 (ja) | 2016-06-02 |
| JP2016166899A (ja) | 2016-09-15 |
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