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WO2012165111A1 - Procédé de production d'un substrat multicouche et substrat multicouche - Google Patents

Procédé de production d'un substrat multicouche et substrat multicouche Download PDF

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Publication number
WO2012165111A1
WO2012165111A1 PCT/JP2012/061871 JP2012061871W WO2012165111A1 WO 2012165111 A1 WO2012165111 A1 WO 2012165111A1 JP 2012061871 W JP2012061871 W JP 2012061871W WO 2012165111 A1 WO2012165111 A1 WO 2012165111A1
Authority
WO
WIPO (PCT)
Prior art keywords
core
substrate
resin layer
main
suppressing member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2012/061871
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English (en)
Japanese (ja)
Inventor
大坪喜人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Publication of WO2012165111A1 publication Critical patent/WO2012165111A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H10W74/114
    • H10W42/121
    • H10W90/701
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • H10W72/0198
    • H10W72/07236
    • H10W72/252
    • H10W90/724

Definitions

  • the present invention relates to a multilayer substrate manufacturing method and a multilayer substrate manufactured by the multilayer substrate manufacturing method, and more specifically, a predetermined main surface of a core substrate on which a surface mount component is mounted is sealed with a sealing resin layer.
  • the present invention relates to a method for manufacturing a multilayer substrate having the above structure and a multilayer substrate including a sealing resin layer manufactured by the manufacturing method.
  • a multilayer board having a configuration as shown in FIG. 16 has been proposed as one of the multilayer boards.
  • this multilayer substrate has a core substrate (ceramic multilayer substrate) 110 composed of a plurality of laminated ceramic layers, and an active chip component 140 such as a semiconductor device is arranged on one main surface.
  • a passive chip component 150 such as a capacitor is disposed on the other main surface.
  • resin layers 120 and 130 for sealing are formed on both main surfaces of the core substrate (ceramic multilayer substrate) 110, and surface electrodes 121 and via conductors 122 are formed on the resin layer 130 on the lower surface side. ing.
  • the resin is cured when the resin layers 120 and 130 are formed.
  • warpage occurs in the core substrate 110 due to the difference in expansion and contraction rate between the core substrate 110 and the resin layers 120 and 130, and the mounting reliability when the multilayer substrate is mounted on a module substrate or the like is reduced.
  • the conductor disposed on the multilayer substrate may be disconnected.
  • peeling may occur between the core substrate 110 and the resin layers 120 and 130 due to thermal stress between the core substrate 110 and the resin layers 120 and 130.
  • This invention solves the said subject, and suppresses that a curvature arises in the hardening process of a resin layer, when manufacturing the multilayer substrate provided with the resin layer for sealing in at least one main surface. It is an object to provide a multilayer substrate manufacturing method capable of reliably manufacturing a highly reliable multilayer substrate, and a highly reliable multilayer substrate without warping manufactured by the method .
  • a method for producing a multilayer substrate of the present invention includes: A mounting step of mounting a surface mounting component on at least one main surface of the core parent substrate to be divided into a plurality of core individual substrates constituting individual multi-layer substrates; and the surface on both main surfaces of the core parent substrate
  • a mounting component is mounted on at least one main surface, and when a surface mounting component is mounted on one main surface of the core mother board, on the main surface on which the surface mounting component is mounted,
  • a resin layer forming step of forming a semi-cured resin layer A warpage suppressing member for suppressing the occurrence of warpage of each core substrate included in the core parent substrate in the step of curing the resin layer in the semi-cured state, wherein a main part is divided into the following core parent substrate Covering at least part of the upper surface and side surfaces of the resin layer provided in the core unit substrate obtained by dividing the core parent substrate in the process, and connecting to each core unit substrate included in the core parent substrate at least in one place;
  • covering at least part of the upper surface and side surfaces of the resin layer included in the core substrate means that the warpage suppressing member is disposed so as to be in contact with the upper surface and side surfaces of the resin layer, It is a concept including a case where it is arranged so as to bite into the upper surface and side surface of the layer.
  • the warpage suppressing member covers at least a part of an upper surface and side surfaces of a resin layer included in a core substrate obtained by dividing the core mother substrate in the core mother substrate dividing step. And at least two locations that are in a positional relationship such that the main part is interposed therebetween, and is configured to be connected and fixed to each core individual substrate included in the core parent substrate.
  • the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
  • the surface-mounted component is mounted on both main surfaces of the core mother board, and the semi-cured resin layer is formed on both main faces of the core mother board.
  • the warpage suppressing member may be disposed on one main surface side of the core parent substrate, or may be disposed on both sides of one main surface and the other main surface. Good.
  • the core master substrate reaches the core master substrate from the semi-cured resin layer side as a dividing groove for dividing the core master substrate into the core individual substrates.
  • a groove is formed, and the at least one portion of the warp suppressing member is connected and fixed to a predetermined portion of each core substrate of the core parent substrate through the dividing groove. Is preferred.
  • the groove reaching the core mother board from the semi-cured resin layer side penetrates the semi-cured resin layer and reaches the surface of the core mother board, but the core mother board has a groove.
  • the groove penetrates the semi-cured resin layer and further reaches the middle position in the thickness direction of the core mother board. This includes the case where a groove is formed in the core parent substrate.
  • the warp suppressing member when the semi-cured resin layer is fully cured in a state where the warp suppressing member is not disposed, the warp such that one of the main surfaces of the core parent substrate is a concave surface and the other is a convex surface. When this occurs, it is preferable to dispose the warp suppressing member on the main surface side which is the concave surface of the core mother board. By providing such a configuration, it is possible to efficiently prevent the occurrence of warpage.
  • the semi-cured resin layer is formed on both main surfaces of the core parent substrate, and there is a difference in thickness between the resin layers on both main surfaces, the semi-cured resin layer is thick. It is preferable to arrange the warpage suppressing member on the main surface side on which is disposed. By providing this configuration, it is possible to efficiently prevent warping.
  • the multilayer substrate of the present invention is Core substrate, A surface mount component mounted on at least one main surface of the core substrate; When the surface mount components are mounted on both main surfaces of the core substrate, at least one main surface of the core substrate and the surface mount components mounted on the main surface are sealed, and When the surface mount component is mounted on one main surface of the core substrate, the main surface and the resin layer disposed so as to seal the surface mount component mounted on the main surface
  • a warpage suppressing member having a main portion covering at least a part of the upper surface and side surfaces of the resin layer, and arranged to bite into the resin layer, and connected and fixed to the core substrate at at least one place; It is characterized by comprising.
  • the warpage suppressing member is disposed so that the main portion covers at least a part of the upper surface and the side surface of the resin layer, and at least two positions in which the main portion is interposed therebetween It is preferable to be connected and fixed to the core substrate.
  • the core substrate can be reliably fixed via the resin layer, and the occurrence of warpage can be more reliably prevented.
  • the warp suppressing member is made of a metal material.
  • the warp suppressing member covers a large area of the resin layer.
  • the improvement of heat dissipation performance can be anticipated by using what was formed from the metal material as a curvature suppression member.
  • the warpage suppressing member is made of a resin material harder than the resin constituting the resin layer.
  • the present invention can be more effectively realized by using a warp suppressing member suitable for use conditions by widening the choice of the constituent material of the warp suppressing member.
  • the method for producing a multilayer substrate of the present invention includes forming a semi-cured resin layer on a predetermined main surface on which surface-mounted components are mounted, and including the semi-cured resin layer in the core parent substrate in a step of curing the semi-cured resin layer.
  • the multilayer substrate of the present invention includes a core substrate, a surface mount component mounted on the core substrate, a resin layer disposed on a predetermined main surface on which the surface mount component of the core substrate is mounted,
  • the warpage suppressing member is arranged such that the main portion covers at least a part of the upper surface (main surface) and the side surface of the resin layer, and is inserted into the resin layer, and is connected and fixed to the core substrate at least at one place. Therefore, it is possible to provide a highly reliable multilayer substrate with less warpage.
  • FIG. 1 It is a front sectional view showing the composition of the multilayer substrate concerning one example (example 1) of the present invention. It is a perspective view which shows the multilayer substrate concerning Example 1 of this invention. It is principal part sectional drawing explaining the arrangement
  • FIG. 1 is a front sectional view showing the structure of a multilayer substrate according to one embodiment (Example 1) of the present invention
  • FIG. 2 is a perspective view
  • FIG. 3 is a cross-sectional view of an essential part for explaining the arrangement of the warp suppressing member.
  • the multilayer substrate A includes a core substrate 1 and a surface mount component (for example, a semiconductor device) that is flip-chip mounted on one main surface 1a of the core substrate.
  • Active chip component for example, a semiconductor device
  • a surface-mounted component for example, a passive chip component such as a capacitor
  • solder 4 solder 4 to the main surface 1b of the core substrate 1
  • the terminal 5 is disposed so as to seal the one and the other main surfaces 1a and 1b of the core substrate 1 and the surface-mounted components 2a and 2b disposed on both the main surfaces 1a and 1b.
  • the resin layers 11 and 12 intersect with the central portion of the main surface 11a of the resin layer 11 on the upper surface side, and the four tip portions 3b of the portion that wraps around the side surface 11b from the main surface 11a of the resin layer are the core substrate 1 Connected and fixed to the warpage suppressing member It is provided with a door. Note that the end face of the straight terminal 5 is exposed so that it can be connected to the outside.
  • the warp suppressing member 3 is made of a long and thin metal plate material, has a cross-shaped planar shape, and has a structure in which the tip side is bent downward.
  • the main portion 3a is positioned so as to cover the main surface 11a and the side surface 11b of the resin layer 11, and the main portion 3a is interposed therebetween.
  • Four locations (tip portions) 3b are connected and fixed to the core substrate 1.
  • it is bonded to a ground electrode, a warp suppressing member fixing electrode or the like formed on the core substrate 1 by a bonding material such as solder.
  • the warp suppressing member 3 is disposed so as to bite into the resin layer 11, and the surface of the resin layer 11 is formed flat even at a portion where the warp suppressing member 3 is disposed. Has been. Therefore, the multilayer substrate A can be chucked (held) from the upper surface side by a vacuum suction method.
  • the core parent substrate 10 is prepared.
  • a plurality of ceramic layers are laminated, and a ceramic substrate (via hole conductor for interlayer connection of internal conductors and internal conductors for forming necessary circuits) A multilayer ceramic substrate) is used.
  • This ceramic substrate is, for example, a ceramic green sheet having an inner conductor pattern formed on the surface by a method such as screen printing, or a via hole conductor for interlayer connection by filling a conductor after forming a through hole.
  • a ceramic green sheet having a conductive layer, a ceramic green sheet for an outer layer in which no conductor pattern is formed, and the like are appropriately combined, laminated in a predetermined order, pressed, and then fired.
  • the surface electrode for mounting the surface mount component or connecting the straight terminal may be formed after firing.
  • the conductor pattern is previously formed on the ceramic green sheet for the outer layer constituting the ceramic substrate. It is also possible to form the surface electrode at the same time in the step of firing the whole.
  • LTCC Low Temperature Co-fired Ceramic
  • the substrate that can be used as the core parent substrate 10 is not limited to a ceramic substrate, and a resin substrate or the like can also be used.
  • a surface mount component (in this embodiment, for example, for example, on one main surface 10a and the other main surface 10b of the core mother board 10).
  • a passive chip component such as a capacitor 2b is mounted by a method such as solder mounting.
  • the straight terminal 5 is connected to the other main surface 10b of the core parent substrate 10 by the solder 4 (see FIG. 5).
  • the resin layer 12 is disposed on the other main surface 10 b side of the core parent substrate 10 and is semi-cured.
  • the material for forming the resin layer for example, a liquid epoxy resin in which an inorganic filler such as Al 2 O 3 , SiO 2 , or TiO 2 is mixed is used.
  • the resin layer is fully cured at 150 ° for 60 minutes.
  • a phenol resin, a cyanate resin, or the like can be used as the resin for forming the resin layer, in addition to the epoxy resin. Further, a solid resin may be used instead of the liquid epoxy resin.
  • a surface mount component (an active chip component such as a semiconductor device in this embodiment) 2a is provided on the main surface (one main surface) 10a on the opposite side of the core mother substrate 10. Flip chip mounting.
  • the resin layer 11 is disposed on one main surface 10a side of the core mother substrate 10 and semi-cured.
  • the material for forming the resin layer the same material as that used for forming the resin layer 12 described above is used, and the resin layer 11 is formed by the same method and semi-cured.
  • the dividing grooves 6 for dividing the core parent substrate 10 into the core individual substrates 1 are formed.
  • the dividing grooves 6 are formed by laser processing so as to reach the surface of the core mother substrate 10 from the semi-cured resin layer 11 side, and also reach the surface of the core mother substrate 10 from the resin layer 12 side.
  • the tip 3b of the warpage suppressing member 3 is connected to the surface of the core parent substrate (core individual substrate) exposed at the bottom surface of the dividing groove 6 by a bonding material such as solder.
  • a joint such as an electrode to be fixed (a ground electrode or a warp suppressing member fixing electrode) is disposed.
  • the dividing groove 6 extends to the surface of the core parent substrate 10 in order to prevent the core parent substrate 10 from being divided during the manufacturing process.
  • the core parent substrate 10 is thick and difficult to divide, it is desirable to prevent the core parent substrate 10 from entering the core parent substrate 10 in the thickness direction. It is desirable to form the dividing grooves 6 so as to reach a certain depth halfway.
  • a warp suppressing member 3 for suppressing the occurrence of warpage is provided.
  • a warpage suppressing member 3 made of a metal material, which has a structure in which the planar shape is a cross shape and the front end side of each side is bent downward is provided.
  • the main portion 3a is obtained by dividing the core mother board 10 in the core mother board dividing step described later.
  • (Tip portion) 3b (see FIGS. 1, 2, and 4) is connected to a ground electrode or a warp suppressing member fixing electrode provided on the core mother substrate 10 via a bonding material such as solder or conductive adhesive. , Fix.
  • the metal warpage suppressing member 3 is electrically and mechanically connected and fixed to the ground electrode provided on the core parent substrate 10 using a conductive bonding material such as solder or conductive adhesive. In this case, the warp suppressing member 3 can exert a shielding effect. In addition, when it is not necessary to expect a shielding effect, it is also possible to use a bonding material having no conductivity as a bonding material for connecting and fixing the warpage suppressing member 3 to the core substrate 1.
  • tip part 3b of the curvature suppression member 3 using joining materials, such as a solder and a conductive adhesive it is necessary to use a metal material having a melting point higher than the thermosetting temperature when the resin layers 11 and 12 of (9) are fully cured (in this embodiment, the resin layers 11 and 12 are fully cured by thermosetting). It is. Therefore, although depending on specific conditions in the manufacturing process, it is usually desirable to use copper, aluminum, iron, or an alloy containing at least one of them as the metal material. It is also possible to use a material having the above material as a base material and a plating film on the surface.
  • the metal wire with a circular cross-sectional shape which consists of said material as a constituent material of the curvature suppression member 3, it is usually desirable to use a thing with a diameter of 0.05 mm or more.
  • a soft metal material having a low melting point, such as Sn, Pb, Zn, or the like used for the solder material is not preferable as a constituent material of the warp suppressing member 3.
  • the core parent substrate 10 is placed in an oven and heated to a predetermined temperature, whereby the semi-cured resin layers 11 and 12 are fully cured.
  • the main curing of the resin layers 11 and 12 is performed at 150 ° for 60 minutes.
  • the core parent substrate 10 is divided into individual core substrates 1 along the dividing grooves 6. As a result, a multilayer substrate A having the structure shown in FIGS. 1 to 3 is obtained.
  • the specific steps that is, the steps (1) to (9) may be switched in order.
  • the steps (1) to (9) above are performed.
  • Simultaneous progression, (7), (8), (9) (1), (2), (3), (5), (8), (4) and (6) can be performed simultaneously, and (7) and (9) in this order.
  • this multilayer substrate A is manufactured through the manufacturing process as described above and has the above-described configuration, it is possible to efficiently suppress and prevent warping from occurring in the curing process of the resin layers 11 and 12. Can do.
  • the warp suppressing member 3 is made of a metal material, it is possible to improve the shielding performance and improve the heat dissipation performance.
  • the warp suppressing member is disposed only on one main surface side of the core parent substrate (core substrate), but the warp suppressing member is disposed on both main surface sides.
  • the warp suppressing member is disposed on both main surface sides.
  • the warp of the core parent substrate depends on the thickness of the resin layers on both main surfaces.
  • the main surface side of the thicker resin layer (when the warp suppressing member is not provided) From the standpoint of suppressing warpage, it is preferable to dispose a warpage suppressing member on the side where the warpage occurs and becomes a concave surface.
  • the main surface side on which a resin layer having a larger shrinkage is formed (if the warp suppressing member is not provided, warpage occurs). It is desirable to arrange a warp suppressing member on the side that is generated and becomes a concave surface.
  • a cross-shaped warpage suppressing member is used, but the warpage suppressing member has a special restriction on its structure within a range in which the function of suppressing the warpage of the core substrate can be achieved.
  • the warp suppressing member 3 having a wide single band-like structure
  • the warp suppressing member 3 having two parallel belt-like structures
  • the warp suppressing member 3 having a structure in which four thin strip members are arranged in parallel to the four sides of the core substrate.
  • the warp suppressing member 3 having a lattice structure as shown in FIG.
  • a warpage suppressing member 3 having a structure in which a plurality of slender thin belt-like members are crossed as shown in FIG. Etc. can be used.
  • a cross-shaped warp suppressing member in a rectangular core board, since each side is often warped so as to be pulled either up or down, as the warp suppressing member 3, a cross-shaped warp suppressing member, FIG. 13, FIG. 14, or FIG.
  • side like the curvature suppression member as shown in 15 is preferable. However, it may warp in a specific direction depending on the arrangement state of the surface-mounted components in the resin layer. In that case, it is effective to use a warp suppressing member having a shape as shown in FIGS. That is, the shape and arrangement position of the warpage suppressing member may be adjusted in accordance with the direction of warpage.
  • these warpage suppressing members 3 are processed into a predetermined shape in advance, arranged at predetermined positions before the resin layer is fully cured, and bonded to predetermined positions on each core substrate. After fixing, the resin layer is fully cured, whereby a multilayer substrate having the same effect as in the above embodiment can be efficiently manufactured.
  • the metal curvature suppression member is used as the curvature suppression member 3, it is also possible to use the curvature suppression member made from resin.
  • the resin constituting the warpage suppressing member must be harder than the resin layer at the stage of being placed on the semi-cured resin layer. is there.
  • the warpage suppressing member (resin constituting) is harder than the resin layer, and the warpage suppressing member (resin constituting) is lower in curing temperature than the resin layer, and warpage suppression. It is necessary for the resin constituting the member to cure before the resin layer in order to exhibit the function as a warp suppressing member.
  • the present invention is not limited to the above-described embodiment in other points as well.
  • Specific configurations of the core parent substrate and the core individual substrate, types and mounting modes of surface-mounted components to be mounted, resin layers Of the material constituting the core, the connection of the warp suppressing member to the core parent substrate (core individual substrate), the specific method of fixing, the conditions for the main curing of the semi-cured resin, the core parent substrate for each core Various applications and modifications can be made within the scope of the invention with respect to specific methods for dividing into individual substrates.
  • Core single substrate 1a One main surface of core single substrate 1b
  • the other main surface of core single substrate 2a, 2b Surface mount component 3
  • Warpage suppressing member 3a Main portion of warpage suppressing member 3b
  • Tip portion of warpage suppressing member 4 Solder 5
  • Straight terminal 6 Dividing groove 10
  • Core parent substrate 10a One main surface of core parent substrate 10b
  • Core parent substrate The other principal surface 11, 12
  • Resin layer 11a Resin layer principal surface 11b Resin layer side surface A, A1, A2, A3 Multilayer substrate

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention concerne : un procédé de production d'un substrat multicouche hautement fiable et capable de limiter l'occurrence d'un gauchissement au cours d'une étape de durcissement d'une couche de résine lors de la production d'un substrat multicouche doté d'une couche de résine ; ainsi qu'un substrat multicouche exempt de gauchissement et hautement fiable. Des couches (11, 12) de résine dans un état semi-durci sont formées sur une surface primaire prédéterminée d'un substrat parent (10) de noyau sur lequel ont été montés des composants (2a, 2b) montés en surface. Dans l'état d'un élément limiteur (3) de gauchissement, qui sert à limiter l'occurrence du gauchissement sur chaque substrat individuel (1) de noyau contenu dans le substrat parent de noyau au cours d'une étape de durcissement des couches de résine, et dont la partie primaire recouvre au moins une partie de la surface supérieure (surface primaire (11a)) et des surfaces latérales (11b) de la couche (11) de résine dont sont dotés les substrats individuels de noyau obtenus en séparant le substrat parent de noyau dans une étape de séparation du substrat parent de noyau, et, en au moins un lieu, est relié / fixé au substrats individuels de noyau contenus dans le substrat parent de noyau, étant appliqué à chaque substrat individuel de noyau, après avoir soumis la couche de résine qui se trouve à l'état semi-durci à un durcissement principal, le substrat parent (10) de noyau est séparé en substrats individuels (1) de noyau.
PCT/JP2012/061871 2011-05-31 2012-05-09 Procédé de production d'un substrat multicouche et substrat multicouche Ceased WO2012165111A1 (fr)

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JP2011-121999 2011-05-31
JP2011121999 2011-05-31

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2983201A1 (fr) * 2014-08-08 2016-02-10 MediaTek, Inc Circuit intégré avec une structure de libération de contraintes
WO2018110383A1 (fr) * 2016-12-15 2018-06-21 株式会社村田製作所 Module électronique et procédé de production de module électronique
WO2019159913A1 (fr) * 2018-02-15 2019-08-22 株式会社村田製作所 Module haute fréquence

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102350A (ja) * 1991-10-08 1993-04-23 Seiko Epson Corp 回路基板の実装構造
JPH10112515A (ja) * 1996-10-04 1998-04-28 Denso Corp ボールグリッドアレイ半導体装置及びその製造方法
JPH10116936A (ja) * 1996-10-09 1998-05-06 Toshiba Microelectron Corp 半導体パッケージ
JPH11163583A (ja) * 1997-11-25 1999-06-18 Citizen Electronics Co Ltd 電子部品パッケージ及びその製造方法
JP2000151083A (ja) * 1998-11-09 2000-05-30 Nec Saitama Ltd Icパッケージの補強構造
JP2002314027A (ja) * 2001-04-10 2002-10-25 Alps Electric Co Ltd 面実装型電子回路ユニット
JP2011243624A (ja) * 2010-05-14 2011-12-01 Panasonic Corp 半導体装置およびその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102350A (ja) * 1991-10-08 1993-04-23 Seiko Epson Corp 回路基板の実装構造
JPH10112515A (ja) * 1996-10-04 1998-04-28 Denso Corp ボールグリッドアレイ半導体装置及びその製造方法
JPH10116936A (ja) * 1996-10-09 1998-05-06 Toshiba Microelectron Corp 半導体パッケージ
JPH11163583A (ja) * 1997-11-25 1999-06-18 Citizen Electronics Co Ltd 電子部品パッケージ及びその製造方法
JP2000151083A (ja) * 1998-11-09 2000-05-30 Nec Saitama Ltd Icパッケージの補強構造
JP2002314027A (ja) * 2001-04-10 2002-10-25 Alps Electric Co Ltd 面実装型電子回路ユニット
JP2011243624A (ja) * 2010-05-14 2011-12-01 Panasonic Corp 半導体装置およびその製造方法

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2983201A1 (fr) * 2014-08-08 2016-02-10 MediaTek, Inc Circuit intégré avec une structure de libération de contraintes
US9905515B2 (en) 2014-08-08 2018-02-27 Mediatek Inc. Integrated circuit stress releasing structure
WO2018110383A1 (fr) * 2016-12-15 2018-06-21 株式会社村田製作所 Module électronique et procédé de production de module électronique
CN110140433A (zh) * 2016-12-15 2019-08-16 株式会社村田制作所 电子模块以及电子模块的制造方法
JPWO2018110383A1 (ja) * 2016-12-15 2019-10-24 株式会社村田製作所 電子モジュールおよび電子モジュールの製造方法
US10660227B2 (en) 2016-12-15 2020-05-19 Murata Manufacturing Co., Ltd. Electronic module and method of manufacturing electronic module
CN110140433B (zh) * 2016-12-15 2021-10-12 株式会社村田制作所 电子模块以及电子模块的制造方法
WO2019159913A1 (fr) * 2018-02-15 2019-08-22 株式会社村田製作所 Module haute fréquence
JPWO2019159913A1 (ja) * 2018-02-15 2020-12-10 株式会社村田製作所 高周波モジュール
JP7047893B2 (ja) 2018-02-15 2022-04-05 株式会社村田製作所 高周波モジュール
US11903120B2 (en) 2018-02-15 2024-02-13 Murata Manufacturing Co., Ltd. Radio frequency module

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