WO2012018046A1 - 半導体装置接合材 - Google Patents
半導体装置接合材 Download PDFInfo
- Publication number
- WO2012018046A1 WO2012018046A1 PCT/JP2011/067770 JP2011067770W WO2012018046A1 WO 2012018046 A1 WO2012018046 A1 WO 2012018046A1 JP 2011067770 W JP2011067770 W JP 2011067770W WO 2012018046 A1 WO2012018046 A1 WO 2012018046A1
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- Prior art keywords
- porous metal
- metal body
- solder
- semiconductor device
- bonding
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
- B23K35/262—Sn as the principal constituent
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/08—Soldering by means of dipping in molten solder
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
- B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
- B23K35/0244—Powders, particles or spheres; Preforms made therefrom
- B23K35/025—Pastes, creams, slurries
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
- B23K35/302—Cu as the principal constituent
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C1/00—Making non-ferrous alloys
- C22C1/08—Alloys with open or closed pores
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C13/00—Alloys based on tin
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C9/00—Alloys based on copper
- C22C9/02—Alloys based on copper with tin as the next major constituent
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- H10W40/255—
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- H10W72/071—
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- H10W72/90—
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B22—CASTING; POWDER METALLURGY
- B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
- B22F2998/00—Supplementary information concerning processes or compositions relating to powder metallurgy
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0116—Porous, e.g. foam
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- H05K3/346—
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- H10W72/07331—
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- H10W72/07336—
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- H10W72/07341—
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- H10W72/07352—
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- H10W72/30—
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- H10W72/321—
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- H10W72/325—
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- H10W72/351—
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- H10W72/352—
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- H10W72/354—
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- H10W72/5363—
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- H10W72/5522—
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- H10W72/59—
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- H10W72/884—
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- H10W72/952—
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- H10W90/734—
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- H10W90/754—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12479—Porous [e.g., foamed, spongy, cracked, etc.]
Definitions
- the present invention relates to a solder bonding material used in a semiconductor device, and more particularly to a bonding material for bonding a semiconductor element that requires heat dissipation, such as a power semiconductor (eg, power diode) or a semiconductor chip having a fine wiring inside, to a substrate, and its
- a semiconductor device including a substrate to which a semiconductor element is bonded with such a bonding material.
- a typical example of a semiconductor device is a semiconductor device in which a semiconductor chip (silicon chip) is placed on a frame which is a substrate made of Cu or 42 alloy. Between the silicon chip and the frame, wire bonding is performed with Au wire.
- an epoxy-based conductive adhesive may be used for bonding the frame and the silicon chip, but bonding using solder having a high thermal conductivity and a high heat dissipation effect is more common. Such a junction is also referred to as an internal junction of the semiconductor device.
- the semiconductor device is mounted on a printed circuit board when it is assembled into an electronic device, and is then subjected to reflow soldering heating again. At that time, it is necessary to prevent the soldered portion by the internal bonding performed previously from melting at the reflow temperature at that time. Therefore, the solder used for the internal joining of the semiconductor device uses a solder alloy having a higher melting temperature than the solder used for mounting the printed circuit board. Although such a semiconductor device itself constitutes a semiconductor device, this semiconductor device is further connected to a circuit board to constitute a larger semiconductor device.
- the solder for soldering the internal joint of the semiconductor device is referred to as “high temperature solder”.
- the conventional high-temperature solder was a Pb-based solder alloy having a melting temperature of around 300 ° C.
- High temperature solders used for internal bonding of semiconductor devices include Pb-10Sn (solidus temperature 268 ° C, liquidus temperature 302 ° C), Pb-5Sn (solidus temperature 307 ° C, liquidus temperature 313 ° C) , Pb-2Ag-8Sn (solidus temperature 275 ° C., liquidus temperature 346 ° C.), Pb-5Ag (solidus temperature 304 ° C., liquidus temperature 365 ° C.), etc. It has become.
- These high-temperature solders all have a solidus temperature of 260 ° C. or higher.
- soldering with high-temperature solder such as Pb-10Sn is possible even if the soldering temperature at that time is 230 ° C, which is a little higher
- the soldered portion for the internal bonding of the semiconductor device is not melted during mounting soldering to the printed circuit board.
- Patent Document 1 discloses a method using a solder paste in which Sn or Sn-based lead-free solder powder and Cu powder are mixed. At the time of melt bonding, a Sn—Cu intermetallic compound is formed and bonded.
- Patent Document 2 discloses a solder material obtained by rolling Sn or Sn-based lead-free solder powder and Cu powder into a solder foil as one embodiment of the invention described in Patent Document 1.
- the bonding material used for internal bonding of semiconductor devices or the internal bonding portion obtained thereby is required to have a higher melting temperature than the solder alloy used for mounting printed circuit boards.
- a high-temperature solder alloy that can be realized and has a Sn main component and a solidus temperature of 260 ° C. or higher is not yet known.
- Cited Document 1 a solder paste in which Sn or Sn-based lead-free solder powder and Cu powder are mixed is proposed.
- the solder paste always contains a solvent, the form of the solder paste When used in, the solvent in the flux tends to volatilize when heated and voids tend to occur. This void becomes a cause of lowering reliability particularly in a semiconductor device with fine wiring.
- the problem of voids generated by the volatilization of the solvent can be solved.
- the powder since the powder has a large surface area and easily oxidizes, an oxide film is already formed on the surface of the powder when Sn or Cu powder is manufactured.
- the solder rolling operation is performed in an inert atmosphere.
- the oxide on the powder surface cannot be removed.
- the gap is inevitably formed without being completely filled with the solder.
- Patent Document 2 even if soldering is performed in a reducing atmosphere such as hydrogen without using a flux, the oxide on the surface of the powder generated before the rolling of the solder has entered the solder foil. Since the oxide inside the solder foil cannot be removed in the atmosphere, there is a problem that voids are likely to occur due to solder wetting failure.
- the problem to be solved by the present invention is to provide a bonding material for internal bonding of a semiconductor device which does not use a flux and does not generate voids and has excellent wettability.
- a further object of the present invention is to provide a semiconductor device in which an internal joint portion does not melt even when mounted on a substrate.
- the present inventors have focused on the fact that composite materials are generally excellent in high-temperature characteristics, obtained the idea of performing internal bonding using composite materials, and further studied to form a network structure as a base material for composite materials.
- the present invention has been found that a solder joint material obtained by using a porous metal thin plate having a composite material impregnated with a solder alloy, particularly a Pb-free solder alloy, is particularly effective for internal joining of semiconductor devices. Was completed.
- the present invention relates to a solder bonding material for internal bonding of a semiconductor device in which a porous metal body having a network structure is melt-filled with Sn or Sn-based lead-free solder and then solidified. It is a semiconductor device obtained by using it.
- the “porous metal body having a network structure” as the base material of the composite material is “having a porous structure, and the pores constituting the porous structure communicate with each other in a network shape.
- the porous metal body used in the present invention exhibits electrical conductivity and thermal conductivity.
- porous metals are being made for the purpose of weight reduction and filter effect by making conventional bulk metal porous.
- Application to conductive materials has also been proposed.
- such a commercially available porous metal body may be used as a starting material.
- a semiconductor device can be internally bonded with a novel bonding material, and Pb-free can be realized even in the internal bonding portion of the semiconductor device. Furthermore, according to the present invention, it is possible to obtain a highly reliable internal joint with less voids as compared with a joining material that uses solder powder to form an intermetallic compound.
- the porous metal body having a large surface area is impregnated while melting Sn or Sn-based lead-free solder in advance, so that the metal and Sn constituting the porous metal body have a boundary portion thereof.
- the adhesion is improved, and the conductivity and heat conductivity are greatly improved.
- a sufficient amount of intermetallic compound of Sn in the solder alloy and the metal to be joined (Ni, Cu, etc.) is generated. Since it can be ensured, the melting point of the joint is increased, and the melting temperature of the internal joint can be increased when the semiconductor device is mounted.
- FIG. 1A and FIG. 1B are schematic explanatory views of an internal structure of a semiconductor device using a bonding material according to the present invention and a bonding material, respectively.
- FIG. 2 is a cross-sectional microstructural view of a bonding material in which Sn is melt-filled in the porous metal of Example 1 of the present invention.
- FIG. 3 is a cross-sectional micrograph of a bonding material obtained by soldering the Cu sheet of Comparative Example 1 with Sn.
- 4 is a cross-sectional microstructural view of a bonding material in which Sn is melt-filled in a porous metal having a high porosity of Comparative Example 7.
- FIG. 1A and FIG. 1B are schematic explanatory views of an internal structure of a semiconductor device using a bonding material according to the present invention and a bonding material, respectively.
- FIG. 2 is a cross-sectional microstructural view of a bonding material in which Sn is melt-filled in the porous metal of Example 1
- FIG. 1A is a schematic explanatory view of a semiconductor device according to the present invention.
- a bonding material 1 according to the present invention is a Ni / Au plating layer provided on a silicon chip (IC chip) 2 and an insulating substrate 3.
- the assembly is internally bonded to the Cu base substrate 4 via the Ni / Au plating layer 4a provided on the back surface thereof.
- a semiconductor device is configured.
- the bonding between the IC chip 2 and the Ni / Au plating layer 3a utilizes the good thermal conductivity of the bonding material according to the present invention.
- the bonding between the insulating substrate 3 and the Cu-base substrate 4 is to make the electrodes or connection terminals conductive and to dissipate heat.
- the bonding material according to the present invention can be used for both purposes of heat dissipation and conduction.
- the assembly in which the IC chip 2 is simply joined internally to the insulating substrate 3 may be referred to as a semiconductor device.
- the semiconductor device thus internally bonded is further mounted on a printed wiring board or the like to constitute an electronic device such as a power supply device.
- FIG. 1B is an enlarged schematic view of a joint when the IC chip 2 and the Ni / Au plating layer 3a or the Ni / Au plating layer 4a and the Cu base substrate 4 are joined by the joining material 1.
- FIG. The insulating substrate 3 is usually provided with a Ni / Au plating layer 3a and a Ni / Au plating layer 4a.
- the bonding material 1 is composed of a porous metal body 5 and an intermetallic compound 6, and shows a high temperature state after heat bonding. The inside of the porous metal body before joining is filled with Sn or Sn-based solder, and the Sn intermetallic compound is generated by heating at the time of joining. Is done.
- the semiconductor device of the present invention has a structure for quickly dissipating heat generated in a silicon chip to a Cu base substrate, and is used for components that are likely to generate heat together with electrical conduction such as a semiconductor with a fine wiring pattern or a power semiconductor. Used for.
- the joint portion between the IC chip and the insulating substrate and between the insulating substrate and the Cu base substrate is likely to be at a high temperature, and conventionally, high-temperature solder is used for the joining.
- joining by an Sn intermetallic compound instead of joining with high-temperature solder, joining by an Sn intermetallic compound is used, and such a joining part has a structure in which a main body is constituted by a porous metal body having a network structure. It has become.
- the bonding material according to the present invention is manufactured by melt-filling Sn or Sn-based lead-free solder into a porous metal body having network-structured communication holes.
- the semiconductor device according to the present invention is not particularly limited as long as it performs internal bonding, but a power semiconductor device is specifically exemplified.
- the Sn intermetallic compound is formed at the junction between the semiconductor element constituting the semiconductor device and the substrate. More specifically, the reaction between Sn or Sn-based lead-free solder melt-filled in a porous metal having a network structure and the metal constituting the porous metal body, and further the bonding with the lead-free solder A joint is formed by reaction with the Cu or Ni plating layer provided on the surface. These reactions occur when the molten metal alloy is impregnated into the porous metal body and when internal bonding is performed.
- the bonding surface and a metal surface such as a Cu-10Sn alloy constituting the skeleton of the porous metal body face each other through a lead-free solder alloy layer filling the porous portion. is doing.
- the mating surface is wetted by the solder, and an intermetallic compound is generated by reaction with Sn.
- a very thin intermetallic compound layer is formed at the boundary between the porous metal body and the Sn or Sn-based lead-free solder alloy melt-filled therein, and surface oxidation is performed. Since the film is substantially absent, a highly reliable internal joint with few voids can be obtained, and intermetallic compound generation reaction is facilitated by heating during bonding, and intermetallic compound generation with Sn is promoted. Sn does not substantially remain as a simple substance.
- the present invention improves such a problem.
- a joined body made of a porous metal body having a network structure and Sn or Sn-based lead-free solder alloy that is melted and filled therein is used instead of fine Sn and Cu powder.
- Porous metal body What is necessary is just to utilize a commercially available thing as the porous metal body used in this invention. What is necessary is just to roll a commercial item to predetermined thickness as needed, and to adjust a porosity.
- the porous metal body is made by subjecting foamed urethane to conductive treatment and plating, followed by the “plating method” in which the urethane is removed by heating.
- the metal powder slurry containing the foamed urethane is directly foamed and then degreased and sintered. It is manufactured by a method such as a “slurry foaming method” and a “slurry coating method” in which a metal powder slurry is applied to urethane foam and the urethane is removed together with sintering.
- the metal of the porous metal body having a network structure used in the present invention can be used as long as it is a metal that generates an intermetallic compound by reaction with Sn.
- Examples thereof include Cu, Ag, Ni, and bronze.
- Cu alloy of these is mentioned.
- Table 1 specifies the intermetallic compounds formed by the reaction of various metals with Sn. In particular, Cu and Cu alloys are preferred because they can easily react with Sn.
- Examples of such pure copper and Cu alloy having a Cu content of 90% or more include copper materials such as oxygen-free copper, tough pitch copper, and phosphorous deoxidized copper, copper for casting such as CAC101, CAC102, and CAC103, and Cu, Sn and Zn. Examples thereof include copper alloys such as bronze to which are added. When the Cu content of the Cu alloy used for the porous metal having a network structure is less than 90%, the intermetallic compound formation reaction with Sn or Sn-based lead-free solder filled in the porous metal is inhibited. It is not preferable. Pure copper and a Cu alloy having a Cu content of 90% or more are preferable.
- the porous metal body has a hole structure communicating with the surface of the porous body and has a network structure. Therefore, the porous metal body has a hole structure only by immersing the porous metal body in a molten solder bath. The inside can be impregnated with solder. If such impregnation treatment is performed in a vacuum atmosphere, the molten solder can be impregnated more efficiently into the interior.
- the molten solder In the case of a long material such as a hoop material, it is possible to impregnate the molten solder into the pores by continuously immersing in a molten solder bath, preferably in an inert gas atmosphere or a vacuum atmosphere, and then pulling it up. In this case, by adjusting the traveling speed of the long material, the adhesion amount of the molten solder on the surface of the porous metal body, that is, the thickness of the bonding material can be adjusted. The entire surface of the porous metal body is thin and coated with a solder alloy. Of course, at this time, an intermetallic compound is generated at the interface between the molten solder alloy and the surface of the porous metal body, and the bonding strength, that is, the adhesion strength between the two is improved.
- solder alloy to be impregnated is not particularly limited as long as it is Pb-free, but for this type of application, a Sn simple metal, a Sn—Ag solder alloy, or a Sn—Ag—Cu solder alloy is preferable.
- the amount of the solder alloy is such that at least the pores of the porous metal body can be filled, and in the case of a plate-like porous metal body, one or both surfaces are covered.
- the proportion of the solder alloy to the porous metal body is preferably 20 to 30 area%.
- the bonding material according to the present invention is formed in a thin plate shape, but in use, it is cut into a predetermined shape and used in the same manner as a so-called solder preform. That is, the bonding material according to the present invention is assembled by being interposed, for example, between the bonding surfaces of the semiconductor element and the substrate, and soldered by heating the bonding material in a reflow furnace. Therefore, preferably, in the bonding material according to the present invention, the plate thickness of the porous metal body is 0.1 mm or more and 0.2 mm or less.
- the porosity of the porous metal body having a network structure used in the present invention, that is, the filling rate of the solder alloy is preferably 20 to 30% by area.
- the porous metal body used in the present invention may be a commercially available product, but since many of the commercially available products have a thickness of about 1 to 0.5 mm, the porosity is also 60%. Therefore, when using such a commercial product, it is preferable to adjust to a desired plate thickness and porosity before impregnating with molten solder in the present invention. Such adjustment may be performed by rolling.
- the total thickness of the porous metal body and the solder layer is not particularly limited, and may be appropriately set as necessary, but is generally about 0.1 to 0.5 mm. . Preferably, it is 0.15 to 0.3 mm.
- a solder layer may be attached to only one side, but usually both sides are covered with a solder layer.
- a semiconductor element and an insulating substrate, or an insulating substrate and a base substrate are overlapped via a solder bonding material, and this lamination is performed.
- the assembly may be heated and bonded without flux.
- the heating conditions at this time are not particularly limited. For example, in one atmosphere selected from an inert gas atmosphere, a reducing gas atmosphere, and a reduced-pressure atmosphere, the heating condition is 5 at 300 ° C. or higher and 350 ° C. or lower. Heat for more than a minute.
- Phosphor bronze powder (trade name P-201) made by Fukuda Metal (Fukuda Metal Foil & Powder Co., Ltd.) is sintered in a reducing atmosphere at 880 ° C. to obtain a porous metal body (plate length: 1 m, width: 15 mm). , Thickness: 0.1 mm, porosity: 25%) was prepared and immersed in various solder baths at 250 to 260 ° C. to impregnate the pores with lead-free solder. Flux was not used for impregnation of the molten solder, and the oxide film of the porous metal body was removed by applying ultrasonic waves to the solder bath to prevent the generation of voids.
- the pore structure of the porous body used was such that the continuous pores communicated in a mesh shape and provided with openings on the plate surface.
- the thickness of the joining material that is, the thickness of the metal body + the amount of solder attached is controlled by the speed at which the porous metal body is removed from the solder bath, and the total thickness of the solder alloy layer and the porous metal body is 0.15 to It adjusted so that it might be set to 0.2 mm.
- the thickness of the solder alloy layer was 0.05 to 0.1 mm.
- the obtained bonding material was punched out into a size of 3 mm ⁇ 3 mm with a press, and using this, a silicon chip was placed on the Cu plate via the bonding material and assembled.
- the obtained assembly was held under conditions simulating reflow conditions, then cooled, and the joint cross section was observed with a microscope and the joint strength was measured.
- FIG. 2 is a cross-sectional microscopic structure diagram (magnification: 500 times) of the bonding material used in Example 1 of Table 2. It can be seen that the porous metal body 5 is surrounded by the melt-filled solder alloy 7. The presence of a Cu 6 Sn 5 intermetallic compound and a Cu 3 Sn intermetallic compound between them was confirmed. However, it was confirmed that the solder alloy, particularly the surface portion, was present in the solder alloy.
- FIG. 3 is a cross-sectional microscopic structure diagram (magnification: 500 times) of a bonding material having no porous structure (porosity 0%) used in Comparative Example 1 in Table 2. It can be seen that the bulk metal (Cu) body 8 and the solder (Sn) layer 7 are neatly laminated.
- FIG. 4 is a cross-sectional micrograph (magnification: 500 times) of a bonding material having a porosity of 35% or more used in Comparative Example 4 in Table 2. Since the porosity of the porous metal body 9 is large, the filling amount of the solder (Sn) 7 is increased correspondingly, and when the joint portion is finally formed, Sn as a solder component exists alone. Therefore, a decrease in melting temperature is inevitable.
- the porosity shown in Table 2 was measured by detecting pores from a cross-sectional image of the porous metal body. Therefore, “porosity” is expressed by area ratio.
- the image analysis software used for the detection was Scandium made by Soft Imaging System. Since the metal part and the hole part have different contrasts on the image, they can be identified by image analysis, and the measurement was performed by detecting only the hole part.
- a 5 mm square bonding material was punched from the bonding material manufactured in Example 1, and this was bonded to a 10 mm square Cu plate or Ni plated Cu plate in a high temperature furnace to form an Sn—Cu intermetallic compound, The joint was reproduced.
- a high-temperature observation device IrF-TP manufactured by Yonekura Seisakusho was used, and heating was performed at a heating temperature of 350 ° C. for 15 minutes.
- the amount of intermetallic compound (IMC) produced in the joint thus obtained was measured.
- the measuring method was a scanning electron microscope JSM-7000F manufactured by JEOL Ltd., a compound existing region was detected from the cross section of the joint, and the detected area was measured, and the amount of the generated compound ( ⁇ m 2 ) was obtained.
- the results are shown in Table 2.
- the void ratio of the joint was measured.
- a Toshiba X-ray transmission device TOSMICRON was used to detect a void portion and display it as a ratio of the void to the total area of the joint portion.
- the results are shown in Table 2.
- the joining strength and melting temperature of the joining member of the present invention produced in Example 1 were measured.
- the bonding material of the present invention (3 mm square size) was placed on a 30 mm square Cu plate, and a 3 mm square Cu chip having a thickness of 1 mm as a measurement piece was further placed thereon, and this was heat bonded.
- the measurement was performed using a joint strength tester STR-1000 manufactured by Reska Co., Ltd., with a shear rate of 6 mm / min and a test temperature of room temperature and 250 ° C.
- the melting temperature was measured in accordance with JIS Z3198-1.
- the thermal analysis was performed using a differential thermal analyzer DSC6200 manufactured by Seiko Instruments Inc., and the melting point after heating at 180 ° C. to 280 ° C. was confirmed.
- the joint sample was the same as that used for the strength test.
- Example 1 Using the bonding material manufactured in Example 1 (see Example 1 in Table 2), as shown in FIG. 1, a silicon chip is bonded to an insulating plate, and this is further bonded to a Cu substrate. Configured. Next, this semiconductor device was mounted on a printed circuit board at a reflow temperature of 240 ° C.
- the internal joint of the semiconductor device did not melt during mounting.
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- Organic Chemistry (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
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Abstract
Description
半導体装置の内部接合に用いられる高温はんだには、Pb-10Sn(固相線温度268℃、液相線温度302℃)、Pb-5Sn(固相線温度307℃、液相線温度313℃)、Pb-2Ag-8Sn(固相線温度275℃、液相線温度346℃)、Pb-5Ag(固相線温度304℃、液相線温度365℃)などがあり、主にPbが主成分となっている。これらの高温はんだは、いずれも固相線温度が260℃以上である。そのため、プリント基板の実装用はんだ付けに、例えば63Sn-37Pb共晶はんだを使用する場合、そのときのはんだ付け温度が少し高めの230℃になっても、Pb-10Snなどの高温はんだではんだ付けした半導体装置の内部接合のはんだ付け部は、プリント基板への実装はんだ付け時に溶融することがない。
当然、従来の半導体装置の内部接合に使用されてきた前述のようなPb-Sn系高温はんだについても、Pbフリーはんだ合金の使用が求められている。
この高温はんだ合金を使用しない接合技術として検討されたのは、Sn主成分の鉛フリーはんだと比較して溶融温度の高い金属間化合物で接合する方法である。
さらに本発明の課題は、基板に実装するときにも内部接合部が溶融しない半導体装置を提供することである。
さらに、本発明によれば、はんだ粉末を使用して金属間化合物を形成する接合材に比較して、ボイドの少ない信頼性の高い内部接合部を得ることができる。
このように内部接合された半導体装置は、さらにプリント配線基板などに実装されて、電源装置などの電子機器を構成する。
本発明にかかる半導体装置は、内部接合を行うものであれば特に制限はないが、具体的にはパワー半導体装置が例示される。
本発明によれば、半導体装置を構成する半導体素子と基板との接合部に、Snの金属間化合物を形成させる。より詳述すれば、網目状構造を有する多孔質金属に溶融充填されたSnまたはSn系の鉛フリーはんだと多孔質金属体を構成する金属との反応、さらには、上記鉛フリーはんだと、接合面に設けたCuもしくはNiめっき層との反応によって接合部が形成される。これらの反応は、それぞれ、溶融はんだ合金を多孔質金属体に含浸させるとき、および内部接合を行うときに起こる。
本発明において使用する多孔質金属体は、市販のものを材料として利用すればよい。市販品を、必要により、所定厚さにまで圧延するとともに、空孔率を調整すればよい。
本発明の場合、多孔質金属体は、多孔質体表面と連通した穴構造を持っており、網目状構造を有することから、溶融はんだ浴にこの多孔質金属体を浸漬するだけで孔構造の内部にまではんだを含浸させることができる。真空雰囲気でこのような含浸処理を行えば、より効率的に内部にまで溶融はんだを含浸させることができる。
本発明にかかる接合材は、薄板状に構成されるが、使用に際しては、所定形状に切断されて、いわゆるはんだプリフォームと同様の態様で使用される。すなわち、本発明にかかる接合材は、例えば半導体素子と基板との接合面の間に介在させて組み立て、これをリフロー炉で加熱することではんだ接合が行われる。そのため、好ましくは、本発明に係る接合材は、上記多孔質金属体の板厚さが0.1mm以上、0.2mm以下である。本発明に使用する網目状構造を有する多孔質金属体の空孔率、つまりはんだ合金の充填率は、20~30面積%のものが好ましい。
本発明にかかるはんだ接合材は、多孔質金属体とはんだ層との合計厚さは、特に制限はなく、必要に応じて適宜厚さとすればよいが、一般には、0.1~0.5mm程度である。好ましくは、0.15~0.3mmである。片面だけにはんだ層が付着されてもよいが、通常は、両面がはんだ層で被覆されている。
本発明にかかるはんだ接合材を用いて半導体装置の内部接合を行うには、例えば、半導体素子と絶縁基板とを、あるいは絶縁基板とベース基板とを、はんだ接合材を介して重ね合わせ、この積層組立体を加熱してフラックスレスで接合を行えばよい。このときの加熱条件は、特に制限はないが、一例を挙げれば、不活性ガス雰囲気、還元性ガス雰囲気、および減圧雰囲気から選ばれたいずれかの雰囲気下で、300℃以上350℃以下において5分以上加熱することである。
次に、本発明を実施例によってさらに具体的に説明する。
図2は、表2の実施例1で使用した接合材の断面顕微鏡組織図(倍率:500倍)である。
多孔質金属体5が、溶融充填されたはんだ合金7によって包囲されているのがわかる。両者の間のCu6Sn5金属間化合物およびCu3Sn金属間化合物の存在が確認された。しかし、はんだ合金、特に表面部分ははんだ合金で存在していることが確認された。
このようにして得られた接合部の金属間化合物(IMC)の生成量を測定した。測定方法は、日本電子(株)製走査型電子顕微鏡JSM-7000Fを用い、接合部断面から化合物存在領域を検出、検出した面積を計測し、生成した化合物量(μm2)とした。結果を表2に示す。
実施例1で製造した本発明の接合部材の接合強度及び溶融温度を測定した。
接合強度の測定法は、JIS Z3198-5に準じた。但し、30mm角Cu板の上に本発明の接合材(3mm角の大きさ)を載せ、さらにそのうえに測定片としての3mm角、厚さ1mmのCuチップを載せて、これを加熱接合した。
溶融温度の測定方法は、JIS Z3198-1に準じた。熱分析の条件は、セイコーインスツルメンツ社製示差熱分析装置DSC6200を用い、昇温速度5℃/min、180―280℃間における接合加熱後の溶融点を確認した。接合部試料は強度試験に使用したものと同じものを使用した。
2. ICチップ
3. 絶縁基板
4. ベース基板
5. 多孔質金属体
6. 金属間化合物
7. Pbフリーはんだ
8. バルク状金属体(空孔率0%)
9. 多孔質金属体(空孔率35%以上)
Claims (10)
- 網目構造を有する多孔質金属体と、該多孔質金属体の空孔部分に充填され、かつ該多孔質金属体表面を被覆したSnまたはSn系はんだ合金とから構成され、前記多孔質金属体が導電性を示す、はんだ接合材。
- 前記多孔質金属体が、Snとの反応により金属間化合物を生成するCu、Ni、Ag、およびCu含有量が90質量%以上のCu合金からなる群から選んだ少なくとも1種から構成される請求項1記載のはんだ接合材。
- 前記多孔質金属体に対してSnまたはSn系はんだ合金の占める割合が、面積%で、20%以上30%以下であることを特徴とする請求項1または2記載のはんだ接合材。
- 前記多孔質金属体の厚さが0.1mm以上0.2mm以下であり、SnまたはSn系はんだ合金層を含めた全体の厚さが、0.15~0.3mmである、半導体装置の内部接合用の、請求項1ないし3のいずれかに記載のはんだ接合材。
- 空多孔質金属体として、空孔率が、面積率で、20%以上、30%以下である多孔質金属体を用いた、請求項1ないし4のいずれかに記載のはんだ接合材。
- 多孔質金属体を、SnまたはSn系はんだ合金溶融浴中に浸漬して、該多孔質金属体を構成する内部から表面に連通した孔構造内に溶融SnまたはSn系はんだを充填し、かつ該多孔質金属体表面を被覆させること、前記多孔金属体をSnまたはSn系はんだ合金溶融浴から取り出すこと、そして、前記多孔質金属体に充填されまたそれを被覆する溶融SnまたはSn系はんだ合金を凝固させることからなる、請求項1記載のはんだ接合材の製造方法。
- 少なくとも、半導体素子と絶縁基板とを接合するはんだ接合部を備えた半導体装置であって、該はんだ接合部が、請求項1ないし5のいずれかに記載のはんだ接合材を用いて接合されていることを特徴とする半導体装置。
- 前記接合部において、Sn単体相が消失した、請求項7記載の半導体装置。
- 前記接合部が260℃において溶融しない、請求項7または8記載の半導体装置。
- 請求1ないし5のいずれかに記載のはんだ接合材を用いて、少なくとも、半導体素子と絶縁基板とを接合する半導体装置の接合方法であって、不活性ガス雰囲気、還元性ガス雰囲気、および減圧雰囲気から選ばれたいずれかの雰囲気下で、300℃以上350℃以下において5分以上加熱させ、フラックスレスで接合を行う、半導体装置の内部接合方法。
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| JP2008200728A (ja) * | 2007-02-21 | 2008-09-04 | Mitsubishi Materials Corp | はんだ接合材及びその製造方法並びにこれを用いたパワーモジュール基板 |
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| TW592871B (en) * | 2000-12-21 | 2004-06-21 | Hitachi Ltd | Solder foil and semiconductor device and electronic device |
| FI120051B (fi) * | 2004-06-03 | 2009-06-15 | Luvata Oy | Menetelmä metallipulverin liittämiseksi lämmönsiirtopintaan ja lämmönsiirtopinta |
| EP2017031B1 (en) * | 2006-04-26 | 2017-09-13 | Senju Metal Industry Co., Ltd | Solder paste |
| JP5140411B2 (ja) * | 2007-12-27 | 2013-02-06 | ローム株式会社 | 半導体装置 |
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2010
- 2010-08-05 JP JP2010176456A patent/JP5700504B2/ja active Active
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2011
- 2011-08-03 WO PCT/JP2011/067770 patent/WO2012018046A1/ja not_active Ceased
- 2011-08-03 PT PT11814671T patent/PT2617515T/pt unknown
- 2011-08-03 US US13/261,584 patent/US8896119B2/en active Active
- 2011-08-03 EP EP11814671.1A patent/EP2617515B1/en active Active
- 2011-08-03 DK DK11814671.1T patent/DK2617515T3/en active
- 2011-08-03 KR KR1020137004851A patent/KR101496592B1/ko active Active
- 2011-08-03 CN CN201180048365.6A patent/CN103153527B/zh active Active
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| JP2002301588A (ja) | 2000-12-21 | 2002-10-15 | Hitachi Ltd | はんだ箔および半導体装置および電子装置 |
| JP2004298962A (ja) * | 2003-03-17 | 2004-10-28 | Mitsubishi Materials Corp | はんだ接合材及びこれを用いたパワーモジュール基板 |
| WO2006075459A1 (ja) * | 2005-01-11 | 2006-07-20 | Murata Manufacturing Co., Ltd | はんだペースト、及び電子装置 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016035513A1 (ja) * | 2014-09-02 | 2016-03-10 | 株式会社村田製作所 | 表面実装部品の実装方法、実装構造体 |
| US20180326524A1 (en) * | 2017-05-10 | 2018-11-15 | Board Of Trustees Of Michigan State University | Brazing methods using porous interlayers and related articles |
| US11167363B2 (en) * | 2017-05-10 | 2021-11-09 | Board Of Trustees Of Michigan State University | Brazing methods using porous interlayers and related articles |
| US11724325B2 (en) | 2017-05-10 | 2023-08-15 | Board Of Trustees Of Michigan State University | Brazing methods using porous interlayers and related articles |
| DE102022122186A1 (de) * | 2022-09-01 | 2024-03-07 | Plasma Innovations GmbH | Verfahren zur Herstellung einer Leiterplatte |
| DE102022122186B4 (de) * | 2022-09-01 | 2025-12-18 | Plasma Innovations GmbH | Verfahren zur Herstellung einer Leiterplatte |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103153527B (zh) | 2015-12-09 |
| EP2617515A4 (en) | 2016-06-01 |
| CN103153527A (zh) | 2013-06-12 |
| PT2617515T (pt) | 2018-11-21 |
| JP5700504B2 (ja) | 2015-04-15 |
| KR20130043210A (ko) | 2013-04-29 |
| EP2617515A1 (en) | 2013-07-24 |
| JP2012035291A (ja) | 2012-02-23 |
| US20130134591A1 (en) | 2013-05-30 |
| KR101496592B1 (ko) | 2015-02-26 |
| EP2617515B1 (en) | 2018-10-10 |
| DK2617515T3 (en) | 2018-12-17 |
| US8896119B2 (en) | 2014-11-25 |
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