WO2012090810A1 - 液晶表示装置 - Google Patents
液晶表示装置 Download PDFInfo
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- WO2012090810A1 WO2012090810A1 PCT/JP2011/079607 JP2011079607W WO2012090810A1 WO 2012090810 A1 WO2012090810 A1 WO 2012090810A1 JP 2011079607 W JP2011079607 W JP 2011079607W WO 2012090810 A1 WO2012090810 A1 WO 2012090810A1
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- WIPO (PCT)
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- pixels
- contact hole
- pixel
- liquid crystal
- display device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134336—Matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/40—Arrangements for improving the aperture ratio
Definitions
- the present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a contact hole for connecting a common wiring and a common electrode is formed.
- FPD thin flat panel display
- Some FPDs use liquid crystal, light emitting diodes (LEDs), organic electroluminescence (organic EL), or the like as display elements.
- LEDs light emitting diodes
- organic EL organic electroluminescence
- display devices using liquid crystals are actively researched and developed from the advantages of thinness, light weight, and low power consumption.
- FIG. 6 shows a schematic configuration of a pixel of such a liquid crystal display device.
- the pixel 41 is generally provided with a gate bus line 7 and a source bus line 8 orthogonal to each other, and is a common wiring that is a wiring for forming an auxiliary capacitor (Cs). 9 is provided in parallel with the gate bus line 7.
- the common electrode 4 and the pixel electrode 6 are provided so as to overlap each other, and a thin film transistor (TFT) is provided as a switching element (active element) at the intersection of the gate bus line 7 and the source bus line 8.
- TFT thin film transistor
- Patent Document 1 discloses a configuration in which contact holes for connecting a common electrode and a common wiring are arranged in a staggered manner at a ratio of one for a plurality of pixels. As a result, the wiring resistance is reduced by connecting the high-resistance common electrode and the low-resistance common wiring, and the probability that the bus line and the common electrode are short-circuited via the contact hole is reduced.
- Patent Document 1 discloses a configuration in which contact holes are not provided in all the pixels, and the contact holes are arranged in a staggered manner with respect to four pixels.
- the pixel portion provided with the contact hole may appear streaks. For example, when the contact holes 12 are arranged with periodicity as shown in FIG. 7, streaks appear on the display panel 15 in an oblique direction (in the direction of the arrow N in the figure), which deteriorates the appearance. This becomes more remarkable as the degree of decrease in the aperture ratio due to the formation of the contact hole is larger.
- an object of the present invention is to provide a liquid crystal display device capable of reducing the wiring resistance of the common electrode and preventing the display quality from being reduced. is there.
- a liquid crystal display device is provided with a plurality of pixels arranged in a matrix on the first substrate and corresponding to each column of the plurality of pixels.
- a liquid crystal display device comprising: a liquid crystal layer sandwiched between a substrate and a second substrate facing the substrate; and a plurality of the pixels included in a certain partition region being repeatedly arranged, the liquid crystal display device being included in the partition region Any one of the above contact Is one of the four contact holes closest to the other contact hole, or one of the four contact holes closest to the other contact hole, and is closest to itself.
- the display screen is more visible when the contact holes are arranged in the oblique direction than in the vertical direction or the horizontal direction. Not disturb.
- one contact hole is provided for each source bus line. This is because, if the same number of contact holes are not arranged in all the source bus lines in the partition region, a difference in load occurs between the bus lines, which may degrade the display quality of the liquid crystal display device. Therefore, one (the same number) contact holes are arranged on all source bus lines in the partition region.
- the contact hole is disposed at a position that satisfies the above two requirements.
- the contact hole pixels are appropriately dispersed, so that the contact hole can be prevented from appearing as a streak or the like on the display screen.
- the contact hole is used to connect the common electrode and the common wiring, the wiring resistance of the common electrode can be reduced. That is, according to one embodiment of the present invention, it is possible to realize both suppression of display quality deterioration due to contact holes and reduction of wiring resistance of the common electrode.
- the liquid crystal display device In the liquid crystal display device according to one embodiment of the present invention, two angles formed by two diagonal lines formed by four contact holes closest to one contact hole and the gate bus line in the partition region.
- the contact hole pixels are appropriately dispersed by arranging one contact hole pixel in all the source bus lines in the partition region, so that the contact hole is appropriately distributed on the display screen. It is possible to prevent it from appearing as a streak or the like.
- the contact hole since the contact hole is used to connect the common electrode and the common wiring, the wiring resistance of the common electrode can be reduced. That is, according to one embodiment of the present invention, it is possible to realize both suppression of display quality deterioration due to contact holes and reduction of wiring resistance of the common electrode.
- FIG. 2 is a diagram illustrating a schematic configuration of the pixel 1 of the liquid crystal display device according to the present embodiment.
- 3 is a cross-sectional view taken along the line AA ′ of the pixel 1 shown in FIG.
- the pixel array is configured by arranging a plurality of pixels in a matrix, and a plurality of source bus lines are arranged corresponding to each column of the plurality of pixels and arranged corresponding to each row of the plurality of pixels.
- a plurality of gate bus lines are arranged.
- a gate bus line 7 for supplying a scanning signal and a source bus line 8 for supplying a data signal are provided orthogonally to form an auxiliary capacitor (Cs).
- a common line 9 is provided in parallel with the gate bus line 7.
- the common electrode 4 and the pixel electrode 6 are provided so as to overlap each other, and the liquid crystal display device according to the present embodiment is a horizontal electric field mode liquid crystal display device.
- a thin film transistor (TFT) is provided as a switching element (active element) at the intersection of the gate bus line 7 and the source bus line 8. The gate electrode of the TFT is connected to the gate bus line 7, the drain electrode is connected to the pixel electrode 6, and the source electrode is connected to the source bus line 8.
- the TFT substrate 32 (first substrate) made of the transparent substrate 21 having the alignment film 17 and the TFTs, and the counter substrate 33 made of the transparent substrate 31 having the alignment film 17 (
- the liquid crystal layer 40 is sandwiched through the alignment film 17 between the pair of substrates.
- a phase difference plate, a polarizing plate, and the like are provided on the outside of the pair of substrates (surface opposite to the opposing surfaces of both substrates) as necessary.
- the TFT substrate 32 includes a TFT on the surface facing the counter substrate 33 on the transparent substrate.
- the TFT has a semiconductor layer 22, a gate insulating film 23, a gate electrode 26, a first interlayer insulating film 24, a second interlayer insulating film 25, a pixel electrode 6, a drain electrode 27, and a source electrode 28.
- the TFT gate electrode 26 on the TFT substrate 32 is formed of a part of the gate bus line 7, and the TFT source electrode 28 is formed of a part of the source bus line 8.
- the semiconductor layer 22 includes a channel region 22a made of an intrinsic semiconductor into which no impurity is implanted and an impurity implanted region 22b made of an extrinsic semiconductor (P-type semiconductor or N-type semiconductor) into which the impurity is implanted. .
- a drain region 29 and a source region 30 are formed in the impurity implantation region 22b.
- a drain electrode 27 is connected to the drain region 29 in the semiconductor layer 22 through a contact hole 11 formed in the gate insulating film 23 and the first interlayer insulating film 24 covering the semiconductor layer 22.
- a source electrode 28 is connected to the source region 30 through a contact hole 12 formed in the gate insulating film 23 and the first interlayer insulating film 24.
- the drain electrode 27 is electrically connected to the pixel electrode 6 through the through hole 10 provided in the second interlayer insulating film 25 covering the gate bus line 7 and the source bus line 8.
- the pixel electrode 6 is disposed on the TFT substrate 32 so as to overlap the common electrode 4, but the insulating film 14 is provided between the two electrodes.
- the common electrode 4 when the common electrode 4 is formed of a transparent conductor, the common electrode 4 overlapping with the pixel electrode 6 transmits light, so that the transmission aperture ratio is increased, which contributes to the improvement of the overall transmittance. it can.
- another common electrode 4 may also be formed on the counter substrate 33 side. When the other common electrode 4 is thus formed on the counter substrate 33 side, a vertical electric field can be formed between the pixel electrode 6 and the vertical alignment mode can be applied to the liquid crystal mode.
- the contact hole 2 for connecting the common electrode 4 and the common wiring 9 via the through hole 10 ′ formed in the second interlayer insulating film 25 has the first hole.
- An interlayer insulating film 24 is formed.
- the contact holes 2 are not necessarily formed in all the pixels 1, but are formed in some of the pixels 1 and are formed by thinning out to some extent. The detailed formation position of the contact hole 2 will be described below.
- the common electrode 4 of the pixel 1 When a transparent electrode such as an indium tin oxide (ITO) electrode is used as the common electrode 4 of the pixel 1, the wiring resistance value is higher than that of other electrodes such as the gate electrode 26, and the display quality such as crosstalk is reduced. May cause.
- the common wiring 9 is formed of a gate electrode layer such as a gate electrode metal, it has a lower resistance than the common electrode 4. Therefore, in the present embodiment, the common electrode 4 and the common wiring 9 are connected via the contact hole 2. Accordingly, it is possible to reduce the deterioration of display quality by reducing the wiring resistance of the common electrode 4.
- the contact holes 2 are preferably formed by being appropriately dispersed and thinned.
- FIG. 1 is a diagram schematically showing the arrangement position of the contact hole 2 in the present embodiment.
- the pixel array 5 is formed by repeatedly arranging a plurality of pixels 1 included in a fixed rectangular partition region 20. Therefore, the partition area 20 is a constituent unit of the pixel array 5.
- 13 shown in the figure is a pixel 1 in which the contact hole 2 is formed (hereinafter referred to as a contact hole pixel), whereas 3 shown in the figure is a pixel 1 in which the contact hole 2 is not formed. It is.
- one pixel 1 is composed of three subpixels (R pixel, G pixel, and B pixel).
- the contact hole 2 is defined as a subpixel. Either one is formed (in the case of this figure, B pixel).
- the contact hole 2 does not need to be formed over the entire contact hole pixel 13 and may be formed in any one of the sub-pixels constituting the pixel 1.
- the subpixels are not limited to R pixels, G pixels, and B pixels, and may be four or more subpixels, and are not particularly limited.
- the four contact hole pixels 13 that are closest to the pixel P that is one contact hole pixel 13 in the partition region 20 are specified.
- the above-mentioned pixel P is included in a quadrangle formed by these four pixels Q1 to Q4.
- Any one contact hole pixel 13 included in the partition region 20 according to the present embodiment is any one of the four pixels Q1 to Q4 closest to the pixel P, or any one of the pixels Q1 to Q4. It is another pixel P.
- any one contact hole pixel 13 included in the partition region 20 is any of the four contact hole pixels 13 closest to the other contact hole pixels 13 or the closest to the other contact hole pixels 13.
- the contact hole pixels 13 are arranged on the pixel array 5 in an oblique direction. This is because the visibility of the display screen is not hindered when the contact hole pixels 13 are arranged in an oblique direction rather than in the vertical direction or the horizontal direction. The above is the first requirement for the arrangement position of the contact hole pixel 13.
- FIG. 5 is a diagram schematically showing the pixel array 5.
- the pixel interval is reduced, and the pixel interval is not particularly limited to this.
- a contact hole pixel 13 is disposed on the gate bus line G9 in the source bus line S1, and one contact hole pixel 13 is disposed on the source bus line S1. It is only arranged.
- a contact hole pixel 13 is disposed on the gate bus line G3, and only one contact hole pixel 13 is disposed in the source bus line S2.
- the contact hole pixel 13 is arranged on any one of the gate bus lines. In this way, one contact hole pixel 13 is arranged for one source bus line 8 in the partition region 20.
- the contact hole pixels 13 are arranged at positions that satisfy the above two requirements. As a result, the contact hole pixels 13 are appropriately dispersed on the pixel array 5, so that the contact hole pixels 13 can be prevented from appearing as streaks on the display screen.
- the contact hole 2 is for connecting the common electrode 4 and the common wiring 9 in the first place, the wiring resistance of the common electrode 4 can be reduced. That is, according to the present embodiment, it is possible to realize both the suppression of the display quality deterioration caused by the contact hole 2 and the reduction of the wiring resistance of the common electrode 4.
- the interval between the contact hole pixels 13 adjacent in the row direction is a reduction width of the wiring resistance of the common electrode 4 and a decrease in the aperture ratio due to the arrangement of the contact hole pixels 13. Is determined in consideration of the permissible amount and the display quality. The same applies to the distance between one contact hole pixel 13 and the four contact hole pixels 13 closest thereto.
- the partition region has a length in the column direction of 40 pixels, and the row direction length. Is preferably a rectangular region having a length of 40 pixels.
- the partition region has a length of 80 pixels in the column direction and 80 in the row direction. It is preferable that it is a rectangular area which is the length of the above-mentioned pixel.
- a liquid crystal display device in which the contact holes are appropriately dispersed can be obtained by repeatedly arranging certain partition regions in which the contact holes are appropriately dispersed.
- the pixel includes a plurality of subpixels, and the contact hole is formed in any of the plurality of subpixels. It is said.
- the common electrode is formed of a transparent conductor.
- the common electrode that overlaps the pixel electrode is a transparent conductor that transmits light
- the transmission aperture ratio can be expanded, and the overall transmittance can be improved.
- another common electrode is formed on the second substrate.
- a vertical electric field can be formed between the pixel electrode and the vertical alignment mode can be applied to the liquid crystal mode.
- Two liquid crystal display devices were manufactured in compliance with the above two requirements for the arrangement positions of the contact hole pixels (pixels in which the contact holes are formed).
- a liquid crystal display device in which partition areas of 40 pixels ⁇ 40 pixels were repeatedly arranged was manufactured.
- the contact is made such that the two angles formed by the two diagonal lines formed by the four contact hole pixels closest to one contact hole pixel and the gate bus line are 45 degrees, respectively. Hall pixels were arranged.
- the interval between the contact hole pixels arranged on two adjacent gate bus lines is set to 9 pixels.
- a liquid crystal display device in which partitioned areas of 80 pixels ⁇ 80 pixels were repeatedly arranged was produced.
- two angles formed by two diagonal lines formed by the four contact hole pixels closest to one contact hole pixel and the gate bus line are 45 degrees and 66.8 degrees, respectively.
- Contact hole pixels were arranged so that In addition, the distance between contact hole pixels arranged on two adjacent gate bus lines is 11 pixels.
- the difference between the two angles formed by the two diagonal lines formed by the four contact hole pixels closest to one contact hole pixel and the gate bus line in the partition region is less than 30 degrees.
- a liquid crystal display device with good display quality can be obtained with less noticeable stripes on the display screen.
- the above two angles are 45 degrees or close to 45 degrees, respectively. It turned out that it is preferable to set it as an angle.
- the liquid crystal display device according to the present invention can be suitably used for a display device of an electronic device such as a personal computer, a mobile phone, a portable information terminal, a portable music player, or a digital camera.
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- Crystallography & Structural Chemistry (AREA)
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Abstract
Description
まず、本実施形態に係る液晶表示装置における画素アレイを構成する画素について、図2および図3を参照して説明する。図2は、本実施形態に係る液晶表示装置の画素1の概略構成を示す図である。図3は、図2に示す画素1のA-A’矢視断面図である。
画素1の共通電極4に酸化インジウムスズ(ITO)電極等の透明電極を用いる場合、ゲート電極26等の他の電極と比較して配線抵抗値が高くなり、クロストーク等の表示品位の低下を引き起こす可能性がある。ここで、共通配線9は、ゲート電極メタル等のゲート電極レイヤで形成しているため、共通電極4と比較して低抵抗である。そこで、本実施形態では、コンタクトホール2を介して共通電極4と共通配線9とを接続している。これによって、共通電極4の配線抵抗を下げることによって、表示品位の低下を軽減させることが可能である。しかし、この場合、コンタクトホール2を形成することによる画素開口率の低下、および、コンタクトホール2に起因する歩留まりの低下等が懸念される。さらには、コンタクトホール2の配置位置によっては、コンタクトホール2が形成されている画素1がスジ等になって見えてしまう虞がある。そのため、コンタクトホール2は適当に分散させ、間引いて形成することが好ましい。
以上のように、本発明の一態様に係る液晶表示装置においては、上記区画領域は、上記列の方向の長さが40個分の上記画素の長さであり、上記行の方向の長さが40個分の上記画素の長さである矩形領域であることが好ましい。
2 コンタクトホール
3 コンタクトホールが形成されていない画素
4 共通電極
5 画素アレイ
6 画素電極
7 ゲートバスライン
8 ソースバスライン
9 共通配線
10 スルーホール
10’ スルーホール
11 コンタクトホール
12 コンタクトホール
13 コンタクトホールが形成されている画素
14 絶縁膜
15 表示パネル
17 配向膜
20 区画領域
21 透明基板
22 半導体層
22a チャネル領域
22b 不純物注入領域
23 ゲート絶縁膜
24 第1層間絶縁膜
25 第2層間絶縁膜
26 ゲート電極
27 ドレイン電極
28 ソース電極
29 ドレイン領域
30 ソース領域
31 透明基板
32 TFT基板
33 対向基板
40 液晶層
41 画素
Claims (6)
- 第1基板上にマトリクス状に配置された複数の画素と、
複数の上記画素の各列に対応して配置された複数のソースバスラインと、
複数の上記画素の各行に対応して配置された複数のゲートバスラインと、
上記画素ごとに、上記第1基板上に形成された画素電極と、
上記第1基板上に形成され、上記画素電極と重畳する共通電極と、
複数の上記画素のいずれかに形成されたコンタクトホールを介して上記共通電極と接続された共通配線と、
上記第1基板と、該第1基板と対向する第2基板との間に挟持された液晶層とを備え、
一定の区画領域に含まれる複数の上記画素を繰り返し配列してなる液晶表示装置であって、
上記区画領域に含まれる任意の1つの上記コンタクトホールは、
他の上記コンタクトホールに最も近接する4つの上記コンタクトホールのいずれかであるか、
他の上記コンタクトホールに最も近接する4つの上記コンタクトホールのいずれかであると共に、自身に最も近接する4つの上記コンタクトホールによって形成される四角形であって、上記四角形の2つの対角線と、上記ゲートバスラインとがなす2つの角度の差が30度未満である上記四角形に含まれる上記コンタクトホールであり、
上記区画領域内において、各上記ソースバスラインには、1つの上記コンタクトホールが形成されていることを特徴とする液晶表示装置。 - 上記区画領域は、上記列の方向の長さが40個分の上記画素の長さであり、上記行の方向の長さが40個分の上記画素の長さである矩形領域であることを特徴とする請求項1に記載の液晶表示装置。
- 上記区画領域は、上記列の方向の長さが80個分の上記画素の長さであり、上記行の方向の長さが80個分の上記画素の長さである矩形領域であることを特徴とする請求項1に記載の液晶表示装置。
- 上記画素は、複数の副画素から構成されており、
上記コンタクトホールは、複数の上記副画素のいずれかに形成されていることを特徴とする請求項1~3のいずれか1項に記載の液晶表示装置。 - 上記共通電極は、透明導電体により形成されていることを特徴とする請求項1~4のいずれか1項に記載の液晶表示装置。
- 上記第2基板には、他の上記共通電極が形成されていることを特徴とする請求項1~5のいずれか1項に記載の液晶表示装置。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201180058831.9A CN103250092B (zh) | 2010-12-28 | 2011-12-21 | 液晶显示装置 |
| JP2012550877A JP5602881B2 (ja) | 2010-12-28 | 2011-12-21 | 液晶表示装置 |
| US13/990,891 US8941804B2 (en) | 2010-12-28 | 2011-12-21 | Liquid crystal display device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010-294115 | 2010-12-28 | ||
| JP2010294115 | 2010-12-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2012090810A1 true WO2012090810A1 (ja) | 2012-07-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2011/079607 Ceased WO2012090810A1 (ja) | 2010-12-28 | 2011-12-21 | 液晶表示装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8941804B2 (ja) |
| JP (1) | JP5602881B2 (ja) |
| CN (1) | CN103250092B (ja) |
| WO (1) | WO2012090810A1 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103268045A (zh) * | 2012-09-24 | 2013-08-28 | 厦门天马微电子有限公司 | Tft阵列基板及其制作方法、液晶显示设备 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103474436B (zh) * | 2013-09-18 | 2016-03-09 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
| CN104049800B (zh) * | 2014-05-30 | 2017-02-15 | 京东方科技集团股份有限公司 | 一种内嵌式触摸屏及显示装置 |
| TWI526761B (zh) * | 2014-08-20 | 2016-03-21 | 友達光電股份有限公司 | 液晶顯示面板 |
| CN104699351B (zh) * | 2015-04-01 | 2018-03-09 | 上海天马微电子有限公司 | 阵列基板、触控显示面板和触控显示装置 |
| CN106775165B (zh) * | 2017-01-06 | 2019-12-24 | 武汉华星光电技术有限公司 | 内嵌式触控显示面板及电子装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002207221A (ja) * | 2001-01-11 | 2002-07-26 | Seiko Epson Corp | 液晶表示装置 |
| JP2004109248A (ja) * | 2002-09-13 | 2004-04-08 | Nec Kagoshima Ltd | 液晶表示装置及びその製造方法 |
| JP2010026040A (ja) * | 2008-07-16 | 2010-02-04 | Seiko Epson Corp | 電気光学装置及び電子機器、並びに電気光学装置の製造方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100850380B1 (ko) * | 2002-09-03 | 2008-08-04 | 비오이 하이디스 테크놀로지 주식회사 | 횡전계 모드 액정표시장치 |
| JP4571845B2 (ja) * | 2004-11-08 | 2010-10-27 | シャープ株式会社 | 液晶表示装置用基板及びそれを備えた液晶表示装置及びその駆動方法 |
| EP2431794A4 (en) * | 2009-05-13 | 2013-03-27 | Sharp Kk | Liquid crystal display panel and liquid crystal display device |
| JP4911793B2 (ja) * | 2009-11-09 | 2012-04-04 | 東芝モバイルディスプレイ株式会社 | 液晶表示装置 |
-
2011
- 2011-12-21 WO PCT/JP2011/079607 patent/WO2012090810A1/ja not_active Ceased
- 2011-12-21 CN CN201180058831.9A patent/CN103250092B/zh not_active Expired - Fee Related
- 2011-12-21 JP JP2012550877A patent/JP5602881B2/ja not_active Expired - Fee Related
- 2011-12-21 US US13/990,891 patent/US8941804B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002207221A (ja) * | 2001-01-11 | 2002-07-26 | Seiko Epson Corp | 液晶表示装置 |
| JP2004109248A (ja) * | 2002-09-13 | 2004-04-08 | Nec Kagoshima Ltd | 液晶表示装置及びその製造方法 |
| JP2010026040A (ja) * | 2008-07-16 | 2010-02-04 | Seiko Epson Corp | 電気光学装置及び電子機器、並びに電気光学装置の製造方法 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103268045A (zh) * | 2012-09-24 | 2013-08-28 | 厦门天马微电子有限公司 | Tft阵列基板及其制作方法、液晶显示设备 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20130271715A1 (en) | 2013-10-17 |
| JPWO2012090810A1 (ja) | 2014-06-05 |
| US8941804B2 (en) | 2015-01-27 |
| CN103250092A (zh) | 2013-08-14 |
| JP5602881B2 (ja) | 2014-10-08 |
| CN103250092B (zh) | 2015-10-07 |
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