[go: up one dir, main page]

WO2011139006A1 - Transistor à couches minces organiques ayant une capacité d'injection de charge améliorée, et son procédé de fabrication - Google Patents

Transistor à couches minces organiques ayant une capacité d'injection de charge améliorée, et son procédé de fabrication Download PDF

Info

Publication number
WO2011139006A1
WO2011139006A1 PCT/KR2010/005917 KR2010005917W WO2011139006A1 WO 2011139006 A1 WO2011139006 A1 WO 2011139006A1 KR 2010005917 W KR2010005917 W KR 2010005917W WO 2011139006 A1 WO2011139006 A1 WO 2011139006A1
Authority
WO
WIPO (PCT)
Prior art keywords
injection layer
substrate
source
hole injection
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2010/005917
Other languages
English (en)
Korean (ko)
Inventor
노용영
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HANBAT NATIONAL UNIVERSITY
Original Assignee
HANBAT NATIONAL UNIVERSITY
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANBAT NATIONAL UNIVERSITY filed Critical HANBAT NATIONAL UNIVERSITY
Publication of WO2011139006A1 publication Critical patent/WO2011139006A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H10K10/84—Ohmic electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/30—Organic light-emitting transistors

Definitions

  • the present invention relates to a method for manufacturing an organic thin film transistor, a bipolar organic thin film transistor, an organic light emitting transistor, and a digital circuit including the same.
  • AM matrix active matrix driving method.
  • Inorganic thin film transistors such as silicon, which are currently used, have a high manufacturing temperature and are easily broken when bent or bent, so there is a limitation in applying them to flexible displays. Therefore, research on organic thin film transistors (OTFTs), which can be easily manufactured at low temperatures and can withstand bending or bending, is being actively conducted.
  • the organic thin film transistor is not only actively researched as a driving device of the next generation display device, but also can be applied to the production of RFID (Radio Frequency Identification Tag) tags that can be applied to the recognition of individual item units. It is expected.
  • the organic thin film transistor (OTFT) uses an organic semiconductor film instead of a silicon film as a semiconductor layer.
  • the organic thin film transistor (OTFT) is a low molecular organic thin film transistor such as oligothiophene or pentacene, depending on the material of the organic film. It is classified into a polymer organic thin film transistor such as polythiophene series.
  • the RFID tag When the RFID tag is manufactured using the organic thin film transistor as described above, the RFID tag can be manufactured at a lower manufacturing cost, and thus, it can be applied to all individual consumer goods.
  • CMOS metal oxide semiconductor
  • CMOS metal oxide semiconductor
  • high electron and hole injection with one electrode material mostly gold
  • Efficiency must be obtained.
  • the contact resistance generated between the electrode and the organic semiconductor is inevitable.
  • CMOS type organic digital devices inverters and ring oscillators manufactured using gold electrodes have a very low performance due to the high contact resistance between the gold electrodes and the N type organic semiconductors.
  • the method mainly used until the metal salt is inserted between the gold (Au) electrode and the N-type organic semiconductor between the two It is characterized by effectively lowering the contact resistance.
  • a prior art for solving the above problems which is a patent comprising a mixture consisting of a mixture of an organic material and a metal salt of the same component as the N-type organic semiconductor on the top of the source / drain electrode
  • the present invention relates to a technique for reducing contact resistance by coating.
  • Specific configurations for achieving this include a substrate; A gate electrode located on the substrate; A gate insulating film disposed over the entire surface of the substrate including the gate electrode; Source and drain electrodes spaced apart from each other on a portion of the gate insulating layer; A mixed layer disposed on the source / drain electrode and including an organic material and a metal salt; And an N-type organic semiconductor layer located on the substrate including the mixed layer.
  • the application of the above technique produces an effect of effectively lowering the contact resistance by inserting a very thin layer of a metal salt intermediate layer of several nanometers.
  • the above technique manufactures a mixture of organic salts and metal salts having the same composition as the N-type organic semiconductors to reduce the contact resistance between the source / drain electrodes and the organic semiconductor by vacuum deposition, the metal salt is selectively applied to only one of the charge injection electrodes. It is very difficult or impossible to do, and all the processes are done in a high vacuum deposition chamber, which makes the work process cumbersome and expensive, which is uneconomical.
  • the contact resistance of the N-type transistor can be improved to improve performance.
  • the P-type transistor has a fatal disadvantage of causing a decrease in performance by increasing the contact resistance. This is because only one direction change is possible to increase or decrease the work function of the Au electrode depending on the type of metal salt used. For this reason, if one type of metal salt layer is applied to the entire surface of the source / drain electrodes of all the transistors in the electronic circuit, the contact resistance of the N-type transistor can be improved to effectively increase the performance, but the contact resistance of the P-type transistor is increased.
  • the metal salt suitable for the hole injection is completely coated by vacuum deposition, the hole injection property can be effectively improved, but the electron injection property is deteriorated.
  • the metal salt charge transfer layer is formed through the deposition method, the electron and hole injection characteristics are improved simultaneously when the bipolar transistor or the organic light emitting transistor using the same can be transported in one transistor. It is impossible to bet.
  • the prior art method requires a relatively high temperature and high pressure process by depositing a metal salt in a high vacuum chamber to improve electron injection, which is not suitable for processing on a plastic substrate for implementing a flexible device.
  • a metal salt layer may be selectively applied to only one electrode among source / drain charge injection electrodes to improve contact resistance of N-type and P-type transistors simultaneously.
  • ink using an organic salt solution such as CS 2 CO 3 selectively on one of the source / drain electrodes is selectively applied to only one electrode through various printing methods, thereby effectively lowering the contact resistance of the N-type organic semiconductor.
  • the main object of the present invention is to provide a method of simultaneously improving the performance of N-type and P-type organic transistors by maintaining the contact resistance of P-type organic semiconductors.
  • the present invention is to provide a method for effectively improving the performance of the CMOS digital circuit consisting of N-type and P-type organic transistor through the selective application of the organic salt solution as described above.
  • the amphipathic organic thin film improves the N-type and P-type charge injection by effectively improving the contact resistance of the N-type and P-type in an ambipolar OTFT using an amphiphilic polymer semiconductor.
  • Another object of the present invention is to provide a method of manufacturing a transistor.
  • the present invention provides a method of manufacturing an organic light emitting transistor that can emit light using an amphiphilic organic thin film transistor with improved performance.
  • a gate insulating film disposed over the entire surface of the substrate including the gate electrode
  • Source / drain electrodes spaced apart from each other in a portion of the gate insulating layer
  • organic thin film transistor comprising a; organic semiconductor layer located on the substrate including the electron and hole injection layer.
  • the contact resistance between the source / drain electrode made of gold and the N-type can be greatly reduced, and the contact resistance between the source / drain electrode and the P-type organic semiconductor having low contact resistance is It can be kept in a low state, thereby providing a high performance amphiphilic organic thin film transistor and organic light emitting transistor having high electron and hole injection characteristics.
  • 1 is a cross-sectional view showing a conventional organic thin film transistor.
  • FIG. 2 is a flowchart illustrating a step of manufacturing the organic thin film transistor of the present invention in the form of a bottom gate.
  • FIG. 3 is a flowchart illustrating a step of manufacturing the organic thin film transistor of the present invention in the form of a top gate.
  • FIG. 4 is a cross-sectional view illustrating an organic thin film transistor having a bottom gate type according to an embodiment of the present invention.
  • FIG. 5 is a cross-sectional view illustrating an organic thin film transistor having a top gate type according to another embodiment of the present invention.
  • FIG. 6 is a diagram illustrating a hole curve according to a gate curve and a transition curve of a P-Channel of an organic thin film transistor of a bipolar top gate type in a state not treated with Cs 2 CO 3 .
  • FIG. 7 is a diagram illustrating a hole curve according to a gate curve and a transition curve of an N-channel of an organic thin film transistor of a bipolar top gate type in a state not treated with Cs 2 CO 3 .
  • FIG. 8 is a diagram illustrating a hole curve according to a gate curve and a transition curve of a P-Channel of an organic thin film transistor of a bipolar top gate type in a state in which Cs 2 CO 3 is applied to only one electrode.
  • FIG. 9 is a diagram illustrating a hole curve according to a gate curve and a transition curve of an N-channel of an organic thin film transistor of a bipolar top gate type in which Cs 2 CO 3 is applied to only one electrode.
  • FIG. 10 is a schematic diagram illustrating a step of selectively applying a metal salt solution to only P-type and N-type one organic transistor electrodes using spray coating.
  • FIG. 11 is a diagram illustrating a circuit diagram of an organic CMOS inverter fabricated after applying Cs 2 CO 3 to only an N-type organic thin film transistor source / drain electrode and a gain value according to an output curve and a gate voltage.
  • Source / drain electrodes of Au were formed through the printing process of inkjet printing using gold nanoparticles on a silicon substrate. The spacing between the two electrodes was spaced at 50 nm.
  • a shadow mask which has already been patterned, was placed on the substrate on which the source / drain electrodes were formed. Then, the ink prepared by dissolving Cs 2 CO 3 in a 2-ethoxyethanol solvent at a concentration of 1 mg / ml was applied using a spray coating machine at a distance of 8 cm from the sample for 10 seconds. Thereafter, the resultant was heated at 100 ° C. for 15 minutes using a hotplate to evaporate the remaining metal salt solvent.
  • pentacene a P-type organic semiconductor
  • a vacuum chamber In order to deposit the organic semiconductor, pentacene, a P-type organic semiconductor, was placed in a vacuum chamber, and then sublimed by applying a heat of 200 ° C. at 10 ⁇ 6 torr and then applied to a thickness of 30 to 70 nm.
  • PMMA After applying PMMA to the thickness of 200 nm by spin coating, an organic thin film transistor was manufactured by depositing a gate electrode having a thickness of 60 nm using Al only in the channel region of the transistor using a shadow mask.
  • FIG. 1 is a cross-sectional view showing a conventional organic thin film transistor.
  • a gate electrode 110 is formed on the substrate 100, and a gate insulating layer 120 is formed over the entire surface of the substrate including the gate electrode 110.
  • Source / drain electrodes 130 are formed on the gate insulating layer 120 to be spaced apart from each other, and the organic semiconductor layer 150 formed on the source / drain electrodes 130 and the gate insulating layer 120 is formed.
  • the conventional organic thin film transistor having such a structure has a problem that the contact resistance between the source / drain electrodes and the organic semiconductor layer is large. Since the source and drain electrodes serve to inject charge into the organic thin film, it is important to reduce the energy barrier between the electrode and the organic thin film which interferes with this.
  • a lot of gold is used as an electrode.
  • the work function of gold is 5.1 eV, and the charge injection is consistent with 5.1 eV, which is the highest Occupied Molecular Orbital (HOMO) value of pentacene. This is because the energy barrier for them is low.
  • the organic semiconductor layer provided in the organic thin film transistor cannot be doped with high concentration. Accordingly, the contact resistance between the source / drain electrode and the organic semiconductor layer is increased. The problem arises that an ohmic contact cannot be formed.
  • This problem of contact resistance is more important when an n-type OTFT and a p-type OTFT are used at the same time.
  • gold is used as the electron or hole injection source / drain electrode of the OTFT, and due to the work function (5.1 eV) of gold, it is possible to simultaneously obtain an ohmic contact that satisfies both N-type and P-type organic semiconductors.
  • the transistor performance is very low compared to the P type.
  • silicon materials are doped with N-type and P-type, respectively, to overcome these problems.
  • such selective doping is very difficult and many techniques for patterning the same. Not developed.
  • the bottom gate type organic thin film transistor provides a substrate, forms a gate electrode on the substrate, forms a gate insulating film to cover the gate electrode, and source / drain electrodes spaced apart from each other on a portion of the gate insulating film.
  • the organic semiconductor layer may be formed by selectively applying a metal salt to only one of the source / drain electrodes.
  • FIG. 3 is a flowchart illustrating a step of manufacturing the organic thin film transistor of the present invention in the form of a top gate.
  • An organic thin film transistor in the form of a top gate provides a substrate, and forms a source / drain electrode thereon so as to be spaced apart from each other, and then selectively applies a metal salt to only one of the source / drain electrodes and spreads the organic material over the entire surface thereon.
  • a gate insulating film is applied over the entire surface, and finally a gate electrode is formed between the source / drain electrodes of the transistor.
  • the substrate may be formed of a transparent substrate such as glass, a silicon substrate, or plastic.
  • the plastic substrate material is polyethersulphone (PES), polyacrylate (PAR, polyacrylate), polyetherimide (PET, polyetherimide), polyethylene naphthalate (PEN, polyethyelenen napthalate), polyethylene terephthalate (PET, polyethyeleneterepthalate (PPS) polyphenylene sulfide (PPS), polyallylate (polyallylate), polyimide (polyimide), polycarbonate (PC), cellulose tri acetate (TAC), cellulose acetate propinoate Use any one selected from).
  • a transparent substrate such as glass capable of UV transmission is used.
  • the gate electrode is made of gold (Au), nickel (Ni), copper (Cu), silver (Ag), aluminum (Al), aluminum alloy (Al-alloy), molybdenum (Mo), and molybdenum alloy (Mo-alloy). It may be formed of any one selected from, it is more preferable to form a molybdenum-tungsten (MoW) alloy.
  • the gate electrode may be formed through various printing processes. In general, the gate electrode may be manufactured using a printing process such as inkjet printing using a metal nanoparticle solution or a PEDOT: PSS conductive polymer as an ink. Through the printing process, the gate electrode can be formed and the vacuum process can be excluded, thereby reducing the manufacturing cost.
  • a gate insulating film is formed over the entire surface of the substrate including the gate electrode.
  • the gate insulating film is composed of a single film or a multilayer film of an organic insulating film or an inorganic insulating film, or an organic-inorganic hybrid film.
  • the inorganic insulating film any one or more selected from silicon oxide film, silicon nitride film, Al2O3, Ta2O5, BST, and PZT is used.
  • the organic insulating film may include polymethacrylate (PMMA, polymethylmethacrylate), polystyrene (PS, polystyrene), phenolic polymer, acrylic polymer, imide polymer such as polyimide, arylether polymer, amide polymer, fluorine polymer, p -Use any one or more selected from xyrene-based polymer, vinyl alcohol-based polymer, parylene (parylene).
  • PMMA polymethacrylate
  • PS polystyrene
  • phenolic polymer acrylic polymer
  • imide polymer such as polyimide, arylether polymer, amide polymer, fluorine polymer
  • p -Use any one or more selected from xyrene-based polymer, vinyl alcohol-based polymer, parylene (parylene).
  • Source / drain electrodes are formed on the gate insulating layer to be spaced apart from each other.
  • the source / drain electrode may be formed of a single layer selected from Au, Al, Ag, Mg, Ca, Yb, Cs-ITO, or an alloy thereof, and may improve adhesion to the gate insulating layer and prevent undercut phenomenon.
  • an adhesive metal layer such as Ti, Cr or Al may be formed in a multi-layer.
  • One of the electrodes on the source / drain electrodes includes Cs 2 CO 3 , CsF, Rb 2 CO 3 , K 2 CO 3 , Na to reduce contact resistance between the organic semiconductor layer and the source / drain electrodes and improve electron injection properties.
  • An ink solution for forming a metal salt electron injection layer selected from metal salts such as 2 CO 3 , LiF, CaF 2 , MgF 2 , NaCl, MgO, or a mixture thereof is prepared.
  • an ink solution for forming a metal salt hole injection layer selected from metal salts or organic substances such as V 2 O 5 , MoO 3 , F 4 TCNQ, or a mixture thereof is prepared.
  • the ink concentration plays a very important role in controlling the thickness of the metal salt layer of the metal salt, it is necessary to use a metal concentration ink of a constant concentration to obtain the effect of improving the electron or hole injection property.
  • the concentration of the ink used may vary slightly depending on the printing method used. However, if the metal salt layer having a thickness of 0.1-2 nm is applied using a concentration of 0.1 mg / ml-10 mg / ml, the expected effect can be obtained. Can be.
  • the metal salt electron injection layer or hole injection layer is achieved by applying the above-described metal salt ink solution using ink jet printing, screen printing, spray coating, gravure printing, gravure offset printing, reverse gravure offset printing, nozzle printing, pad printing method. .
  • the metal salt electron and hole injection layer has a thickness of less than 2 nm, preferably 0.1 to 2 nm.
  • the thickness of the metal salt solution layer is formed to be 0.1 nm or more, the electron or hole injection efficiency may be improved.
  • the metal salt solution layer is formed to be more than 2 nm, the electron and hole injection effects may be reduced. do.
  • the metal salt charge injection layer when the metal salt charge injection layer is to be applied to a CMOS electronic circuit or a bipolar organic thin film transistor, it is preferable to apply the metal salt charge injection layer to only one of a source or a drain electrode.
  • CMOS digital circuit including both an N-type semiconductor and a P-type semiconductor, the contact resistance of the N-type transistor is reduced and the contact resistance of the P-type transistor is maintained as it is.
  • the organic semiconductor layer is formed over the entire surface of the substrate including the metal salt solution layer.
  • the organic semiconductor layer may be an N-type organic semiconductor or a P-type organic semiconductor.
  • the N-type organic semiconductor is an acene-based material, a fully fluorinated acene-based material, a partially fluorinated acene-based material, a partially fluorinated oligothiophene-based material, a fullerene-based material, a fullerene-based material having a substituent, Fully fluorinated phthalocyanine materials, partially fluorinated phthalocyanine materials, perylene tetracarboxylic diimide materials, perylene tetracarboxylic dianhydride materials, naphthalene It is preferable to include either tetracarboxylic diimide (naphthalene tetracarboxylic diimide) material or naphthalene tetracarboxylic dianhydride (
  • the P-type organic semiconductor is acene (acene), poly-thienylenevinylene (poly-thienylenevinylene), poly-3-hexylthiophene (poly-3-hexylthiophen), alpha-hexathienylene ( ⁇ -hexathienylene), Naphthalene, alpha-6-thiophene, alpha-4-thiophene, alpha-4-thiophene, rubrene, polythiophene, polyparaphenylene Polyparaphenylenevinylene, polyparaphenylene, polyfluorene, polythiophenevinylene, polythiophene-heterocyclicaromatic copolymer, triarylamine ( triarylamine) or a derivative thereof, wherein the acene group is any one of pentacene, perylene, tetratracene or anthracene.
  • FIG. 4 is a cross-sectional view illustrating an organic thin film transistor having a bottom gate type according to an embodiment of the present invention.
  • FIG. 5 is a cross-sectional view illustrating an organic thin film transistor having a top gate type according to another embodiment of the present invention.
  • FIG. 6 is a diagram showing a hole curve according to a gate curve and a transition curve of a P-Channel of an organic thin film transistor of a bipolar top gate type in a state not treated with Cs 2 CO 3.
  • the organic polymer semiconductor used is ActivInk P2100 material purchased from Polyera, USA. It is a conjugated polymer based on thiophene and is a material with high hole mobility. 6 shows that P2100 is coated on a glass substrate on which Au source / drain electrodes are pre-patterned by spin coating, and then PMMA insulator is applied by spin coating, and an Al electrode is formed as a gate. The result obtained by measurement. As shown in FIG. 6, the P2100 OTFT showed the performance of a typical p-type OTFT and obtained a hole mobility of 0.16 to 0.54 cm2 / Vs when a drain voltage of -40 to -100 V was applied.
  • FIG. 7 is a diagram illustrating a hole curve according to a gate curve and a transition curve of an N-channel of an organic thin film transistor of a bipolar top gate type in a state not treated with Cs 2 CO 3 .
  • the Polyera P2100 organic polymer semiconductor material is a hole transport polymer
  • electron mobility was relatively low.
  • FIG. 7 when a positive voltage is applied to the source / drain electrodes and the gate electrode of the P2100 OTFT, the characteristics of the n-type OTFT are shown in FIG. 7, but the performance is 10 compared to the p-type characteristics of FIG. 6.
  • the drain voltage of 40 to 100 V was applied, the electron mobility of 0.016 to 0.022 cm2 / Vs was obtained. Due to the imbalance in mobility of p-type and n-type, when a CMOS circuit is constructed using P2100 material or the speed of the circuit is reduced and a bipolar organic light emitting transistor is fabricated, light emission does not occur.
  • FIG. 8 is a diagram illustrating a hole curve according to a gate curve and a transition curve of a P-Channel of an organic thin film transistor of a bipolar top gate type in a state in which Cs 2 CO 3 is applied to only one electrode.
  • the result of FIG. 8 is to apply the technique proposed in the present invention when fabricating the P2100 OTFT of the top gate structure by applying Cs2CO3 to one electrode by spray coating method to improve the electron injection characteristics and at the same time to minimize the effect on the hole injection It was.
  • the P2100 OTFT showed the performance of a typical p-type OTFT, and showed a hole mobility of 0.13 to 0.40 cm2 / Vs when a drain voltage of -40 to -100 V was applied.
  • the Cs 2 CO 3 was applied to Cs 2 CO 3 , but the Cs 2 CO 3 was applied to only one electrode of the source / drain to reduce the hole injection efficiency.
  • Spray application conditions were prepared by dissolving Cs 2 CO 3 in 2-ethoxyethanol solvent at a concentration of 1 mg / ml.
  • the prepared ink was applied at a distance of 8 cm from the sample for 10 seconds using a spray coating machine.
  • a time between 6-20 seconds high electron or hole injection properties can be obtained, and too thin or too thick thickness is formed to apply a time shorter than 6 seconds or longer than 20 seconds. It is difficult to obtain an improvement in the injection characteristics of holes.
  • FIG. 9 is a diagram illustrating a hole curve according to a gate curve and a transition curve of an N-channel of an organic thin film transistor of a bipolar top gate type in which Cs 2 CO 3 is applied to only one electrode.
  • FIG. 9 The results of FIG. 9 were measured through the same transistors from which the results of FIG. 8 were obtained, and the characteristics of n-type OTFT were improved by applying Cs 2 CO 3 by applying a positive voltage to the source / drain electrodes and the gate electrode. Observed. As shown in FIG. 9, when a drain voltage of 40 to 100 V was applied, an electron mobility of 0.14 to 0.24 cm 2 / Vs was obtained. This will also improve the electromigration obtained more than 10 times compared to devices that are not coated with Cs 2 CO 3 because the electron injecting capability increased by the Cs 2 CO 3 treatment.
  • FIG. 10 is a schematic diagram showing a step of selectively applying a metal salt solution to only one electrode using a spray coating.
  • a source / drain electrode of Au is formed through the photolithography process on the glass, Si wafer, or plastic substrate.
  • the spacing between Au source / drain electrodes is on the order of several um-several hundred um.
  • spray coating or other printing equipment described above may be used to selectively apply metal salt ink to the electrodes.
  • a metal salt solution to be applied is injected into the equipment, and a shadow mask, which is already patterned, is placed on the substrate on which the source / drain electrodes are formed.
  • the metal salt solution is applied to only one electrode of the source / drain and the other electrode is not applied.
  • printing equipment such as inkjet printing capable of tens of um high-resolution patterns by the equipment itself does not require such a shadow mask process and can be applied only to desired electrodes directly through the printing equipment.
  • the solvent is evaporated by applying heat to the substrate above the evaporation temperature of the used solvent to evaporate the used solvent and leave only the solid metal salt layer. Since the evaporation temperature of a conventional organic solvent is between 50 and 250 degrees Celsius, the temperature is added to the sample for 10 minutes through a hotplate to evaporate the solvent of the metal salt.
  • FIG. 11 is a diagram illustrating a circuit diagram of an organic CMOS inverter fabricated after applying Cs 2 CO 3 to only an N-type electrode, and a gain value according to an output curve and a gate voltage.
  • the CMOS inverter is a circuit in which a P-type OTFT and an N-type OTFT are 1: 1 coupled, and a detailed circuit diagram thereof is shown in FIG. 11.
  • the semiconductor used is P2100 manufactured by Polyera, which is the same as the above result. In general, P2100 is a hole-transfer polymer, and thus, if Cs 2 CO 3 is not selectively applied to only one electrode, the P TYPE OTFT shows 10 times or more performance as shown in FIGS.
  • the fabricated CMOS inverter shows a very low voltage gain of about 10-30, as shown in FIG.
  • a high voltage gain of about 70 may be obtained as shown in FIG. 11. This corresponds to the highest voltage gain of organic CMOS inverters reported to date.
  • Source / drain electrodes of Au were formed through a printing process of inkjet printing using gold nanoparticles on a silicon substrate. The spacing between the two electrodes was spaced at 50 nm.
  • a shadow mask which has already been patterned, was placed on the substrate on which the source / drain electrodes were formed. Then, the ink prepared by dissolving Cs 2 CO 3 in a 2-ethoxyethanol solvent at a concentration of 1 mg / ml was applied using a spray coating machine at a distance of 8 cm from the sample for 10 seconds. Thereafter, the resultant was heated at 100 ° C. for 15 minutes using a hotplate to evaporate the remaining metal salt solvent.
  • pentacene a P-type organic semiconductor
  • a vacuum chamber In order to deposit the organic semiconductor, pentacene, a P-type organic semiconductor, was placed in a vacuum chamber, and then sublimed by applying a heat of 200 ° C. at 10 ⁇ 6 torr and then applied to a thickness of 30 to 70 nm.
  • PMMA After applying PMMA to the thickness of 200 nm by spin coating, an organic thin film transistor was manufactured by depositing a gate electrode having a thickness of 60 nm using Al only in the channel region of the transistor using a shadow mask.
  • CMOS metal oxide semiconductor
  • OTFT was prepared by applying poly (9,9-dioctylfluorene-co-benzothiadiazole) (F8BT), an organic semiconductor material having bipolarity.
  • F8BT poly (9,9-dioctylfluorene-co-benzothiadiazole)
  • OTFT was prepared in the same manner as in Example 1 by applying poly (9,9-dioctylfluorene-co-benzothiadiazole) (F8BT), a bipolar organic semiconductor material having excellent luminescence properties.
  • F8BT poly (9,9-dioctylfluorene-co-benzothiadiazole)

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)

Abstract

La présente invention concerne un transistor à couches minces organiques dans lequel une solution de CS2CO3 est appliquée uniquement à une parmi les électrodes de source/drain sur un substrat pour améliorer la capacité d'injection d'électrons, ainsi qu'un circuit numérique à semi-conducteur d'oxyde métallique complémentaire (CMOS). Le transistor à couches minces organiques comporte: un substrat ; une électrode de grille disposée sur le substrat ; un diélectrique de grille disposé sur le substrat qui comporte l'électrode de grille ; des électrodes de source/drain disposées séparément sur des parties du diélectrique de grille ; une couche d'injection d'électrons appliquée à une des électrodes de source/drain ; et une couche semi-conductrice organique disposée sur le substrat qui comprend la couche d'injection d'électrons.
PCT/KR2010/005917 2010-05-07 2010-09-01 Transistor à couches minces organiques ayant une capacité d'injection de charge améliorée, et son procédé de fabrication Ceased WO2011139006A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2010-0042894 2010-05-07
KR1020100042894A KR101101479B1 (ko) 2010-05-07 2010-05-07 전하 주입성을 향상시킨 유기박막트랜지스터 및 이의 제조방법

Publications (1)

Publication Number Publication Date
WO2011139006A1 true WO2011139006A1 (fr) 2011-11-10

Family

ID=44903853

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2010/005917 Ceased WO2011139006A1 (fr) 2010-05-07 2010-09-01 Transistor à couches minces organiques ayant une capacité d'injection de charge améliorée, et son procédé de fabrication

Country Status (2)

Country Link
KR (1) KR101101479B1 (fr)
WO (1) WO2011139006A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130263916A1 (en) * 2010-09-30 2013-10-10 University Of South Florida All spray see-through organic solar array with encapsulation
WO2019114502A1 (fr) 2017-12-12 2019-06-20 Boe Technology Group Co., Ltd. Substrat luminescent organique et son procédé de préparation, appareil d'affichage et procédé de commande d'affichage
CN111192969A (zh) * 2020-01-08 2020-05-22 大连理工大学 一种基于聚f8bt晶体的发光场效应管结构及制备方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102331101B1 (ko) * 2015-01-02 2021-11-26 엘지전자 주식회사 혼합 전하주입층 및 그 이용 방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005203728A (ja) * 2003-08-19 2005-07-28 Seiko Epson Corp 電極、電極形成方法、薄膜トランジスタ、電子回路、有機エレクトロルミネッセンス素子、表示装置および電子機器
KR20060098002A (ko) * 2005-03-08 2006-09-18 삼성에스디아이 주식회사 유기 박막 트랜지스터 및 이를 구비한 평판 디스플레이 장치
KR100683800B1 (ko) * 2005-11-12 2007-02-20 삼성에스디아이 주식회사 유기 발광 디스플레이 장치

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4774679B2 (ja) * 2004-03-31 2011-09-14 大日本印刷株式会社 有機半導体装置
JP5121162B2 (ja) * 2005-04-22 2013-01-16 株式会社半導体エネルギー研究所 半導体素子、発光装置及び電気機器

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005203728A (ja) * 2003-08-19 2005-07-28 Seiko Epson Corp 電極、電極形成方法、薄膜トランジスタ、電子回路、有機エレクトロルミネッセンス素子、表示装置および電子機器
KR20060098002A (ko) * 2005-03-08 2006-09-18 삼성에스디아이 주식회사 유기 박막 트랜지스터 및 이를 구비한 평판 디스플레이 장치
KR100683800B1 (ko) * 2005-11-12 2007-02-20 삼성에스디아이 주식회사 유기 발광 디스플레이 장치

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130263916A1 (en) * 2010-09-30 2013-10-10 University Of South Florida All spray see-through organic solar array with encapsulation
WO2019114502A1 (fr) 2017-12-12 2019-06-20 Boe Technology Group Co., Ltd. Substrat luminescent organique et son procédé de préparation, appareil d'affichage et procédé de commande d'affichage
EP3724935A4 (fr) * 2017-12-12 2021-09-08 Boe Technology Group Co., Ltd. Substrat luminescent organique et son procédé de préparation, appareil d'affichage et procédé de commande d'affichage
US11211592B2 (en) 2017-12-12 2021-12-28 Chengdu Boe Optoelectronics Technology Co., Ltd. Organic luminescent substrate, preparation method thereof, display apparatus, and display driving method
CN111192969A (zh) * 2020-01-08 2020-05-22 大连理工大学 一种基于聚f8bt晶体的发光场效应管结构及制备方法
CN111192969B (zh) * 2020-01-08 2021-01-05 大连理工大学 一种基于聚f8bt晶体的发光场效应管结构及制备方法

Also Published As

Publication number Publication date
KR101101479B1 (ko) 2012-01-03
KR20110123415A (ko) 2011-11-15

Similar Documents

Publication Publication Date Title
Kim et al. Organic TFT array on a paper substrate
Lucas et al. Organic transistors and phototransistors based on small molecules
JP4486000B2 (ja) 薄膜トランジスタ、その製造方法及びそれを備えた平板表示装置
US9705098B2 (en) Method for producing an organic field effect transistor and an organic field effect transistor
CN102867914B (zh) 电子器件和半导体器件的制造方法
CN102017209A (zh) 有机薄膜晶体管
CN102144311A (zh) 用于顶栅有机薄膜晶体管的经表面处理的基板
GB2462591A (en) Fabricating OTFTs using the LITI method
WO2016148460A1 (fr) Transistor à couches minces à deux grilles
WO2015174749A1 (fr) Couche de nanotubes de carbone entre couches, son procédé de fabrication et transistor en couches minces utilisant celle-ci
US20120037907A1 (en) Method of Forming Source and Drain Electrodes of Organic Thin Film Transistors by Electroless Plating
Horowitz Organic transistors
KR101172187B1 (ko) 스프레이 방식을 이용한 박막트랜지스터 및 전자회로를 제조하는 방법
TW201609727A (zh) Ｎ－氟烷基取代之二溴萘二亞胺及彼等做為半導體之用途
WO2011139006A1 (fr) Transistor à couches minces organiques ayant une capacité d'injection de charge améliorée, et son procédé de fabrication
WO2016010332A1 (fr) Procédé de fabrication d'un transistor selon une impression sélective de dopant
JP2005286329A (ja) 有機電界効果トランジスタ、それを具備する平板ディスプレイ装置、及び有機電界効果トランジスタの製造方法
US20110053314A1 (en) Method of Fabricating Top Gate Organic Semiconductor Transistors
CN101257093B (zh) 一种有机薄膜晶体管及其制备方法
CN106062981A (zh) 甲氧基芳基表面改性剂和包含这样的甲氧基芳基表面改性剂的有机电子器件
US20060169974A1 (en) Thin film transistor, a method of manufacturing the same, and a flat panel display device including the thin film transistor
KR100719566B1 (ko) 유기 박막 트랜지스터, 및 이를 구비한 평판 표시 장치
JP2007273594A (ja) 電界効果トランジスタ
Ribierre et al. Patterning by laser annealing of complementary inverters based on a solution-processible ambipolar quinoidal oligothiophene
KR100749502B1 (ko) 박막 트랜지스터의 제조방법, 이 방법에 의해 제조된 박막트랜지스터 및 이 박막 트랜지스터를 구비한 표시 장치

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10851094

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10851094

Country of ref document: EP

Kind code of ref document: A1