WO2011135249A1 - Procédé de préparation d'une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium - Google Patents
Procédé de préparation d'une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium Download PDFInfo
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- WO2011135249A1 WO2011135249A1 PCT/FR2011/050948 FR2011050948W WO2011135249A1 WO 2011135249 A1 WO2011135249 A1 WO 2011135249A1 FR 2011050948 W FR2011050948 W FR 2011050948W WO 2011135249 A1 WO2011135249 A1 WO 2011135249A1
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
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- H—ELECTRICITY
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- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/129—Passivating
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- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/12—Active materials
- H10F77/122—Active materials comprising only Group IV materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
- H10F77/169—Thin semiconductor films on metallic or insulating substrates
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/40—Optical elements or arrangements
- H10F77/413—Optical elements or arrangements directly associated or integrated with the devices, e.g. back reflectors
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- H—ELECTRICITY
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- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/70—Surface textures, e.g. pyramid structures
- H10F77/707—Surface textures, e.g. pyramid structures of the substrates or of layers on substrates, e.g. textured ITO layer on a glass substrate
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- H10P32/141—
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- H10P32/171—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the presence is a result of the photovoltaic tech nology. More specifically, it relates to a new method of manufacturing photovoltaic cells on siluminum plates (also commonly called "wafers").
- BSRV Back Surface Recombination Velocity
- BSR Back Surface Reflectance
- AI-BSF aluminum backfield
- B-BSF boron rear fields
- the B-BSF can be formed without inducing stresses to the silicon substrate, and thus does not create a curvature of the silicon wafer.
- - B-BSF provides a more highly concentrated p + zone because of its solubility limit in the larger silicon, thus allowing a lower recombination rate (larger back repellent field).
- BSRV surface recombination
- BSR increase reflectivity
- boron diffusion is considered one of the most difficult techniques to implement in solar cell manufacturing processes.
- the diffusion coefficient of boron is very good compared with that of phosphorus. Therefore, high diffusion temperatures must be applied to boron diffusion. Therefore, when using BBr 3 as a source of boron, its diffusion must be implemented before the diffusion of the transmitter, to avoid the redistribution of phosphorus atoms.
- Step 1 BBr 3 is diffused onto a p-type silicon plate etched on the front and back faces.
- Step 2 Remove on the front and rear faces the boron-doped silicon oxide layer thus formed in step 1, hereinafter referred to as BSG (from the English acronym "Boro-Silicate Glass”) .
- Step 3 The protection of the rear face is carried out by depositing a thin thermal oxide surmounted by a silicon nitride (SiN x ) (deposited by PECVD - namely "Plasma Enhanced Chemical
- Vapor Deposition which results in” plasma-assisted chemical vapor deposition "). This step also allows the passivation of the rear face.
- Step 4 The boron diffused on the front face is etched in hot soda.
- Step 5 The diffusion of phosphorus is carried out from a liquid source of POCl3 on the front face.
- Step 6 The phosphorus-doped silicon oxide layer thus formed in step 5, hereinafter referred to as the PSG layer (from the English acronym "Phospho-Silicate Glass"), is removed.
- This step 6 is not explicitly described in this publication, but it is obvious that it must be performed to continue the realization of a solar cell.
- Step 1 BBr 3 is diffused as a source of boron according to the "back to back” technique, namely that two plates of sil here are positioned back to back.
- a zone rich in boron (hereinafter referred to as "BRL” because of the English acronym “Boron Rich Layer”) is formed.
- BRL Boron Rich Layer
- Step 2 To facilitate the removal of the BRL, an in situ oxidation is carried out to transform the BRL into a boron doped silicon oxide (BSG) layer.
- the boron-doped silicon oxide (BSG) layer and the BRL thus formed are removed by soaking in a solution of hydrofluoric acid.
- Step 3 silicon wafers are returned to find "face to face” and is carried out the diffusion of POCl 3, is formed of silicon oxide layer doped with phosphorus (PSG) and at the same time a B- BSF .
- PSG silicon oxide layer doped with phosphorus
- Step 4 The phosphorus doped silicon oxide (PSG) layer thus formed in step 3 is removed.
- Step 1 Boron is deposited by "spin-coating" (or in other words spin spreading) of boric acid.
- Step 2 The boron is diffused.
- Step 3 Remove the boron-doped silicon oxide (BSG) layer thus formed in step 1.
- BSG boron-doped silicon oxide
- Step 4 Phosphorus is deposited by "spin coating" of phosphoric acid.
- Step 5 Diffuse phosphorus.
- Step 6 The phosphorus doped silicon oxide (PSG) layer thus formed in step 5 is removed.
- the present invention proposes to overcome these drawbacks by providing a completely original process for preparing on silicon wafers a structure of the n + pp + or p + nn + type depending on the nature of the substrate, of which the p + zone is obtained by diffusion of boron so as to obtain a B-BSF, and the number of stages of which is reduced compared with those known from the state of the art. Indeed, this process is limited to three main stages.
- the method according to the invention has the advantage of having used technologies conventionally used in the field of photovoltaics and which are simple to implement such as the PECVD.
- the silicon plate preparation method of a n + pp + or p + nn + type structure according to the present invention is characterized in that it comprises the following successive steps:
- a borated doped silicon oxide (BSG) layer is formed by PECVD on the back side, then a barrier layer to the diffusion of SiO x .
- BSG borated doped silicon oxide
- a source of phosphorus is diffused so that phosphorus and boron co-diffuse and form in addition:
- a layer of phosphorus doped phosphorus (PSG) siloxane is phosphorus doped phosphorus (PSG) siloxane
- the silfoil plate can be cut with a monocrystalline silicon ingot formed by the Czochralski pulling method (CZ silicon plate) or by the floating zone pulling method (FZ silicon plate) or by a multicrystalline silicon ingot (multicrystalline silicon plate) or a silicon ribbon for example: EFG plate cut with a silicon ribbon obtained by the Edge defined Film-fed Growth technique, or RGS plate cut from a ribbon of silicon obtained by the technique "Ribbon Growth on Substrate".
- the thickness of the silicon wafer is advantageously between 50 ⁇ and 500 ⁇ .
- step a) of the process according to the invention the deposition of the layer of BSG and of the SiOx layer are carried out successively in the same reactor.
- the PECVD deposition of the BSG layer can be carried out at a temperature of between 300 and 400 ° C.
- the plasma power can be between 500 and 1500W.
- Silane, trimethyl borate (known as TMB and formic chemistry B (OCH 3 ) 3) as a source of boron, and nitrous oxide (N 2 O) are used as precursors. ).
- the flow rate of TMB can be between 100 and 1000 sccm.
- the flow rate of N 2 O can be between 500 and 2000 sccm.
- the duration of the deposit is between 10 to 20 minutes.
- the temperature is preferably between 300 and 400 ° C.
- the power can be between 500 and 1500W.
- silane the flow rate of which is advantageously between 20 and 50 sccm and of N 2 O, the flow rate of which is preferably between 400 and 1000 sccm.
- a silicon wafer which comprises:
- step b) of the process according to the invention is carried out in a low pressure thermal diffusion oven.
- a low pressure thermal diffusion oven may be a quartz diffusion furnace.
- a diffusion furnace of the LYDO P® type is used (it is a workhorse worker whose technical characteristics are described in the international patent application WO 02 / 093621 A), which allows the diffusion of the dopants in the silicon wafer.
- step b) can be carried out in an oven at atmospheric pressure.
- the n + and p + zones of the silicon wafer are formed.
- step b) of the method according to the invention comprises the following successive steps:
- step b1) the boron is first blown into the silicon wafer from the layer of BSG formed at the end of step a), and then
- a source of phosphorus is diffused so that boron and phosphorus co-diffuse.
- step b) boron is first diffused into the siluminum plate from the layer of BSG that was formed in step a), which allows the formation of the p + zone.
- the oven temperature can be between 850 and 1050 ° C.
- the flow rate of oxygen is between 500 and 2000 sccm.
- the boron diffusion can take place for 15 minutes to 90 minutes depending on the temperature.
- the pressure is advantageously maintained between 200 and 400 mbar. The diffusion of boron is initiated before the diffusion of phosphorus because it requires a longer time to form a sufficient BSF.
- POCI3 is introduced into the furnace, the diffusion of phosphorus is then initiated, which allows the formation of the n + zone. Boron continues to diffuse, allowing further formation of the p + zone. Thus, boron and phosphorus co-diffuse.
- the flow of oxygen between 300 and 1000 sccm is advantageously reduced.
- the flow rate in POCI3 can be set between 300 and 800 sccm. Preferably, this co-diffusion takes place for a period of between 10 and 60 minutes.
- step b) of the method according to the invention there is a silicon plate which comprises:
- Step c) of the preparation process according to the invention may comprise the following successive stages:
- c1) is carried out a 1 st wet chemical etching, for example in a concentrated hydrofluoric acid solution between 1 to 10% (i.e. diluted between 1 to 10% in deionized water), so as to remove the layers of BSG and PSG.
- BRL is oxidized, for example by passing oxygen at a flow rate of between 500 and 2000 sccm, at a temperature between 700 and 1000 ° C, so as to obtain a thin layer of BSG formed from boron present in the BRL and oxygen present in the furnace atmosphere.
- step c3) performing a 2 nd wet chemical etching, for example in a concentrated hydrofluoric acid solution at 2%, so as to remove the oxide layer formed BSG after step c2).
- step c2 the thermal oxidation used for step c2) can be replaced by a wet oxidation via a bubbling nitric acid solution or a mixture of sulfuric acid and potassium permanganate. potassium in step c). Nevertheless, this technique is less advantageous because of environmental problems that may arise from the use of these chemical compounds.
- Step c) of the process according to the invention is advantageously carried out in an oxidation furnace, or even in the thermal diffusion oven used in step b) (such as a LYDOP ® type furnace).
- a silicon plate which comprises:
- the process for preparing silicon plates with an n + pp + or p + nn + type structure according to the present invention is characterized in that it consists of the successive steps a) to c). as described above.
- Another object of the present invention is a n + pp + or p + nn + type silicon wafer that can be obtained by the preparation method as described above.
- An object of the invention is a photovoltaic cell manufacturing method in which a silicon plate of n + pp or p + nn + type structure is prepared according to the preparation method as described above.
- Another object of the present invention is a method for manufacturing photovoltaic cells, characterized in that it comprises the following steps:
- a silicon wafer of structure of the n + pp + or p + nn + type is prepared according to the method of preparation as described above.
- a passivation layer is deposited on the rear face.
- Step b) Electrical contacts in the form of a grid are placed on the front and rear faces of the silicon wafer obtained at the end of step b), or possibly at the end of step c).
- Step b) is advantageously carried out by PECVD by depositing Si x N y : H (i.e., hydrogenated silicon nitride).
- step b) could be carried out by UV-CVD (ie by chemical deposition under ultraviolet light).
- step d) The laying of the electrical contacts of step d) is performed by screen printing, followed by annealing to harden the metal paste thus deposited during said screen printing and ensure good contact.
- Silkscreening of the contacts by grid makes it possible to avoid the curvature of the silicon wafers, as in the case of photovoltaic cells comprising an AI-BSF.
- Another object of the present invention is a photovoltaic cell obtainable by the manufacturing method described above.
- Figure 1 shows schematically the course of steps a) to c) of the preparation process according to the invention.
- Figure 2 is a graph showing the diffusion profile at 850 ° C for 60 minutes of the dopants (i.e., phosphorus and boron) versus the depth in the silicon wafer.
- dopants i.e., phosphorus and boron
- FIG. 3 is a graph representing the internal quantum efficiency obtained on two photovoltaic cells, one of which is manufactured according to the manufacturing method of the invention and the second with an AI-BSF.
- FIG. 1 schematically represents the progress of steps a) to c) of the process for preparing a n + pp + type silicon wafer according to the invention, namely the silicon wafer obtained at the end of each of these steps.
- a p-type silicon plate 1 which comprises a front face 8 and a rear face 9.
- step a) of the preparation process according to the invention PECVD is formed on the rear face 9 of this p-type silicon wafer 1, a layer of boron-doped silicon oxide (BSG) 2, and then a barrier layer to the diffusion of SiO x 3 is obtained at the end of step a) as shown in Figure 1 a silicon plate which comprises:
- step b) of this process the boron is first diffused. Then, a source of phosphorus is diffused so that phosphorus and boron co-diffuse and form on the front face 8 of the silicon wafer obtained at the end of step a) an oxide layer phosphorus-doped silicon (PSG) 4, as well as a n + 5 type zone, namely a rich (or in other words heavily doped) phosphorus zone, and on the rear face 9 a p + 7 doped zone, and a zone rich in boron (BRL) 6.
- PSG oxide layer phosphorus-doped silicon
- BTL zone rich in boron
- a silicon plate which comprises:
- step c) of said process according to the invention the layers BSG 2, PSG 4 and SiO x 3 are removed, the BRL 6 is oxidized and the resulting layer is removed from this oxidation.
- step c) a silicon plate is obtained which comprises:
- a p + type zone 7 which constitutes the B-BSF of said silicon wafer.
- FIG. 2 is a graph showing the diffusion profile at 850 ° C. for 60 minutes of the dopants (phosphorus and boron) of a silicon wafer as prepared according to the method of the invention.
- concentration expressed in number of atoms of respectively phosphorus and boron per cm 3
- depth expressed in ⁇
- Figure 3 and Table 1 show the feasibility results of the process of the invention compared to the known method of the state of technology with an AI-BSF.
- FIG. 3 is a graph showing the internal quantum efficiency obtained on two photovoltaic cells formed from p-type monocrystalline silicon substrates, one of which has an AI-BSF, and the other cell is prepared according to the invention, to know that she has a B-BSF.
- the cell having an AI-BSF was manufactured according to a conventional preparation method of this type of cell.
- the abbreviation “Jcc” means the short-circuit photocurrent density and the abbreviation “Vco” means the open circuit voltage.
- the abbreviation “FF” means the form factor and “Yield (%)” means the photovoltaic conversion efficiency.
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Abstract
Description
Claims
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE112011101439T DE112011101439T5 (de) | 2010-04-26 | 2011-04-26 | Verfahren zur Herstellung einer Struktur vom n+pp+-Typ oder p+nn+-Typ auf Siliciumwafern |
| US13/643,641 US9082924B2 (en) | 2010-04-26 | 2011-04-26 | Method for preparing an N+PP+ or P+NN+ structure on silicon wafers |
| CN201180021231.5A CN102971867B (zh) | 2010-04-26 | 2011-04-26 | 在硅晶片上制备n+pp+型或p+nn+型结构的方法 |
| KR1020127030885A KR101777277B1 (ko) | 2010-04-26 | 2011-04-26 | 실리콘 웨이퍼들 상에 n+pp+ 또는 p+nn+ 구조를 준비하는 방법 |
| JP2013506715A JP5940519B2 (ja) | 2010-04-26 | 2011-04-26 | シリコンウェハ上にn+pp+型又はp+nn+型の構造を作製する方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1053154A FR2959351B1 (fr) | 2010-04-26 | 2010-04-26 | Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium |
| FR10/53154 | 2010-04-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2011135249A1 true WO2011135249A1 (fr) | 2011-11-03 |
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ID=43759723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/FR2011/050948 Ceased WO2011135249A1 (fr) | 2010-04-26 | 2011-04-26 | Procédé de préparation d'une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9082924B2 (fr) |
| JP (1) | JP5940519B2 (fr) |
| KR (1) | KR101777277B1 (fr) |
| CN (1) | CN102971867B (fr) |
| DE (1) | DE112011101439T5 (fr) |
| FR (1) | FR2959351B1 (fr) |
| WO (1) | WO2011135249A1 (fr) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103178152A (zh) * | 2011-12-22 | 2013-06-26 | 茂迪股份有限公司 | 结晶硅太阳能电池的制造方法 |
| KR101371801B1 (ko) | 2013-01-11 | 2014-03-10 | 현대중공업 주식회사 | 양면수광형 태양전지의 제조방법 |
| JP2014045036A (ja) * | 2012-08-24 | 2014-03-13 | Amaya Corp | 半導体装置の製造方法 |
| NL2010116C2 (en) * | 2013-01-11 | 2014-07-15 | Stichting Energie | Method of providing a boron doped region in a substrate and a solar cell using such a substrate. |
| US10825945B2 (en) | 2014-07-01 | 2020-11-03 | Universität Konstanz | Method of producing differently doped zones in a silicon substrate, in particular for a solar cell |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20150007394A (ko) * | 2013-07-10 | 2015-01-21 | 현대중공업 주식회사 | 양면수광형 태양전지의 제조방법 |
| JP6144778B2 (ja) * | 2013-12-13 | 2017-06-07 | 信越化学工業株式会社 | 太陽電池の製造方法 |
| WO2015186288A1 (fr) * | 2014-06-02 | 2015-12-10 | 株式会社Sumco | Tranche de silicium et son procédé de fabrication |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103178152A (zh) * | 2011-12-22 | 2013-06-26 | 茂迪股份有限公司 | 结晶硅太阳能电池的制造方法 |
| CN103178152B (zh) * | 2011-12-22 | 2015-09-16 | 茂迪股份有限公司 | 结晶硅太阳能电池的制造方法 |
| JP2014045036A (ja) * | 2012-08-24 | 2014-03-13 | Amaya Corp | 半導体装置の製造方法 |
| KR101371801B1 (ko) | 2013-01-11 | 2014-03-10 | 현대중공업 주식회사 | 양면수광형 태양전지의 제조방법 |
| NL2010116C2 (en) * | 2013-01-11 | 2014-07-15 | Stichting Energie | Method of providing a boron doped region in a substrate and a solar cell using such a substrate. |
| WO2014109639A1 (fr) * | 2013-01-11 | 2014-07-17 | Stichting Energieonderzoek Centrum Nederland | Procédé permettant de fournir une région dopée au bore dans un substrat et une cellule solaire utilisant ledit substrat |
| US10580922B2 (en) | 2013-01-11 | 2020-03-03 | Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno | Method of providing a boron doped region in a substrate and a solar cell using such a substrate |
| US10825945B2 (en) | 2014-07-01 | 2020-11-03 | Universität Konstanz | Method of producing differently doped zones in a silicon substrate, in particular for a solar cell |
Also Published As
| Publication number | Publication date |
|---|---|
| DE112011101439T5 (de) | 2013-04-11 |
| KR101777277B1 (ko) | 2017-09-11 |
| FR2959351B1 (fr) | 2013-11-08 |
| FR2959351A1 (fr) | 2011-10-28 |
| JP5940519B2 (ja) | 2016-06-29 |
| US20130112260A1 (en) | 2013-05-09 |
| US9082924B2 (en) | 2015-07-14 |
| KR20130129818A (ko) | 2013-11-29 |
| JP2013526049A (ja) | 2013-06-20 |
| CN102971867B (zh) | 2015-11-25 |
| CN102971867A (zh) | 2013-03-13 |
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