WO2011016392A1 - Method for manufacturing silicon carbide semiconductor device - Google Patents
Method for manufacturing silicon carbide semiconductor device Download PDFInfo
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- WO2011016392A1 WO2011016392A1 PCT/JP2010/062866 JP2010062866W WO2011016392A1 WO 2011016392 A1 WO2011016392 A1 WO 2011016392A1 JP 2010062866 W JP2010062866 W JP 2010062866W WO 2011016392 A1 WO2011016392 A1 WO 2011016392A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
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- the present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to activation heat treatment after impurity ions are implanted into a silicon carbide substrate.
- Silicon carbide semiconductors have superior characteristics such as higher breakdown voltage, wider energy band gap, and higher thermal conductivity than silicon semiconductors, so light emitting elements, high power power devices, high temperature resistant elements, radiation resistant elements Applications to devices, high frequency devices, etc. are expected.
- an epitaxial growth layer is formed as an active region of a semiconductor element on a silicon carbide substrate (SiC substrate), and this epitaxial growth layer is selected. It is necessary to control the conductivity type and carrier concentration in the region. Therefore, it is possible to form various p-type or n-type impurity doped regions by partially injecting impurity dopant atoms into the epitaxial growth layer, which is an active region, and to configure semiconductor elements such as transistors and diodes. Become.
- Patent Documents 1 to 3 disclose a high-temperature annealing method that can suppress surface roughness of the silicon carbide substrate.
- Patent Document 1 discloses that an SiC substrate is formed by depositing a diamond-like carbon (DLC) film or an organic film as a protective film on an epitaxial layer serving as an active region and performing activation annealing (activation heat treatment).
- DLC diamond-like carbon
- activation heat treatment activation heat treatment
- Patent Document 2 discloses a high-temperature annealing method that prevents the occurrence of surface roughness by performing activation annealing using a film obtained by carbonizing a resist layer formed on an active region as a protective film.
- Patent Document 3 discloses a high-temperature annealing method for preventing the occurrence of surface roughness due to activation annealing by forming a carbon film by sputtering on an active region and using it as a protective film, and defining the purity of the carbon film. Is disclosed.
- a protective film is formed only on the front surface (activated surface or epi surface) of the silicon carbide substrate before the high-temperature annealing treatment that is the activation heat treatment. It was. However, in this case, thermal stress due to the difference in thermal expansion coefficient between the protective film and the silicon carbide substrate exists only on the front surface side of the silicon carbide substrate, and there is no thermal stress on the back surface. Further, the front surface side of the silicon carbide substrate is affected by the residual stress (internal stress) of the protective film, but is not affected by the back surface side having no protective film.
- the protective film when the protective film is formed only on the front surface of the silicon carbide substrate, stress due to the film formation exists asymmetrically on both surfaces of the substrate, resulting in high temperature activation annealing. Sometimes the substrate warps.
- the front surface and the back surface of the silicon carbide substrate are heated differently, so the front surface A difference in temperature occurs between the back surface and the back surface, and this temperature difference causes a difference in thermal expansion, which causes warpage of the substrate.
- the warpage of the substrate becomes particularly noticeable as the diameter of the substrate increases.
- the back surface is used as an element function, such as the back electrode of the silicon carbide substrate, it is necessary to suppress surface roughness on the back surface side of the silicon carbide substrate.
- the present invention has been made in view of the above circumstances, and not only surface roughening and bunching due to high-temperature annealing treatment, but also warping of the substrate is suppressed, and carbonization is smoother than before while maintaining a high impurity activation rate. It is an object of the present invention to provide a method for manufacturing a silicon carbide semiconductor device having a silicon surface.
- FIG. 1 the conceptual diagram of the heating of the board
- reference numeral 1 is a silicon carbide substrate provided with a protective film
- reference numeral 2 is a susceptor
- reference numeral 2A is a susceptor body
- reference numeral 2B is a susceptor lid
- reference numeral 2a is a sample stage.
- the protective film is absorbed and heated, and the front surface is heated by heat conduction from the heated protective film.
- silicon carbide substrate 1 is translucent on the surface (back surface) that does not have a protective film, radiant heat passes through the back surface. Therefore, the back surface is heated by heat conducted from the front surface through the substrate.
- the surface of the silicon carbide substrate 1 that has the protective film and the surface that does not have a different mode of heating resulting in a temperature difference between the two surfaces. Since the difference in thermal expansion between the respective surfaces occurs in accordance with this temperature difference, as described above, it causes the warpage of the substrate during high-temperature annealing.
- the protective film is provided on both surfaces of silicon carbide substrate 1, there is no difference in the mode of heating by the surface, so that the substrate can be uniformly heated.
- the present invention provides the following means. (1) A method of manufacturing a silicon carbide semiconductor device having an impurity doped region on a front surface of a silicon carbide substrate, the step of implanting impurity ions into the front surface of the silicon carbide substrate, and the silicon carbide substrate After the step of forming a carbon film on the front surface and the back surface, the step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film, and the step of activating heat treatment, the front surface And a step of removing the carbon film on the back surface in order.
- the carbon film is any one of a carbon film formed by sputtering or CVD, a DLC (diamond-like carbon) film, or a carbon film formed by carbonizing an organic film ( A method for manufacturing a silicon carbide semiconductor device according to 1).
- the activation heat treatment is heating by any one of a high-frequency heating method, a lamp heating method, and a vacuum thermoelectron impact method, according to any one of the above items (1) to (3), A method for manufacturing a silicon carbide semiconductor device.
- the back surface of the substrate is smooth and the surface roughness is suppressed, the back surface can be used as an element function like a back electrode.
- FIG. 1 It is a conceptual diagram of the heating of the board
- (A)-(d) is process sectional drawing which shows the manufacturing method of the silicon carbide semiconductor device of this embodiment. It is a figure which shows the curvature before and behind annealing of a 3 inch silicon carbide substrate, and the measurement result of WARP. It is a figure which shows the result of the surface morphology by atomic force microscope (AFM) observation of the front surface and back surface of a silicon carbide substrate.
- AFM atomic force microscope
- the method for manufacturing a silicon carbide semiconductor device of this embodiment includes a step of implanting impurity ions into the front surface of a silicon carbide substrate (impurity implantation step), and a step of forming carbon films on both surfaces of the silicon carbide substrate (protection). Film formation step), a step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film (activation heat treatment step), and a step of removing the carbon film (protective film removal step). These steps are sequentially performed to manufacture a silicon carbide semiconductor device having an impurity doped region on the front surface of the silicon carbide substrate.
- impurity implantation process First, in the impurity implantation step, impurities are implanted into the front surface of the silicon carbide substrate. Specifically, first, as shown in FIG. 2A, an epitaxial substrate 1 in which an n type epitaxial layer 2 is grown on an n + type silicon carbide substrate 3 is used as a silicon carbide substrate.
- the epitaxial substrate 1 is preferably a smooth surface with a small surface roughness, for example, Ra ⁇ 1 nm or less.
- a mask for impurity ion implantation is formed on the surface of the epitaxial layer.
- This mask covers a part of the surface of the epitaxial layer, and an opening is provided in a region where a p-type region (impurity region) is to be formed by impurity ion implantation.
- impurity ions for example, aluminum (Al) ions 6 for forming a p-type region are implanted into the surface layer of the epitaxial layer exposed from the opening in multiple stages using six types of acceleration voltages.
- a total of six stages of ion implantation are performed with acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV (six-stage implantation method).
- the implanted Al concentration is, for example, 2 ⁇ 10 19 cm ⁇ 3 or 2 ⁇ 10 20 cm ⁇ 3 .
- an impurity ion implantation layer is formed as shown in the figure.
- carbon films 4 and 5 are formed on the front surface and the back surface of the epitaxial substrate (silicon carbide substrate) in the protective film forming step. Specifically, first, the mask used for impurity ion implantation is removed. Subsequently, a carbon film as a protective film is formed on both the front surface and the back surface of the epitaxial substrate.
- the carbon films 4 and 5 as protective films are formed by sputtering or CVD, formed by DLC (diamond-like carbon) film by high-frequency plasma CVD, or carbon film obtained by carbonizing an organic film such as a resist. Can be used.
- the film thickness of the carbon film is preferably 10 to 500 nm, more preferably 30 to 200 nm, and particularly preferably 50 to 150 nm when formed by sputtering or CVD. If the film thickness of the carbon film is less than 10 nm, the function as a protective film becomes insufficient in the activation heat treatment step described later, which is not preferable. Further, if the carbon film thickness exceeds 500 nm, it is not preferable because the substrate is warped or cracked. Furthermore, it is not preferable because it becomes difficult to remove the carbon film in the protective film removing step described later.
- the substrate can be prevented from warping or cracking during the activation heat treatment, and the sublimation of Si atoms from the surface of the epitaxial substrate 1 can be suppressed and protected. It is preferable because removal is easy in the film removal step.
- the carbon films 4 and 5 are formed on the front surface and the back surface of an epitaxial substrate (silicon carbide substrate) as follows, for example.
- an epitaxial substrate silicon carbide substrate
- a carbon film is formed on the substrate.
- the substrate is turned over, and the back surface side is directed to the sputtering source side, the front surface side is placed in contact with the substrate mounting side, and film formation is performed on the back surface side.
- plasma atmosphere side gas phase reaction atmosphere side
- a carbon film is formed on the front surface side.
- the substrate is turned over, and the back side is directed to the gas phase reaction atmosphere side (plasma atmosphere side) and the front side is in contact with the substrate placement side, and film formation is performed on the back side.
- the organic film is applied to both the front surface side and the back surface side of the epitaxial substrate 1 to about 3 ⁇ m and baked under predetermined conditions. Thereafter, a carbon film is formed under a predetermined heating condition in a heating furnace in an argon atmosphere.
- the impurity doped region is formed by activating heat treatment of the epitaxial substrate 1 using the carbon films 4 and 5 as protective films on both sides.
- the activation heat treatment is performed by a vacuum annealing method of less than 1 ⁇ 10 ⁇ 2 Pa.
- the heating temperature is preferably in the range of 1600 to 2000 ° C, more preferably in the range of 1700 to 1900 ° C, and most preferably in the range of 1700 to 1850 ° C.
- the heating temperature is less than 1600 ° C., the activation of the implanted impurities becomes insufficient, which is not preferable.
- the temperature exceeds 2000 ° C. the surface of the epitaxial substrate 1 may be carbonized and roughened even if there is a protective film.
- the heating time is preferably 1 to 10 minutes, more preferably 1 to 7 minutes, and particularly preferably 1 to 5 minutes.
- the heating time is less than 1 minute, the activation of impurities becomes insufficient, which is not preferable.
- the heating time exceeds 10 minutes, the surface of the epitaxial substrate may be carbonized and roughened even if a protective film is present, which is not preferable.
- the carbon film used as the protective film is removed.
- the carbon film is removed by ashing the carbon film by thermal oxidation in an oxygen atmosphere.
- the epitaxial layer 2 and the impurity ion-implanted layer are formed by using a condition that a substrate is placed in a thermal oxidation furnace and oxygen is supplied at a flow rate of 3.5 L / min and heated at 1125 ° C. for 90 minutes. 7 and the carbon film 5 on the back surface of the epitaxial substrate can be removed.
- the epitaxial substrate 1 is placed on a substrate mounting (quartz boat or the like) in an oxidation furnace so that both surfaces of the substrate are sufficiently exposed to an oxygen atmosphere, and the carbon films on both surfaces of the substrate can be simultaneously ashed and removed.
- the activation rate of aluminum is about 80%, and sufficient activation is performed.
- a silicon carbide semiconductor substrate (wafer) having an impurity doped region 8 with a high activation rate as shown in FIG. 1 and a smooth surface can be manufactured.
- a silicon carbide semiconductor device can be manufactured, for example, by forming a Schottky diode on the silicon carbide semiconductor substrate including such a surface.
- the activation heat treatment step is performed using a reduced pressure heating furnace, but a heating furnace in an inert gas atmosphere such as argon (Ar) may be used.
- a heating furnace in an inert gas atmosphere such as argon (Ar)
- Ar argon
- a lamp heating or a high frequency method may be used, or an electron beam heating method may be used.
- the carbon film is removed using thermal oxidation, but the carbon film can also be removed by plasma treatment using oxygen or ozone treatment.
- the growth of the epitaxial film on the SiC single crystal wafer was performed using a high-frequency induction heating horizontal CVD (Chemical Vapor Deposition) apparatus. Specifically, a SiC single crystal wafer was placed horizontally on a susceptor, heated to 1620 ° C. in a 200 mbar hydrogen gas decompression atmosphere, and a SiC epitaxial film having a thickness of 8 ⁇ m was formed. Hydrogen was used as the carrier gas, and a mixed gas of SiH 4 and C 3 H 8 was used as the source gas. Thus, an epitaxial substrate in which an epitaxial film having a thickness of 8 ⁇ m was formed on a SiC single crystal substrate having a diameter of 3 inches and a thickness of 380 ⁇ m was produced.
- a SiC single crystal wafer was placed horizontally on a susceptor, heated to 1620 ° C. in a 200 mbar hydrogen gas decompression atmosphere, and a SiC epitaxial film having a thickness of 8 ⁇ m was formed.
- Al ions were implanted into the SiC epitaxial substrate having a diameter of 3 inches.
- Al ion implantation conditions a six-stage implantation method (acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV in total 6 stages) was used.
- the Al concentration after the implantation was 2 ⁇ 10 19 cm ⁇ 3 .
- carbon films were formed on both the front surface and the back surface of the SiC substrate by carbon films obtained by carbonizing the resist coating film.
- a resist film was applied to the front surface of the SiC substrate by about 3 ⁇ m and then baked, and then a resist film was applied to the back surface of the SiC substrate by about 3 ⁇ m and baked. Thereafter, carbonization was performed under the following conditions.
- the conditions for the carbonization treatment were as follows: in an argon atmosphere, the temperature was raised from room temperature to 800 ° C. over 1 hour, then held at 800 ° C. for 10 minutes, and then lowered to room temperature in about 7 hours.
- the pressure was reduced to 5 ⁇ 10 ⁇ 4 to 5 ⁇ 10 ⁇ 3 Pa or lower, and an impurity activation heat treatment was performed at a temperature of 1830 ° C. and a holding time of 5 minutes.
- the carbon film was ashed and removed by thermal oxidation (1125 ° C., 90 minutes) in an oxygen atmosphere, and the silicon carbide semiconductor device of Example 1 was manufactured.
- FIG. 3 shows the results of Example 1.
- “warp” and “WARP” before annealing are 26.215 ⁇ m and 27.215 ⁇ m, respectively, but after annealing, they are 76.293 ⁇ m and 76.377 ⁇ m, respectively. Warpage is recognized.
- warp and “WARP” before annealing are 15.593 ⁇ m and 14.408 ⁇ m, respectively, and 16.498 ⁇ m and 14.001 ⁇ m after annealing, respectively. It was confirmed that the warpage was suppressed.
- FIG. 4 shows the results of surface morphology (Rms) observed by atomic force microscope (AFM) observation of the front and back surfaces of the 3-inch silicon carbide semiconductor device of Example 1 above.
- the scanning area in FIG. 4 is 2 ⁇ m ⁇ 2 ⁇ m.
- the height scale is shown in the figure.
- the Rms of the front surface and the back surface of the substrate were both 0.3 nm or less, and the same surface roughness suppressing effect as that of the front surface was confirmed for the back surface.
- the method for manufacturing a silicon carbide semiconductor device of the present invention is not limited to surface roughness and bunching due to high-temperature annealing treatment, but also suppresses warping of the substrate, while maintaining a high impurity activation rate and smoothing silicon carbide. It can be used for manufacturing a silicon carbide semiconductor device having a surface.
- a substrate having a large diameter can be kept free from warping after the activation heat treatment, and thus is particularly effective for manufacturing a silicon carbide semiconductor device using a large diameter substrate.
- the back surface of the silicon carbide substrate can also be used for manufacturing a silicon carbide semiconductor device in which the element function is used.
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Abstract
Description
本発明は、炭化珪素半導体装置の製造方法に関するものであり、特に、炭化珪素基板に不純物イオンを注入した後の活性化熱処理に関するものである。
本願は、2009年8月4日に、日本に出願された特願2009-181564号に基づき優先権を主張し、その内容をここに援用する。
The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to activation heat treatment after impurity ions are implanted into a silicon carbide substrate.
This application claims priority based on Japanese Patent Application No. 2009-181564 filed in Japan on Aug. 4, 2009, the contents of which are incorporated herein by reference.
炭化珪素半導体は、シリコン半導体よりも絶縁破壊電圧が大きく、エネルギーバンドギャップが広く、また、熱伝導度が高いなど優れた特徴を有するので、発光素子、大電力パワーデバイス、耐高温素子、耐放射線素子、高周波素子等への応用が期待されている。 Silicon carbide semiconductors have superior characteristics such as higher breakdown voltage, wider energy band gap, and higher thermal conductivity than silicon semiconductors, so light emitting elements, high power power devices, high temperature resistant elements, radiation resistant elements Applications to devices, high frequency devices, etc. are expected.
上記炭化珪素半導体を用いて素子(SiC半導体素子)を形成するためには、例えば、炭化珪素基板(SiC基板)上に半導体素子の活性領域としてエピタキシャル成長層を形成し、このエピタキシャル成長層の選択された領域で導電型やキャリア濃度を制御することが必要となる。そこで、不純物ドーパント原子を活性領域であるエピタキシャル成長層中に部分的に注入することによって、p型又はn型の各種不純物ドープ領域を形成し、トランジスタやダイオードなどの半導体素子を構成することが可能となる。 In order to form an element (SiC semiconductor element) using the silicon carbide semiconductor, for example, an epitaxial growth layer is formed as an active region of a semiconductor element on a silicon carbide substrate (SiC substrate), and this epitaxial growth layer is selected. It is necessary to control the conductivity type and carrier concentration in the region. Therefore, it is possible to form various p-type or n-type impurity doped regions by partially injecting impurity dopant atoms into the epitaxial growth layer, which is an active region, and to configure semiconductor elements such as transistors and diodes. Become.
ところで、炭化珪素基板の活性領域にイオン注入された不純物を活性化させるためには、非常に高温でのアニール処理(例えば1600℃~2000℃)を行う必要がある。この高温でのアニール処理により、炭化珪素基板表面のSi原子が気化して表面が炭素(以下Cと記す)リッチになり、表面荒れやバンチングが発生し、デバイスの特性に悪影響を及ぼすことが知られている。したがって、このような表面の炭化珪素基板を用いてトランジスタやダイオードを形成しても、SiC本来の優れた物性値から期待されるような電気的特性を得ることが困難であるという問題があった。 Incidentally, in order to activate the impurities ion-implanted into the active region of the silicon carbide substrate, it is necessary to perform an annealing process at a very high temperature (for example, 1600 ° C. to 2000 ° C.). It is known that this annealing process at high temperature vaporizes Si atoms on the surface of the silicon carbide substrate, making the surface rich in carbon (hereinafter referred to as C), causing surface roughness and bunching, which adversely affects device characteristics. It has been. Therefore, even when a transistor or a diode is formed using such a silicon carbide substrate having such a surface, there is a problem that it is difficult to obtain electrical characteristics expected from the excellent physical properties of SiC. .
そこで、炭化珪素基板の表面荒れを抑制可能な高温アニール処理方法が提案されている(特許文献1~3)。具体的には、特許文献1には、活性領域となるエピタキシャル層上にダイヤモンドライクカーボン(DLC)膜や有機膜を保護膜として堆積して活性化アニール(活性化熱処理)することでSiC基板の表面荒れを抑制する高温アニール処理方法が開示されている。
Therefore, a high-temperature annealing method that can suppress surface roughness of the silicon carbide substrate has been proposed (
特許文献2には、活性領域上に形成したレジスト層を炭化させた膜を保護膜として、活性化アニールすることで面荒れの発生を防止する高温アニール処理方法が開示されている。
また、特許文献3には、活性領域上にスパッタによるカーボン膜を形成し保護膜として用い、このカーボン膜の純度を規定することにより、活性化アニールによる面荒れの発生を防止する高温アニール処理方法が開示されている。
上述した特許文献1~3に開示された発明では、活性化熱処理である高温アニール処理の前に、炭化珪素基板のおもて面(活性化面又はエピ面)だけに保護膜を成膜していた。しかしながら、この場合、炭化珪素基板のおもて面側だけに、保護膜と炭化珪素基板との熱膨張率の違いに起因する熱応力が存在し、裏面にはかかる熱応力が存在しない。また、炭化珪素基板のおもて面側は保護膜の残留応力(内部応力)の影響を受けるが、保護膜を有さない裏面側にはかかる影響はない。このように、炭化珪素基板のおもて面にだけ保護膜を成膜した場合には、成膜による応力が基板の両面に非対称に存在するため、これに起因して、高温の活性化アニール時に基板の反りが発生する。また、後で詳述するが、炭化珪素基板のおもて面側だけに保護膜がある場合、炭化珪素基板のおもて面と裏面とで加熱される態様が異なるためにおもて面と裏面とで温度差が生じて、この温度差が熱膨張の差を招来し、基板の反りの起因となる。基板の反りは特に、基板が大口径化するほど顕著になる。
さらに、炭化珪素基板の裏面電極等のように裏面も素子機能として利用する場合は、炭化珪素基板の裏面側の表面荒れも抑制する必要がある。
In the inventions disclosed in
Furthermore, when the back surface is used as an element function, such as the back electrode of the silicon carbide substrate, it is necessary to suppress surface roughness on the back surface side of the silicon carbide substrate.
本発明は、上記事情を鑑みてなされたもので、高温度のアニール処理による表面荒れ及びバンチングだけでなく、基板の反りが抑制され、高い不純物の活性化率を保ちつつ従来よりも平滑な炭化珪素の表面を有する炭化珪素半導体装置の製造方法を提供することを目的とする。 The present invention has been made in view of the above circumstances, and not only surface roughening and bunching due to high-temperature annealing treatment, but also warping of the substrate is suppressed, and carbonization is smoother than before while maintaining a high impurity activation rate. It is an object of the present invention to provide a method for manufacturing a silicon carbide semiconductor device having a silicon surface.
図1に、炭化珪素基板の片面だけに保護膜(カーボン膜)を有する場合と両面に有する場合について、輻射熱による基板の加熱の概念図を示す。
図1において、符号1は保護膜を備えた炭化珪素基板、符号2はサセプタ、符号2Aはサセプタ本体、符号2Bはサセプタ蓋、符号2aは試料台である。
アニール炉内で炭化珪素基板1が熱処理される際、その片面だけに保護膜が形成されている場合、保護膜を有する面(おもて面)では、サセプタ2からの輻射熱はまず保護膜に吸収されて保護膜が加熱され、この加熱された保護膜からの熱伝導によりおもて面が加熱される。これに対して、保護膜を有さない面(裏面)では炭化珪素基板1が半透明であるため、輻射熱は裏面を透過してしまう。そのため、裏面の加熱は、おもて面から基板内を経て伝導する熱によってなされることになる。このように炭化珪素基板1の保護膜を有する面と有しない面とでは加熱される態様が異なり、これに起因して両面に温度差が生じることになる。この温度差に応じてそれぞれの面側の熱膨張に差が生じることになるので上述の通り、高温アニール時に基板の反りの起因となる。
他方、炭化珪素基板1の両面に保護膜を有する場合は、面による加熱の態様に差はないので、基板の均一加熱が可能となる。
In FIG. 1, the conceptual diagram of the heating of the board | substrate by a radiant heat is shown about the case where it has on both sides when it has a protective film (carbon film) on one side of a silicon carbide substrate.
In FIG. 1,
When the
On the other hand, when the protective film is provided on both surfaces of
本発明は、以下の手段を提供する。(1)炭化珪素基板のおもて面に不純物ドープ領域を備えた炭化珪素半導体装置の製造方法であって、炭化珪素基板のおもて面に不純物イオンを注入する工程と、前記炭化珪素基板のおもて面及び裏面にカーボン膜を成膜する工程と、前記カーボン膜を保護膜として前記炭化珪素基板を活性化熱処理する工程と、前記活性化熱処理する工程の後に、前記おもて面及び裏面のカーボン膜を除去する工程と、を順に実施することを特徴とする炭化珪素半導体装置の製造方法。(2)前記カーボン膜がスパッタ法またはCVD法によって成膜されたカーボン膜、DLC(ダイヤモンドライクカーボン)膜、または有機膜を炭化させて形成したカーボン膜のいずれかであることを特徴する前項(1)に記載の炭化珪素半導体装置の製造方法。(3)前記活性化熱処理は、加熱温度が1600~2000℃で行うことを特徴とする前項(1)又は(2)のいずれかに記載の炭化珪素半導体装置の製造方法。(4)前記活性化熱処理は、高周波加熱法、ランプ加熱法、真空熱電子衝撃法のいずれかによる加熱であることを特徴とする前項(1)乃至(3)のいずれか一項に記載の炭化珪素半導体装置の製造方法。(5)前記活性化熱処理を、アルゴン雰囲気又は1×10-2Pa以下の減圧雰囲気で行うこと特徴とする前項(1)乃至(4)のいずれか一項に記載の炭化珪素半導体装置の製造方法。 The present invention provides the following means. (1) A method of manufacturing a silicon carbide semiconductor device having an impurity doped region on a front surface of a silicon carbide substrate, the step of implanting impurity ions into the front surface of the silicon carbide substrate, and the silicon carbide substrate After the step of forming a carbon film on the front surface and the back surface, the step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film, and the step of activating heat treatment, the front surface And a step of removing the carbon film on the back surface in order. (2) The foregoing item, wherein the carbon film is any one of a carbon film formed by sputtering or CVD, a DLC (diamond-like carbon) film, or a carbon film formed by carbonizing an organic film ( A method for manufacturing a silicon carbide semiconductor device according to 1). (3) The method for manufacturing a silicon carbide semiconductor device according to any one of (1) and (2), wherein the activation heat treatment is performed at a heating temperature of 1600 to 2000 ° C. (4) The activation heat treatment is heating by any one of a high-frequency heating method, a lamp heating method, and a vacuum thermoelectron impact method, according to any one of the above items (1) to (3), A method for manufacturing a silicon carbide semiconductor device. (5) The silicon carbide semiconductor device according to any one of (1) to (4), wherein the activation heat treatment is performed in an argon atmosphere or a reduced pressure atmosphere of 1 × 10 −2 Pa or less. Method.
炭化珪素基板に不純物イオンを注入した後に高温の活性化熱処理を行っても基板の反りが抑制される。この効果は大口径の基板に特に有効である。また、基板の裏面も表面荒れが抑制され平滑なので裏面電極等のように裏面も素子機能として使用することができる。 Even if impurity ions are implanted into the silicon carbide substrate and then a high temperature activation heat treatment is performed, the warpage of the substrate is suppressed. This effect is particularly effective for large-diameter substrates. Further, since the back surface of the substrate is smooth and the surface roughness is suppressed, the back surface can be used as an element function like a back electrode.
以下、本発明を適用した一実施形態である炭化珪素半導体装置の製造方法について、図面を用いて詳細に説明する。なお、以下の説明で用いる図面は、特徴をわかりやすくするために、便宜上特徴となる部分を拡大して示している場合があり、各構成要素の寸法比率などが実際と同じであるとは限らない。 Hereinafter, a method for manufacturing a silicon carbide semiconductor device according to an embodiment to which the present invention is applied will be described in detail with reference to the drawings. In addition, in the drawings used in the following description, in order to make the features easy to understand, there are cases where the portions that become the features are enlarged for the sake of convenience, and the dimensional ratios of the respective components are not always the same as the actual ones. Absent. *
図2(a)~(d)は、本実施形態の炭化珪素半導体装置の製造方法を示す工程断面図である。本実施形態の炭化珪素半導体装置の製造方法は、炭化珪素基板のおもて面に不純物イオンを注入する工程(不純物注入工程)と、炭化珪素基板の両面にカーボン膜を成膜する工程(保護膜形成工程)と、カーボン膜を保護膜として炭化珪素基板を活性化熱処理する工程(活性化熱処理工程)と、カーボン膜を除去する工程(保護膜除去工程)とを備えて概略構成され、これらの工程を順に実施して、炭化珪素基板のおもて面に不純物ドープ領域を備えた炭化珪素半導体装置を製造するものである。 2 (a) to 2 (d) are process cross-sectional views illustrating the method for manufacturing the silicon carbide semiconductor device of the present embodiment. The method for manufacturing a silicon carbide semiconductor device of this embodiment includes a step of implanting impurity ions into the front surface of a silicon carbide substrate (impurity implantation step), and a step of forming carbon films on both surfaces of the silicon carbide substrate (protection). Film formation step), a step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film (activation heat treatment step), and a step of removing the carbon film (protective film removal step). These steps are sequentially performed to manufacture a silicon carbide semiconductor device having an impurity doped region on the front surface of the silicon carbide substrate.
(不純物注入工程)
先ず、不純物注入工程において、炭化珪素基板のおもて面に不純物を注入する。具体的には、先ず、図2(a)に示すように炭化珪素基板としてn+型炭化珪素基板3上にn型エピタキシャル層2を成長させたエピタキシャル基板1を用いる。このエピタキシャル基板1は、例えばRa<1nm以下の表面粗さの小さい平滑な表面であることが好ましい。
(Impurity implantation process)
First, in the impurity implantation step, impurities are implanted into the front surface of the silicon carbide substrate. Specifically, first, as shown in FIG. 2A, an
次に、エピタキシャル層の表面上に不純物イオン注入用のマスクを形成する。このマスクは、エピタキシャル層の表面の一部分を覆い、不純物イオン注入によってp型領域(不純物領域)を形成しようとする領域に開口部が設けられている。そして、この開口部から露出するエピタキシャル層の表面層にp型領域を形成するための不純物イオン、例えばアルミニウム(Al)イオン6を6種類の加速電圧を用いて多段で注入する。具体的には、加速電圧を240kV,150kV,95kV,55kV,27kV,10kVとした合計6段のイオン注入を行なう(6段注入法)。また、注入されたAl濃度は、例えば、2×1019cm-3または2×1020cm-3とする。このような不純物注入工程により、図に示すように不純物イオン注入層を形成する。 Next, a mask for impurity ion implantation is formed on the surface of the epitaxial layer. This mask covers a part of the surface of the epitaxial layer, and an opening is provided in a region where a p-type region (impurity region) is to be formed by impurity ion implantation. Then, impurity ions, for example, aluminum (Al) ions 6 for forming a p-type region are implanted into the surface layer of the epitaxial layer exposed from the opening in multiple stages using six types of acceleration voltages. Specifically, a total of six stages of ion implantation are performed with acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV (six-stage implantation method). The implanted Al concentration is, for example, 2 × 10 19 cm −3 or 2 × 10 20 cm −3 . By such an impurity implantation step, an impurity ion implantation layer is formed as shown in the figure.
(保護膜形成工程)
次に、図2(b)に示すように、保護膜形成工程において、エピタキシャル基板(炭化珪素基板)のおもて面及び裏面にカーボン膜4、5を成膜する。具体的には、先ず、不純物イオン注入に用いたマスクを除去する。続いて、保護膜としてのカーボン膜を、エピタキシャル基板のおもて面及び裏面の両面に形成する。
(Protective film formation process)
Next, as shown in FIG. 2B,
保護膜としてのカーボン膜4、5はスパッタ法またはCVD法による成膜、あるいは高周波プラズマCVD法などによるDLC(ダイヤモンドライクカーボン)膜による成膜、またはレジスト等の有機膜を炭化させたカーボン膜などを用いることができる。
The
カーボン膜の膜厚は、スパッタ法またはCVD法などによる成膜では10~500nmであることが好ましく、30~200nmであることがより好ましく、50~150nmであることが特に好ましい。カーボン膜の膜厚が10nm未満であると、後述する活性化熱処理工程において保護膜としての機能が不十分となるため好ましくない。また、カーボン膜の膜厚が500nmを超えると、基板に反りが生じたり割れたりするため好ましくない。さらに、後述する保護膜除去工程においてカーボン膜の除去が困難となるため好ましくない。一方、カーボン膜の膜厚が上記範囲であれば、活性化熱処理の際に基板に反りや割れが生じることなく、エピタキシャル基板1の表面からのSi原子の昇華を抑制することができるとともに、保護膜除去工程において除去が容易となるため、好ましい。
The film thickness of the carbon film is preferably 10 to 500 nm, more preferably 30 to 200 nm, and particularly preferably 50 to 150 nm when formed by sputtering or CVD. If the film thickness of the carbon film is less than 10 nm, the function as a protective film becomes insufficient in the activation heat treatment step described later, which is not preferable. Further, if the carbon film thickness exceeds 500 nm, it is not preferable because the substrate is warped or cracked. Furthermore, it is not preferable because it becomes difficult to remove the carbon film in the protective film removing step described later. On the other hand, if the film thickness of the carbon film is in the above range, the substrate can be prevented from warping or cracking during the activation heat treatment, and the sublimation of Si atoms from the surface of the
カーボン膜4、5は例えば、以下のようにして、エピタキシャル基板(炭化珪素基板)のおもて面及び裏面に成膜する。
スパッタ法によるカーボン膜を成膜する場合は、最初にエピタキシャル基板1のおもて面側をスパッタ源側に向け、裏面側を基板載置側に接するように設置して、おもて面側にカーボン膜を成膜する。その後、基板を反転して、裏面側をスパッタ源側に向け、おもて面側を基板載置側に接するように設置し、裏面側に成膜する。
CVD法によるカーボン膜を成膜する場合は、最初にエピタキシャル基板1のおもて面側を気相反応雰囲気側(プラズマ雰囲気側)に向け、裏面側を基板載置側に接するように設置して、おもて面側にカーボン膜を成膜する。その後、基板を反転して、裏面側を気相反応雰囲気側(プラズマ雰囲気側)に向け、おもて面側を基板載置側に接するように設置し、裏面側に成膜する。
また、レジスト等の有機膜を炭化させたカーボン膜の場合は、エピタキシャル基板1のおもて面側と裏面側の両面に有機膜を3μm程度に塗布し、所定の条件にてベークを行い、その後、アルゴン雰囲気の加熱炉において所定の加熱条件にてカーボン膜形成を行う。
The
When forming a carbon film by sputtering, first install the
When forming a carbon film by the CVD method, first install the
In the case of a carbon film obtained by carbonizing an organic film such as a resist, the organic film is applied to both the front surface side and the back surface side of the
(活性化熱処理工程)
次に、図2(c)に示すように、カーボン膜4、5を両面の保護膜としてエピタキシャル基板1を活性化熱処理して不純物ドープ領域を形成する。活性化熱処理は、1×10―2Pa未満の真空アニール方式によって行う。加熱温度は、1600~2000℃の範囲が好ましく、1700~1900℃の範囲がより好ましく、1700~1850℃の範囲がもっとも好ましい。加熱温度が1600℃未満であると、注入した不純物の活性化が不十分となり好ましくない。また、2000℃を超えると保護膜があってもエピタキシャル基板1の表面が炭化して表面が荒れる可能性があるため好ましくない。
(Activation heat treatment process)
Next, as shown in FIG. 2C, the impurity doped region is formed by activating heat treatment of the
また、加熱時間は、1~10分で行うことが好ましく、1~7分で行うことがより好ましく、1~5分で行うことが特に好ましい。加熱時間が1分未満であると、不純物の活性化が不十分となるため、好ましくない。また、加熱時間が10分を超えると、保護膜があってもエピタキシャル基板の表面が炭化して表面が荒れる可能性があるため、好ましくない。 The heating time is preferably 1 to 10 minutes, more preferably 1 to 7 minutes, and particularly preferably 1 to 5 minutes. When the heating time is less than 1 minute, the activation of impurities becomes insufficient, which is not preferable. Also, if the heating time exceeds 10 minutes, the surface of the epitaxial substrate may be carbonized and roughened even if a protective film is present, which is not preferable.
(保護膜除去工程)
次に、図2(d)に示すように、保護膜として用いたカーボン膜を除去する。カーボン膜の除去は、酸素雰囲気の熱酸化によりカーボン膜を灰化して除去する。具体的には、熱酸化炉内に基板を設置し、例えば、流量3.5L/minの酸素を供給して1125℃で90分間加熱する条件を用いることによって、エピタキシャル層2及び不純物イオン注入層7の上のカーボン膜4及びエピタキシャル基板裏面のカーボン膜5を除去することができる。
なお、エピタキシャル基板1は酸化炉内の基板載置上(石英ボート等)に基板両面が酸素雰囲気に十分晒されるように設置され、基板両面のカーボン膜を同時に灰化して除去することができる。なお、本実施形態では、アルミニウムの活性化率は約80%であり、十分な活性化が行なわれる。このような保護膜除去工程により、図1に示すような高い活性化率の不純物ドープ領域8を有すると共に表面が平滑な炭化珪素半導体基板(ウェハー)を製造することができる。そして、このような表面を含む炭化珪素半導体基板に、例えばショットキーダイオードを形成することにより、炭化珪素半導体装置を製造することができる。
(Protective film removal process)
Next, as shown in FIG. 2D, the carbon film used as the protective film is removed. The carbon film is removed by ashing the carbon film by thermal oxidation in an oxygen atmosphere. Specifically, the
The
なお、本発明の技術範囲は上記実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。例えば、本実施形態においては、活性化熱処理工程を減圧方式の加熱炉を用いて行ったが、アルゴン(Ar)等の不活性ガス雰囲気の加熱炉を用いてもよい。また、加熱方式は、ランプ加熱や高周波方式を用いても良いし、電子線加熱方式を用いてもよい。 The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in the present embodiment, the activation heat treatment step is performed using a reduced pressure heating furnace, but a heating furnace in an inert gas atmosphere such as argon (Ar) may be used. As the heating method, a lamp heating or a high frequency method may be used, or an electron beam heating method may be used.
また、本実施形態においては、熱酸化を利用してカーボン膜を除去したが、酸素を用いたプラズマ処理やオゾン処理によっても、カーボン膜を除去することができる。 In this embodiment, the carbon film is removed using thermal oxidation, but the carbon film can also be removed by plasma treatment using oxygen or ozone treatment.
以下、本発明の効果を、実施例を用いて具体的に説明する。なお、本発明はこれらの実施例に限定されるものではない。 Hereinafter, the effects of the present invention will be described in detail with reference to examples. The present invention is not limited to these examples.
SiC単結晶ウェハへのエピタキシャル膜の成長は高周波誘導加熱方式の横型CVD(Chemical Vapor Deposition)装置を使用して行った。
具体的には、SiC単結晶ウェハをサセプタ上に水平に配置し、200mbarの水素ガス減圧雰囲気において、1620℃まで昇温し、厚さ8μmのSiCエピタキシャル膜を成膜した。キャリアガスとしては水素を使用し、原料ガスとしてはSiH4とC3H8との混合ガスを用いた。
こうして、直径3インチで厚さ380μmのSiC単結晶基板に、厚さ8μmのエピタキシャル膜が成膜されたエピタキシャル基板を作製した。
The growth of the epitaxial film on the SiC single crystal wafer was performed using a high-frequency induction heating horizontal CVD (Chemical Vapor Deposition) apparatus.
Specifically, a SiC single crystal wafer was placed horizontally on a susceptor, heated to 1620 ° C. in a 200 mbar hydrogen gas decompression atmosphere, and a SiC epitaxial film having a thickness of 8 μm was formed. Hydrogen was used as the carrier gas, and a mixed gas of SiH 4 and C 3 H 8 was used as the source gas.
Thus, an epitaxial substrate in which an epitaxial film having a thickness of 8 μm was formed on a SiC single crystal substrate having a diameter of 3 inches and a thickness of 380 μm was produced.
次に、この直径3インチのSiCエピタキシャル基板にAlイオンの注入を行った。Alイオンの注入条件としては、6段注入法(加速電圧240kV,150kV,95kV,55kV,27kV,10kVの合計6段)を用いた。なお、注入後のAl濃度は、2×1019cm-3であった。
Alイオンの注入後、レジスト塗布膜を炭化させたカーボン膜によって上記SiC基板のおもて面及び裏面の両面にカーボン膜を成膜した。上記条件としては、最初にSiC基板のおもて面にレジスト膜を3μm程度塗布後にベーク処理し、次にSiC基板の裏面にレジスト膜を3μm程度塗布後にベーク処理した。
その後、炭化処理を以下の条件で行った。
炭化処理の条件はアルゴン雰囲気にて、温度を室温から800℃まで1時間で昇温させ、次に800℃で10分間保持し、その後、約7時間で室温まで降温させた。
Next, Al ions were implanted into the SiC epitaxial substrate having a diameter of 3 inches. As the Al ion implantation conditions, a six-stage implantation method (acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV in total 6 stages) was used. The Al concentration after the implantation was 2 × 10 19 cm −3 .
After the implantation of Al ions, carbon films were formed on both the front surface and the back surface of the SiC substrate by carbon films obtained by carbonizing the resist coating film. As the above conditions, first, a resist film was applied to the front surface of the SiC substrate by about 3 μm and then baked, and then a resist film was applied to the back surface of the SiC substrate by about 3 μm and baked.
Thereafter, carbonization was performed under the following conditions.
The conditions for the carbonization treatment were as follows: in an argon atmosphere, the temperature was raised from room temperature to 800 ° C. over 1 hour, then held at 800 ° C. for 10 minutes, and then lowered to room temperature in about 7 hours.
次に、真空アニール炉を用いて5×10-4~5×10-3Pa以下に減圧して、温度1830℃、保持時間5分の条件で不純物の活性化熱処理を行った。最後に、酸素雰囲気の熱酸化(1125℃、90分)により、カーボン膜を灰化して除去し、実施例1の炭化珪素半導体装置を製造した。 Next, using a vacuum annealing furnace, the pressure was reduced to 5 × 10 −4 to 5 × 10 −3 Pa or lower, and an impurity activation heat treatment was performed at a temperature of 1830 ° C. and a holding time of 5 minutes. Finally, the carbon film was ashed and removed by thermal oxidation (1125 ° C., 90 minutes) in an oxygen atmosphere, and the silicon carbide semiconductor device of Example 1 was manufactured.
(基板の反りの結果)
上記実施例1の3インチ炭化珪素半導体装置(本発明)と、実施例1と製造条件が同じで片面だけにカーボン膜を有する3インチ炭化珪素基板(従来例)とについて、基板平坦度測定器(メーカー名:コーニングトロペル社、装置名:ウルトラソート)により、「反り」及び「WARP」を測定した。図3に、実施例1の結果を示す。
従来例ではアニール前の「反り」及び「WARP」がそれぞれ、26.215μm、27.215μmであるのに対して、アニール後ではそれぞれ、76.293μm、76.377μmであり、アニール前後で基板の反りが認められる。
他方、本実施例の場合は、アニール前の「反り」及び「WARP」がそれぞれ、15.593μm、14.408μmであり、アニール後では16.498μm、14.001μmであり、アニール前後で基板の反りが抑制されていることが確認できた。
(Result of substrate warpage)
A substrate flatness measuring instrument for the 3-inch silicon carbide semiconductor device of the first embodiment (the present invention) and the 3-inch silicon carbide substrate (conventional example) having the same manufacturing conditions as those of the first embodiment and having a carbon film only on one side. “Warp” and “WARP” were measured by (manufacturer name: Corning Tropel, device name: Ultrasort). FIG. 3 shows the results of Example 1.
In the conventional example, “warp” and “WARP” before annealing are 26.215 μm and 27.215 μm, respectively, but after annealing, they are 76.293 μm and 76.377 μm, respectively. Warpage is recognized.
On the other hand, in the case of this example, “warp” and “WARP” before annealing are 15.593 μm and 14.408 μm, respectively, and 16.498 μm and 14.001 μm after annealing, respectively. It was confirmed that the warpage was suppressed.
(基板のおもて面及び裏面の表面状態の結果)
上記実施例1の3インチ炭化珪素半導体装置のおもて面と裏面の原子間力顕微鏡(AFM)観察による表面モルフォルジー(Rms)の結果を図4に示す。図4の走査面積は2μmx2μmである。また、高さのスケールは、図中に記載した。基板のおもて面及び裏面のRmsはいずれも0.3nm以下であり、裏面についてもおもて面と同程度の面荒れ抑制効果が確認できた。
(Results of the front and back surface conditions of the substrate)
FIG. 4 shows the results of surface morphology (Rms) observed by atomic force microscope (AFM) observation of the front and back surfaces of the 3-inch silicon carbide semiconductor device of Example 1 above. The scanning area in FIG. 4 is 2 μm × 2 μm. The height scale is shown in the figure. The Rms of the front surface and the back surface of the substrate were both 0.3 nm or less, and the same surface roughness suppressing effect as that of the front surface was confirmed for the back surface.
本発明の炭化珪素半導体装置の製造方法は、高温度のアニール処理による表面荒れ及びバンチングだけでなく、基板の反りが抑制され、高い不純物の活性化率を保ちつつ従来よりも平滑な炭化珪素の表面を有する炭化珪素半導体装置の製造に利用することができる。特に、大口径の基板に対しても活性化熱処理後に基板の反りのない状態を保つことができるので、大口径の基板を用いた炭化珪素半導体装置の製造に特に有効である。また、炭化珪素基板の裏面も素子機能として利用する炭化珪素半導体装置の製造にも利用することができる。 The method for manufacturing a silicon carbide semiconductor device of the present invention is not limited to surface roughness and bunching due to high-temperature annealing treatment, but also suppresses warping of the substrate, while maintaining a high impurity activation rate and smoothing silicon carbide. It can be used for manufacturing a silicon carbide semiconductor device having a surface. In particular, a substrate having a large diameter can be kept free from warping after the activation heat treatment, and thus is particularly effective for manufacturing a silicon carbide semiconductor device using a large diameter substrate. Further, the back surface of the silicon carbide substrate can also be used for manufacturing a silicon carbide semiconductor device in which the element function is used.
1 エピタキシャル基板
2 エピタキシャル層
3 炭化珪素基板
4 おもて面のカーボン膜
5 裏面のカーボン膜
6 不純物イオン
7 不純物イオン注入層
8 不純物ドープ層
DESCRIPTION OF
Claims (5)
炭化珪素基板のおもて面に不純物イオンを注入する工程と、
前記炭化珪素基板のおもて面及び裏面にカーボン膜を成膜する工程と、
前記カーボン膜を保護膜として前記炭化珪素基板を活性化熱処理する工程と、
前記活性化熱処理する工程の後に、前記おもて面及び裏面のカーボン膜を除去する工程と、を順に実施することを特徴とする炭化珪素半導体装置の製造方法。 A method for manufacturing a silicon carbide semiconductor device having an impurity doped region on a front surface of a silicon carbide substrate,
Implanting impurity ions into the front surface of the silicon carbide substrate;
Forming a carbon film on the front and back surfaces of the silicon carbide substrate;
Activating heat treatment of the silicon carbide substrate using the carbon film as a protective film;
A method for manufacturing a silicon carbide semiconductor device, wherein the step of removing the carbon film on the front surface and the back surface is sequentially performed after the step of performing the activation heat treatment.
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