WO2010064183A1

WO2010064183A1 - Circuit for and method of selectively powering a plurality of load elements

Info

Publication number: WO2010064183A1
Application number: PCT/IB2009/055397
Authority: WO
Inventors: Harald J. G. Radermacher
Original assignee: Philips Intellectual Property and Standards GmbH; Koninklijke Philips Electronics NV
Current assignee: Philips Intellectual Property and Standards GmbH; Koninklijke Philips NV
Priority date: 2008-12-05
Filing date: 2009-11-30
Publication date: 2010-06-10
Anticipated expiration: 2011-06-05
Also published as: TW201031251A

Abstract

In a circuit (1) for powering selectively a plurality of load elements (2₁ - 2_n; 2₁₁ - 2_nm;28; 35) a concept of transmission lines in combination with delayed signal propagation of power signal pulses is applied, wherein the circuit (1) comprises a generator arrangement (3) that is designed for generating at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) having a temporal relationship with one another and a signal strength such that a load element (2₁ - 2_n; 2₁₁ - 2_nm;28; 35) is driven accordingly when the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) coincide at said load element; and a delay structure (5₁ - 5_n; 5₁₁- 5nm; 36; 33a) being connected with the generator arrangement (3), the delay structure (5i - 5_n; 5₁₁ - 5_nm; 36; 33a) is designed to delay the propagation of the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) received from the generator arrangement (3) and to release the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) towards the load elements (2₁- 2_n; 2₁₁ - 2_nm; 28; 35).

Description

CIRCUIT FOR AND METHOD OF SELECTIVELY POWERING A PLURALITY OF LOAD ELEMENTS

FIELD OF THE INVENTION

The invention relates to a circuit for selectively powering a plurality of load elements.

The invention further relates to a method of selectively powering a plurality o f Io ad elements .

BACKGROUND OF THE INVENTION

WO 2008/007298 A2 discloses a circuit for addressing power to a selected load from a plurality of loads. The circuit allows addressing of the load by means of a number of delay elements connected in parallel to each other. A clock signal of frequency f is fed into one end of the delay elements and propagates along the delay elements. Each delay element is connected to a switch, in particular to the gate of an FET acting as a switch for switching on and off the current flow through an LED forming one load element connected at the first electrode of the FET. The other electrode of each FET is connected to a timed common power signal. The light radiation of each individual LED is controlled by timing the power signal so as to power a selected LED when said common power signal is switched to said load under control of the delayed clock signal. The disclosed circuit requires one line for the clock signal of frequency f and another line for the timed control signal. Operation of the circuit further requires a first type of signal generator for generating the clock signal and a second type of signal generator for generating the timed common power signal. In addition dedicated switching elements implemented by the FETs are required for switching the LED on and off. Therefore an object of the invention is to achieve a circuit according to the type indicated in the opening paragraph having an improved circuit design. It would also be desirable to achieve a method according to the type indicated in the second paragraph that selectively powers a plurality of, e.g. at least two, load elements in a simple, reliable and cost-effective fashion. SUMMARY OF THE INVENTION

This object is addressed by a circuit for selectively powering a plurality of load elements, which circuit comprises a generator arrangement that is designed for generating at least two power signal pulses having a temporal relationship with one another and a signal strength such that a load element is driven accordingly when the power signal pulses coincide at said load element; and a delay structure being connected with the generator arrangement, the delay structure is designed to delay the propagation of the power signal pulses received from the generator arrangement and to release the power signal pulses towards the load elements.

This object is also addressed by a method of selectively powering a plurality of load elements, which method comprises the steps of generating at least two power signal pulses having a temporal relationship with one another and a signal strength such that a load element is driven accordingly when the power signal pulses coincide at said load element; delaying the propagation of the power signal pulses generated; and releasing the power signal pulses towards the load elements.

By providing these measures it is advantageously achieved that the number of components for making available and processing individual control and / or common power timed signals are omitted. This avoids the need for different types of signal generators for generating different types of control / timing signals as well. In conclusion all active elements present in the known solution that are required for addressing power to a selected load are avoided. Hence the present invention allows a circuit to have a relatively simple and cost efficient design because the number of components is reduced to a one- or more-dimensional delay structure of relatively simple design, which serves for propagating at least two power signal pulses. In contrast to prior art solutions the propagating power signal pulses itself serve for addressing and powering or otherwise inhibiting the powering of the load elements while passing along the delay structure, to which the load elements are connectable at positions of the delay elements. In some embodiments the connection of the load elements may be located between two neighboring delay elements. In other embodiments the delay elements and the load elements form a continuum-like structure. Hence delay elements may be separated from load elements or partly or even entirely implemented by load elements. Hence, the term "to release the power signal pulses" shall mean that a transfer of power from the delay structure into the load elements depends on the electronic characteristics of the load element and the particular signal amplitudes achieved by the power signal pulses passing along said load element.

The circuit and the method according to the invention are based on the insight that addressing of power to be supplied to a selected load element or a part of a continuumlike load element is performed by the coinciding of at least two power signal pulses, wherein the total power or voltage or, in more general terms, the total signal strength releasable to the load element depends on the fact whether only one of the propagating power signal pulses or a superimposition of at least two power signal pulses is present at the position of said load element or part of it. The temporal relationship determines the location of a coinciding of the two power signal pulses within the delay structure. The temporal relationship may on one hand be given in the timing of generating the different power signal pulses having identical shape at various different moments. Changing the temporal relationship will lead to different resulting superimposing effects. Alternatively setting the frequency of the generation of the individual power signal pulses to different values may create a particular temporal relationship as well. But also generating power signal pulses having different shape, amplitude, polarity and / or duration may lead to a temporal relationship. All of these numerous ways of creating the temporal relationship may be combined as the case may be and the person skilled in the art will apply the desired solution for generating the temporal relationship without departing from the scope of the present invention. On the one hand the solution according to the invention may serve for achieving an overlap of the power signal pulses having a first - e.g. -positive -polarity, which enables the supply of power to a load element to be based solely on the power conveyed by the power signal pulses. But also an overlap of the coinciding power signal pulses with a DC signal may achieve the same result. On the other hand an overlap of the power signals having a second - e.g. negative - polarity may be achieved, which can be used to inhibit the delivery of power to a load element, while at the same time other load elements that are not exposed to the superimposition of said power signal pulses having the second polarity are still powered by e.g. a DC supply or other power signal pulses having the first polarity. Hence, the power signal pulses may be used for activating (powering) as well as de-activating (avoiding /inhibiting the supply of power or the ability to receive power) of the load elements. As a result the load elements may be driven accordingly in dependency on the particular implementation of the invention.

The dependent claims and the subsequent description disclose particularly advantageous embodiments and features of the invention, whereby in particular the method according to the invention may be further developed according to the dependent circuit claims.

According to one aspect of the invention it is of advantage to incorporate the load elements into the circuit in order to implement integrated display circuits, e.g. in miniaturized form utilizing integrated circuit technology.

According to a further aspect of the invention controlling the temporal relationship of the at least two power signal pulses is provided so that at least two power signal pulses propagate along the propagation line and coincide at a specific load element. Controlling the temporal relationship between the signal pulses allows for easy selection of one or more particular load elements out of the number of load elements. In the case of load elements having a non- linear voltage-versus-current characteristic curve, in particular light emitting elements such as solid state light emitting elements like LEDs or solid state lasers, controlling the temporal relationship further allows for brightness control and precise selection of individual light emitting elements or groups of light emitting elements, hence generating impressive visual effects by simply controlling the timing. The same concept is applicable to or in combination with organic light emitting diodes (OLEDs), which unlike LEDs allow a surface-like light emission. The non- linear voltage-versus-current characteristics determines the power consumed out of the (coinciding) power signal pulses, which are released by the delay structure to said load elements.

A further aspect of the invention concerns generators for generating the power signal pulses. In a generic embodiment a first generator for generating a first power signal pulse being connected to a first element of the delay structure for feeding said first element with one power signal pulse of the at least two signal pulses and a second generator for generating a second power signal pulse being connected to a second element of the delay structure for feeding said second element with another power signal pulse of the at least two power signal pulses. However, in particular it has proved to be of advantage if identical generators for generating identical power signal pulses to be fed into the delay elements from opposing ends of said delay structure are provided. This allows for a relatively simple design of the circuit because not only the design of the elements of the delay structure may remain the same for each element but also the design of the signal generators remains identical. In addition it is to be mentioned that in case of string-like (e.g. one- or two-dimensional) delay structures also intermediate power signal pulse feeding points might be implemented. Power signal pulses from already present generators or an additional generator may be fed to these feeding points, which allows for defining sub-sections in the delay structure.

According to one aspect of the invention the delay structure comprises a structure of interconnected delay elements, each of which comprises a resonant circuit showing e.g. at least an inductor and a capacitor. Providing individual - e.g. discrete - electronic elements in the form of an inductor and a capacitor as elements of the delay elements allows for designing a transmission line with a well-defined delay per segment, in which the losses in terms of power signal losses can be tuned by selecting electronic elements having an appropriate quality. Consequently the transmission line may be implemented as being practically lossless as well as being lossy. However, also a parasitic inductance or a parasitic capacitance may implement either partly or entirely one of the electronic elements or all of the electronic elements of the resonant circuit.

A further aspect of the invention relates to an application of an OLED in the inventive circuit. Hence a circuit according to the invention is provided, wherein the delay structure is implemented by an organic light emitting diode - as such - so that inductive and capacitive functions of the delay structure are provided by the intrinsic properties of the design or structure of the organic light emitting diode and the plurality of load elements - as such - is formed by the continuum of the light emitting structure or by a segmented light emitting structure of the organic light emitting diode. The structure of the OLED may comprise its substrate or a part of it. This aspect of the invention makes it possible to transfer a discrete solution based on individual lighting elements, e.g. LEDs, into the domain of surface-like lighting devices. The planar light-emitting structure of an OLED can be seen as continuum of (a plurality of) finite elements. Sections or areas of this planar light emitting structure can be triggered to emit light by feeding appropriately timed power signal pulses into the connectors of the OLED. As the OLED already comprises a planar structure that shows a capacitor having a substantial capacitive value, the design of the required inductive component for implementing e.g. a two-dimensional propagation line/plane can be achieved by various measures. This might encompass the connectors of the OLED itself. Also individual ferromagnetic layers provided in the structure of the OLED might be a design of choice. In addition printed coils or a combination of the aforementioned design choices might serve for the realization of the inductive component of a continuum of a two-dimensional planar delay structure allowing the delayed propagation of the power signal pulses within the OLED. In addition, there may be provided supplementary capacitive or inductive elements within the OLED or attached to it in order to tune or modify the intrinsic inductive and/or capacitive properties of the OLED. In a particular embodiment such a supplementary element may be implemented by a ferrite plate attached to the rear of the OLED. Such an external structure may also implement the capacitive function. The external structure may be directly attached to the OLED or located at a certain distance from it. Also embedding the OLED into a fluid can be considered. The supplementary element may also be embedded in the structure of the OLED.

According to one embodiment of the invention e.g. sinusoidal shaped power signal pulses or power signal pulses having any arbitrary shape might be utilized. However, it is of particular advantage to provide essentially rectangular shaped power signal pulses because by appropriately defining the power signal pulse length and height or strength, respectively, the individual load elements can be addressed precisely and the power to be released to the addressed load element is well defined and precisely defined in terms of its temporal existence. Implementations based on digital signal processors like central processing units, programmable logic arrays or the like are advantageously supported as well. But also the superimposition of various - even different waveforms may be of advantage in cases of according priority not only to the above-mentioned criteria but also giving priority to other targets to be achieved.

In a further embodiment the circuit is designed to supply a positive or a negative bias voltage to the load elements and to superimpose the power signal pulses with said bias voltage. One the one hand - in the case of the negative bias voltage - this embodiment allows the use of power signal pulses with higher amplitude, as it would be the case without such a bias voltage. Hence greater brightness of the selected LED may be achieved. On the other hand - in the case of positive bias voltage - this embodiment allows the use of power signal pulses with relatively low amplitude. This solution may improve the efficiency of power signal pulse transmission into the delay structure. Because of an imperfect absorption of all the power transmitted by the power signal pulses some timing and circuitry measures are recommended. Therefore, according to a further aspect of the invention, the circuit is designed so that residual parts of the power signal pulses that propagate along the delay structure after a previous coinciding of said power signal pulses are absorbed prior to a subsequent generation of new power signal pulses. Implementing this feature allows for trouble-free operation of the circuit so that an overlap of a power signal pulse and a residual part of another power signal pulse is avoided. It guarantees that load elements are not triggered by accident, which might occur if such a power signal pulse and such a residual part of another power signal pulse coincide at a position of a load element. In one embodiment of the invention the delay structure may be one- dimensional, which can be used to allow string-like propagation of the power signal pulses. In other embodiments the delay structure comprises at least two dimensions and at least one node, at which elements of the delay structure allocated to different dimensions are connected to each other. This embodiment enables even more complex structures and propagation scenarios of the power signal pulses. In such a configuration power signal pulse propagation in different (e.g. perpendicular) directions or dimensions of the delay structure may be superimposed at the nodes. Consequently more visual effects can be achieved than would be the case in a one-dimensional delay structure.

Very often exactly two or more power signal generators will be used to implement the invention. However, in one particular embodiment of the invention the generator arrangement comprises only one generator, namely a first generator for generating a first power signal pulse with a first polarity and a further first power signal pulse with a second polarity, the first power signal generator being connected to a first element of the delay structure for feeding said first element with both power signal pulses in a consecutive manner, and the delay structure comprises a reflective termination element at a second element of the delay structure so that the first power signal pulse fed into the delay structure is reflected at the reflective termination element with the second polarity to form the second power signal pulse. This solution allows an efficient re-use of the first generator for generating the at least two power signal pulses. The generator only needs to be capable of generating power signal pulses with different polarity, which may sometimes be more desired than having two identical generators installed. This solution is of particular interest in situations in which power signal pulses can only be fed into the delay structure at one feeding point because other parts of the delay structure may be difficult to access. In a particular embodiment the termination element may be implemented by a wire that short-circuits the last delay element. However, various other measures known in the art may be applied.

The circuit and/or the method according to the invention may be used in the context of general illumination or may be embedded in light-emitting devices. Without being exhaustive, some examples are display devices, illumination devices, car lighting devices for backlighting or turn-signal indication, devices applicable to the general topic of creating decorative effects, as well as devices in the domain of guiding lights and so forth.

Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for the purposes of illustration and not as a definition of the limits of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 shows a schematic circuit according to the invention; Fig. 2a shows schematically in the form of a sequence of signal diagrams a first operation scenario of the circuit depicted in Fig. 1;

Fig. 2b shows by analogy with Fig. 2a a second operation scenario of the circuit depicted in Fig. 1;

Fig. 2c shows by analogy with Fig. 2a to 2b a third operation scenario of the circuit depicted in Fig. 1; Fig. 3 shows a simulation result for a circuit according to Fig. 1;

Fig. 4a shows a schematic circuit according to a second embodiment of the invention;

Fig. 4b shows a detail of a power signal generator shown in Fig. 4a; Fig. 5a shows a propagation of power signal pulses in a circuit according to Fig. 4a;

Fig. 5b shows a simulation result for the circuit according to Fig. 4a; Fig. 6 shows a further embodiment of the circuit according to the invention similar to the embodiment according to Fig. 1;

Fig. 7a shows an extension of the one-dimensional configuration of the invention according to Fig. 1 into a two-dimensional configuration by means of identical matrix elements;

Fig. 7b shows one of the matrix elements according to Fig. 7a; Fig. 8 shows a circuitry implementation of the two-dimensional configuration depicted in Fig. 7a; Fig. 9a to 9d show some simulation results of the circuit according to Fig.

8;

Fig. 10 shows in a schematic view a structure of a state of the art organic light emitting diode (OLED);

Fig. 11 shows a first embodiment of an OLED implementing an circuit according to the invention;

Fig. 12 shows a relevant structure of the OLED according to Fig. 11; Fig. 13 shows a second embodiment of an OLED according to the invention;

Fig. 14 shows an inductive structure created in a segmented anode layer of the OLED according to Fig. 13. In the drawings, like numbers refer to like objects throughout. Objects in the diagrams are not necessarily drawn to scale.

DETAILED DESCRIPTION OF EMBODIMENTS

Fig. 1 shows a circuit 1 for selectively powering a number of load elements

to 2_n, which in the present case are implemented by light emitting diodes (LEDs). LEDs have a non-linear voltage-versus-current characteristic curve, which allows current flow and consequently light emission only if a threshold voltage VF - also termed forward voltage - in the forward direction is applied between the anode and cathode connectors of the LED. Depending on the color of the emitted light for which a LED is designed it requires a certain forward voltage to be applied, e.g. in the range of approximately 1 volt for infrared light up to more than 3.5 volts for ultraviolet light.

In the present embodiment the LEDs 2_\ to 2_n are comprised in the circuit 1. However, according to another embodiment of the invention, the LEDs may also be located outside the circuit and be connected by means of a signal bus with the respective connection points in the circuit 1. This solution serves the demand for high circuit density, e.g. by designing the circuit as an integrated circuit (IC) for driving LEDs to be connected with the IC.

The circuit 1 further comprises a number of delay elements 5i to 5_n, which are connected with each other to form a propagation line for power signal pulses 4a and 4b, each delay element 5i to 5_n being designed for delaying the propagation of the power signal pulse 4a or 4b and for releasing the power signal pulses 4a or 4b towards the respective LED 2_\ to 2_n. In the present context said releasing can be achieved by providing some connectors to which the LEDs

to 2_n can be connected by means of plugs. But also pads or the like may be provided such that the LEDs

to 2_n can be affixed by means of soldering or bonding or similar techniques. Said respective LED

to 2_n is connected at the position of the respective delay element 5i to 5_n. In the present case e.g. the LED 2i is connected in parallel to the capacitor C of the first delay element 5i. Each delay element 5i to 5_n is implemented by a resonant circuit comprising an inductor L and a capacitor C. The inductor L and the capacitor C of the first delay element 5i together with the first LED 2_\ form a so termed unit element indicated by a box Ei. This unit element Ei is followed by other unit elements E₂ to E_n, of which unit elements E₂ to E_n_i are not indicated in Fig. 1. For the sake of clarity and simplicity such boxes Ei to E_n indicating unite elements like the one termed Ei are used in the following figures where appropriate. Given the symmetry of the delay line, the delay elements 5i to 5_n are shown as seen from the first power signal pulse 4a when traveling from left to right in the drawing plane. In this situation the propagation line seems to ends with a supplementary inductor L at its right end not belonging to any of the delay elements 5i to 5_n. However, this is a question of viewing direction into the propagation line, which will be explained in the following text. Assuming now that the second power signal pulse 4b travels from right to left in the drawing plane, also this second power signal pulse 4b will face a sequence of delay elements 5i to 5_n. In this case the sequence of delay elements 5i to 5_n will start with the first inductor L seen from the right side and comprises the first capacitor C seen from the right side. Also in this scenario a supplementary inductor L may now remain at the left end of the propagation line. Consequently, independently of which side - left or right - the power signal pulses 4a or 4b are entering the propagation line, the propagation line appears to have the same structure for each power signal pulse 4a or 4b, which is necessary in order to provide symmetric propagation conditions.

Ignoring the dissipative effect of the LEDs when operated in its conductive state the repeated structure of inductors L and capacitors C implements a lossless transmission line having a characteristic impedance Z:

Z = J — (Equation 1)

The delay per segment is given as: t_seg = VL C (Equation 2)

Utilizing the characteristics of the transmission line the gist of the invention is given by the insight that each propagating power signal pulse 4a and 4b shall have a signal strength measured in voltage that does not exceed the forward voltage of the LEDs 2_\ to 2_n. Only the superimposition of the two power signal pulses 4a and 4b shall exceed the forward voltage of the LEDs

to 2_n. Consequently, the shape of the individual pulses 4a and 4b can be selected so that its maximum value does not trigger current flow in forward direction when passing along the position of one of the LEDs 2_\ to 2_n in the string. Given the non-linear characteristic curve of an LED a (nearly) lossless propagation of signal pulses 4a and 4b along the structure of the delay elements 5i to 5_n is achieved as long as the LEDs remain in the non-conductive state, or in other words in the switched off state. In the present case a rectangular power signal pulse shape was chosen without limiting the invention to only this type of shape. In the present example the power signal pulses 4a and 4b show a signal strength of 0.75 times the forward voltage VF, which would lead to a voltage of 1.5 times the forward voltage VF in the case of coinciding (superimposed) power signal pulses 3a and 3b if no load elements would be present. However, given the fact that there are LEDs present and considering the non- linear voltage-versus-current characteristics of the LEDs 2_\ to 2_n the actual value of the voltage V achieved by the coinciding power signal pulses 4a and 4b will be finally determined by characteristics of both the LEDs and the delay structure.

For the purpose of generating the power signal pulses 4a and 4b the circuit comprises a generator arrangement 3. The generator arrangement 3 comprises a first generator 3a, which is connected with the first delay element 5i of the propagation line. The first generator 3a is designed for generating the first power signal pulse 4a and for feeding it into the string of delay elements 5i to 5_n at the position of the first element 5i. The generator arrangement 3 further comprises a second generator 3b, which is connected with the last delay element 5_n of the propagation line. The second generator 3b is designed for generating the second power signal pulse 4b and for feeding it into the string of delay elements 5i to 5_n at the position of the last element 5_n.

Each of the generators 3a and 3b comprises an impedance Z (explicitly shown in Figure 1) that has a value that is equal to the value of the impedance Z according to Equation 1 in order to provide for a matched power transmission condition, which prevents reflections at either side of the transmission line.

The generator arrangement further comprises a control unit 6, which is connected with the first generator 3 a and the second generator 3b and is designed for controlling a temporal relationship between the two power signal pulses 4a and 4b. In fact the cooperation between the control unit 6 and the two power signal generators 3a and 3b allows for triggering the moment of generating the individual power signal pulses 4a and 4b so that the power signal pulses 4a and 4b, when propagating through the string of delay elements 5i to 5_n and LEDs

to 2_n, do coincide at the desired LED. The control unit 6 may operate autonomously or may receive data or other form of signals, which allow the control unit 6 to control the generation of the power signal pulses 4a and 4b. In the event that it is not possible or not wanted to connect both generators 3a and 3b to the control unit 6, two separate (individual) control units may be used. In this context and solely as one of a plurality of possible implementations, one control unit may generate control signals with a given frequency. The other control unit may synchronize to these control signals of the first control unit and set the amplitude and delay for the power signal pulses to be generated depending on its own or received control signals in order to achieve a desired or commanded light result, including the avoidance of the generation of power signal pulses 4a and 4b when no light is needed or desired.

The principle of operation is depicted in a conceptual manner in Fig. 2a, wherein the signal diagrams of Fig. 2a show a first operation scenario, Fig. 2b shows a second operation scenario and Fig. 2c shows a third operation scenario in accordance with a method according to the invention in the case of a one-dimensional configuration in more details. For each of the three operation scenarios a temporal relationship between the individual signal diagrams of each of Fig. 2a to 2c is shown by the timeline t located on the left side of Fig. 2a to 2c. In this particular example the number of delay elements and the number of LEDs is given by fifteen (15), which is shown in the form of rectangular boxes Ei to Ei₅. As described earlier in the context of Fig. 1, there is an additional inductor at one side of the delay structure, which, for the sake of simplicity, is ignored in all Figures showing the timing of power signal pulses. Each of the boxes Ei to Ei₅ comprises one delay element; e.g. Ei comprises delay element 5i and the corresponding LED 2_\, while E₂ comprises delay element 5₂ and the corresponding LED 2₂. The boxes Ei to Ei₅ are drawn along the x-axis of the diagrams, which indicates the spatial position of the individual box Ei to Ei₅ in arbitrary units. On either side the delay structure is terminated by the respective generator 3 a or 3b. Given the fact that the first power signal pulse 4a is fed into the first box Ei indicated on the left side of the string of boxes Ei to Ei₅ and the second power signal pulse 4b is fed into the fifteenth box Ei₅ indicated at the right side of the string of boxes Ei to Ei₅, the delay time dt can be defined in terms of t_πgh_t (starting time of the second power signal pulse 4b) and t_left (starting time of the first power signal pulse 4a) as follows: d^t = t_nght - ti_eft (Equation 3)

The y-axis of the diagrams reflects the voltage of the power signal pulses 4a and 4b and the voltage caused by the superimposition of the two power signal pulses 4a and 4b, respectively, which is shown by a superimposition pulse 8 in Fig. 2a to 2c.

In general, the method provides for generating the two pulses 4a and 4b by means of the cooperation of the control unit 6 and the two generators 3 a and 3b. The first power signal pulse 4a is fed into the string of boxes Ei to Ei₅ at the position of the first box Ei and the second power signal pulse 4b is fed into the string of boxes at the position of the fifteenth box Ei₅. Following the feeding of the two power signal pulses 4a and 4b into the chain of boxes Ei to Ei₅ the signal pulses 4a and 4b propagate towards each other through the structure of the delay elements and pass along the individual LED comprised in each of the boxes Ei to Ei₅.

In particular, Fig. 2a shows a first operation scenario, in which the temporal relationship between the two signal pulses 4a and 4b is set in such a way that they are generated at the same time, which on the timeline t is indicated by t=0. Consequently the delay time dt equals zero. Propagating the power signal pulses 4a and 4b in opposing directions along the string of boxes Ei to Ei₅ leads to a superimposition of the power signal pulses 4a and 4b at the eighth box E₈ in the centre of the string, which is shown in the form of the superimposition pulse 8. This leads to LED number eight (8) being driven in the forward direction and emitting light, because at the position of overlap in the string the sum of the values of the voltages of the two power signal pulses 4a and 4b adds up to a value beyond the value of the threshold voltage VF of the LED number eight (8). On the timeline t this is indicated at t=tl . Fig. 2b shows a second operation scenario. At t=0 the first power signal pulse 4a is released into the string. In this scenario the left (first) power signal pulse 4a is already propagating along the string of boxes Ei to Ei₅ before the right (second) power signal pulse 4b is started. At t=tl the second power signal pulse 4b is released into the string. The two propagating power signal pulses coincide at t=t2. According to this setup a certain positive delay time dt was chosen, leading to a superimposition at the tenth box Ei₀. This drives the tenth LED into its light-emitting state.

Fig. 2c shows a third operation scenario. In contrast to the second operation scenario at t=0 the second power signal pulse 4b is released into the string at t=0. The first power signal pulse 4a is released into the string at t=tl some time later in comparison with t=0. According to this setup a certain negative delay time dt was chosen, leading to a superimposition at the sixth box E₆. This drives the sixth LED into its light emitting state. In this scenario the right (second) power signal pulse 4b was already propagating along the string of boxes Ei to Ei₅ before the left (first) power signal pulse 4a was started.

In all three operation scenarios the superimposition of the two power signal pulses 4a and 4b leads to a total signal strength of more than the threshold voltage VF, which allows current flow in the forward direction through the LED being exposed to the superimposition of the two propagating power signal pulses 4a and 4b. In order to achieve an overlap of the power signal pulses 4a and 4b within the string of boxes Ei to Ei₅ the following condition must be met: |dt| < n • t_seg (Equation 4) wherein n is in the range of 1 to 15 in case of the present exemplary embodiment. In order to perform a proper timing for addressing the desired LED to be illuminated the control unit 6 applies the following equation, which allows for defining the number n_sei of LEDs to be exposed to the superimposition of the two power signal pulses 4a and 4b and computing the required delay time dt as a function of n_sei and t_seg: tdehy = (^{2 ■ n}sei ^~ (ⁿ + ¹)) ' t_seg (Equation 5) wherein n_sei is in the range of 1 to 15 in case of the present exemplary embodiment. Equation 5 takes account of the fact that there are n+1 elements in the delay structure comprising the delay elements 5i to 5_n and the last (n+l)^st inductor L, but only n LEDs 2i to 2_n. At this point it is highlighted that symmetry considerations regarding the delay structure have initially been made. For the sake of clarity it should be mentioned that a superimposition of the power signal pulses 4a and 4b at a load element 2_\ to 2_n does not lead to a total dissipation of the two power signal pulses 4a and 4b. Because of the non- linear characteristic curve of the LEDs

to 2_n in fact only a part of the energy or power supplied by the power signal pulses 4a and 4b is dissipated. This situation is similar to a valve requiring a certain opening strength for being opened and allowing a medium to pass the valve. The medium causing the opening of the valve does not entirely disappear from that side of the valve where the pressure was built up after the pressure diminishes when a certain part or quantity of the medium passes the open valve. Taking this analogy into account a precaution is recommended when operating the circuit 1. In order to avoid unwanted and uncontrolled further superimposing of the residual parts of the power signal pulses 4a and 4b, which continue their propagation after overlapping each other at the position of a LED or several LEDs, the residual power signal pulses 4a and 4b necessitate dissipation at the impedances Z at the respective end of the delay structure. Hence a certain relaxation or recovery time is recommended before feeding new power signal pulses 4a and 4b into the delay structure.

The circuit 1 might be included in a display device for advertising or consumer electronic (CE) devices or the like. As an example a multi-light-chain for indicating fast forward or fast rewind operation of an audio playback device might be concerned. The CE device triggers the circuit 1 and provides data indicating the direction of browsing through e.g. an MP3 audio file. Based on this direction-indicating data the control unit 6 controls the timing of the generators 3a and 3b so that in the case of fast forward operation a light spot traveling from left to right is visible and in the case of fast rewind operation a light spot traveling from right to left is visible. Fig. 3 shows a simulation result for the circuit 1, in which in total 32

LEDs are installed. The x-axis shows the position of the LEDs. The y-axis shows the integral of the LED current in arbitrary units. The following values have been selected for the elements of the electric circuit: L = IO μH, C = 100 nF and for the diode D, the simulation model of the device termed "LXK2-PW14" from Philips Lumileds is used. This leads to the following parameters: Z=IO ohms, t_seg = 1 μs. The two power signal pulses 4a and 4b are rectangular shaped with pulse duration of 20 μs and signal strength of 5 volts during the pulse and 0 volts before and after the pulse. The rise and fall time of the power signal pulses 4a and 4b was selected to be 2 ns. The pulse length of 20 μs is quite long, resulting also in a long time where the pulses are superimposed with respect each other. The spatial extension of the zone of overlap of the power signal pulses 4a and 4b therefore extends beyond the location of only one single LED, hence covering multiple LEDs. As a result the resulting LED currents clearly indicate that there is not a selection of only one single LED but rather a number of neighboring LEDs emitting light with different intensity or brightness. The location of the peak of the LED current, however, depends on the selected delay time dt. For the LED currents labeled with reference signs 9 to 14 the selected delay times are shown in the following table:

The number of LEDs triggered to emit light depends on one hand on the power signal pulse duration selected. Typically, owing to the non-linear characteristics of the load elements, not all energy stored in the power signal pulse 4a and 4b is consumed completely in one single LED, hence some part of the power signal pulse 4a and 4b travels to the next LED. In general, shorter pulses will result in fewer LEDs emitting light. It is possible to activate only one single LED by optimizing the parameters discussed above, but this optimization depends on the other hand also on the voltage vs. current characteristic curve of the LED selected.

When producing a stable power signal pulse pattern at a sufficiently high repetition frequency, e.g. higher than 50 Hz, a stable light region extending over a single LED or extending over a number of LEDs can be generated. Varying now the delay time in small steps leads to a smooth movement of the light region.

When producing a suitable sequence of power signal pulses at a sufficiently high repetition rate, it is also possible to activate more than one region in a consecutive fashion, e.g. one after the other. The impression a person watching the LEDs will have will be determined by physiological properties of the human eye or the processing of nerve stimuli produced by the human eye. Due to the slow response of the human eye, several bright spots seem to be present at the same time. As a result, a high number of lit regions may be shown virtually at the same time. Although in the above described embodiment two signal generators were present it should be noted that only one signal generator might also serve for the generation of at least two power signal pulses 4a and 4b traveling along the string structure. Such a second embodiment is shown in Fig. 4a. In comparison to the embodiment according to Fig. 1 the second generator 3b is replaced by e.g. a wire 15 that short-circuits the rightmost end of the propagation line, which leads to an unmatched termination. This causes power signal pulses to be reflected with inverted polarity at this position. The first generator 3a shows a particular design taking this circumstance into account as depicted in Fig. 4b. Depicted is an energy source 3c, a MOSFET full bridge inverter structure 3d, which comprises four (4) NMOS transistors Ml to M4, and a source resistor 3e, which for providing matched conditions is designed to have the impedance Z of equal value to the impedance Z of the propagation line. This design allows generating power signal pulses 4a and 4b having positive polarity as well as negative polarity. Another design implementation might also provide a solution for generating bipolar power signal pulses.

In the following the operation of the second embodiment is described. At t=0 the first power signal pulse 4a having negative polarity is generated with a signal strength of- 0.75 VF. In case of resistive source impedance, the open loop voltage of the ideal generator is set to 2 ^• (- 0.75 VF) = - 1.5 VF. The so generated first power signal pulse 4a propagates along the propagation line and the LEDs are not powered because of the negative polarity. At t = tl the first power signal pulse 4a reaches the end of the propagation line, where it is reflected. Because of the change in traveling direction the reflected first power signal pulse 4a is now labeled as the second power signal pulse 4b and propagates along the propagation line with positive polarity and signal strength of 0.75 VF in a direction back to the first pulse generator 3a. This is similar to the first embodiment, in which a second pulse generator 3b was provided for generating the second power signal pulse 4b. Given the signal strength of the second power signal pulse 4b still none of the LEDs is powered. Without any superimposition with another power signal pulse the second power signal pulse 4b would simply travel along the propagation line and be dissipated by the source resistance 3e. Assuming now that a further (fresh) first second power signal pulse 4a is generated at t = t2 with a positive polarity having a signal strength of 0.75 VF also this further first signal pulse 4a does not power any of the LEDs when traveling along the propagation line. At t = t3 the two powers signal pulses 4a and 4b do overlap constructively and result in the pulse 8 showing a signal strength of 1.5 VF if no load elements would be present as described earlier. Given the existence of LEDs the voltage V is truncated (not shown in the Fig. 5a) at a certain level and at least part of the signal energy is delivered to the LED(s) located at this position. In general the position of the overlap is determined by the delay time dt between the two power signal pulses 4a and 4b. It is defined as the difference between the pulse starting time t2 of the (positive) further first power signal pulse 4a and the pulse starting time of the (negative) first power signal pulse 4a. Since the (negative) first power signal pulse 4a is generated at t=0 the delay time dt is equal to t2 (dt=t2). If for example an LED near the rightmost end should be powered, the (positive) first power signal pulse 4a needs to be generated before the (negative) first power signal pulse 4a is reflected, hence the timing needs to be set to t2<tl . A general timing condition that allows the pulses to overlap constructively is given by the following equation:

0 < dt ≤ n ^• t_seg (Equation 6)

Otherwise the two power signal pulses 4a and 4b will miss each other. In a real- world scenario the theoretical model described herein needs to be adapted if the pulse duration is longer than n ^• t_seg because in the present model it is assumed that the pulse duration is shorter than n ^• t_seg. In addition, according to the present model, powering the last n^th LED 2_n leads to a delay time dt = 0, hence no pulse at all would be generated. Also in a real- world scenario addressing the last LED could be difficult. However, applying a dummy segment or delay element, e.g. without any LED, could solve this problem. By analogywith the first embodiment, given the position of the luminosity peak at a particular LED number n_sei, the required delay time dt can be calculated: t delay = (ⁿ " ¹¹SeI ) ' ² ' ^eg (Equation 7)

As mentioned in the context of the first embodiment the pulse duration determines the number of LEDs to be active and their brightness. In Fig. 5a a schematic scheme of operation is shown by means of traveling power signal pulses 4a and 4b that overlap and result in the pulse 8 at a particular element (in the present case at the box E₆) after the (negative) first power signal pulse 4a was reflected at the end of the propagation line. The scheme of operation reflects the timing as described above. On the left side of the timing diagrams the time line t is shown extending from top to bottom. At t = 0 the (negative) first power signal pulse 4a is released. At t = tl it is reflected with positive polarity at the end of the propagation line now termed second power signal pulse 4b. At t=t2 the (positive) further first signal pulse 4a is released. At t = t3 the two power signal pulses 4a and 4b are overlapping. The superimposition takes place at the location of the box E₆. With the dashed lines, the two pulses are shown some time before t3. For the sake of clarity it is mentioned that at the top of Fig. 5a the first generator 3a and the boxes Ei to Ei₅ and the wire 15 implementing the end of the propagation line are show only in a very schematic manner and in reality are connected to each other as depicted in detail in Fig. 4a.

In Fig. 5b, similar to Fig. 3, simulation results for a circuit 1 according to Fig. 4a and 4b are shown. The model parameters applied in this model are identical to the parameters applied in the model described in the context of the first embodiment. For the LED currents labeled with reference signs 16 to 18 the delay times td_ei_ay are shown in the following table:

It should be mentioned that the peak current for the LED current 17 should occur exactly at LED position number eighteen (18). However, a slight deviation from the desired result is visible in the model result. Because of circumstances related to the modeling of the circuit 1 a correction of minus two (-2) μs of the delay time dt seems to be applicable in the present case.

Further to this, as already mentioned earlier, some of the power signal pulse energy is dissipated and some of it still propagates along the propagation line. This further propagating energy could cause undesired powering or undesired addressing of LEDs in the case of releasing another power signal pulse too early. Given this non-ideal dissipation it could happen that e.g. the further first power signal pulse 4a (or more precisely the non-dissipated part of it) continues propagating toward the end of the propagation line where it is reflected with a negative polarity and propagates towards the generator 3a. If now a further negative pulse is generated too early - e.g. before the reflected part of the further first power signal pulse 4a has reached the generator 3 a and is dissipated in the source resistor 3e this might lead to constructive overlapping of the two negative pulses. Owing to the limited negative bias rating of the LEDs used this could cause difficulties. Therefore it is proposed to start a new signal sequence only after a certain amount of time (a relaxation time) has been expired as described by the following equation. Thereafter it is safe to start a new power signal pulse cycle: t = t2 + 2n ■ t_seg (Equation 8)

This design does not require any additional wires or cables for connecting the first end of the propagation line with the second end of the propagation line for the purpose of transmitting control signals or providing mains connection or power supply connection for a second generator. Hence, this single generator powered design is perfectly suited for implementing long light sources, such as LED tubes/bars that e.g. show a traveling light spot or light bar. In a further embodiment the generator 3 a or the generators 3 a and 3b may be designed to generate a negative bias voltage within the boundaries of the breakthrough voltage of the LEDs applied in the circuit 1. This solution enables higher amplitudes of the power signal pulses to be generated and released into the propagation line in order to achieve higher brightness for the selected LED with only limited or even without accidental powering of additional (neighboring) LEDs as described in above embodiments.

In contrast to the embodiment making use of the negative bias voltage also a positive bias voltage could be a design choice. In a preferred embodiment the positive bias voltage might be selected below the forward voltage of the LEDs. This design enables the use of relatively low power signal pulse amplitudes to be generated by the generator(s) 3a (and 3b). It would improve the efficiency because only a power signal pulse 4a (and 4b) with small amplitude would need to be released via the impedance- matching impedance into the propagation line. This design choice, however, demands relatively low ohmic impedance inductivities L in order to allow proper operation.

A further embodiment allows in particular the implementation of longer LED string structures with reduced effort or an improved quality in terms of the addressability of individual LEDs when using components of lower quality. Such an embodiment is shown in Fig. 6, which comprises amongst the components already described in the context of Fig. 1 an additional third generator 19. The generator 19 is designed to produce a third power signal pulse 4c. It is connected with an additional matching impedance 20, which is designed to be half of the value of the characteristic impedance Z of the propagation line. Connected with the additional matching impedance

20 is a delay element like structure that comprises an inductor 21 and a capacitor 22 and a switch 23. The switch 23 is finally connected with the propagation line at the location of one of the LEDs. In the present case it is connected with LED number ten (10). In order to cope with the particular power signal feeding situation the value of the inductor

21 is designed to be half of the value of the inductors L of the propagation line and the value of the capacitor 22 is designed to be as high as the value of the capacitors C of the propagation line. The switch 23 is provided to connect the elements 19 to 22 with the propagation line or to disconnect the elements 19 to 22 completely from the propagation line. The design allows the introduction of additional power signal pulses 4c between the tenth (10^th) box Ei₀ and the eleventh (11^th) box En of the propagation line so that the introduced additional power signal pulses 4c can propagate in both directions along the propagation line. In a real- world application, which might comprises e.g. 30 boxes Ei to E₃₀, there might be a further group of elements 19 to 23 that is connected between thenineteenth (19^th) box Ei₉ and the twentieth (20^th) box E₂o. This allows the definition of three sections of the propagation line, e.g. Ei to Ei₀, En to Ei₉ and E₂o to E₃₀. Depending on which LED needs to be powered the two additional power generators 19 can be used to support this as it fits best. If e.g. LED number five (5) needs to be powered it would be advantageous to use the first generator 3 a in combination with the additional third power generator 19 connected at LED number ten (10). This might give a better result because otherwise the second power signal pulse 4b released from the second generator 3b would need to travel a relatively long distance before reaching LED number five (5), hence running the risk of degradation because of non-ideal component characteristics of the propagation line. In general it could be advantageous to use those generators or combination of generators 3 a, 3b or 19 that are connected closest to the selected LED to be powered. Although in the above described embodiments two additional generators 19 were mentioned, it should be noted that any other number can be applied as well. In addition various feeding points for feeding the additional power signal pulses 4c generated by the additional generator(s) 19 can be selected according to the demand to be served. E.g. a third generator with matching circuitry might be connected to several switches 23, which couple the power signal pulse into several feeding ports. But also the generators 3a or 3b might be used together with additional switches and - if necessary - additional matching circuitry instead of the third power signal generator 19. In the following the one-dimensional structure of the delay structure as described above is now extended into a two-dimensional structure to form a delay / propagation plane constituted by discrete elements, which is shown in Fig. 7a and Fig. 8.

Fig. 7a depicts the circuit 1 that comprises four pulse generators located at each side and labeled as 3a_left, 3b_right, 3a_top and 3b_bottom in order to indicate that the two-dimensional structure can also be understood as a number of n horizontal propagation lines running in parallel from left to right and a number of m vertical propagation lines running in parallel from top to bottom in the drawing plane. Each of the generators 3a_left, 3b_right, 3a_top and 3b_bottom is connected via a corresponding coupling network 24, 25, 26 and 27 with the inner structure of the circuit 1 that shows n times m (n*m) identical boxes indicated with reference signs En to En_1n. In the following the numbers following the symbol "E" indicate the discrete coordinate position by means of the index "n" and "m".

Each join of one of the horizontal delay lines with one of the vertical delay lines has its center in one of the identical boxes En to E_n1n, of which the box E_n1n located in the lowest right part of the delay plane is shown in a detailed view in Fig. 7b. It comprises a capacitor C_nm that is equivalent to the capacitor C shown in Fig. 1 and an LED 2_^ that is equivalent to e.g. the diode 2_\ shown in Fig. 1. In addition four inductors L leftnm, L rightnm, L topnm and L bottoninm are shown. In fact the combination of each of these inductors L_leftnm,

L_topnm and L bottoninm with corresponding inductors of neighboring boxes or with inductors of the neighboring coupling network implements an inductor that is equivalent to the inductor L shown in Fig. 1. Splitting the inductor L into left, right or up, down parts only serves clarity purposes, but in a real- world implementation only the combined inductor L would be present. This circumstance is shown in Fig. 8, in which the uppermost left part of the circuit is shown in detail. The edges of the boxes En to E₂₃ are drawn in a way to split the inductors L into two (identical) parts. Also details of a part of the coupling networks 24 and 26 are shown.

For the sake of clarity it should be mentioned that also the elements of the coupling networks are replicated according to the number n or m as the case might be. The coupling networks 24 to 27 are in fact extensions of the edge-located matrix elements En to En_1n, e.g. En, Ei₂, Ei₃, E₂1 and so on, comprising e.g. the components of the delay elements and some resistors but should not contain LEDs. The coupling networks are required in order to minimize side effects such as to prevent from short- circuiting the power signal pulses released e.g. from the vertical generators 3a_top and 3b_bottom via the common connections with the horizontal generators 3a_left and 3b_right and vice-versa. Given the fact that a power signal pulse is fed into the entire number of propagation lines extending in parallel to each other the inductive couplings at the intersection points with orthogonal propagation lines do not affect the propagation of pulses in the first mentioned dimension and vice-versa. This is basically given by the fact that the power signal pulses do appear at the same time at the same positions along the parallel-extending propagation lines. It forms the basic consideration for extending the one-dimensional structure into a two-dimensional structure.

By analogy with the embodiments discussed earlier also the two- dimensional embodiment allows for the creation of light effects by means of timing the creation of individual power signal pulses, which in the present case are labeled 4a_left, 4b_right, 4a_top and 4b_bottom. Some simulations of a two-dimensional (11-11) matrix element embodiment of the circuit 1 are shown in Fig. 9a to 9d in which areas of high brightness are labeled with B, areas of low brightness are labeled with D and areas with intermediate brightness are labeled with M. The basic operating principle, however, is the same as in the one-dimensional case but with a two-dimensional visual effect. Applying for example only the power signal pulses 4a_left and 4b_right with an appropriate timing leads to a light spot extended in the vertical direction as shown in Fig. 9d. Without any edge effects, it would be a complete vertical line. Applying only the power signal pulses 4a_top and 4b_bottom with the appropriate timing leads to a horizontally extended light spot. Applying more than two power signal pulses 4a_top, 4b_bottom, 4a_left and 4b_right, e.g. three or all four of them, with the appropriate timing and reduced amplitude in comparison with applying only two of them leads to activation of one point, as depicted in Fig. 9a and 9b. For Fig. 9a and 9b, different timing parameters, i.e. different delaytimes, were used. As a result, the highest brightness occurs at different positions. Generating the power signal pulses 4a_left and 4b_right with positive amplitude which propagate in the left-right direction without additional power signal pulses to coincide with those just generated leads to a vertically illuminated line of LEDs only. But as soon as additional power signal pulses 4a_top and 4b_bottom with negative amplitude are generated and propagate in a top-down direction a pause in said vertical line is produced and its position is determined in accordance with the timing applied. Other effects to be achieved may be the darkening or blanking out of a certain area or spot. The circuit 1 might also be used to implement an LCD backlighting device when applying a bias voltage and all four power signal pulses 4a_left, 4b_right, 4a_top and 4b_bottom. In case of a constructive superimposition a local highlighting can be achieved. In case of a destructive superimposition a local darkening can be achieved via the LCD backlighting device. In all cases, providing one set of power signal pulses will lead to one light effect. Applying a series of power signal pulses, each with the same relative timing, will lead to a series of light effects at the same position, which might be preserved as a constant light effect (due to the slow response of the human eye) if the repetition rate of the series is fast enough. Applying a series of power signal pulses and changing the relative timing during the series will lead to light effects at various positions. If the activated position is changed accordingly, the series of light effects at various positions might be perceived as a movement of the light effect. By means of this, a moving light effect, indicating for example a suggested walking direction, could be created for a guiding light use case. Although in all of the above-mentioned embodiments LEDs were concerned to form load elements, it should be mentioned that also other light emitting elements showing a non-linear voltage-versus-current characteristic curve may be used. In particular, organic light emitting diodes (OLEDs) may be used to implement the discrete load elements described. Also combinations of LEDs with OLEDs within one design are feasible. A further use may be for driving solid-state lasers or solid state laser arrays.

In a further embodiment the concept of the invention departs from the domain of discrete structures and moves into the domain of continuum structures without departing from the gist of the invention. This transformation into the continuum structure is performed by modifying a known OLED, which will be elaborated in detail in the following. Unlike LEDs, which have a discrete spot-like light emitting structure, an OLED implements a surface-like light emitting structure. Given the design of OLEDs they qualify for implementing a continuum version of the n ^• m discrete configuration while comprising nearly all of the components of the array of boxes En to En_1n as shown in Fig. 7a in its internal planar structure. A schematic view into a cross section of a basic structure of an OLED 28 as comprised in the art is shown in Fig. 10. The OLED 28 comprises a substrate 29, through which light can be emitted during operation as indicated by an arrow 30. The inside of the OLED 28 is capsulated by a so termed hermetic cover 31. The OLED 28 comprises a cathode connector 32 that extends inside the cover 31 adjacent to the cover 31, wherein in the following the extension into the inside (planar structure) of the OLED 28 is termed cathode layer 32a. The OLED 28 further comprises an anode connector 33 that also extends inside the cover 31 adjacent to the substrate 29. The structure of the OLED 28 also comprises a stack of layers 34 (including but not limited to for example organic layers for light generation, charge generation layers, buffer layers, etc. but not limited to these types of layers), of which in the present version three layers are shown. This stack of layers 34 is responsible for generating the light to be emitted when powered by an electric signal, e.g. a direct current (DC) signal, applied between the anode connector 33 and the cathode connector 32. The anode connector and the cathode connector implement a terminal structure of the OLED 28. A reference potential is typically provided at the cathode connector 32. The extension of the anode connector 33 into the inside (planar structure) of the OLED 28, hereinafter termed the anode layer 33a, adjacent to the substrate 29, is also termed top electrode and might be made of transparent conduction material, e.g. ITO, which is known to have a sheet resistance. Because of the large two-dimensional planar structure or area (e.g. 0.15 m ^• 0.15 m) of the OLED 28 and its sandwich-like design with very thin layers, it already intrinsically comprises a capacitor that shows a relatively high capacitive value per unit of area or length.

One of the problems of such prior art OLEDs 28 is related to the sheet resistance created by the anode layer 33a (also termed top electrode). The sheet resistance is responsible for the brightness non-homogeneity problems know in the art. Typically such an OLED 28 shows a gradient in its brightness distribution. The brightness of the light emitted typically drops from the corner or edge region towards the centre region of the planar light-emitting surface of the OLED 28.

Based on the known structure of the prior art OLED 28 and its intrinsic properties (continuum-like light emission and continuum-like capacitor) it is feasible to transform the discrete description of the circuit 1 into a finite element based description for describing the planar continuum- like structure of an OLED 28. In addition to the already existing continuum-like capacitor the feature to be added is the missing inductive behavior in order to implement a delay structure inside the OLED 28.

According to one embodiment this is achieved by adding an inductive layer as shown for an OLED 35 according to the invention in Fig. 11. For the sake of clarity it should be mentioned that in the following figures the generators for generating the power signal pulses were omitted in order to focus only on the structural improvements or modifications of the OLED 35 only. The generators for generating the power signal pulses as well as the coupling network mentioned in earlier described embodiments might be included in the design of such an OLED 35 in order to create an integrated design. The generator and the coupling network might also be located separate from the OLED so to implement a hybrid design. These and other variations of design choices shall be included in the concept of this invention.

In order to perform the addressing of power to a selected part of the light emitting structure by means of propagating power signal pulses the power signal pulses need to be received by the OLED 35. Unlike to the conventional connector or terminal structure the terminal structure according to the inventive OLED 35 allows for receiving the power signal pulses electrically independent of each other. Still the terminal structure comprises one terminal for providing the reference potential, but other terminals / connectors are arranged to receive the power signal pulses and to inject or feedeach individual power signal pulses into the delay structure at different positions of the delay structure. This allows for a spatial propagation of the power signal pulses within the delay structure in an independent fashion from each other until they coincide at a particular position within the delay structure. The structure allowing this is described in detail below by means of some preferred embodiments of the OLED 35. As depicted in Fig. 11 the OLED 35 according to the invention comprises the anode connectors 33 and cathode connectors 32 on either side (see also top view of Fig. 12). In addition a ferromagnetic layer 36 covers the cathode layer 32a. In this embodiment a common anode layer 33a is provided but four cathode connectors 32 (32_left, 32_right, 32_top (not shown), 32_bottom (not shown)) are designed, each of which is located on one of the sides of the OLED 35, so that by analogy with Fig. 7a individual generators 3a_left, 3b_right, 3a_top and 3b_bottom can be connected, which is not shown in Fig. 11. In other embodiments more than four connectors or fewer than four connectors are possible. Also the location of said connectors may vary according to demand without departing from the gist of the invention. It is further possible not to use a common reference potential, but to structure this also. Fig. 12 shows in a schematic manner the OLED 35, from which part of the cover 31 is removed. Hence the view is directed into the back side of the open OLED 35. The light emission direction is directed into the drawing plane. In the four corners parts of the hermetic cover 31 are still visible. On top of the open OLED 35 the ferromagnetic layer 36 is visible. Just for illustrative purposes discrete inductors L are symbolically shown in a rectangular structure on the surface of the ferromagnetic layer 36 in order to link the function of the ferromagnetic layer 36 with the inductors L shown in the one-dimensional and two- dimensional discrete element based explanation of the principle of operation of the invention. The location of the ferromagnetic layer 36 is adjacent to the cathode layer 32a. The ferromagnetic layers 36 may be chosen from a material with certain optical properties, i.e. to reflect the light. According to a further embodiment omitting an additional ferromagnetic layer 36 but using the electrodes 32, 32a and 33, 33a instead of it may also implement the inductive behavior, provided that the inductivity established by the electrodes 32, 32a and 33, 33a can be implemented to show a sufficient value. Also the electrodes 32a and 33a alone or in combination with the electrode connectors 32 and 33 or in combination with the ferromagnetic layer 36 may implement the delay structure. According to further embodiments the inductive behavior might be tuned according to demand by adding coils or coils in combination with the ferromagnetic layer 36. Instead of designing any homogenous ferromagnetic layer 36 it might be beneficial to design a structured layer. By structuring the ferromagnetic layer 36, eddy currents in this layer 36 can be reduced and segmented OLEDs can be designed.

In another embodiment a transparent ferromagnetic layer applied to the anode layer 33a may also implement the inductive functionality of the ferromagnetic layer 36. In the context of utilizing the anode layer 33a for implementing the inductive function of the OLED 35 Fig. 13 shows a further embodiment comprising a structured or segmented anode layer 33a, while the cathode layer 32a is designed as plane-shaped unit with a common cathode connector 32.

For example printed coils L may be used to implement the structured or segmented anode layer 33a. Fig. 14 schematically shows in the form of a top view an example of a part of such a structured anode layer 33a. It allows for creating pixel segmentation but also free forms are possible, e.g. a heart or an arrow as shown in Fig. 14 or other pre-defined symbols.

According to a further embodiment it is also possible to establish the inductive function on the cathode layer 32a as well as on the anode layer 33a in one design. Therefore printed coils with some ferromagnetic layer can be established on / in both layers 32a and 33 a. By implementing such a design a relatively high inductance value per unit of area (or length) can be achieved, such that power signal propagation is slowed down in comparison to lower inductive values.

In a still further embodiment the light-emitting structure of the OLED 35 may be segmented in order to allow a segmented design of the inside structure of the OLED 35 comprising as well the delay structure. By providing this solution the continuum description of the delay structure still holds (e.g. per segment) but the internal structure of the OLED 35 may be similar to the two-dimensional discrete structure as depicted in Fig. 8. The segmented light-emitting structure may be combined with a segmented or party segmented delay structure as well. In still a further embodiment the structure shown in Fig 7a might be integrated into an OLED. The capacitive and inductive elements may be implemented in a discrete fashion and the load element 2π to 2_m may be implemented by a certain area of active OLED material. These certain areas of the active OLED material are used as light-emitting load elements. A simulation of the continuum version of the invention, e.g. by simulating a 11*11 segmented OLED, finally leads to similar results as already shown by means of Fig. 9a to 9d, where different resulting light intensity distributions depending on different power signal pulse amplitudes and delay settings are shown. In the simulation the forward currents of the OLED-segments were integrated over time. This integral forward current reading was than exported and processed to plot the light intensity distribution.

As initially explained, OLEDs show some current distribution errors leading to decreased brightness in the centre of the OLED. As shown in Fig. 9a, is it possible to create a high brightness in the center of the OLED. With an appropriate parameter setting, this bright spot can be set to compensate for the decreased brightness caused by DC operation of the OLED. Combining a direct current DC signal for a defined portion of a period with a power signal pulse train for the remaining portion of the period, can result in reduced brightness deviation or even in a homogenous light distribution over the complete light-emitting area or surface. Given the voltage vs. current characteristic curve of an OLED, which is very similar to the one known from an LED, the various embodiments described in the context of an LED implementing a spot-like discrete load element are applicable as well to the OLED implementing a spatial (planar) continuum like load element.

A further use case of the OLED-implemented circuit 1 - without being exhaustive - lies in the field of general illumination or more particular in the field of local highlighting in signal lightning applications or backlighting for displays or even in the field of backlights or turn-signal indicators of vehicles, the general topic of creating decorative effects, as well as in the domain of guiding lights.

While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments.

For example, it is possible to operate the invention in an embodiment wherein the concept of the invention is utilized in consumer electronic devices or other display comprising devices. The control unit 6 may cooperate with a processing unit of the respective device for receiving control signals or commands to be interpreted by the control unit 6. The control unit 6 may control the position of the LED or OLED area to be illuminated according to the above description but in addition it may also control the frequency of the illumination and the intensity of the illumination as well. Varying the rate of selecting individual LEDs or OLED areas but also varying the form or shape or duration of the individual power signal pulses might serve for this purpose as well.

In theabove embodiments always a linear string structure of LEDs was described. However, following the gist of the invention and applying it to individual design demands might lead to different structures such as circular strings or zigzag- shaped strings or even three-dimensional string structures or the like, which are all within the scope of the present invention. In case of a three-dimensional structure, more than four generators might be required. In the simple case of a light-emitting cube, six generators (right, left, top, bottom, front, back) could be used. The principle of operation explained in terms of one- and two-dimensional delay structures can be easily extended into various configurations of three-dimensional structures without departing from the gist of the invention. In this context delay structures extending along the three orthogonal coordinates may be considered. But also additional delay structures like spatial webs with non-orthogonal intersection points shall be included. This in turn will make it possible to create delay structures in which more than six power signal pulses may coincide at a node or more precisely at the position of a load element. Although - just for the sake of clarity - in some of the embodiments generators accompanied by a matched impedance Z are explicitly shown separated from each other, it is to mention that the impedance Z may be included in said generators as well.

Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope.

Claims

CLAIMS:

1. A circuit (1) for powering selectively a plurality of load elements (2i - 2_n; 28; 35), which circuit (1) comprises a generator arrangement (3) that is designed for generating at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) having a temporal relationship with one another and a signal strength such that a load element (2i - 2_n; 2₁₁-2_^; 28; 35) is driven accordingly when the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) coincide at said load element; and a delay structure (5i - 5_n; 5π - 5_^; 36; 33a) being connected with the generator arrangement (3), the delay structure (5i - 5_n; 5π - 5nm; 36; 33a) is designed to delaythe propagation of the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top,

4b_bottom) received from the generator arrangement (3) and to release the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) towards the load elements (2i

35).

2. A circuit (1) according to claim 1, wherein the at least two load elements

(2i- 2_n; 2ii - 2_^; 28; 35) are comprised in the circuit (1).

3. A circuit (1) according to claim 1 or 2, wherein the at least two load elements (2i - 2_n; I_n - 2_^n; 28; 35) are given by an electronic element having a non-linear voltage-versus-current characteristic curve, which determines the amount of power consumed out of the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom), which are released by the delay structure (5i - 5_n; 5π - 5_^; 36; 33a) to said load element (2i - 2_n; 2_n - 2_^n; 28; 35).

A. A circuit according to any of the preceding claims 1 to 3, wherein the plurality of load elements (2i - 2_n; ln-2^ is implemented by light emitting diodes and / or organic light emitting diodes and / or laser diodes (28; 35), wherein each of said load elements is connected to or integrated into the delay structure (5i - 5_n; 5π - 5nm) at an individual position of a discrete delay element of the delay structure (5i - 5_n; 5π - 5nm).

5. A circuit (1) according to any of the preceding claims 1 to 4, wherein the generator arrangement (3) comprises: a control unit (6) designed to control the temporal relationship of the at least two power signal pulses (4a, 4b), such that the power signal pulses (4a, 4b) propagate along the delay structure (5i - 5_n) and coincide at a specific load element (2i - 2_n).

6. A circuit (1) according to any of the preceding claims 1 to 5, wherein the generator arrangement (3) comprises: a first generator (3a; 3a_left, 3a_top) for generating a first power signal pulse (4a;

4a_left, 4a_top) being connected to a first element of the delay structure for feeding said first element with one power signal pulse (4a; 4a_left, 4a_top) of the at least two signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) and a second generator (3b; 3b_right, 3b_bottom; 19) for generating a second power signal pulse (4b; 4b_right, 4b_bottom; 4c) being connected to a second element of the delay structure for feeding said second element with another power signal pulse (4b; 4b_right, 4b_bottom; 4c) of the at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right,

4a_top, 4b_bottom; 4c).

7. A circuit (1) according to any of the preceding claims 1 to 6, wherein the delay structure (5i - 5_n; 5π - 5nm) comprises a structure of interconnected delay elements, each of said delay elements comprises a resonant circuit showing at least an inductor (L) and a capacitor (C).

8. A circuit (1) according to claims 1 to 7, wherein the delay structure is implemented by an organic light emitting diode (35) such that inductive and capacitive functions of the delay structure are provided by the intrinsic properties of the structure of the organic light emitting diode (35) or the interaction between the intrinsic structure and an external structure, and the plurality of load elements is formed by the light- emitting structure (34) of the organic light emitting diode (35).

9. A circuit (1) according to any of the preceding claims 1 to 8, wherein the generator arrangement (3) is designed to generate the at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) to show an essentially rectangular pulse shape.

10 A circuit (1) according to any of the preceding claims, wherein the circuit (1) is designed to supply a positive or a negative bias voltage to the load elements (2i - 2_n; 2ii - 2_^; 28; 35) and to superimpose the power signal pulses with said bias voltage.

11. A circuit (1) according to any of the preceding claims, wherein the circuit

(1) is designed so that residual parts of the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) that propagate along the delay structure (5i - 5_n; 5π - 5_^; 36; 33a) after a previous coinciding of said power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) are absorbed prior to a subsequent generation of new power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom).

12. A circuit (1) according to any of the preceding claims, wherein the delay structure (5π - 5_^; 36; 33a) comprises at least two dimensions and at least one node, at which elements of the delay structure (5π - 5nm; 36; 33a) allocated to different dimensions are connected to each other.

13. A circuit (1) according to any of claims 1 to 5, wherein the generator arrangement (3) comprises a first generator (3 a) for generating a first power signal pulse (4a) with a first polarity and a further first power signal pulse (4a) with a second polarity, the first power signal generator (3a) being connected to a first element of the delay structure (5i - 5_n) for feeding said first element with both power signal pulses (4a) in a consecutive manner, and the delay structure (5i - 5_n) comprises a reflective termination element (15) at a second element of the delay structure (5i - 5_n) such that the first power signal pulse (4a) fed into the delay structure (5i - 5_n) is reflected at the reflective termination element (15) with the second polarity to form the second power signal pulse (4b).

14. Light emitting device comprising a circuit (1) according to any of the preceding claims 1 to 13.

15. A method of powering selectively a plurality of load elements (21 - 2_n; 211

- 2_^; 28; 35), which method comprises the steps of: generating at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top,

4b_bottom) having a temporal relationship with one another and a signal strength such that a load element (2i - 2_n; I_n - 2_^n; 28; 35) is driven accordingly when the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) coincide at said load element; delaying the propagation of the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right,

4a_top, 4b_bottom) generated; and releasing the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) towards the load elements (2i - 2_n; I_n - 2_^n; 28; 35).

16. A method according to claim 15 further comprising the step of: timing the temporal relationship of the at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom), so that the power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) propagate along a delay structure (5i - 5_n; 5π - 5nm) and coincide at a specific load element (2i - 2_n; 5n - 5nm).

17. Method according to claim 15 or 16 further comprising the step of: feeding a first power signal pulse (4a; 4a_left, 4a_top) of the at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) into a first element of the delay structure (5i - 5_n), the delay structure (5i - 5_n) is designed to receive and to delay the propagation of the at least two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) and to release the two power signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) towards the load elements (2i - 2_n; 28; 35); and feeding another power signal pulse (4b; 4b_right, 4b_bottom; 4c) of the at least two signal pulses (4a, 4b; 4c; 4a_left, 4b_right, 4a_top, 4b_bottom) into a second element of the delay structure (51 - 5_n).