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WO2010058541A1 - Dispositif à semi-conducteurs flexible et son procédé de fabrication - Google Patents

Dispositif à semi-conducteurs flexible et son procédé de fabrication Download PDF

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Publication number
WO2010058541A1
WO2010058541A1 PCT/JP2009/006071 JP2009006071W WO2010058541A1 WO 2010058541 A1 WO2010058541 A1 WO 2010058541A1 JP 2009006071 W JP2009006071 W JP 2009006071W WO 2010058541 A1 WO2010058541 A1 WO 2010058541A1
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Prior art keywords
metal
layer
semiconductor device
oxide film
flexible semiconductor
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PCT/JP2009/006071
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English (en)
Japanese (ja)
Inventor
鈴木武
保手浜健一
平野浩一
中谷誠一
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Panasonic Corp
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Panasonic Corp
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Priority to JP2010507158A priority Critical patent/JP4550944B2/ja
Priority to US12/863,202 priority patent/US8975626B2/en
Priority to CN200980102246.7A priority patent/CN101911269B/zh
Publication of WO2010058541A1 publication Critical patent/WO2010058541A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0316—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral bottom-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/675—Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon

Definitions

  • the present invention relates to a flexible semiconductor device having flexibility and a method of manufacturing the same. More particularly, the present invention relates to a flexible semiconductor device that can be used as a TFT and a method of manufacturing the same.
  • a display medium is formed using an element using liquid crystal, organic EL (organic electroluminescence), electrophoresis or the like.
  • a technique using an active drive element (TFT element) as an image drive element has become mainstream in order to ensure uniformity of screen luminance, screen rewriting speed, and the like.
  • TFT element active drive element
  • these TFT elements are formed on a glass substrate, and a liquid crystal, an organic EL element and the like are sealed.
  • a semiconductor such as a-Si (amorphous silicon) or p-Si (polysilicon) can be mainly used for the TFT element.
  • a TFT element is manufactured by multilayering these Si semiconductors (and metal films as necessary) and sequentially forming source, drain, and gate electrodes on a substrate.
  • a glass substrate is generally used as a substrate for forming a TFT element.
  • the display described above is configured using such a conventionally known glass substrate, the display is heavy, lacks flexibility, and becomes a product that can be broken by a drop impact. These features resulting from the formation of the TFT elements on the glass substrate are undesirable in fulfilling the need for a handy portable thin display with the development of information technology.
  • Patent Document 2 discloses a technology in which a TFT element is produced on a support (for example, a glass substrate) by a process substantially similar to that of the prior art, and then the TFT element is peeled off from the glass substrate and transferred onto a resin substrate. ing.
  • a TFT element is formed on a glass substrate, which is adhered to the resin substrate via a sealing layer such as acrylic resin, and then the glass substrate is peeled off to form a TFT element on the resin substrate. Is transferred and formed.
  • the peeling process of a support becomes a problem. That is, when peeling the support from the resin substrate, for example, it is necessary to perform a process to reduce the adhesion between the support and the TFT. Alternatively, it is necessary to form a release layer between the support and the TFT, and physically or chemically remove the release layer. Such processing complicates the process and remains a concern in terms of productivity.
  • a method of forming the TFT directly on the resin substrate is also considered.
  • the step of peeling the support (for example, the glass substrate) after transfer is unnecessary, so that the flexible semiconductor device can be easily manufactured.
  • the inventor of the present application has not addressed the problems of the flexible semiconductor device described above in the extension of the prior art, but attempts to cope with the problems in a new direction.
  • the present invention has been made in view of such circumstances, and the main object thereof is to provide a method of manufacturing a flexible semiconductor device excellent in productivity, and to provide a flexible semiconductor device with high performance. It is to be.
  • step (I) preparing a metal foil (or metal layer), (Ii) oxidizing the surface region of the metal foil to form a gate insulating film made of a metal oxide film of a metal component constituting the metal foil; (Iii) forming a semiconductor layer on the gate insulating film, and (iv) forming a gate electrode, a source electrode and a drain electrode from the metal foil by etching the metal foil,
  • a non-oxidized site is formed without oxidizing at least a part of the surface area of the metal foil, and the semiconductor layer and each of the source electrode and the drain electrode are mutually electrically isolated via the non-oxidized site.
  • the metal foil comprises a valve metal
  • the surface area of the metal foil is anodized to thereby form a gate insulating film composed of a metal oxide film of a valve metal component.
  • a resin layer is formed on the metal oxide film so as to cover the semiconductor layer after the step (iii).
  • One of the features of the manufacturing method of the present invention is that the surface region of the metal foil is locally oxidized, and the "metal oxide film” obtained thereby is used as a gate insulating film and "non-oxidized sites" It is to use as a via ((interlayer connection part).
  • the manufacturing method of the present invention is also characterized in that a metal foil used as a constituent material of a metal oxide film (that is, a "gate insulating film”) is used as a component of a flexible semiconductor device called an electrode constituent material.
  • the term “flexible” of "flexible semiconductor device” as used herein substantially means that the semiconductor device has bendable flexibility.
  • the "flexible semiconductor device” in the present invention can be referred to as a “flexible semiconductor device” or a “flexible semiconductor element” in view of the configuration of the device.
  • non-oxidized site used in the present specification means “oxidized area” and “non-oxidized area” due to local oxidation of metal foil, in which case “ It refers to the "non-oxidized area”.
  • electrode constituent material is a material capable of forming electrodes (that is, “source electrode”, “drain electrode”, “gate electrode”, etc.) constituting a TFT element by applying a process such as etching.
  • electrodes that is, “source electrode”, “drain electrode”, “gate electrode”, etc.
  • Substantially means members.
  • a resist is formed on a region of the surface of the metal foil to be a non-oxidized site, and the surface of the metal foil on which the resist is formed is entirely subjected to oxidation treatment.
  • the semiconductor layer and the non-oxidized portion are electrically connected to each other, but the method is not particularly limited.
  • the extraction electrode may be formed to contact the semiconductor layer and the non-oxidized site after the step (iii), or the semiconductor layer may be directly contacted to the non-oxidized site in the step (iii) May be formed.
  • the step of forming the semiconductor layer can be carried out in a high temperature process of 180 ° C. or higher, preferably about 400 ° C. to 1000 ° C., due to the use of the metal foil.
  • heat treatment can be performed on the obtained semiconductor layer due to the use of the metal foil. In such a case, it is preferable to perform thermal annealing and / or laser annealing as the heat treatment. Such heat treatment can improve the characteristics of the obtained TFT.
  • carrier mobility can be improved due to the promotion of crystallization of the semiconductor material, and, for example, in the case of an amorphous oxide semiconductor layer (IGZO)
  • the carrier mobility may be improved due to the oxygen defect being repaired.
  • the manufacturing method of the present invention may further include the step of forming a capacitor using a metal foil and a metal oxide film.
  • the present invention also provides a flexible semiconductor device obtainable by the above manufacturing method.
  • the flexible semiconductor device of the present invention is A metal layer having a gate electrode, a source electrode and a drain electrode, A metal oxide film of a metal component constituting a metal layer, comprising a metal oxide film formed on the surface region of the metal layer, and a semiconductor layer formed on the gate electrode through the metal oxide film.
  • a metal oxide film of a metal component constituting a metal layer comprising a metal oxide film formed on the surface region of the metal layer, and a semiconductor layer formed on the gate electrode through the metal oxide film.
  • In the surface area of the metal layer non-coated portions not covered with the metal oxide film are locally formed;
  • the semiconductor device is characterized in that the source electrode and the semiconductor layer and the drain electrode and the semiconductor layer are electrically connected to each other through the non-coating portion.
  • a region of the metal oxide film sandwiched between the gate electrode and the semiconductor layer can function as a gate insulating film.
  • the metal layer is formed of a valve metal, and the metal oxide film is an anodic oxide film of such a valve metal component.
  • One of the features of the flexible semiconductor device of the present invention is to have "a metal oxide film” and "a non-coated site” obtained by local oxidation of a metal layer, and "a non-coated site”. Function as vias electrically connecting the metal layer (.apprxeq. Electrode) and the semiconductor layer to each other, that is, as an interlayer connection site.
  • the flexible semiconductor device of the present invention is also characterized in that the "electrode” and the "gate insulating film” originate from the same constituent material such as a "metal layer". That is, the flexible semiconductor device of the present invention includes the “gate insulating film” caused by the surface oxidation treatment of the metal layer and the “electrode” caused by the etching treatment of the metal layer. Due to this feature, in the flexible semiconductor device of the present invention, preferably, the electrode has a tapered shape in its thickness direction. Also, preferably, the thickness dimension of the electrode is larger than that of an electrode obtained by a conventional electrode forming method (for example, vapor deposition method or sputtering method). For example, the electrode thickness is 4 ⁇ m to about 20 ⁇ m. There is. Preferably, the source electrode, the drain electrode, and the gate electrode are located on the same plane. That is, the source electrode, the drain electrode, and the gate electrode are provided flush with each other.
  • non-coated portion substantially means a region not covered with the metal oxide film in view of the "object” of the flexible semiconductor device, and in a preferred embodiment, the metal It refers to "non-oxidized sites" of the surface area of the layer.
  • the metal layer is composed of a first metal layer and a second metal layer, the first metal layer comprising a valve metal, and the second metal layer comprising a metal different from the valve metal. It consists of.
  • the metal oxide film is preferably an anodic oxide film of the valve metal component of the first metal layer.
  • an intermediate layer is formed between the first metal layer and the second metal layer.
  • the second metal layer comprises a metal different from the valve metal” substantially means that the metal component of the second metal layer is different from the metal component of the first metal layer. Also included are embodiments in which the second metal layer comprises "a type of valve metal different from the valve metal of the first metal layer".
  • the flexible semiconductor device of the present invention may further include a capacitor.
  • the electrode layer of the capacitor be composed of a metal layer
  • the dielectric layer of the capacitor be composed of a metal oxide film.
  • a plurality of transistor structures each including a semiconductor layer, a gate insulating film, a gate electrode, a source electrode, and a drain electrode are included.
  • the flexible semiconductor device is a semiconductor device for an image display device.
  • the drive circuit of the image display device is composed of the transistor structure of the flexible semiconductor device and the capacitor, and the metal oxide film is continuously formed in the region including the transistor structure and the capacitor.
  • the surface area of the metal foil is subjected to oxidation treatment, and the metal oxide film obtained thereby is used as a gate insulating film. Therefore, the gate insulating film can be thinly and precisely (smoothly) formed, and a flexible semiconductor device having excellent TFT performance can be obtained.
  • the "non-oxidized site" formed through the local oxidation of the metal foil is used as a via, interlayer connection can be easily realized without complicating the flexible semiconductor device, and after the formation of the insulating film Since the part is not removed (that is, the process of removing the metal oxide film which is dense and chemically stable is not necessary), the material and energy can be used without waste. Therefore, it can be said that the manufacturing method of the present invention is excellent in productivity.
  • the metal foil used as the constituent material of the metal oxide film (that is, "gate insulating film") is used as a component of the flexible semiconductor device as an electrode constituent material, Process can be actively introduced.
  • heat treatment can be positively performed during or after formation of the semiconductor layer, and TFT characteristics (for example, carrier mobility of a semiconductor) can be preferably improved.
  • TFT characteristics for example, carrier mobility of a semiconductor
  • (A) is a plan view showing the upper surface of the flexible semiconductor device according to an embodiment of the present invention
  • (b) is a cross-sectional view taken along line Ib-Ib of (a)
  • (c) shows an enlarged tapered electrode.
  • Cross section (A) to (d) are process sectional views showing a manufacturing process of a flexible semiconductor device according to one embodiment of the present invention
  • (A) to (c) are process sectional views showing a manufacturing process of a flexible semiconductor device according to one embodiment of the present invention
  • (A) is a cross-sectional view showing a metal layer (multilayer structure) according to an embodiment of the present invention
  • (b) is a cross-sectional view showing a cross section of a flexible semiconductor device according to an embodiment of the present invention
  • (c) is a present Sectional drawing which shows the cross section of the flexible semiconductor device which concerns on one Embodiment of invention
  • (A) is a top view which shows the upper surface of the flexible semiconductor device which concerns on one Embodiment
  • (A) is a sectional view taken along the line VIa-VIa of (b),
  • (b) is a plan view showing the upper surface of the flexible semiconductor device according to the embodiment of the present invention,
  • (c) is a flexible semiconductor according to the embodiment of the present invention Top view showing the top of the device Sectional drawing which shows the cross section of the flexible semiconductor device which concerns on one Embodiment of this invention.
  • (A) is a cross-sectional view showing a flexible semiconductor device according to one embodiment of the present invention
  • (b) is an equivalent circuit diagram showing a drive circuit of an image display device according to one embodiment of the present invention
  • (A) is the top view which looked at the flexible semiconductor device concerning one embodiment of the present invention from the metal layer side
  • (b) is IXb-IXb sectional view of (a)
  • (c) is IXc-IXc of (a)
  • Cross section (A) is the top view which looked at the flexible semiconductor device concerning one embodiment of the present invention from the metal layer side
  • (b) is a Xb-Xb sectional view of (a)
  • (c) is Xc-Xc of (a) Cross-sectional view
  • (d) is a cross-sectional view of (a) Xd Sectional drawing which shows the cross section of the flexible semiconductor device which concerns on one Embodiment of this invention.
  • FIG. 1 A) to (d) are process sectional views showing a manufacturing process of a flexible semiconductor device according to one embodiment of the present invention
  • FIG. 1 A) to (d) are process sectional views showing a manufacturing process of a flexible semiconductor device according to one embodiment of the present invention
  • Sectional drawing which shows the cross section of the flexible semiconductor device which concerns on one Embodiment of this invention.
  • Sectional drawing which shows the cross section of the flexible semiconductor device which concerns on one Embodiment of this invention.
  • Schematic diagram showing a product application example (TV image display unit) of a flexible semiconductor device Schematic diagram showing a product application example (image display unit of a mobile phone) of a flexible semiconductor device
  • Schematic diagram showing a product application example (image display unit of a camcorder) of a flexible semiconductor device Schematic diagram showing a product application example (image display unit of electronic paper) of a flexible semiconductor device
  • the “direction” described in the present specification is a direction based on the positional relationship between the metal foil / metal layer 10 and the semiconductor layer 30 and will be described in the vertical direction in the drawing for the sake of convenience.
  • the side on which the gate insulating film 22 or the semiconductor layer 30 is formed on the basis of the metal foil / metal layer 10 corresponds to the upper direction corresponding to the vertical direction of each drawing, and the metal foil / metal layer
  • the side where the semiconductor layer 30 is not formed on the basis of 10 is referred to as “downward”.
  • FIG. 1 (a) is a schematic top view of the flexible semiconductor device 100
  • FIG. 1 (b) is a schematic cross-sectional view showing the Ib-Ib cross section of (a).
  • FIG.1 (c) is the cross-sectional schematic diagram to which the electrode part of FIG.1 (b) was expanded.
  • the semiconductor device according to the present embodiment is a flexible semiconductor device 100 having flexibility.
  • the flexible semiconductor device 100 includes a metal layer 10, a surface metal oxide film 20, and a semiconductor layer 30.
  • the metal layer 10 has a gate electrode 12g, a source electrode 12s and a drain electrode 12d.
  • the metal constituting the metal layer 10 is preferably a metal having good electrical conductivity and capable of easily forming a dense oxide, and examples thereof include valve metals (valve metals).
  • valve metals for example, at least one metal selected from the group consisting of aluminum, tantalum, niobium, titanium, hafnium, zirconium, molybdenum and tungsten is preferable.
  • the valve metal is aluminum.
  • the thickness of the metal layer 10 is preferably in the range of about 2 ⁇ m to about 100 ⁇ m, more preferably in the range of about 4 ⁇ m to about 20 ⁇ m, still more preferably in the range of about 8 ⁇ m to about 16 ⁇ m, for example 12 ⁇ m.
  • the electrodes are tapered in their thickness direction. It may have a shape.
  • the taper angle ⁇ can be about 1 ° to 60 °, for example, about 5 ° to 30 °.
  • the step coverage of the pattern and the step of subsequently sealing and protecting the electrode and the wiring pattern with the insulating film become good, and high reliability is achieved. Sex comes to be obtained.
  • the thickness of the electrode is attributed to the fact that the electrodes (that is, the source electrode 12s, the drain electrode 12d and the gate electrode 12g) constituting the TFT element are formed by etching the metal foil.
  • the thickness is larger than the electrode thickness (about 0.1 ⁇ m or so) obtained by a conventional electrode forming method (for example, vapor deposition or sputtering).
  • the electrode thickness is 4 ⁇ m to about 20 ⁇ m. ing.
  • the electrode thickness can also be easily changed arbitrarily. As a result, the degree of freedom in electrode design is increased, and desired TFT characteristics can be obtained relatively easily.
  • the semiconductor layer 30 is formed on the gate electrode 12 g via the surface metal oxide film 20. As shown, in this embodiment, the semiconductor layer 30 is disposed on the gate insulating film 22.
  • Various materials can be used as the material of the semiconductor layer 30.
  • a semiconductor such as silicon (eg, Si) or germanium (Ge) may be used, or an oxide semiconductor may be used.
  • the oxide semiconductor include single oxides such as ZnO, SnO 2 , In 2 O 3 , and TiO 2 , and composite oxides such as InGaZnO, InSnO, InZnO, and ZnMgO.
  • compound semiconductors eg, GaN, SiC, ZnSe, CdS, GaAs, etc.
  • organic semiconductors eg, pentacene, poly (3-hexylthiophene), porphyrin derivatives, copper phthalocyanine, C60, etc.
  • the thickness of the semiconductor layer 30 to be formed is preferably in the range of about 10 nm to about 150 nm, and more preferably in the range of about 20 nm to about 80 nm.
  • the surface metal oxide film 20 is a metal oxide film formed on the surface of the metal layer 10, and is made of a metal oxide film of "a metal component constituting the metal layer 10."
  • the metal oxide film is not particularly limited as long as it is formed by oxidizing the surface of the metal layer 10.
  • the surface metal oxide film 20 may be an anodized film of aluminum. This "anodization” can be easily carried out using various chemical conversion solutions, whereby a very thin and dense oxide film can be formed.
  • the "oxide film” used in the present specification can be referred to as an "oxide film” in view of the mode of its own.
  • fineness used in the expression “fine oxide film” substantially means that the oxide film has no defects or defects are reduced.
  • a region sandwiched between the gate electrode 12g and the semiconductor layer 30 functions as the gate insulating film 22.
  • the drain current in the saturation region of the transistor can be generally expressed as the following [Expression 1]. Based on this equation, it is understood that a larger drain current can be obtained with a smaller gate voltage as the relative dielectric constant of the gate insulating film is larger and the thickness of the gate insulating film is smaller.
  • I C1 ⁇ (W / L) ⁇ ( ⁇ / d) ⁇ (Vg ⁇ C2) 2 I: drain current in the saturation region, C1, C2: constant, W: channel width, L: channel length, ⁇ : relative dielectric constant, d: gate insulating film thickness, Vg: gate voltage
  • the gate insulating film 22 is a dense oxide film 20 which is obtained by anodizing the metal foil 10 and has a large relative dielectric constant (about 10 for the anodic oxide film of aluminum) and a very thin thickness. Since it can be used, a semiconductor device capable of obtaining a large drain current with a smaller gate voltage can be provided. That is, the flexible semiconductor device 100 of the present invention can be a semiconductor device having excellent TFT performance due to the surface metal oxide film 20.
  • the thickness of the surface metal oxide film 20 is preferably about 3 ⁇ m or less, more preferably about 800 nm or less, and still more preferably about 200 nm or less.
  • the thickness of the surface metal oxide film 20 is too thin, it is not preferable from the viewpoint of maintaining the insulation. That is, although the lower limit of the thickness of the surface metal oxide film 20 can be variously changed depending on the applied gate voltage and the withstand voltage characteristics of the oxide film, for example, in the case of an anodic oxide film of aluminum, the maximum value of the gate voltage is Then, it is about 100 nm.
  • an uncoated portion 40 not covered with the surface metal oxide film 20 is locally or partially formed. That is, although the surface of the metal layer 10 is generally covered with the metal oxide film 20, it is not covered with the surface metal oxide film 20 and uncovered with the underlying metal (aluminum in this embodiment) exposed. It has a site 40.
  • the non-coating portion 40 contributes to the electrical connection between the electrode and the semiconductor layer.
  • the semiconductor layer 30 is electrically connected to each of the source electrode 12s and the drain electrode 12d through the non-coating portion 40, and hence the non-coating portion 40 is an interlayer connection portion of the surface metal oxide film 20. It functions as a (via).
  • the uncoated site 40 may correspond to a "non-oxidized site" obtained without oxidizing a part of the surface of the metal layer 10, as can be seen from the illustrated embodiment. That is, in the manufacturing method of the present invention, the non-oxidized portion 40 is formed without oxidizing a part of the surface of the metal foil 10, and the metal foil 10 and the semiconductor layer 30 are electrically connected by the non-oxidized portion 40. It has a feature of forming a via. By using the non-oxidized portion 40 as an interlayer connection portion (via) in this manner, interlayer connection can be easily realized without complicating the structure of the flexible semiconductor device.
  • the flexible semiconductor device 100 may be provided with extraction electrodes 50s and 50d as illustrated.
  • metals constituting the extraction electrodes 50s and 50d include gold (Au), silver (Ag), copper (Cu), nickel (Ni), chromium (Cr), cobalt (Co), magnesium (Mg), calcium Metal materials such as (Ca), platinum (Pt), molybdenum (Mo), iron (Fe), zinc (Zn), titanium (Ti), tungsten (W), etc., tin oxide (SnO 2 ), indium tin oxide (indium tin oxide) Conductive oxides such as ITO), fluorine-containing tin oxide (FTO), ruthenium oxide (RuO 2 ), iridium oxide (IrO 2 ), platinum oxide (PtO 2 ), and the like can be given.
  • the extraction electrodes 50s, 50d are formed on the surface metal oxide film 20, and can provide a function of electrically connecting the non-oxidized portion 40 and the semiconductor layer 30.
  • the thickness of the extraction electrode patterns 50s, 50d is preferably in the range of about 50 nm to about 5 ⁇ m, more preferably in the range of about 80 nm to about 1 ⁇ m.
  • a resin layer 60 covering the semiconductor layer 30 is formed on the surface metal oxide film 20.
  • the resin layer 60 is a support base for supporting the TFT, and is made of a thermosetting resin material or a thermoplastic resin material having flexibility after curing.
  • resin materials for example, epoxy resin, polyimide (PI) resin, acrylic resin, polyethylene terephthalate (PET) resin, polyethylene naphthalate (PEN) resin, polyphenylene sulfide (PPS) resin, polyphenylene ether (PPE) resin, Fluororesins, such as PTFE, those composites, etc. are mentioned. These resin materials are excellent in dimensional stability and are preferable as the material of the flexible base in the flexible semiconductor device 100 of the present embodiment.
  • the thickness of the resin layer 60 is preferably in the range of about 1 ⁇ m to about 7 ⁇ m, and more preferably in the range of about 2 ⁇ m to about 5 ⁇ m.
  • FIGS. 2A to 2D and 3A to 3C are process cross-sectional views for explaining the manufacturing process of the flexible semiconductor device 100. First, as shown in FIG.
  • step (i) is first carried out. That is, as shown in FIG. 2A, the metal foil 10 is prepared.
  • a metal foil 10 formed of aluminum is prepared.
  • the thickness of the metal foil 10 is preferably in the range of about 2 ⁇ m to about 100 ⁇ m, more preferably in the range of about 4 ⁇ m to about 20 ⁇ m, still more preferably in the range of about 8 ⁇ m to about 16 ⁇ m, for example 12 ⁇ m.
  • a resist 70 is formed on a region of the surface of the metal foil 10 where a non-oxidized portion is to be formed (that is, a predetermined region where oxidation treatment is not desired). .
  • a resist 70 is formed on a portion of the upper surface of the metal foil 10 and the entire lower surface of the metal foil 10.
  • the resist 70 may have chemical resistance to an oxidation treatment liquid described later.
  • the material of the resist 70 includes, for example, a composition comprising a photosensitive agent such as novolak resin, diazonaphthoquinone (DNQ) type photosensitive agent, and a solvent such as propylene glycol monomethyl acetate (PGMEA) or ethyl lactate (EL). It may be a material.
  • the formation and removal of the resist 70 may be appropriately performed by the method used in a typical photolithography process.
  • the metal foil is made of aluminum
  • an oxidation process is performed as a process (ii). More specifically, the oxidation process is performed on the surface of the metal foil 10 on which the resist 70 is formed.
  • an oxide film 20 that is, a surface metal oxide film
  • the metal foil 10 is formed of valve metal (e.g., aluminum)
  • the surface oxidation of the metal foil will be performed by anodic oxidation of the valve metal.
  • the method of anodic oxidation is not particularly limited, and can be carried out using various formation solutions.
  • the metal foil 10 serving as the anode and the cathode may be immersed in a chemical conversion solution, connected to a constant current source, and applied to a desired voltage.
  • a chemical conversion solution in the anodic oxidation of aluminum, a mixed solution of 30 wt% of a tartaric acid (1 wt%) aqueous solution and 70 wt% of ethylene glycol, which is adjusted to a pH near neutrality with ammonia, can be mentioned.
  • a stainless steel (SUS304 etc.) board is mentioned.
  • the thickness of the anodic oxide film to be formed is proportional to the magnitude of the voltage. Therefore, the voltage to be applied may be selected according to the desired film thickness.
  • the current density may be in the range of about 1 to about 10 mA / cm 2 and the voltage may be in the range of about 50 to about 600 V, for example, the current density is about 5 mA / cm 2 and the voltage is about 100 V .
  • a method in which only the one side is brought into contact with a chemical conversion solution May be Specifically, the cylindrical container may be brought into contact with the cylindrical container via sealing or the like to prevent liquid leakage so that the metal foil 10 becomes a bottom plate, and the formation liquid may be put into the cylindrical container. Then, a metal foil 10 as an anode and a cathode made of stainless steel or the like immersed in a chemical conversion solution are connected to a power supply. By such a method, only the one side in contact with the chemical conversion solution can be selectively oxidized.
  • the resist 70 is then removed. As shown in FIG. 2C, the presence of the resist 70 keeps a part of the surface of the metal foil 10 unoxidized. Therefore, when the resist 70 is removed, the non-oxidized portion 40 where the metal oxide film 20 does not exist on the surface of the metal foil 10 (that is, the uncoated portion where the metal oxide film 20 is not coated and the underlying metal is exposed. ) Will be obtained (see FIG. 2 (d)).
  • step (iii) formation of a semiconductor layer is performed as step (iii).
  • the semiconductor layer 30 is formed on the surface metal oxide film 20 (in particular, the oxide film portion functioning as the gate insulating film 22).
  • the formation of the semiconductor layer 30 can be performed by depositing a semiconductor material.
  • a thin film formation method such as a vacuum evaporation method, a sputtering method, or a plasma CVD method can be appropriately used, and a printing method such as letterpress printing, gravure printing, screen printing, or inkjet is appropriately used. be able to.
  • a plasma CVD method is used to deposit a silicon film on the formation position of the metal oxide film 20 of the metal foil 10 heated to 350.degree. C., and deposit the deposited silicon film in an inert atmosphere (typically Polysilicon can be formed by thermal annealing at 600 ° C. in a non-oxidizing atmosphere.
  • an inert atmosphere typically Polysilicon can be formed by thermal annealing at 600 ° C. in a non-oxidizing atmosphere.
  • the semiconductor layer 30 can be formed using a high temperature process.
  • the process temperature must be limited low because the heat resistance of the resin substrate is low.
  • the semiconductor layer is processed at a process temperature (high temperature process) which exceeds the heat resistance temperature of the resin layer 60 despite the use of the resin layer 60 having low heat resistance as a substrate. 30 can be formed.
  • a high temperature process preferably 300 ° C. to 1000 ° C., more preferably 400 ° C. to 1000 ° C.
  • High temperature process can be adopted positively.
  • the metal foil is an aluminum foil (in particular, when an aluminum foil in which a part of the surface area is anodized is used)
  • a high temperature of preferably 300 ° C. to 600 ° C., more preferably 400 ° C. to 540 ° C.
  • the process can be used proactively.
  • a high temperature process of preferably 300 ° C. to 1000 ° C., more preferably 400 ° C. to 800 ° C. can be positively used.
  • the step of forming the semiconductor layer can be performed by a high temperature process at 180 ° C. or higher, preferably about 300 ° C. to 1000 ° C., more preferably about 400 ° C. to 1000 ° C.
  • the deposited semiconductor material can be subjected to heat treatment.
  • the method of the heat treatment is not particularly limited, and may be, for example, thermal annealing (atmosphere heating), laser annealing, or, in combination, a combination thereof.
  • a semiconductor layer made of amorphous silicon is formed at a formation position on the gate insulating film 22, it may be annealed by a laser.
  • crystallization of the semiconductor proceeds and the characteristics of the semiconductor (eg, carrier mobility) can be improved.
  • carrier mobility in terms of carrier mobility, in the case of a silicon semiconductor, those which are 1 or less can be improved to 100 or more by the heat treatment.
  • annealing as used herein substantially means a heat treatment for the purpose of improving mobility and stabilizing characteristics.
  • the formation of the semiconductor layer will be further illustrated.
  • a cyclic silane compound-containing solution for example, a toluene solution of cyclopentasilane
  • heat treatment is performed at 300 ° C. to form a semiconductor layer made of amorphous silicon.
  • the semiconductor layer is thermally annealed at 600 ° C. in a non-oxidizing atmosphere (typically in an inert gas) to form a polysilicon film with high carrier mobility.
  • the heat treatment temperature for forming the semiconductor layer 30 made of amorphous silicon is set to 540 ° C., and then an excimer laser with a wavelength of 308 nm is irradiated at 450 mJ / cm 2 intensity to make the polysilicon film. It can also be done.
  • As another method for forming a semiconductor layer there is a method using an amorphous oxide semiconductor.
  • Ar + O 2 mixed atmosphere Ar + O 2 mixed atmosphere
  • heat treatment at 300 ° C. or higher, oxygen vacancies in the oxide semiconductor can be repaired, and semiconductor characteristics such as carrier mobility can be improved.
  • extraction electrodes 50s and 50d are formed on the metal oxide film 20 so as to be in contact with the semiconductor layer 30 and the non-oxidized portion 40 (see FIG. 3A).
  • the extraction electrodes 50s, 50d are formed in this manner, the metal layer 10 and the semiconductor layer 30 can be electrically connected through the non-oxidized portion 40.
  • formation of the extraction electrodes 50s and 50d can be performed by printing (for example, inkjet printing) this Ag paste.
  • a resin layer 60 is formed on the metal oxide film 20 so as to cover the semiconductor layer 30.
  • the method for forming the resin layer 60 is not particularly limited, for example, a method of bonding a semi-hardened resin sheet on the metal oxide film 20 and curing it (the adhesive material may be applied to the bonding surface of the resin sheet). Or a semi-cured resin may be applied on the metal oxide film 20 by spin coating or the like and then cured. By forming such a resin layer 60, the semiconductor layer 30 is protected, and it becomes possible to stably handle and transport in the next step (such as etching of the metal foil 10).
  • the metal foil 10 is etched from the metal foil 10 by etching a part of the metal foil 10 as a step (iv), the source electrode 12s, and the drain electrode. Form 12d.
  • the gate electrode 12 g may be formed on the lower surface of the semiconductor layer 30 with the gate insulating film 22 interposed therebetween.
  • an etchant for the metal foil 10 an appropriate one can be used according to the material of the metal foil 10. For example, in the case of aluminum, a mixed acid of phosphoric acid, acetic acid and nitric acid may be used as an etchant.
  • the flexible semiconductor device 100 in which the interlayer connection is realized by the non-oxidized portion 40 can be constructed.
  • the surface of the metal foil 10 is oxidized to form the gate insulating film 22 made of the metal oxide film 20 of the metal component of the metal foil 10. Then, the semiconductor layer 30 is formed on the gate insulating film 22, and then, a part of the metal foil 10 is etched to form the gate electrode 12g, the source electrode 12s, and the drain electrode 12d.
  • the gate insulating film 22 obtained therefrom can be thinly and precisely (smoothly) formed, and the TFT performance can be improved.
  • the semiconductor layer 30 can be actively subjected to the heat treatment, and as a result, the semiconductor such as carrier mobility etc. Characteristics can be improved.
  • the non-oxidized portion 40 is formed without oxidizing a part of the surface of the metal foil 10, and the via electrically connects the electrode and the semiconductor layer 30 by the non-oxidized portion 40.
  • the non-oxidized portion 40 as a via, ie, an interlayer connection portion
  • interlayer connection can be easily realized without making the flexible semiconductor device 100 complicated.
  • processing for removing the dense and chemically stable metal oxide film 20 for example, laser drilling for interlayer connection
  • part of the insulating film is not removed for processing. Therefore, it can be said that there is no waste in terms of materials and energy and productivity is high. That is, it can be said that the manufacturing method of the present invention can easily obtain the flexible semiconductor device 100 having excellent TFT performance with high productivity.
  • the metal foil 10 is formed of a valve metal (for example, aluminum), but the metal component of the metal foil 10 is an oxide film or an oxide film due to oxidation. It may be any type that contributes to uniform coverage, and therefore may be metals other than valve metals.
  • the oxidation method of the metal foil 10 may be thermal oxidation (for example, surface oxidation treatment by heating) or chemical oxidation (for example, surface oxidation treatment with an oxidizing agent) instead of anodic oxidation.
  • the metal foil 10 may consist of a single metal layer, you may laminate
  • the metal foil 10 may be composed of a first metal layer 14 formed of a valve metal and a second metal layer 16 formed of a metal different from the valve metal. .
  • the first metal layer 14 is, for example, a tantalum layer (thickness: preferably about 0.1 ⁇ m to about 1.0 ⁇ m, for example, about 0.3 ⁇ m), and the second metal layer 16 is a copper layer (thickness: preferably) It is about 1 ⁇ m to about 99.9 ⁇ m, more preferably about 3 ⁇ m to about 19.9 ⁇ m, and still more preferably about 7 ⁇ m to about 15.9 ⁇ m, for example, about 11.7 ⁇ m. Even in such a case, as shown in FIG. 4B, the non-oxidized portion 40 of the first metal layer 14 can be a via (by performing a local oxidation process on the first metal layer 14). It can be preferably used as an interlayer connection site).
  • a multilayer structure as shown in FIG. 4A can be formed by utilizing a thin film formation method.
  • a metal having a two-layer structure is formed by forming tantalum on a copper plate by a suitable thin film forming method such as sputtering. You can get a foil.
  • the intermediate layer 18 is formed between the first metal layer 14 and the second metal layer 16. It is desirable to form.
  • the intermediate layer 18 does not form a solid solution with the metal of the first metal layer and the second metal layer, and contains a high melting point metal (for example, tungsten etc.) or a covalent compound (for example tantalum nitride etc.) Are preferred.
  • a high melting point metal for example, tungsten etc.
  • a covalent compound for example tantalum nitride etc.
  • Such an intermediate layer 18 functions as a "diffusion prevention layer (ie, barrier layer)" that prevents the copper component of the second metal layer 16 from diffusing into the first metal (aluminum) layer 14.
  • the thickness of the intermediate layer is preferably about 20 nm to about 180 nm, for example about 100 nm.
  • 4B and 4C illustrate the case where the thickness of the metal oxide film 20 is smaller than that of the first metal layer 14, the thickness of the metal oxide film 20 may be approximately the same as the thickness of the first metal layer. It is also good. That is, the surface metal oxide film 20 may be formed by oxidizing the first metal layer 14 over the entire thickness direction.
  • the contact portion 35 may be formed in the contact region between the semiconductor layer 30 and the extraction electrodes 50s and 50d as necessary.
  • the contact portion 35 can be formed, for example, by doping a predetermined region of the semiconductor layer 30 with boron or the like. By forming the contact portion 35 in this manner, an advantage of facilitating charge injection from the source electrode to the channel portion can be obtained.
  • a plurality of extraction electrodes 50s and 50d may be formed.
  • the opposing portions of the extraction electrode 50s and the extraction electrode 50d are arranged in a comb shape.
  • the channel width (W in formula 1) can be increased while maintaining the area of the transistor element, and the amount of extraction current is increased. (See Equation 1).
  • the length of the comb teeth may be appropriately determined according to the desired TFT performance. For example, when forming a TFT array for an organic EL display, the comb teeth length of the driving TFT may be longer than the comb teeth length of the switching TFT.
  • the form which does not form extraction electrodes 50s and 50d is also employable.
  • they may be formed such that the semiconductor layer 30 and the non-oxidized site 40 are in direct contact with each other. Even in such a mode, the flexible semiconductor device 100 can be operated.
  • the semiconductor layer 30 has the extensions 32s and 32d in contact with the non-oxidized portion 40.
  • the step of forming the lead-out electrodes 50s and 50d can be omitted, and the flexible semiconductor device 100 can be constructed more easily.
  • tungsten oxide, molybdenum oxide, or the like may be interposed between the non-oxidized portion 40 and the semiconductor layer 30 in order to facilitate charge injection.
  • FIG. 8A is a cross-sectional view schematically showing a cross section of a flexible semiconductor device 200 mounted on an image display device (for example, an organic EL display).
  • the flexible semiconductor device 200 includes a plurality of transistor structures each including the semiconductor layer 30, the gate insulating film 22, the gate electrode 12g, the source electrode 12s, and the drain electrode 12d.
  • the flexible semiconductor device 200 has a stacked structure, and the Dr-Tr 200B is stacked on the Sw-Tr 200A.
  • the Dr-Tr 200B is stacked on the Sw-Tr 200A.
  • the drain electrode 12Ad of the Sw-Tr 200A and the gate electrode 12Bg of the Dr-Tr 200B are electrically connected to each other through the non-oxidized portion 44.
  • the drain electrode 12Bd of the Dr-Tr 200B is electrically connected to the metal layer 10A of the Sw-Tr 200A through the non-oxidized portion 46.
  • the flexible semiconductor device 200 includes one capacitor 80. That is, as shown in FIG. 8B, each pixel of the image display device is configured by combining two transistor structures 200A and 200B and one capacitor 80.
  • the gate electrode 12Ag of the Sw-Tr 200A is connected to the selection line 94, one of the source electrode 12As and the drain electrode 12Ad is connected to the data line 92, and the other is connected to the gate electrode 12Bg of the Dr-Tr 200B.
  • One of the source electrode 12Bs and the drain electrode 12Bd of the Dr-Tr 200B is connected to the power supply line 96, and the other is connected to the display portion (here, an organic EL element).
  • the capacitor 80 is connected between the source electrode 12Bs and the gate electrode 12Bg of the Dr-Tr 200B.
  • a display driving TFT which is an important application of a flexible semiconductor device, requires a capacitor which holds a capacitance to drive an element.
  • a capacitor which holds a capacitance to drive an element.
  • the lower electrode layer 82 of the capacitor 80 is formed in the same plane as the gate electrode 12Ag, the source electrode 12As and the drain electrode 12Ad of the Sw-Tr 200A, and is formed of the common metal layer 10A. It is done. That is, the lower electrode layer 82, the gate electrode 12Ag, the source electrode 12As, and the drain electrode 12Ad are provided flush with each other.
  • the dielectric layer 84 of the capacitor 80 is formed in the same plane as the gate insulating film 22A of the Sw-Tr 200A, and is formed of a common metal oxide film 20A. That is, the dielectric layer 84 and the gate insulating film 22A are provided flush with each other.
  • the capacitor 80 can be formed of the metal layer 10A and the metal oxide film 20A, and the flexible semiconductor device 200 can be simply constructed.
  • the dielectric layer 84 can be formed together with the gate insulating film 22A
  • the lower electrode layer 82 can be formed together with the formation of the gate electrode Ag, the source electrode As and the drain electrode 12Ad.
  • FIG. 8 (b) shows a drive circuit (equivalent circuit) 90 having the structure shown in FIG. 8 (a), but the wiring 92 shown in FIG. 8 (b) is a data line, and the wiring 94 is shown. Is a selection line, and the wiring 96 is a power supply line.
  • the flexible semiconductor device 200 is formed for each pixel of each image display device. Depending on the configuration of the display, not only two TFT elements may be provided in each pixel, but more TFT elements may be provided. Therefore, the flexible semiconductor device 200 may be modified correspondingly.
  • FIG. 9 (a) is a plan view of the flexible semiconductor device 300 as viewed from the metal layer 10 side (the lower side in the figure)
  • FIG. 9 (b) is a sectional view taken along the line IXb-IXb of FIG.
  • (C) is a cross-sectional view taken along the line IXc-IXc of FIG.
  • the flexible semiconductor device 300 may have a single-layer structure.
  • the transistor structures 300A and 300B constituting the drive circuit and the capacitor 80 are made of the same material, and they are arranged on the same plane.
  • the metal oxide film 20 be continuously formed in a region including the transistor structures 300A and 300B that constitute the drive circuit and the capacitor 80. More specifically, as shown in FIGS. 9A to 9C, the metal oxide film 20 is formed over substantially the entire region including the Sw-Tr 300A, the Dr-Tr 300B, and the capacitor 80. Is preferred.
  • “continuously formed” means that the insulating film is not formed in isolation in each element of the Sw-Tr 300A, Dr-Tr 300B and the capacitor 80, but is connected It means that it is formed of
  • the gate insulating films 22A and 22B of the transistor structures 300A and 300B and the dielectric layer 84 of the capacitor 80 are formed in the same plane, and are common metal oxide films. It is configured. Due to such configuration features, in the present invention, they can be formed in the same step.
  • combinations of the transistor structures and the capacitors shown in FIGS. 9A to 9C are arranged in an array corresponding to each pixel.
  • the metal oxide film 20 is preferably formed continuously in the region including the large number of transistor structures and capacitors. According to such a configuration, the gate insulating film provided in many transistor structures and the dielectric layer of the capacitor are present in the same plane, and can be formed of a common metal oxide film. It is possible to form simultaneously and collectively by processing.
  • interlayer connection can be easily realized by forming the non-oxidized portion 40 in a part of the oxide film formed in the surface region.
  • the number of transistor structures and capacitors is also enormous. Therefore, the productivity improvement resulting from the “interlayer connection” which can be realized easily becomes more remarkable.
  • processing for removing the metal oxide film 20 which is dense and chemically stable for example, laser hole processing for interlayer connection
  • materials and energy are used without waste. be able to. From this point of view, it can be said that in the manufacture of an image display device for a large screen, the merit of being able to reduce waste of materials and energy is greater.
  • Wirings 92 shown in FIGS. 9A to 9C are data lines, wiring 94 is a selection line, and wiring 96 is a power supply line.
  • the wiring layers 92, 94, 96 are formed in the same plane as the gate electrode, the source electrode and the drain electrode of the transistor structure to which the wiring is connected, and are formed of the common metal layer 10. Due to such a configuration, the wiring layers 92, 94 and 96, and the gate electrode, source electrode and drain electrode of the transistor structure can be formed in the same step, and the flexible semiconductor device 300 and the image display device can be obtained. It can be built easily.
  • the present invention is not necessarily limited to the above-described configuration, and a part of the metal wiring layers 92, 94, 96 is different from the electrodes 12Ag, 12As, 12Ad, 12Bg, 12Bs, 12Bd of the transistor structures 300A, 300B. You may form in the inside.
  • the wiring of the selection line 94 may be formed on the lower surface of the resin layer 60.
  • the wiring of the selection line 94 can be formed by the metal layer 15 different from the metal layer 10 constituting the transistor structures 300A and 300B.
  • the wiring of the selection line 94 is electrically connected to the metal layer 10 (the gate electrode 12Ag of the Sw-Tr 300A) through the via 17 provided in the resin layer 60.
  • the metal layer 10 the gate electrode 12Ag of the Sw-Tr 300A
  • the wiring of the selection line 94 is electrically connected to the metal layer 10 (the gate electrode 12Ag of the Sw-Tr 300A) through the via 17 provided in the resin layer 60.
  • the data line 92 and the power supply line 96 may be formed in a layer different from the metal layer 10. Even in such a case, the effect resulting from the three-dimensional arrangement of the wiring lines is exhibited.
  • the vias 17 provided in the resin layer 60 of FIG. 10 are, for example, paste vias.
  • the paste vias 17 can be formed, for example, by laminating a resin sheet 60, performing hole processing at a desired position, and filling the conductive paste.
  • a conductive paste for example, a mixture of “Ag powder” and “a resin composition containing an epoxy resin or the like as a main component” can be used.
  • Hole processing may be performed using a laser processing method such as YAG laser.
  • the resin layer 60 is a photosensitive resin, it may be exposed and developed to make holes.
  • plated vias can be formed instead of paste vias.
  • the plated via may be formed, for example, by filling the conductor using electroless copper plating or electrolytic copper plating.
  • the non-coated portion 40 not covered by the surface metal oxide film 20 is a non-oxidized portion obtained without oxidizing the surface of the metal layer 10.
  • the non-coated portion 40 where the underlying metal is exposed is a non-oxidized portion obtained without oxidizing the surface of the metal layer 10.
  • an opening 55 may be formed in part of the surface metal oxide film 20, and the non-coated portion 40 where the underlying metal is exposed may be formed by the opening 55.
  • each of the source electrode 12 s and the drain electrode 12 d can be electrically connected to the semiconductor layer 30 through the non-coating portion 40.
  • a second metal layer (for example, a copper layer) 16 is prepared, and a resist 70 is formed at a predetermined position of the second metal layer 16.
  • a first metal layer (for example, an aluminum layer) 14 is formed on the copper layer 16 on which the resist 70 is formed.
  • the formation of the aluminum layer 14 may be performed using a general thin film process.
  • the metal layer 10 composed of the aluminum layer 14 made of a metal and the copper layer 16 made of a metal different from the metal can be formed. If necessary, an intermediate layer may be formed between the copper layer 16 and the aluminum layer 14.
  • the entire surface of the aluminum layer 14 is oxidized to form the metal oxide film 20 of the aluminum component that constitutes the aluminum layer 14. .
  • a part of the metal oxide film 20 functions as the gate insulating film 22 in the flexible semiconductor device 400.
  • the resist 70 is peeled off.
  • the aluminum layer 14 laminated on the resist 70 is also removed. Therefore, an opening 55 for exposing the underlying copper layer 16 is formed in a part of the metal oxide film 20, thereby forming an uncoated portion 40 which is not covered with the metal oxide film 20.
  • the semiconductor layer 30 is formed on the gate insulating film 22, and then, as shown in FIG. 13B.
  • the extraction electrodes 50s and 50d are formed on the metal oxide film 20.
  • the lead-out electrodes 50s and 50d are formed to be in contact with the underlying copper layer 16 (non-coated portion 40) exposed to the opening 55 and the semiconductor layer 30. Thereby, the copper layer 16 and the semiconductor layer 30 are electrically connected to each other through the non-coating portion 40.
  • a resin layer 60 is formed on the metal oxide film 20 so as to cover the semiconductor layer 30.
  • a part of the copper layer 16 is etched to form a gate electrode 12g, a source electrode 12s, and a drain electrode 12d from the copper layer 16.
  • a flexible semiconductor device 400 as shown in FIG. 11 can be obtained.
  • the second metal layer 16 made of copper can be exposed to the uncoated portion 40.
  • the first metal layer 14 made of aluminum is exposed to the non-coated portion 40, aluminum immediately forms an oxide film when exposed to the atmosphere. Therefore, the interface resistance with the extraction electrode may be increased.
  • the above-described manufacturing method is useful in that the second metal layer 16 made of copper, which is less likely to be oxidized than aluminum, can be exposed to the uncoated portion 40.
  • the semiconductor layer is formed such that the semiconductor layer 30 and the underlying copper layer 16 (non-coated portion 40) exposed in the opening 55 are in direct contact with each other.
  • the process of forming the extraction electrode can be omitted, and the flexible semiconductor device can be constructed more easily.
  • First aspect A method for manufacturing a flexible semiconductor device having flexibility, (I) preparing a metal foil ( ⁇ metal layer); (Ii) locally oxidizing the surface of the metal foil to form a gate insulating film composed of a metal oxide film of a metal component that constitutes the metal foil; (Iii) forming a semiconductor layer on the gate insulating film; and (iv) forming a gate electrode, a source electrode and a drain electrode from the metal foil by etching a part of the metal foil.
  • a non-oxidized site is formed without oxidizing a part of the surface of the metal foil, and the semiconductor layer is electrically connected to each of the source electrode and the drain electrode through the non-oxidized site.
  • a method of manufacturing a flexible semiconductor device comprising: Second aspect : In the first aspect, the metal foil comprises a valve metal, In the step (ii), the surface of the metal foil is anodized to form a gate insulating film composed of a metal oxide film of a valve metal component.
  • a resist is formed on a region to be a non-oxidized portion of the surface of the metal foil, and the resist is formed on the surface of the metal foil
  • a method of manufacturing a flexible semiconductor device comprising performing an oxidation treatment on the whole.
  • Fourth aspect in any one of the first to third aspects, forming an extraction electrode on the metal oxide film so as to contact both the semiconductor layer and the non-oxidized site after the step (iii) The manufacturing method of the flexible semiconductor device characterized by the above.
  • Fifth aspect A method of manufacturing a flexible semiconductor device according to any one of the first to third aspects, wherein the semiconductor layer is formed to be in direct contact with the non-oxidized site in the step (iii). .
  • Sixth aspect A method of manufacturing a flexible semiconductor device according to any one of the first to fifth aspects, wherein the semiconductor layer formed in the step (iii) is subjected to a heat treatment.
  • Seventh aspect A method of manufacturing a flexible semiconductor device according to the sixth aspect, wherein a thermal annealing process and / or a laser annealing process is performed as the heat treatment.
  • Eighth aspect A method of manufacturing a flexible semiconductor device according to any one of the first to seventh aspects, wherein a resin layer is formed on the metal oxide film so as to cover the semiconductor layer after the step (iii).
  • the method further includes the step of forming a capacitor using a metal foil and a metal oxide film, Not only the electrode but also the electrode layer of the capacitor is formed by etching the metal foil, and not only the metal oxide film is used as the gate insulating film, but also at least a part thereof is used as the dielectric layer of the capacitor.
  • Method of manufacturing a flexible semiconductor device In any one of the first to ninth aspects, the method of manufacturing a flexible semiconductor device, wherein the step of forming the semiconductor layer of the step (iii) is performed at a high temperature process of 400 ° C. to 1000 ° C. .
  • step (iii) is A method of manufacturing a flexible semiconductor device, comprising: depositing a semiconductor material on a gate insulating film; and performing a heat treatment on the deposited semiconductor material.
  • the metal foil is formed by laminating the first metal layer and the second metal layer, A method of manufacturing a flexible semiconductor device, wherein the first metal layer comprises a valve metal and the second metal layer comprises a metal different from the valve metal.
  • the first metal layer comprises aluminum and the second metal layer comprises copper.
  • a flexible semiconductor device having flexibility A metal layer having a gate electrode, a source electrode and a drain electrode; A metal oxide film of a metal component constituting a metal layer, comprising a metal oxide film formed on the surface of the metal layer; and a semiconductor layer formed above the gate electrode via the metal oxide film, In the metal layer (in particular, the source electrode and the drain electrode), non-coated portions not covered with the metal oxide film are locally formed; A flexible semiconductor device characterized in that the source electrode and the semiconductor layer and the drain electrode and the semiconductor layer are electrically connected to each other through the non-coating portion.
  • the metal layer is formed of valve metal
  • a flexible semiconductor device characterized in that the metal oxide film is an anodic oxide film of a valve metal component.
  • Seventeenth aspect The flexible semiconductor device according to the fifteenth or sixteenth aspect, wherein the gate electrode, the source electrode and the drain electrode have a tapered shape in the thickness direction.
  • An eighteenth aspect The flexible semiconductor device according to any of the fifteenth to seventeenth aspects, wherein the gate electrode, the source electrode and the drain electrode have a thickness of 4 ⁇ m to about 20 ⁇ m.
  • the metal layer is formed of a lamination of a first metal layer and a second metal layer
  • a flexible semiconductor device characterized in that the first metal layer comprises a valve metal, the second metal layer comprises a metal different from the valve metal, and the metal oxide film is an anodic oxide film of the valve metal.
  • Twentieth aspect The flexible semiconductor device according to the nineteenth aspect, wherein the first metal layer comprises aluminum and the second metal layer comprises copper.
  • the twenty-first aspect A flexible semiconductor device according to the nineteenth or twentieth aspect, wherein an intermediate layer is formed between the first metal layer and the second metal layer.
  • the metal oxide film is characterized in that a lead-out electrode for electrically connecting the non-coated portion and the semiconductor layer is formed.
  • Flexible semiconductor device A flexible semiconductor device according to any of the fifteenth to twenty-second aspects, wherein a region of the metal oxide film sandwiched between the gate electrode and the semiconductor layer functions as a gate insulating film.
  • Twenty-fourth aspect A flexible semiconductor device according to any of the fifteenth to twenty-third aspects , wherein a resin layer covering the semiconductor layer is formed on the metal oxide film.
  • Twenty-fifth aspect The twenty-fourth aspect subordinate to the twenty-third aspect, comprising a plurality of transistor structures each including a semiconductor layer, a gate insulating film, a gate electrode, a source electrode, and a drain electrode.
  • a flexible semiconductor device characterized by Twenty-sixth aspect In any of the fifteenth to twenty-fifth aspects described above, further comprising a condenser, A flexible semiconductor device characterized in that an electrode layer of a capacitor is composed of a metal layer and a dielectric layer of the capacitor is composed of a metal oxide film.
  • the flexible semiconductor device is a semiconductor device for an image display device
  • the drive circuit of the image display device is composed of a transistor structure and a capacitor of a flexible semiconductor device
  • the flexible semiconductor device of this embodiment is used correspondingly. It is also possible to modify.
  • the flexible semiconductor device mounted on the organic EL display is illustrated, but the flexible semiconductor device may be mounted on the inorganic EL display.
  • the flexible semiconductor device may be mounted on the inorganic EL display.
  • not only EL display but electronic paper may be used.
  • it can be installed in communication devices such as RFID and memories, etc.
  • the flexible semiconductor device is manufactured in a form corresponding to one device.
  • the present invention is not limited thereto, and a method of manufacturing in a form corresponding to a plurality of devices may be performed.
  • a roll-to-roll process can be used as such a manufacturing method.
  • a gate electrode may be further provided on the semiconductor layer. That is, the flexible semiconductor device 500 may have a double gate structure. With the double gate structure, more current can flow between the source and the drain than in the case of one gate electrode. Further, even when the same amount of current flows as in the case of one gate electrode, the amount of current flowing per channel can be reduced, and as a result, the gate voltage can be lowered.
  • the threshold voltage of the semiconductor element can be changed, so that variations in the semiconductor element can be reduced. Furthermore, there is an advantage that different output sizes and frequency outputs can be obtained by using one of the gate electrodes for modulation.
  • the manufacturing method of the flexible semiconductor device of the present invention is excellent in the productivity of the flexible semiconductor device.
  • the obtained flexible semiconductor device can be used for various image display units, and can be used for electronic paper, digital paper, and the like.
  • a television image display unit as shown in FIG. 16 an image display unit of a mobile phone as shown in FIG. 17, an image display unit of a mobile personal computer or a notebook personal computer as shown in FIG.
  • the present invention can be used as an image display unit of a digital still camera and a camcorder, and an image display unit of electronic paper as shown in FIG.
  • the flexible semiconductor device obtained by the manufacturing method of the present invention is also adapted to various applications (for example, RF-IDs, memories, MPUs, solar cells, sensors, etc.) currently being considered for application in printing electronics. be able to.

Landscapes

  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

L'invention porte sur un dispositif à semi-conducteurs flexible. Le dispositif à semi-conducteurs flexible comprend : une couche métallique comprenant une électrode de grille, une électrode de source et une électrode de drain ; un film d'oxyde métallique constituant la couche métallique et formé sur la surface de la couche métallique ; et une couche semi-conductrice formée sur l'électrode de grille avec le film d'oxyde métallique intercalé. Dans le dispositif à semi-conducteurs flexible, la couche métallique comprend localement, sur sa surface, une partie non revêtue qui n'est pas revêtue du film d'oxyde métallique. L'électrode de source est électriquement connectée à la couche semi-conductrice par la partie non revêtue. L'électrode de drain est électriquement connectée à la couche semi-conductrice par la partie non revêtue.
PCT/JP2009/006071 2008-11-18 2009-11-13 Dispositif à semi-conducteurs flexible et son procédé de fabrication Ceased WO2010058541A1 (fr)

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JP2010507158A JP4550944B2 (ja) 2008-11-18 2009-11-13 フレキシブル半導体装置およびその製造方法
US12/863,202 US8975626B2 (en) 2008-11-18 2009-11-13 Flexible semiconductor device
CN200980102246.7A CN101911269B (zh) 2008-11-18 2009-11-13 柔性半导体装置及其制造方法

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JP2008-294119 2008-11-18
JP2008294119 2008-11-18

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JP (1) JP4550944B2 (fr)
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WO (1) WO2010058541A1 (fr)

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KR20110084368A (ko) 2011-07-22
CN101911269B (zh) 2013-05-01
US8975626B2 (en) 2015-03-10
CN101911269A (zh) 2010-12-08
US20110042677A1 (en) 2011-02-24

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