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WO2009075124A1 - 半導体装置の製造方法および半導体装置 - Google Patents

半導体装置の製造方法および半導体装置 Download PDF

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Publication number
WO2009075124A1
WO2009075124A1 PCT/JP2008/064862 JP2008064862W WO2009075124A1 WO 2009075124 A1 WO2009075124 A1 WO 2009075124A1 JP 2008064862 W JP2008064862 W JP 2008064862W WO 2009075124 A1 WO2009075124 A1 WO 2009075124A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor device
wafer
surface roughness
activation annealing
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/064862
Other languages
English (en)
French (fr)
Inventor
Kazuhiro Fujikawa
Shin Harada
Yasuo Namikawa
Takeyoshi Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to CN2008800047477A priority Critical patent/CN101647093B/zh
Priority to EP08792583A priority patent/EP2117036A4/en
Priority to CA002677412A priority patent/CA2677412A1/en
Priority to US12/526,731 priority patent/US8697555B2/en
Publication of WO2009075124A1 publication Critical patent/WO2009075124A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10P95/90
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • H10P30/2042
    • H10P30/21
    • H10P72/0434
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/62Electrodes ohmically coupled to a semiconductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T117/00Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10T117/10Apparatus
    • Y10T117/1024Apparatus for crystallization from liquid or supercritical state
    • Y10T117/1032Seed pulling
    • Y10T117/1068Seed pulling including heating or cooling details [e.g., shield configuration]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T117/00Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10T117/10Apparatus
    • Y10T117/1024Apparatus for crystallization from liquid or supercritical state
    • Y10T117/1076Apparatus for crystallization from liquid or supercritical state having means for producing a moving solid-liquid-solid zone
    • Y10T117/1088Apparatus for crystallization from liquid or supercritical state having means for producing a moving solid-liquid-solid zone including heating or cooling details

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

 熱処理工程においてウェハの表面荒れを十分抑制することにより、当該表面荒れに起因した特性の低下を抑制することが可能な半導体装置の製造方法、および表面荒れに起因した特性の低下が抑制された半導体装置を提供する。  半導体装置としてのMOSFETの製造方法は、炭化珪素からなるウェハ3を準備する工程と、ウェハ3を加熱することにより、活性化アニールを実施する活性化アニール工程とを備えている。そして、活性化アニール工程においては、ウェハ3が、ウェハ3とは別の発生源であるSiC片61から発生した炭化珪素の蒸気を含む雰囲気中において加熱される。
PCT/JP2008/064862 2007-12-12 2008-08-21 半導体装置の製造方法および半導体装置 Ceased WO2009075124A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN2008800047477A CN101647093B (zh) 2007-12-12 2008-08-21 制造半导体装置的方法和半导体装置
EP08792583A EP2117036A4 (en) 2007-12-12 2008-08-21 METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT
CA002677412A CA2677412A1 (en) 2007-12-12 2008-08-21 Semiconductor device manufacturing method and semiconductor device
US12/526,731 US8697555B2 (en) 2007-12-12 2008-08-21 Method of producing semiconductor device and semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-320951 2007-12-12
JP2007320951A JP5141227B2 (ja) 2007-12-12 2007-12-12 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
WO2009075124A1 true WO2009075124A1 (ja) 2009-06-18

Family

ID=40755370

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/064862 Ceased WO2009075124A1 (ja) 2007-12-12 2008-08-21 半導体装置の製造方法および半導体装置

Country Status (8)

Country Link
US (1) US8697555B2 (ja)
EP (1) EP2117036A4 (ja)
JP (1) JP5141227B2 (ja)
KR (1) KR20100100585A (ja)
CN (1) CN101647093B (ja)
CA (1) CA2677412A1 (ja)
TW (1) TW200926303A (ja)
WO (1) WO2009075124A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011016392A1 (ja) * 2009-08-04 2011-02-10 昭和電工株式会社 炭化珪素半導体装置の製造方法
EP2477213A4 (en) * 2009-09-08 2014-05-14 Sumitomo Electric Industries SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SEMICONDUCTOR DEVICE

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JP2009231341A (ja) * 2008-03-19 2009-10-08 Ulvac Japan Ltd アニール装置、SiC半導体基板の熱処理方法
JP2010034481A (ja) * 2008-07-31 2010-02-12 Sumitomo Electric Ind Ltd 半導体装置の製造方法および半導体装置
SG183740A1 (en) * 2009-02-20 2012-09-27 Semiconductor Energy Lab Semiconductor device and manufacturing method of the same
US8735234B2 (en) * 2010-02-18 2014-05-27 Varian Semiconductor Equipment Associates, Inc. Self-aligned ion implantation for IBC solar cells
JP5564682B2 (ja) * 2010-04-28 2014-07-30 学校法人関西学院 半導体素子の製造方法
DE102010033943A1 (de) * 2010-08-11 2012-02-16 Osram Opto Semiconductors Gmbh Verfahren und Vorrichtung zum Heizen von Halbleitermaterial
KR101926687B1 (ko) * 2011-10-24 2018-12-07 엘지이노텍 주식회사 에피 웨이퍼 제조 장치, 에피 웨이퍼 제조 방법 및 에피 웨이퍼
DE102012003903A1 (de) * 2012-02-27 2013-08-29 Centrotherm Thermal Solutions Gmbh & Co. Kg Verfahren zur thermischen Behandlung von Siliziumcarbidsubstraten
JP2014007310A (ja) * 2012-06-26 2014-01-16 Sumitomo Electric Ind Ltd 炭化珪素半導体装置の製造方法および炭化珪素半導体装置
US9257283B2 (en) * 2012-08-06 2016-02-09 General Electric Company Device having reduced bias temperature instability (BTI)
JP6093154B2 (ja) 2012-11-16 2017-03-08 東洋炭素株式会社 収容容器の製造方法
US10403509B2 (en) * 2014-04-04 2019-09-03 The Government Of The United States Of America, As Represented By The Secretary Of The Navy Basal plane dislocation elimination in 4H—SiC by pulsed rapid thermal annealing
JP6395299B2 (ja) * 2014-09-11 2018-09-26 国立研究開発法人産業技術総合研究所 炭化珪素半導体素子及び炭化珪素半導体素子の製造方法
CN105470119B (zh) * 2015-11-19 2018-09-11 泰科天润半导体科技(北京)有限公司 一种碳化硅器件的正面欧姆接触的加工方法
JP6853621B2 (ja) 2016-03-17 2021-03-31 国立大学法人大阪大学 炭化珪素半導体装置の製造方法
US11189493B2 (en) * 2018-02-19 2021-11-30 Denso Corporation Silicon carbide semiconductor device and method for manufacturing the same

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JPH11274481A (ja) * 1998-03-20 1999-10-08 Denso Corp 炭化珪素半導体装置の製造方法

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US5989340A (en) * 1995-11-14 1999-11-23 Siemens Aktiengesellschaft Process and device for sublimation growing of silicon carbide monocrystals
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US5981900A (en) * 1996-06-03 1999-11-09 The United States Of America As Represented By The Secretary Of The Army Method of annealing silicon carbide for activation of ion-implanted dopants
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JP3550967B2 (ja) * 1997-09-11 2004-08-04 富士電機ホールディングス株式会社 炭化けい素基板の熱処理方法
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Y. NEGORO ET AL.: "Flat Surface after High-Temperature Annealing for Phosphorus-Ion Implanted 4H-SiC (0001) Using Graphite Cap", MATERIALS SCIENCE FORUM, vol. 457-460, 2004, pages 933 - 936

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011016392A1 (ja) * 2009-08-04 2011-02-10 昭和電工株式会社 炭化珪素半導体装置の製造方法
JP2011035257A (ja) * 2009-08-04 2011-02-17 Showa Denko Kk 炭化珪素半導体装置の製造方法
EP2477213A4 (en) * 2009-09-08 2014-05-14 Sumitomo Electric Industries SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SEMICONDUCTOR DEVICE

Also Published As

Publication number Publication date
JP2009146997A (ja) 2009-07-02
EP2117036A4 (en) 2012-02-08
US20100044721A1 (en) 2010-02-25
EP2117036A1 (en) 2009-11-11
KR20100100585A (ko) 2010-09-15
TW200926303A (en) 2009-06-16
CA2677412A1 (en) 2009-06-18
CN101647093A (zh) 2010-02-10
US8697555B2 (en) 2014-04-15
JP5141227B2 (ja) 2013-02-13
CN101647093B (zh) 2012-02-01

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