WO2008117736A1 - インターポーザ基板、それを利用したlsiチップ及び情報端末装置、インターポーザ基板製造方法、並びにlsiチップ製造方法 - Google Patents
インターポーザ基板、それを利用したlsiチップ及び情報端末装置、インターポーザ基板製造方法、並びにlsiチップ製造方法 Download PDFInfo
- Publication number
- WO2008117736A1 WO2008117736A1 PCT/JP2008/055215 JP2008055215W WO2008117736A1 WO 2008117736 A1 WO2008117736 A1 WO 2008117736A1 JP 2008055215 W JP2008055215 W JP 2008055215W WO 2008117736 A1 WO2008117736 A1 WO 2008117736A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- interposer substrate
- lsi chip
- manufacturing
- layer
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H10W90/701—
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
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- H05K3/3465—
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- H10W70/60—
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- H10W72/0112—
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- H10W72/019—
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- H10W74/012—
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- H10W74/15—
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- H10W90/00—
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- H10W72/01225—
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- H10W72/01235—
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- H10W72/01255—
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- H10W72/072—
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- H10W72/07232—
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- H10W72/07236—
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- H10W72/221—
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- H10W72/241—
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- H10W72/242—
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- H10W72/252—
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- H10W72/29—
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- H10W72/5522—
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- H10W72/59—
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- H10W72/856—
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- H10W72/877—
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- H10W72/884—
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- H10W72/90—
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- H10W72/923—
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- H10W72/932—
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- H10W74/00—
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- H10W90/724—
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- H10W90/732—
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- H10W90/734—
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- H10W90/754—
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Wire Bonding (AREA)
Abstract
狭ピッチのフリップチップ接続電極とワイヤボンド接続電極を同時に形成する方法を提供し、基板の低コスト化を図り、あわせて、薄いAu層に対しての廉価なハンダの供給方法及びフリップチップ接続方法を提供することを目的とする。 電極構成をCu層23とNi層24の積層とし、その外周にAu層25をメッキする。フリップチップ接続に際しては電極へのハンダ付けにメタルジェット方式を用いることでAuのハンダへの溶解を最小限にすることで、融点の高いSn-Auの生成を防止し、あわせてワイヤボンド可能なAu層25を確保する。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/521,602 US20100309641A1 (en) | 2007-03-23 | 2008-03-21 | Interposer substrate, lsi chip and information terminal device using the interposer substrate, manufacturing method of interposer substrate, and manufacturing method of lsi chip |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-077766 | 2007-03-23 | ||
| JP2007077766A JP2008243853A (ja) | 2007-03-23 | 2007-03-23 | インターポーザ基板、それを利用したlsiチップ及び情報端末装置、インターポーザ基板製造方法、並びにlsiチップ製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2008117736A1 true WO2008117736A1 (ja) | 2008-10-02 |
Family
ID=39788471
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/055215 Ceased WO2008117736A1 (ja) | 2007-03-23 | 2008-03-21 | インターポーザ基板、それを利用したlsiチップ及び情報端末装置、インターポーザ基板製造方法、並びにlsiチップ製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20100309641A1 (ja) |
| JP (1) | JP2008243853A (ja) |
| TW (1) | TW200847368A (ja) |
| WO (1) | WO2008117736A1 (ja) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2010103941A1 (ja) | 2009-03-09 | 2012-09-13 | 株式会社村田製作所 | フレキシブル基板 |
| US8760882B2 (en) | 2010-11-18 | 2014-06-24 | Xintec Inc. | Wiring structure for improving crown-like defect and fabrication method thereof |
| JP2014513870A (ja) * | 2011-05-18 | 2014-06-05 | サンディスク セミコンダクター (シャンハイ) カンパニー, リミテッド | ウォータフォール・ワイヤボンディング |
| DE102012213566A1 (de) * | 2012-08-01 | 2014-02-06 | Robert Bosch Gmbh | Verfahren zum Herstellen eines Bondpads zum Thermokompressionsbonden und Bondpad |
| JP6128367B2 (ja) * | 2012-08-28 | 2017-05-17 | 東芝ライテック株式会社 | 発光装置、および配線基板の製造方法 |
| US9754909B2 (en) | 2015-05-26 | 2017-09-05 | Monolithic Power Systems, Inc. | Copper structures with intermetallic coating for integrated circuit chips |
| JP6676935B2 (ja) * | 2015-11-13 | 2020-04-08 | セイコーエプソン株式会社 | 電気デバイス、圧電モーター、ロボット、ハンド及び送液ポンプ |
| JP6989603B2 (ja) * | 2017-06-07 | 2022-01-05 | 日本特殊陶業株式会社 | 配線基板、及び配線基板の製造方法 |
| US10347507B2 (en) | 2017-09-29 | 2019-07-09 | Lg Innotek Co., Ltd. | Printed circuit board |
| KR102531762B1 (ko) | 2017-09-29 | 2023-05-12 | 엘지이노텍 주식회사 | 인쇄회로기판 및 이의 제조 방법 |
| EP4002428B1 (en) | 2020-11-19 | 2023-11-01 | Murata Manufacturing Co., Ltd. | Method of manufacturing an interposer product |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003303937A (ja) * | 2002-04-05 | 2003-10-24 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| JP2004207381A (ja) * | 2002-12-24 | 2004-07-22 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法並びに半導体装置 |
| JP2005085854A (ja) * | 2003-09-05 | 2005-03-31 | Renesas Technology Corp | 電子部品の実装方法および電子部品実装用基板 |
| JP2006269502A (ja) * | 2005-03-22 | 2006-10-05 | Fujikura Ltd | プリント配線基板及び電子回路装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003298007A (ja) * | 2002-04-01 | 2003-10-17 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
-
2007
- 2007-03-23 JP JP2007077766A patent/JP2008243853A/ja active Pending
-
2008
- 2008-01-31 TW TW097103725A patent/TW200847368A/zh unknown
- 2008-03-21 WO PCT/JP2008/055215 patent/WO2008117736A1/ja not_active Ceased
- 2008-03-21 US US12/521,602 patent/US20100309641A1/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003303937A (ja) * | 2002-04-05 | 2003-10-24 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| JP2004207381A (ja) * | 2002-12-24 | 2004-07-22 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法並びに半導体装置 |
| JP2005085854A (ja) * | 2003-09-05 | 2005-03-31 | Renesas Technology Corp | 電子部品の実装方法および電子部品実装用基板 |
| JP2006269502A (ja) * | 2005-03-22 | 2006-10-05 | Fujikura Ltd | プリント配線基板及び電子回路装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20100309641A1 (en) | 2010-12-09 |
| JP2008243853A (ja) | 2008-10-09 |
| TW200847368A (en) | 2008-12-01 |
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