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WO2008114701A1 - 試験装置および電子デバイス - Google Patents

試験装置および電子デバイス Download PDF

Info

Publication number
WO2008114701A1
WO2008114701A1 PCT/JP2008/054670 JP2008054670W WO2008114701A1 WO 2008114701 A1 WO2008114701 A1 WO 2008114701A1 JP 2008054670 W JP2008054670 W JP 2008054670W WO 2008114701 A1 WO2008114701 A1 WO 2008114701A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
instructions
sequence
instruction
executed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/054670
Other languages
English (en)
French (fr)
Inventor
Tatsuya Yamada
Tomoyuki Sugaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP2009505182A priority Critical patent/JPWO2008114701A1/ja
Publication of WO2008114701A1 publication Critical patent/WO2008114701A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/31813—Test pattern generators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

　被試験デバイスを試験する試験装置であって、メイン試験命令列を記憶するメイン命令記憶部と、メイン試験命令列に含まれるサブルーチン呼出命令が実行されたことに応じて実行されるサブ試験命令列を記憶するサブ命令記憶部と、メイン試験命令列から順次に命令を読み出して実行し、実行した命令に対応する試験パターンおよび当該試験パターンを出力するためのタイミングの組を指定するタイミングセット情報を出力し、サブルーチン呼出命令を実行したことを条件として、当該サブルーチン呼出命令により指定されるサブ試験命令列から順次に命令を読み出して実行し、実行した命令に対応する試験パターンおよびメイン試験命令列におけるサブルーチン呼出命令の以前の命令に対応する試験パターンのタイミングセット情報を出力するパターン発生部と、試験パターンに応じた試験信号を生成し、タイミングセット情報により指定されたタイミングにおいて被試験デバイスに供給する試験信号出力部とを備える試験装置を提供する。
PCT/JP2008/054670 2007-03-21 2008-03-13 試験装置および電子デバイス Ceased WO2008114701A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009505182A JPWO2008114701A1 (ja) 2007-03-21 2008-03-13 試験装置および電子デバイス

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/689,506 US7725793B2 (en) 2007-03-21 2007-03-21 Pattern generation for test apparatus and electronic device
US11/689,506 2007-03-21

Publications (1)

Publication Number Publication Date
WO2008114701A1 true WO2008114701A1 (ja) 2008-09-25

Family

ID=39765810

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/054670 Ceased WO2008114701A1 (ja) 2007-03-21 2008-03-13 試験装置および電子デバイス

Country Status (4)

Country Link
US (1) US7725793B2 (ja)
JP (1) JPWO2008114701A1 (ja)
TW (1) TWI379095B (ja)
WO (1) WO2008114701A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010067473A1 (ja) * 2008-12-08 2010-06-17 株式会社アドバンテスト 試験装置および試験方法
US8483073B2 (en) 2008-12-08 2013-07-09 Advantest Corporation Test apparatus and test method

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7809520B2 (en) * 2007-11-05 2010-10-05 Advantest Corporation Test equipment, method for loading test plan and program product
US8117004B2 (en) * 2008-03-30 2012-02-14 Advantest Corporation Testing module, testing apparatus and testing method
US8010851B2 (en) * 2008-03-31 2011-08-30 Advantest Corporation Testing module, testing apparatus and testing method
JP5153670B2 (ja) * 2009-01-30 2013-02-27 株式会社アドバンテスト 診断装置、診断方法および試験装置
US8706439B2 (en) * 2009-12-27 2014-04-22 Advantest Corporation Test apparatus and test method
US8839057B2 (en) * 2011-02-03 2014-09-16 Arm Limited Integrated circuit and method for testing memory on the integrated circuit
JP5983362B2 (ja) * 2012-11-29 2016-08-31 富士通株式会社 試験方法、試験プログラム、および、試験制御装置
KR20150029213A (ko) * 2013-09-09 2015-03-18 삼성전자주식회사 다양한 테스트 패턴을 획득하는 자체 테스트 회로를 포함하는 시스템 온 칩 및 그것의 자체 테스트 방법
US10164808B2 (en) 2016-09-29 2018-12-25 Viavi Solutions Deutschland Gmbh Test instrument for testing devices internally performing signal conversions
CN111128779A (zh) * 2019-12-26 2020-05-08 上海华虹宏力半导体制造有限公司 晶圆的测试方法
CN111506501B (zh) * 2020-04-13 2023-09-26 杭州涂鸦信息技术有限公司 一种测试指令集的生成方法、装置及电子设备
US11379644B1 (en) * 2020-10-06 2022-07-05 Cadence Design Systems, Inc. IC chip test engine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003130926A (ja) * 2001-10-22 2003-05-08 Advantest Corp 半導体試験装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4875210A (en) * 1988-01-06 1989-10-17 Teradyne, Inc. Automatic circuit tester control system
US5696772A (en) * 1994-05-06 1997-12-09 Credence Systems Corporation Test vector compression/decompression system for parallel processing integrated circuit tester
US5748642A (en) * 1995-09-25 1998-05-05 Credence Systems Corporation Parallel processing integrated circuit tester
US6073263A (en) * 1997-10-29 2000-06-06 Credence Systems Corporation Parallel processing pattern generation system for an integrated circuit tester
JP4616434B2 (ja) 1998-11-10 2011-01-19 株式会社アドバンテスト パターン発生器、パターン発生方法及び試験装置
US6598112B1 (en) * 2000-09-11 2003-07-22 Agilent Technologies, Inc. Method and apparatus for executing a program using primary, secondary and tertiary memories
US6591213B1 (en) * 2001-02-27 2003-07-08 Inovys Corporation Systems for providing zero latency, non-modulo looping and branching of test pattern data for automatic test equipment
JP2004157079A (ja) * 2002-11-08 2004-06-03 Renesas Technology Corp チップ内蔵半導体検査装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003130926A (ja) * 2001-10-22 2003-05-08 Advantest Corp 半導体試験装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010067473A1 (ja) * 2008-12-08 2010-06-17 株式会社アドバンテスト 試験装置および試験方法
US8483073B2 (en) 2008-12-08 2013-07-09 Advantest Corporation Test apparatus and test method

Also Published As

Publication number Publication date
US7725793B2 (en) 2010-05-25
US20080235550A1 (en) 2008-09-25
TWI379095B (en) 2012-12-11
JPWO2008114701A1 (ja) 2010-07-01
TW200839274A (en) 2008-10-01

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