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WO2008111309A1 - 認識マークおよび回路基板の製造方法 - Google Patents

認識マークおよび回路基板の製造方法 Download PDF

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Publication number
WO2008111309A1
WO2008111309A1 PCT/JP2008/000537 JP2008000537W WO2008111309A1 WO 2008111309 A1 WO2008111309 A1 WO 2008111309A1 JP 2008000537 W JP2008000537 W JP 2008000537W WO 2008111309 A1 WO2008111309 A1 WO 2008111309A1
Authority
WO
WIPO (PCT)
Prior art keywords
holes
lamination
mark
circuit substrate
recognition mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/000537
Other languages
English (en)
French (fr)
Inventor
Toshiaki Takenaka
Yukihiro Hiraishi
Takao Okamoto
Masaya Mada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2008535820A priority Critical patent/JP5035249B2/ja
Priority to US12/297,076 priority patent/US20090178839A1/en
Priority to CN200880000335.6A priority patent/CN101543144B/zh
Publication of WO2008111309A1 publication Critical patent/WO2008111309A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679Aligning added circuit layers or via connections relative to previous circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/032Materials
    • H05K2201/0323Carbon
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09063Holes or slots in insulating substrate not used for electrical connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0191Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0242Cutting around hole, e.g. for disconnecting land or Plated Through-Hole [PTH] or for partly removing a PTH
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1136Conversion of insulating material into conductive material, e.g. by pyrolysis
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047Drilling of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

表裏に離型フィルム(2a、2b)を張り付けたプリプレグシート(1)に、製品の貫通孔(3)、積層認識マーク用貫通孔(7a、7b)、X線認識マーク用貫通孔(8a、8b)を形成し、積層認識マーク用貫通孔(7a、7b)をマスキングして、製品の貫通孔(3)およびX線認識マーク用貫通孔(8a、8b)に導電性ペースト(4)を充填した後、離型フィルム(2a、2b)を剥離して回路基板を製造するもので、積層認識マーク用貫通孔(7a、7b)には導電性ペースト(4)が充填されないので、積層精度が高い認識マークが容易に得られ、積層精度が向上し、高密度で品質の優れた回路形成基板が得られる。
PCT/JP2008/000537 2007-03-14 2008-03-12 認識マークおよび回路基板の製造方法 Ceased WO2008111309A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008535820A JP5035249B2 (ja) 2007-03-14 2008-03-12 回路基板の製造方法
US12/297,076 US20090178839A1 (en) 2007-03-14 2008-03-12 Recognition mark and method for manufacturing circuit board
CN200880000335.6A CN101543144B (zh) 2007-03-14 2008-03-12 识别标志以及电路基板的制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-064751 2007-03-14
JP2007064751 2007-03-14

Publications (1)

Publication Number Publication Date
WO2008111309A1 true WO2008111309A1 (ja) 2008-09-18

Family

ID=39759252

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/000537 Ceased WO2008111309A1 (ja) 2007-03-14 2008-03-12 認識マークおよび回路基板の製造方法

Country Status (5)

Country Link
US (1) US20090178839A1 (ja)
JP (2) JP5035249B2 (ja)
CN (1) CN101543144B (ja)
TW (1) TWI412315B (ja)
WO (1) WO2008111309A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011155162A1 (ja) * 2010-06-08 2011-12-15 パナソニック株式会社 多層配線基板および多層配線基板の製造方法
US11338393B2 (en) 2015-10-30 2022-05-24 Laser Systems Inc. Manufacturing method of processed resin substrate and laser processing apparatus

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102036508A (zh) * 2011-01-05 2011-04-27 惠州中京电子科技股份有限公司 多层hdi线路板盲孔开窗工艺
CN102523703A (zh) * 2012-01-06 2012-06-27 汕头超声印制板公司 一种pcb板上背钻孔的制作方法
CN104349610B (zh) * 2013-07-24 2018-03-27 北大方正集团有限公司 印制电路板子板及印制电路板的制造方法和印制电路板
KR102065873B1 (ko) * 2019-02-20 2020-01-13 도시오 오쿠노 전자 디바이스 검사용 컨택트 시트 및 컨택트 시트의 범프 일체형 리드 형성 방법
CN111465218A (zh) * 2020-03-19 2020-07-28 国巨电子(中国)有限公司 一种低温共烧陶瓷及其填孔方法
JP2022047385A (ja) * 2020-09-11 2022-03-24 キオクシア株式会社 プリント配線基板およびメモリシステム

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JPH1187932A (ja) * 1997-09-02 1999-03-30 Toshiba Corp 多層配線板の製造方法
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JP2002111204A (ja) * 2000-09-29 2002-04-12 Toppan Printing Co Ltd 多層配線基板の製造方法
JP2002217540A (ja) * 2001-01-17 2002-08-02 Matsushita Electric Ind Co Ltd 多層配線基板の製造方法及びその装置
JP2002290033A (ja) * 2001-03-23 2002-10-04 Kyocera Corp 多層配線基板の製造方法
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JPH1187932A (ja) * 1997-09-02 1999-03-30 Toshiba Corp 多層配線板の製造方法
JP2000013023A (ja) * 1998-06-19 2000-01-14 Matsushita Electric Ind Co Ltd 多層プリント配線板の製造方法
JP2002111204A (ja) * 2000-09-29 2002-04-12 Toppan Printing Co Ltd 多層配線基板の製造方法
JP2002217540A (ja) * 2001-01-17 2002-08-02 Matsushita Electric Ind Co Ltd 多層配線基板の製造方法及びその装置
JP2002290033A (ja) * 2001-03-23 2002-10-04 Kyocera Corp 多層配線基板の製造方法
JP2003318535A (ja) * 2002-04-18 2003-11-07 Mitsui Chemicals Inc プリント配線板の製造方法
JP2004235243A (ja) * 2003-01-28 2004-08-19 Fujikura Ltd 多層基板用基材、多層基板およびその製造方法
JP2006324378A (ja) * 2005-05-18 2006-11-30 Matsushita Electric Ind Co Ltd 多層プリント配線板およびその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011155162A1 (ja) * 2010-06-08 2011-12-15 パナソニック株式会社 多層配線基板および多層配線基板の製造方法
JPWO2011155162A1 (ja) * 2010-06-08 2013-08-01 パナソニック株式会社 多層配線基板および多層配線基板の製造方法
US11338393B2 (en) 2015-10-30 2022-05-24 Laser Systems Inc. Manufacturing method of processed resin substrate and laser processing apparatus

Also Published As

Publication number Publication date
TWI412315B (zh) 2013-10-11
US20090178839A1 (en) 2009-07-16
CN101543144B (zh) 2012-12-05
TW200845863A (en) 2008-11-16
JP2012164999A (ja) 2012-08-30
JP5035249B2 (ja) 2012-09-26
JPWO2008111309A1 (ja) 2010-06-24
CN101543144A (zh) 2009-09-23
JP5333623B2 (ja) 2013-11-06

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