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WO2008149493A1 - 抵抗変化型記憶装置 - Google Patents

抵抗変化型記憶装置 Download PDF

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Publication number
WO2008149493A1
WO2008149493A1 PCT/JP2008/001214 JP2008001214W WO2008149493A1 WO 2008149493 A1 WO2008149493 A1 WO 2008149493A1 JP 2008001214 W JP2008001214 W JP 2008001214W WO 2008149493 A1 WO2008149493 A1 WO 2008149493A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
nonvolatile memory
wiring line
resistance change
change type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/001214
Other languages
English (en)
French (fr)
Inventor
Ryotaro Azuma
Kazuhiko Shimakawa
Satoru Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to US12/602,414 priority Critical patent/US7990754B2/en
Priority to CN2008800005582A priority patent/CN101542632B/zh
Priority to JP2008548383A priority patent/JP4252624B2/ja
Publication of WO2008149493A1 publication Critical patent/WO2008149493A1/ja
Anticipated expiration legal-status Critical
Priority to US13/165,551 priority patent/US8154909B2/en
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/76—Array using an access device for each cell which being not a transistor and not a diode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx

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  • Semiconductor Memories (AREA)

Abstract

　本発明の抵抗変化型記憶装置（１００）は、各可変抵抗層（１１４）に直列に接続され閾値電圧がＶＦである電流抑制素子（１１６）を有し、データの書込み時あるいは読出し時に、選択不揮発性記憶素子に対応する第１の配線（ＷＬ）に第１の電圧Ｖ１を印加し、選択不揮発性記憶素子に対応する第２の配線（ＢＬ）に第２の電圧Ｖ２を印加し、選択不揮発性記憶素子に対応しない第１の配線（ＷＬ）に第３の電圧Ｖ３を印加し、選択不揮発性記憶素子に対応しない第２の配線（ＢＬ）に第４の電圧Ｖ４を印加し、Ｖ５＝（Ｖ１＋Ｖ２）／２を第５の電圧Ｖ５として、Ｖ２≦Ｖ３＜Ｖ５およびＶ５＜Ｖ４≦Ｖ１を満たし，かつ（Ｖ１－Ｖ４）＜ＶＦまたは（Ｖ３－Ｖ２）＜ＶＦを満たす。
PCT/JP2008/001214 2007-06-01 2008-05-15 抵抗変化型記憶装置 Ceased WO2008149493A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US12/602,414 US7990754B2 (en) 2007-06-01 2008-05-15 Resistance variable memory apparatus
CN2008800005582A CN101542632B (zh) 2007-06-01 2008-05-15 电阻变化型存储装置
JP2008548383A JP4252624B2 (ja) 2007-06-01 2008-05-15 抵抗変化型記憶装置
US13/165,551 US8154909B2 (en) 2007-06-01 2011-06-21 Resistance variable memory apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007146913 2007-06-01
JP2007-146913 2007-06-01

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US12/602,414 A-371-Of-International US7990754B2 (en) 2007-06-01 2008-05-15 Resistance variable memory apparatus
US13/165,551 Division US8154909B2 (en) 2007-06-01 2011-06-21 Resistance variable memory apparatus

Publications (1)

Publication Number Publication Date
WO2008149493A1 true WO2008149493A1 (ja) 2008-12-11

Family

ID=40093327

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/001214 Ceased WO2008149493A1 (ja) 2007-06-01 2008-05-15 抵抗変化型記憶装置

Country Status (4)

Country Link
US (2) US7990754B2 (ja)
JP (2) JP4252624B2 (ja)
CN (1) CN101542632B (ja)
WO (1) WO2008149493A1 (ja)

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WO2010004675A1 (ja) * 2008-07-11 2010-01-14 パナソニック株式会社 電流抑制素子、記憶素子、及びこれらの製造方法
WO2010032470A1 (ja) * 2008-09-19 2010-03-25 パナソニック株式会社 電流抑制素子、記憶素子、記憶装置および電流抑制素子の製造方法
JP2010539729A (ja) * 2007-09-19 2010-12-16 マイクロン テクノロジー， インク． クロスポイント型可変抵抗材料メモリの埋め込み低抵抗金属ワード線
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WO2011064967A1 (ja) * 2009-11-30 2011-06-03 パナソニック株式会社 不揮発性記憶素子及びその製造方法、並びに不揮発性記憶装置
US20110205779A1 (en) * 2010-02-24 2011-08-25 Kabushiki Kaisha Toshiba Semiconductor storage device
US20120193600A1 (en) * 2010-07-02 2012-08-02 Atsushi Himeno Variable resistance nonvolatile memory element, method of manufacturing the same, and variable resistance nonvolatile memory device
JP2013055209A (ja) * 2011-09-05 2013-03-21 National Institute For Materials Science Ｍｉｓ構造の抵抗変化型メモリ素子
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WO2013150791A1 (ja) * 2012-04-04 2013-10-10 パナソニック株式会社 迂回電流を抑制する双方向型電流素子を用いたクロスポイント型の抵抗変化型記憶装置の設計方法
US8675387B2 (en) 2009-07-28 2014-03-18 Panasonic Corporation Variable resistance nonvolatile memory device and programming method for same
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