WO2008035556A1 - Organic electroluminescent display and method for manufacturing the same - Google Patents
Organic electroluminescent display and method for manufacturing the same Download PDFInfo
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- WO2008035556A1 WO2008035556A1 PCT/JP2007/066921 JP2007066921W WO2008035556A1 WO 2008035556 A1 WO2008035556 A1 WO 2008035556A1 JP 2007066921 W JP2007066921 W JP 2007066921W WO 2008035556 A1 WO2008035556 A1 WO 2008035556A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B33/00—Electroluminescent light sources
- H05B33/12—Light sources with substantially two-dimensional radiating surfaces
- H05B33/26—Light sources with substantially two-dimensional radiating surfaces characterised by the composition or arrangement of the conductive material used as an electrode
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/805—Electrodes
- H10K59/8051—Anodes
- H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/805—Electrodes
- H10K59/8052—Cathodes
- H10K59/80524—Transparent cathodes, e.g. comprising thin metal layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/302—Details of OLEDs of OLED structures
- H10K2102/3023—Direction of light emission
- H10K2102/3026—Top emission
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/351—Thickness
Definitions
- the present invention relates to an organic electoluminescence display device and a method for manufacturing the same.
- an electoluminescence display device (hereinafter also referred to as an EL display device) has been widely known.
- EL display device There are inorganic EL display devices and organic EL display devices as EL display devices.
- organic EL display devices are particularly actively researched and developed because they have the characteristics of low-voltage drive, all-solid-state type, high-speed response, and self-luminance.
- a general organic EL display device is provided between, for example, a substrate, a pixel electrode formed on the substrate, a counter electrode disposed to face the pixel electrode, and the pixel electrode and the counter electrode. And an organic layer formed.
- the active matrix substrate is provided with TFTs and wirings, a large number of irregularities are formed on the surface of the active matrix substrate.
- a pixel electrode is directly formed on a substrate having such irregularities, a large number of irregularities are formed on the pixel electrode corresponding to the irregularities, and the pixel electrode is easily lost.
- Patent Document 1 In general, in order to reduce such unevenness, for example, as shown in Patent Document 1, it is known to form a planarization layer.
- the active matrix substrate of Patent Document 1 has a laminated structure in which an upper region including a plurality of pixel electrodes arranged in a matrix and a lower region including a plurality of thin film transistors that drive the individual pixel electrodes are overlapped with each other. A planarizing layer is interposed between these regions. This flattening layer improves the flatness of the region where the pixel electrode is formed.
- Patent Document 1 Japanese Patent Laid-Open No. 6-242433
- the cause of the above problem is unevenness slightly formed on the surface of the first electrode. That is, slight irregularities are likely to remain on the surface of the planarization layer formed on the active matrix substrate of Patent Document 1, reflecting the irregularities before the planarization layer is formed. Then, slight irregularities are also formed on the surface of the first electrode reflecting the irregularities on the surface of the planarizing layer.
- the thickness of the organic layer is smaller than the thickness of the liquid crystal layer, even if the unevenness of the first electrode is slight, it is greatly affected.
- the thickness of the organic layer tends to be nonuniform due to slight unevenness of the first electrode.
- pixel defects may occur as a result of the organic layer being cut off and missing.
- An object of the present invention is to improve display quality by reducing pixel defects by improving the flatness of the surface of the first electrode.
- the first electrode is formed so that the thickness of the first electrode is equal to or greater than the maximum depth of the irregularities formed on the surface of the planarization layer. did.
- the organic electoluminescence display device includes a substrate body, a plurality of switching elements formed on the substrate body, and a planarization layer formed so as to cover the switching elements. And a plurality of first electrodes formed in the planarization layer at predetermined intervals and electrically connected to the switching element through contact holes formed in the planarization layer. And a second electrode disposed opposite to the first electrode, and an organic layer provided between the first electrode and the second electrode and having a light emitting function, the thickness of the first electrode Is larger than the maximum depth of the irregularities formed on the surface of the planarizing layer. [0012] Furthermore, it is preferable that the maximum depth of the unevenness formed on the surface of the planarization layer is lOOnm or less.
- the organic layer preferably contains an organic polymer material.
- the light emission of the organic layer is preferably extracted from the second electrode side.
- the planarization layer includes a first planarization layer that covers the switching element and has a maximum depth of surface irregularities of 50 mm or more and 200 mm or less, and the first planarization layer. And at least one second planarization layer formed thereon.
- the maximum depth of the irregularities on the surface of the planarization layer located immediately below the first electrode is 100 mm or less! /.
- the organic layer preferably contains an organic polymer material.
- the light emission of the organic layer is preferably extracted from the second electrode side.
- a planarization layer that covers the switching element is formed on the substrate body on which a plurality of switching elements are formed, and the planarization layer is formed.
- the first electrode is formed so that the thickness of the first electrode is not less than the maximum depth of the unevenness formed on the surface of the planarizing layer.
- planarization layer forming step it is preferable to form the planarization layer so that the maximum depth of the irregularities of the planarization layer is 100 ⁇ m or less.
- planarization layer forming step it is preferable to perform a polishing process on the surface of the planarization layer.
- the organic layer forming step it is preferable to form the organic layer containing an organic polymer material.
- the organic layer is preferably formed by an ink jet method.
- the organic-electric-mouth luminescence display device is a top emission type in which light emission of the organic layer is extracted from the second electrode side! /
- the flattening layer forming step includes a first flattening layer forming step of forming a flattening layer so as to cover the switching element, and flattening unevenness formed on the surface of the flattening layer. It is preferable to include a flattening process step for performing a flattening process and a second flattening layer forming step for forming at least one flattening layer on the flattened layer obtained by flattening the unevenness.
- the maximum depth of the unevenness is 50 mm or more and 200 mm or less.
- the flattening treatment step it is preferable to flatten the unevenness by a polishing treatment.
- polishing process is preferably a CMP (Chemical Mechanical Polishing) process.
- the maximum depth of the unevenness formed on the surface of the planarization layer located immediately below the first electrode is 100 mm or less.
- the organic layer forming step it is preferable to form the organic layer containing an organic polymer material.
- the organic layer is preferably formed by an ink jet method.
- the organic electoluminescence display device is of a top emission type in which light emission of the organic layer is extracted from the second electrode side! /
- the thickness of the first electrode is not less than the maximum depth of the unevenness formed on the surface of the planarization layer, so that the flatness of the surface of the first electrode is improved. Therefore, since the uniformity of the organic layer thickness is improved, pixel defects are reduced.
- the maximum depth of the irregularities formed in the planarization layer is larger than lOOnm, the flatness of the first electrode is degraded, and the thickness of the organic layer tends to be nonuniform. Therefore, the uniformity of the luminance distribution tends to be reduced.
- the maximum depth of the unevenness formed on the surface of the planarization layer is lOOnm or less, the influence of the unevenness on the surface of the planarization layer is reduced, and the surface of the first electrode is flattened. Sex is improved. This further improves the uniformity of the thickness of the organic layer, thereby improving the uniformity of the luminance distribution.
- the aperture ratio is larger than that of the bottom emission type organic EL display device.
- a planarization layer that covers the switching elements is formed on the substrate body on which the plurality of switching elements are formed.
- a plurality of contact holes are formed in the planarization layer.
- a plurality of first electrodes are formed on the planarization layer at a predetermined interval.
- the flatness of the surface of the first electrode is improved by forming the thickness of the first electrode so as to be not less than the maximum depth of the unevenness formed on the surface of the planarizing layer. Therefore, pixel defects are reduced.
- the organic layer forming step the organic layer is formed so as to cover at least a part of the first electrode.
- the organic layer is formed by a wet process. This makes it possible to form an organic layer that is not subjected to a vacuum process.
- the second electrode is formed so as to cover the organic layer.
- the unevenness change with respect to the polishing time in the chemical mechanical polishing (CMP method) of the planarization layer tends to increase the polishing time as the maximum depth of the unevenness decreases.
- the unevenness is less than lOOnm
- the unevenness change becomes extremely small.
- the step reduction speed decreases as the unevenness becomes smaller, and it takes a considerable amount of time to give the organic EL appropriate flatness.
- the formation of the staggered layer leads to a complicated pattern and process, and decreases productivity and yield.
- flattening by polishing with a staggered layer may cause unintentional irregularities due to overpolishing due to the difference in polishing speed between the location where the stubber layer is located or not! Become.
- the planarization layer forming step includes a first planarization layer forming step of forming a planarization layer so as to cover the switching element, and a surface of the planarization layer.
- the second planarization located on the lower surface of the first electrode is formed by forming at least one second planarization layer above the first planarization layer on which the unevenness is planarized by the planarization process described above. It becomes possible to make the layer surface substantially flat.
- the formation of the second planarization layer is effective not only in planarization but also in mitigating the influence of scratches on the surface of the first planarization layer by the polishing process.
- the maximum depth of the unevenness is set to 50 mm or more and 200 mm or less.
- the polishing process is performed until the maximum depth of the unevenness of the first planarization layer becomes smaller than 50 nm, excessive polishing time and generation of scratches on the surface are caused, resulting in productivity. And the yield decreases.
- the thickness of the second planarization layer is increased to obtain planarity after the formation of the second planarization layer. It needs to be very thick.
- the maximum depth of the unevenness generated in the first planarization layer of the present invention is set to 50 nm or more and 200 nm or less, the unevenness reduction speed that decreases as the maximum depth of the unevenness decreases. It is possible to perform a flattening process with excellent time controllability and flattening efficiency with a large step reduction speed without being affected by the above. For this reason, it is possible to easily obtain the flatness suitable for the organic EL by forming the second planarizing layer.
- the polishing process is a CMP (Chemical Mechanical Polishing) process.
- CMP is a method of flattening the film surface by chemical etching with a chemical solution and mechanical polishing with fine abrasive grains. According to CMP, it has excellent flatness on the order of nm, and the polishing amount can be controlled with high V and accuracy.
- the maximum depth of the unevenness formed on the surface of the planarization layer located immediately below the first electrode is set to 100 mm or less. This can reduce the luminance distribution due to the unevenness on the planarization layer and improve the film thickness distribution of the organic layer on the pixel electrode. This makes it possible to manufacture high-quality organic EL display devices with few display defects at a high yield.
- the organic layer containing an organic polymer material is formed.
- Film formation of a polymer material using a liquid material can be obtained by baking after applying the material.
- the film thickness distribution is significantly affected by the unevenness of the base. Therefore, it is possible to improve the film thickness distribution of the organic layer by making the surface of the second planarizing layer, which is the lower surface of the first electrode, substantially flat. Therefore, excellent display quality and reliability can be obtained in an organic EL display device in which a polymer material is included in the organic layer in the organic EL portion.
- the flatness of the surface of the first electrode can be improved because the thickness of the first electrode is not less than the maximum depth of the unevenness of the planarization layer. For this reason, the uniformity of the thickness of the organic layer is improved. As a result, it is possible to reduce the pixel defects and improve the display quality with the power S.
- FIG. 1 is an enlarged front view of the organic EL display device of Embodiment 1 with the sealing film omitted. is there.
- FIG. 2 is a diagram schematically showing a section of the II-II portion of the organic EL display device of FIG.
- FIG. 3 is a view schematically showing a cross section of the organic EL display device of Embodiment 2. 4] Fig. 4 is an enlarged cross-sectional view of the sample device used for confirming the influence of the luminance of the maximum depth of the unevenness of the flattening layer on the organic EL display device.
- FIG. 5 is a graph showing the ratio of the luminance of the concave region and the convex region to the maximum depth of the concave and convex portions of the planarization layer obtained by the second example.
- FIG. 6 is a diagram showing the maximum depth of unevenness with respect to the polishing time in the CMP method of the planarizing layer.
- FIG. 7 is a cross-sectional view of an organic EL display device 100 according to Embodiment 3.
- FIG. 8 is a cross-sectional view of the organic EL display device 100 after the formation of an interlayer insulating film 110 according to the third embodiment.
- FIG. 9 is a cross-sectional view of the organic EL display device 100 after the formation of the first planarization layer 108a according to Embodiment 3.
- FIG. 10 is a cross-sectional view of the organic EL display device 100 during the CMP polishing process according to the third embodiment.
- FIG. 11 is a cross-sectional view of the organic EL display device 100 in which the shape of the first planarization layer 108a before the CMP polishing process according to the third embodiment is indicated by a dotted line 120.
- FIG. 12 is a cross-sectional view of the organic EL display device 100 after the formation of the second planarization layer 108b according to the third embodiment.
- FIG. 13 is a cross-sectional view of organic EL display device 100 after formation of first electrode 11 la according to Embodiment 3.
- FIG. 1 is an enlarged front view of the organic EL display device 1 of the present embodiment with the sealing film 60 omitted.
- FIG. 2 is a diagram schematically showing a cross section of the II-II portion of the organic EL display device 1 of FIG. Further, a direction L1 in FIGS. 1 and 2 indicates a light emission direction to the outside of the organic EL display device 1.
- FIG. 1 is an enlarged front view of the organic EL display device 1 of the present embodiment with the sealing film 60 omitted.
- FIG. 2 is a diagram schematically showing a cross section of the II-II portion of the organic EL display device 1 of FIG. Further, a direction L1 in FIGS. 1 and 2 indicates a light emission direction to the outside of the organic EL display device 1.
- FIG. 1 is an enlarged front view of the organic EL display device 1 of the present embodiment with the sealing film 60 omitted.
- FIG. 2 is a diagram schematically showing a cross section of the II-II portion of the organic EL display device
- the organic EL display device 1 includes an active matrix substrate 10.
- the active matrix substrate 10 includes a substrate body 11, a plurality of TFTs 12 and wirings 13 that are switching elements, a planarization layer 14, and a plurality of first electrodes 20.
- the substrate body 11 is, for example, a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, or the like.
- a plurality of TFTs 12, wirings 13 and the like are formed on one surface of the substrate body 11, and a planarization layer 14 is formed so as to cover the TFTs 12 and the wirings 13.
- Each TFT 12 has, for example, a so-called top gate type structure.
- the top gate type TFT 12 has a source region 15, a drain region 16, and a gate electrode 17.
- the source region 15 and the drain region 16 are disposed closer to the substrate body 11 than the gate electrode 17.
- the source region 15 and the drain region 16 are formed in separate regions on the substrate body 11. Each is formed at a predetermined interval.
- a semiconductor layer made of polycrystalline Si, alpha-moss Si, poly-Si, Te, etc. 18 is formed in the side region between the source region 15 and the drain region 16 and the side region where the source region 15 and the drain region 16 face each other.
- a gate insulating film 19 is formed on the source region 15, the drain region 16 and the semiconductor layer 18 so as to cover the source region 15, the drain region 16 and the semiconductor layer 18.
- a gate electrode 17 is formed on the gate insulating film 19, and the gate electrode 17 and the source region 15 and the drain region 16 are insulated from each other through the gate insulating film 19.
- the material of the gate electrode 17 and the like constituting the TFT 12 is not limited to any known material.
- the maximum depth D of the irregularities is, for example, 48 nm. That is, the maximum depth D of the unevenness on the surface of the planarizing layer 14 is lOOnm or less. The maximum depth D of the unevenness on the surface of the planarizing layer 14 is preferably 50 nm or less.
- the planarization layer 14 includes, for example, a silicon nitride film 14a and an acrylic resin layer 14b formed on the silicon nitride film 14a.
- the silicon nitride film 14a functions as a protective film such as TFT12.
- the acrylic resin layer 14b is formed to a thickness of 2111, for example.
- the thickness of the planarizing layer 14 is preferably 2 m or more.
- a source wiring connected to the source region 15 is formed between the silicon nitride film 14a and the acrylic resin layer 14b.
- a contact hole 14c is formed on the drain region 16 of each TFT 12 so as to penetrate the silicon nitride film 14a, the acrylic resin layer 14b, and the gate insulating film 19.
- a plurality of first electrodes 20 are formed in a matrix at predetermined intervals on the surface of the planarizing layer 14, and each constitutes each pixel region 35 of the organic EL display device 1.
- the first electrode 20 is made of a metal material having a large work function, such as Au, Ni, Pt, etc., and each first electrode 20 is connected to the contact hole 14c.
- the contact hole 14c is filled with the same metal material as that of the first electrode 20.
- the first electrode 20 is electrically connected to the drain region 16 through a contact hole 14c formed in the planarizing layer 14, and has a function of injecting holes into the organic layer 30 in accordance with a signal input from the TFT 12. Have Yes.
- the thickness H of the first electrode 20 is, for example, 150 nm, and is greater than the maximum depth D of the unevenness formed on the surface of the planarization layer 14.
- the organic EL display device 1 includes an insulating layer 40 formed around each first electrode 20, a second electrode 50 disposed opposite to the plurality of first electrodes 20, and a first electrode 20, An organic layer 30 provided between the second electrode 50 and a sealing film 60 formed on the organic layer 30 and the second electrode 50.
- the insulating layer 40 partitions the plurality of first electrodes 20 in a matrix and is formed so as to overlap the entire contact hole 14c. That is, the adjacent first electrodes 20 are electrically insulated from each other through the insulating layer 40. Since the insulating layer 40 is formed on the contact hole 14c, the contact hole 14c is not included in the pixel region 35.
- the insulating layer 40 is made of, for example, photosensitive polyimide, acrylic resin, methallyl resin, or nopolac resin.
- the organic layer 30 is formed on each first electrode 20 partitioned in a matrix, and is partitioned by the insulating layer 40 in the same manner as the first electrode 20.
- the organic layer 30 includes a hole transport layer 31 and a light emitting layer 32.
- the hole transport layer 31 is formed on the first electrode 20 side, and the light emitting layer 32 is formed on the second electrode 50 side.
- the hole transport layer 31 has a function of transporting the holes injected into the hole transport layer 31 from the first electrode 20 force to the light emitting layer 32.
- the hole transport layer 31 is made of, for example, polyaniline, 3, 4 polyethylene dioxythiophene / polystyrene sulfonate (PEDT / PSS), poly (triphenylamine derivative), polybulur rubazole (PVCz), etc. It is made of an organic polymer material that is a hole transport material.
- the light emitting layer 32 receives holes injected into the light emitting layer 32 from the first electrode 20 through the hole transport layer 31 and electrons injected from the second electrode 50, and recombines them. It has a function to emit light.
- the light emitting layer 32 is formed including, for example, an organic polymer material that is one or more kinds of light emitting materials.
- organic polymer materials used in the light emitting layer 32 include poly (2 deloxy-1,4 phenylene) (DO-PPP), poly [2,5 bis [2— (N, N, N— Triethylammonium) ethoxy] -1,4 Hue 2-rualto 1,4-Fuenyllene] dibromide (PPP— NEt 3+ ), poly [2— (2, — Tilhexyloxy) 5-methoxy-1,4 phenylenevinylene] (MEH-PPV), etc.
- the light emitting layer 32 may include a leveling agent, a light emission assisting agent, an additive, a charge transporting agent, a light emitting dopant, and the like.
- the additive include a donor and an acceptor.
- the second electrode 50 is formed so as to cover the insulating layer 40 and the organic layer 30, for example.
- the second electrode 50 has a function of injecting electrons into the organic layer 30 and includes a metal layer 51 and a transparent electrode layer 52 formed on the metal layer 51.
- the second electrode 50 has a metal layer 51 made of a metal material having a low work function, for example, A1 containing 5% of Ca or the like on the organic layer 30 and the insulating layer 40 side.
- the metal layer 51 is made of, for example, a transparent material made of ITO, IZO, ZnO, SnO or the like.
- a conductive oxide such as the bright electrode layer 52.
- the sealing film 60 is formed so as to cover the second electrode 50 in order to protect the organic layer 30 and the second electrode 50 from moisture in the atmosphere.
- the sealing film 60 is formed of, for example, glass or plastic.
- the manufacturing method of the organic EL display device 1 includes a planarization layer forming step, a first electrode forming step, an organic layer forming step, and a second electrode forming step.
- the substrate body 11 used in this manufacturing method is provided with a top gate TFT 12 and wirings 13 in advance by a general manufacturing method.
- the planarization layer 14 covering the TFT 12 is formed on the substrate body 11 on which the plurality of TFTs 12, the wirings 13 and the like are formed, and the plurality of contact holes 14c are formed in the planarization layer 14. To do.
- a silicon nitride film 14a that functions as a protective film such as TFT 12 is formed on the surface of the substrate body 11 by, for example, a plasma CVD method or the like.
- contact holes (not shown) penetrating the silicon nitride film 14a and the gate insulating film 19 are formed on the source region 15 and the drain region 16 of each TFT 12 by etching or the like.
- source region A source wiring (not shown) connected to the region 15 is patterned.
- the acrylic resin layer 14b is laminated on the silicon nitride film 14a by spin coating or the like.
- the acrylic resin layer 14b is formed to have a thickness of 4 m, for example.
- a contact hole 14c penetrating through the silicon nitride film 14a and the acrylic resin layer 14b is formed at the same position as the contact hole previously formed on the drain region 16 by etching or the like.
- the planarizing layer 14 is formed of a known material used for the planarizing layer 14 which may be formed of acrylic resin, epoxy resin, polyimide resin, SOG (Spin on Glass), or the like. Can do.
- the surface of the planarization layer 14 is polished by CMP (Chemical Mechanical Polishing) or the like, and the thickness of the planarization layer 14 is reduced to, for example, 2 inches, and the surface of the planarization layer 14
- the maximum depth D of the irregularities formed on the substrate is set to a size of 48 nm, for example.
- the planarization layer 14 is formed so that the maximum depth D of the unevenness on the surface of the planarization layer 14 is lOOnm or less.
- the planarizing layer 14 is preferably formed so that the maximum depth D of the unevenness on the surface of the planarizing layer 14 is 50 ⁇ m or less.
- the thickness of the planarizing layer 14 is preferably 2 ⁇ m or more! / ,.
- a plurality of first electrodes 20 are formed at a predetermined interval and electrically connected to the TFT 12 through the contact hole 14c.
- a film of a metal material having a large work function such as Au, Ni, Pt or the like is formed by a known film formation method such as sputtering.
- the contact hole 14c is also filled with the metal material.
- a plurality of rectangular first electrodes 20 are formed by patterning a metal material film formed by using a photolithography method or the like in a matrix at predetermined intervals.
- the first electrode 20 is formed so that the thickness H force of the first electrode 20 is, for example, 150 nm or the like, that is, the size of the maximum depth D of the unevenness on the surface of the planarizing layer 14.
- the plurality of first electrodes 20 are partitioned in a matrix, and the insulating layer 40 that electrically insulates the adjacent first electrodes 20 from each other is formed.
- the insulating layer 40 is patterned into a frame shape surrounding the periphery of each first electrode 20 and covering the edge of the first electrode 20 by, for example, a photolithography method or the like. At this time, the insulating layer 40 is formed so as to overlap the entire contact hole 14c.
- the organic layer 30 composed of the hole transport layer 31 and the light emitting layer 32 is formed so as to cover the exposed portion of the first electrode 20.
- a hole transport material paint in which an organic polymer material that is a hole transport material is dissolved or dispersed in a solvent is supplied so as to cover the exposed first electrode 20 by an inkjet method or the like. Thereafter, the hole transport layer 31 is formed by baking the substrate body 11.
- an organic light emitting material coating material in which an organic polymer material as a light emitting material is dissolved or dispersed in a solvent is supplied so as to cover the hole transport layer 31 by an inkjet method or the like.
- the substrate body 11 is subjected to a firing process to form the light emitting layer 32. For example, pure water or the like is used as the solvent.
- the second electrode 50 including the metal layer 51 and the transparent electrode layer 52 is formed so as to cover the organic layer 30 and the insulating layer 40.
- a metal layer 51 made of A containing 5% Ca is formed on the surfaces of the organic layer 30 and the insulating layer 40 by resistance heating vapor deposition or the like.
- the sealing film 60 is formed on the second electrode 50 so as to cover the organic layer 30 and the second electrode 50 by a plasma CVD method or the like.
- the force that the thickness H of the first electrode 20 is 150 nm and the maximum depth D of the unevenness of the planarization layer 14 is 48 nm.
- the present invention is not limited to this.
- Flattening layer 14 The flattening layer 14 is formed so that the maximum depth D of the surface irregularities is lOOnm or less, and the thickness of the first electrode 20 H force The maximum unevenness depth D of the flattening layer 14 or more
- the first electrode 20 is formed so as to have a size of! /.
- the thickness of the first electrode 20 is equal to or greater than the maximum depth D of the unevenness formed on the surface of the flattening layer 14, so that the flatness of the surface of the first electrode 20 is reduced. Since the thickness can be improved, the uniformity of the thickness of the organic layer 30 is improved. As a result, pixel defects can be reduced and display quality can be improved.
- the planarity of the first electrode 20 is deteriorated and the thickness of the organic layer 30 is unsatisfactory. It tends to be uniform. Therefore, the uniformity of the luminance distribution tends to be reduced.
- the maximum depth D of the flattening layer 14 is D force S, lOOnm or less, the influence of the unevenness of the surface of the flattening layer 14 is reduced, and the flatness of the surface of the first electrode is reduced. Power S can be improved.
- the thickness uniformity of the organic layer 30 can be further improved. As a result, the uniformity of the luminance distribution can be improved and the display quality can be improved.
- the organic EL display device 1 is a top emission method in which the light emitted from the organic layer 30 is extracted from the second electrode 50 side, the organic layer is not blocked by the TFT 12 or the wiring 13 that does not transmit light. 30 luminescence can be extracted. As a result, the aperture ratio can be made larger than the bottom emission type EL display device.
- the first electrode 20 is formed so that the thickness H force of the first electrode 20 and the maximum depth D of the concave and convex on the surface of the planarizing layer 14 are not less than D. . For this reason, the flatness of the surface of the first electrode 20 can be improved. As a result, pixel defects can be reduced and display quality can be improved.
- the planarization layer 14 is formed so that the maximum depth D of the planarization layer 14 is less than D force l OOnm. For this reason, it is possible to improve the flatness of the surface of the first electrode 20. As a result, the power S improves the uniformity of the luminance distribution and improves the display quality.
- the surface of the planarization layer 14 is polished.
- the maximum depth D of the unevenness of the planarizing layer 14 can be made less than lOOnm without increasing the thickness of the planarizing layer 14 relatively.
- the planarization layer 14 can be formed relatively thin, the organic EL display device 1 can be thinned.
- the organic layer forming step since the organic layer 30 containing the organic polymer material is formed by the inkjet method, it is possible to form the organic layer 30 without performing a vacuum process. As a result, productivity can be improved and manufacturing cost can be reduced with the power S.
- FIG. 3 shows Embodiment 2 of the present invention.
- the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof is omitted.
- FIG. 3 is a diagram schematically showing a cross section of the organic EL display device 1 of the present embodiment.
- the top gate type TFT 12 is formed on the substrate body 11, whereas the organic EL display device 1 of the present embodiment is as shown in FIG.
- a bottom-gate TFT 12 is formed on the substrate body 11! /.
- the bottom gate TFT 12 includes a source region 70 and a drain region 71, and a gate electrode 72.
- the gate electrode 72 is disposed closer to the substrate body 11 than the source region 70 and the drain region 71. . That is, the gate electrode 72 is formed on the substrate body 11, and the gate insulating film 19 is formed so as to cover the gate electrode 72.
- an island-shaped semiconductor layer 73 that is insulated from the gate electrode 72 through the gate insulating film 19 is formed so as to cover the gate electrode 72.
- the drain region 71 and the source region 70 are formed in separate regions without contacting each other.
- the gate electrode 72 is insulated from the source region 70 and the drain region 71 through the gate insulating film 19.
- the material constituting the bottom gate type TFT 12 is not limited in any way, and a known material can be used similarly to the top gate type TFT 12 of the first embodiment.
- the top gate type TFT 12 is not formed on the surface of the substrate body 11 before the planarization layer 14 is formed.
- the TFT 12 is formed on the substrate body 11 to form irregularities having the same maximum depth as that of the case! For this reason, in this embodiment, the force S can be obtained to obtain the same effect as in the first embodiment.
- FIG. 7 shows a cross-sectional view of an organic EL display device 100 according to Embodiment 3 of the present invention.
- the organic EL display device 100 includes an active matrix substrate 101, an organic EL portion 102 formed on the active matrix substrate 101, an insulating film 103 formed on the organic EL portion 102, and a sealing substrate 104. ing.
- the active matrix substrate 101 includes a substrate body 105, a plurality of TFTs 106 and wirings 107 that are switching elements, and a first planarization layer 108a and a second planarization layer 108b.
- the TFT 106 formed on the active matrix substrate 101 may be a top gate type. In addition, a bottom gate type may be used.
- the substrate body 105 is, for example, a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, or the like.
- a plurality of TFTs 106 each having a gate electrode 109a, a TFT electrode 109b, and the like, wirings 107, and the like are formed.
- An interlayer insulating film 110, a first planarizing layer 108a, and a second planarizing layer 108b are formed so as to cover 106 and the wiring 107.
- the interlayer insulating film 110 is formed of, for example, a silicon oxide film, a silicon nitride film, or the like.
- the first planarization layer 108a is formed so as to cover the TFT 106 and have a maximum depth of unevenness on the surface of 50 mm or more and 200 mm or less.
- the second planarization layer 108b is formed on the first planarization layer 108a so that the maximum depth of surface irregularities is 100 mm or less.
- the second planarizing layer 108b may be formed of a single layer as in the present embodiment! / May not be formed, and may be formed of a plurality of layers.
- the first flattening layer 108a and the second flattening layer 108b are, for example, resin layers such as acrylic, epoxy, polyimide, polyamide, and polyimideamide, SOG (Spin on Glass), and the like.
- resin layers such as acrylic, epoxy, polyimide, polyamide, and polyimideamide, SOG (Spin on Glass), and the like.
- a liquid glass material or the like is preferably used.
- the organic EL portion 102 includes a plurality of first electrodes 11la (anode) provided separately from each other, an organic layer 112 provided on the first electrode 11la, and an edge portion of the first electrode 11la.
- the insulating layer 113 is provided so as to cover the electrode, and the second electrode 11 lb (cathode) is provided so as to cover the insulating layer 113.
- a plurality of first electrodes 11la are formed in a matrix at predetermined intervals on the surface of the second planarization layer 108b.
- Each of the first electrodes 11 la is formed in a rectangular shape, and each of the first electrodes 11 la constitutes each pixel region of the organic EL display device 100.
- Each first electrode 11 la is connected to a contact hole 114.
- the contact hole 114 is filled with the same metal material as the first electrode 11 la.
- the first electrode 111a is electrically connected to the TFT electrode 109b via the contact hole 114 formed in the first planarization layer 108a and the second planarization layer 108b, and the signal input from the TFT 106 Accordingly, the organic layer 112 has a function of injecting holes.
- the thickness of the first electrode 111a is, for example, 150 nm, and is larger than the maximum depth of the unevenness formed on the surface of the second planarization layer 108b.
- the insulating layer 113 partitions the plurality of first electrodes 111a in a matrix and is formed so as to overlap the entire contact hole 114. That is, the adjacent first electrodes 11 la are electrically insulated from each other through the insulating layer 113. Since the insulating layer 113 is formed on the contact hole 114! /, The contact hole 18 is not included in the pixel region! /.
- the insulating layer 113 is made of, for example, photosensitive polyimide, acrylic resin, methallyl resin, or nopolac resin.
- the organic layer 112 is formed on each first electrode 111a partitioned in a matrix, and is partitioned by the insulating layer 113 in the same manner as the first electrode 11 la.
- the organic layer 112 includes a hole transport layer 112a, a light emitting layer 112b, and an electron injection layer 112c.
- the hole transport layer 112a has a function of transporting holes injected from the first electrode 111a to the hole transport layer 112a to the light emitting layer 32.
- the hole transport layer 112a is formed of, for example, an organic polymer material that is a hole transport material such as polyaniline.
- the light-emitting layer 112b receives holes injected from the first electrode 111a through the hole transport layer 112a into the light-emitting layer 112b and electrons injected from the second electrode 11lb, and recombines them. By combining them, it has a function of emitting light.
- the light emitting layer 112b is formed including, for example, an organic polymer material which is one kind or many kinds of light emitting materials.
- the organic polymer material used for the light emitting layer 1 12b for example, poly (2-deoxy-1,4-phenylene) (DO-PPP) or the like is used.
- the light emitting layer 112b may include a leveling agent, a light emission assisting agent, an additive, a charge transporting agent, a light emitting dopant, and the like.
- Additives are a donor, an acceptor, etc., for example.
- the second electrode 111b has a function of injecting electrons into the organic layer 112.
- a material having a small work function (work function 4. OeV or less) made of a metal made of A and containing 5% of Ca or the like is preferable. This is because many organic materials have a lower electron affinity than metals and inorganic semiconductors, and thus an electrode with a low work function is required for electron injection.
- the insulating film 103 is composed of a film containing silicon, oxygen, and nitrogen, for example, a silicon oxide film, a silicon nitride film, or the like.
- the sealing substrate 104 has a second electrode 11 in order to protect the second electrode 11 lb from moisture in the atmosphere. It is formed to cover lb.
- the sealing substrate 104 is made of, for example, glass or plastic.
- FIGS. 8 to 13 are process diagrams illustrating a method of manufacturing the active matrix organic EL display device 100 including the thin film transistor according to the third embodiment of the present invention.
- the TFT 106 and the wiring 107 are formed on the substrate body 105, and the interlayer insulating film 110 is formed on the TFT 106 and the wiring 107 as a protective film.
- the interlayer insulating film 110 formed here is formed by a known technique (such as a low pressure CVD method, a plasma CVD method, or a thermal oxidation method).
- the first planarizing layer 108a is formed.
- the first planarizing layer 108a is formed by spin coating or other coating method, and is fired immediately after coating.
- the first planarizing layer 108a preferably has a film thickness of at least 2 m as an interlayer insulating function.
- a contact hole 114 is formed in the first planarizing layer 108a by a lithography method.
- a direction C1 in FIG. 10 indicates a polishing process direction with respect to the first planarization layer 108a.
- FIG. 11 is a cross-sectional view of the organic EL display device 100 in which the shape of the first planarization layer 108a before the CMP polishing step is indicated by a dotted line 120 with respect to FIG.
- FIG. 11 shows that the unevenness of the first planarization layer 108a is reduced by the polishing process.
- CMP method chemical mechanical polishing
- the CMP method is a method of flattening the surface to be polished by chemical etching with chemicals and mechanical polishing with fine abrasive grains.
- the slurry cerium oxide, alumina, silica, etc. are used, and as the node, polyurethane is used. Letan, suede, etc. are used.
- the force of using cerium oxide as the slurry and polyurethane as the pad is not limited to this.
- the substrate pressure is 0.1 MPa
- the rotation speed is 50 rpm
- the polishing time is 3 to 15 minutes, and 15 minutes.
- the second planarizing layer 108b is formed on the first planarizing layer 108a.
- the second planarization layer 108b makes the unevenness of the surface located immediately below the first electrode 111a substantially flat.
- the second planarization layer 108b is formed by the same method as the first planarization layer 108a, and then the contact hole 114 is formed.
- the film thickness of the second planarizing layer 108b is such that the unevenness of the layer below the first electrode 111a can be made almost flat and the contact hole 114 can be easily formed. 5 ⁇ 01-2.0 m is preferable.
- the formation of the second planarization layer 108b is effective not only for planarization but also for mitigating the influence of scratches on the film surface of the first planarization layer 108a by the polishing process.
- the polishing process of the first planarization layer 108a and the formation of the second planarization layer 108b are performed when the planarization layer under the pixel electrode is substantially planarized, and a film is formed when a pixel electrode and a light emitting layer 112b described later are formed. It plays an important role in reducing the thickness distribution.
- contact holes 114 are formed so as to penetrate the first and second planarization layers 108a and 108b, respectively.
- a first electrode 111a is formed so as to be electrically connected to the active matrix substrate 101 through a conductor.
- the first electrode 11 la may be used as a conductor for connection.
- the insulating layer 113 is formed so as to cover the edge portion of the first electrode 111a.
- a SiO insulating film and an acrylic resin can be used for the insulating layer 113.
- an organic layer 112 is formed so as to cover them, and a second electrode 111 b is formed on the organic layer 112.
- an insulating film 103 functioning as a thin film sealing layer is formed on the second electrode 11 lb by a known technique (low pressure CVD method, plasma CVD method, thermal oxidation method, etc.). To do.
- the sealing substrate 104 is bonded to the insulating film 103 through a sealant. As a result, the organic EL display device 100 is completed.
- the first planarization layer 1 formed on the TFT 106 or the wiring 107 is used. Since the polishing of 08a is a process before the step reduction rate is significantly reduced, the time controllability is excellent, and polishing processing with high polishing efficiency and high step reduction rate is performed to reduce the unevenness to 50 nm or more and 200 nm or less. . Further, by forming the second planarization layer 108b above the polished first planarization layer 108a, the flatness of lOOnm or less, preferably 50nm or less, can be obtained with respect to the irregularities immediately below the first electrode 111a. Can do.
- the formation of the second planarization layer 108b is effective not only in planarization but also in mitigating the influence of scratches on the surface of the first planarization layer 108a by the polishing process.
- the film thickness distribution corresponding to the structure such as the TFT 106 below the first electrode 111a is reduced, and the luminance within the pixel is reduced.
- the distribution can be improved and light emission can be obtained with high brightness uniformly in the pixel. As a result, excellent light extraction can be performed in the organic EL display device 100.
- the unevenness corresponding to the structure such as the TFT 106 below the first electrode 11la is small, so the film thickness due to the unevenness is extremely large.
- the thin region can be reduced. Therefore, it is possible to manufacture a high-quality organic EL display device 100 with few display defects and high yield, high productivity, and high yield.
- the semiconductor layer used in the TFT may be an amorphous film or a polycrystalline film.
- the maximum depth of the unevenness of the planarization layer 14 or the first planarization layer 108a is obtained by polishing the planarization layer 14 or the first planarization layer 108a.
- the unevenness of the planarization layer 14 or the first planarization layer 108a is adjusted by adjusting the thickness of the planarization layer 14 or the first planarization layer 108a when forming the planarization layer 14 or the first planarization layer 108a.
- the maximum depth of the unevenness of the planarization layer 14 or the first planarization layer 108a which may be set to a maximum depth of 10 nm or less, is only required to be 10 nm or less.
- the first electrode 20 or the first electrode 11la is preferably formed of a material having a high work function (work function 4. OeV or more). This is because when a voltage is applied, holes are injected from the anode into the organic compound layer, so that the material must have a higher HOMO level than the organic compound forming the organic compound layer. Is . Since the anode is connected to the TFT, it is desirable that the anode be made of a low resistance material.
- metallic materials Au, Ni, Pt, W, Cr, Mo, Fe, Co, Cu, etc.
- conductive metal oxides ITO, IZO, ZnO, SnO, GZO, etc.
- an oxide layer for example, an SiO layer, for enhancing the covering properties of the organic light emitting material paint and the organic transport material paint, etc.
- the first electrode 20 may be formed to a thickness that does not interfere with the conductivity of the first electrode 20, for example, a thickness of about 1 nm.
- the organic layer 30 or the organic layer 112 may be formed by, for example, spin coating, doctor blade method, discharge coating method, spray coating method, letterpress printing method, in addition to the inkjet method. It may be formed by a known organic layer forming process which may be formed by a known wet process such as an intaglio printing method, a screen printing method or a micro gravure coating method.
- the organic polymer material of the organic layer 30 or the organic layer 112 may be a known light-emitting material for an organic LED element.
- Such light emitting materials are classified into polymer light emitting materials, precursors of polymer light emitting materials, and the like.
- polymer light emitting material for example, poly (2 decyloxy 1, 4 phenylene) (DO—PPP), poly [2,5 bis [2— (N, N, N triethylammonium) Um) Etoxy] 1, 4 Phenyl Alto 1, 4 Phenylylene] Dibromide (PPP— NEt 3+ ), Poly [2— (2′-Ethylhexyloxy) 5-Methoxy-1, 4 Phenylylene Vinylene] (MEH—PPV) or the like may be used.
- DO—PPP poly (2 decyloxy 1, 4 phenylene)
- PPP— NEt 3+ Poly [2— (2′-Ethylhexyloxy) 5-Methoxy-1, 4 Phenylylene Vinylene]
- a precursor of the polymer light emitting material for example, a poly (P-phenylene vinylene) precursor (Pre-PPV), a poly (P naphthalene vinylene) precursor (Pre-PNV) or the like is used. You can.
- the solvent may be any solvent that can dissolve or disperse the light-emitting material.
- pure water, methanol, ethanol, THF (tetrahydrofuran), chloroform, toluene, xylene, trimethylbenzene, or the like is used. be able to.
- the hole transport layer 31 or the hole transport layer 17b and the electron transport layer 17d constituting the charge transport layer may have a single layer structure or a multilayer structure, respectively.
- the charge transport material of the charge transport layer the following known materials can be used.
- hole transport materials include porphyrin compounds, N, N, -bis- (3 methylphenyl) N, N'-bis- (phenyl) -benzidine (TPD), N, N, 1-di (naphthalenes).
- N-1 Ninore N, N, Diphenenolevendidine (NPD), Bis [N— (1 Naphthinore) — N Phenylenore] benzidine ( ⁇ NPD), N, N, 1 Diphenyl 1 N, N, 1 (4— (Di (3-tolyl) amino) phenyl) — 1, 3, 1, -biphenyl-4, 4, —diamine (DNTPD), etc., aromatic tertiary amine compounds, hydrazone compounds, quinacridone compounds, stilamine compounds Low molecular weight materials such as polyaniline, 3,4-polyethylenedioxythiophene / polystyrene sulfonate (PEDT / PSS), poly (triphenylamine derivative), polybulur rubazole (PVD), etc.
- Polymer material, poly (P-phenylene vinylene ) Precursors such as precursors and poly (P-naphthalene vinylene) precursors can be used.
- Examples of the electron transport material include tris (8 quinolinolato) aluminum (Alq3), bis (1 0 hydroxybenzo [h] quinolinato) beryllium (BeBq2), bis (2 methyl 8 quinolinolato) 4 phenolinophenol.
- Metal complex materials such as tanenoreminium (BAlq) and bis [2- (2 hydroxyphenol) benzoxazolate] zinc (Zn (BOX) can be used.
- 2- (4 biphenyl) -1- (4-tert-butylphenol) 1, 3, 4-oxadiazole (PBD), 3- (4-6 1-butylphenyl)- 4-phenyl-5- (4) biphenyl)-1, 2, 4 triazole (TAZ)), 3- (4-tert-butylphenyl) -4 (4-ethylphenyl) -5- (4-biphenyl) —1, 2, 4 Triazole (p—EtTAZ) and the like can be used.
- the solvent is pure water, for example, methanol, ethanol, THF (tetrahydrofuran), chloroform, toluene, xylene, trimethylbenzene, and the like.
- Any organic polymer material that is a hole transport material or any organic polymer material that is a light emitting material may be used as long as it can be dissolved or dispersed.
- the organic layer 30 or the organic layer 112 may be composed of only the light emitting layer 32 or the light emitting layer 112b. Further, the organic layer 30 or the organic layer 112 includes the light emitting layer 32 or the light emitting layer 112b, the hole injection layer, the hole transport layer 31 or the hole transport layer 112a.
- the electron transport layer and the electron injection layer 112c may be composed of one or more layers, and each of these layers is formed of a known organic low molecular weight material, organic polymer material, or a precursor thereof. I can do it.
- the light emitting layer 32 or the light emitting layer 17c is not limited to the ink jet method, and can be formed by other known methods.
- the low molecular organic light emitting layer can be formed by, for example, a vacuum deposition method.
- the organic organic light emitting layer is formed by using a coating liquid for forming an organic light emitting layer, using a spin coating method, a doctor blade method, a discharge coating method, a spray coating method, a relief printing method, an intaglio printing method, a screen printing method, a micro printing method, or the like.
- the film can be formed by a wet process such as a gravure coating method.
- the organic light emitting layer forming coating solution is a solution containing at least a light emitting material, and may contain one or more kinds of light emitting materials. In addition, it contains leveling agents, light emission assist agents, additives (donors, acceptors, etc.), charge transport agents, luminescent dopants, etc.
- the second electrode 50 or the second electrode 11 lb is, for example, the first group or the second group of the element periodic rule, that is, Li, Cs, Rb.
- Alkali metals such as Ca, Sr, Ba, Mg, etc., and alloys containing these (Mg: Ag, A1: Li) and compounds (LiF, CsF, CaF) may also be used.
- the polymer organic light emitting layer is, for example, the first group or the second group of the element periodic rule, that is, Li, Cs, Rb.
- Alkali metals such as Ca, Sr, Ba, Mg, etc., and alloys containing these (Mg: Ag, A1: Li) and compounds (LiF, CsF, CaF) may also be used.
- the polymer organic light emitting layer In addition to the polymer organic light emitting layer
- the second electrode has an alloy or laminated structure with a scientifically relatively stable metal such as Ni, Os, Pt, Pd, Al, Au, Rh, Ag, etc., in order to suppress deterioration due to oxygen, water, etc. Preferably used.
- the transparent electrode layer may be a single layer or a laminated film of a plurality of materials.
- the second electrode 50 or the second electrode 11 lb is an auxiliary metal wiring or the like separately from the second electrode 50 or the second electrode 11 lb.
- Auxiliary electrode wiring can be formed. In that case, the transparent electrode 52 may not be formed.
- the second electrode 50 or the second electrode 11 lb It may be formed only on the surface of the organic layer 30 or the organic layer 112, and may be formed so as to cover at least the organic layer 30 or the organic layer 112! /.
- the substrate body 11 is a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, etc.
- the present invention is not limited to this, and an organic EL display Any substrate can be used as long as it can guarantee the mechanical strength of the devices 1 and 100 and has an insulating property.
- the switching element is assumed to be TFT12 or TFT106.
- the present invention is not limited to this, and other known switching elements may be used.
- each of the plurality of first electrodes 20 or first electrodes 11 la is formed in a rectangular shape.
- the present invention is not limited to this, and various shapes are possible. You may have.
- the sealing film 60 or the sealing substrate 104 is formed on the second electrode 50 or the second electrode 11 lb, the organic layer 30 or the organic layer 112, and the second electrode.
- the force formed so as to cover 50 or the second electrode 1 l ib is not limited to this. That is, the organic layer 30 or the organic layer 112 and the second electrode 50 or the second electrode 11 lb are placed on the organic layer 30 or the organic layer 112 and the second electrode 50 or the second electrode 11 lb from moisture in the atmosphere.
- the organic layer 30 or organic layer 112 and the second electrode 50 or the second electrode 11 lb which may be provided with a can, sealed or sealed can, are protected against moisture in the atmosphere! / Do it !
- Example 1 and Example 2 having the structure of Embodiment 1 above, and Example 3 and Example 4 having the structure of Embodiment 2 described above were carried out over time.
- the accompanying increase in pixel defects was measured. Note that the maximum depth D of the unevenness on the surface of the planarizing layer 14 described below was measured with a stylus type step gauge.
- the planarization layer 14 was formed on the surface of the planarization layer 14 without performing the polishing treatment.
- the thickness of the acrylic resin layer 14b is 8, and the maximum depth D of the unevenness on the surface of the planarizing layer 14 is 48 nm.
- the first electrode 20 is formed with Ni to a thickness of 150 nm.
- the insulating layer 40 was formed in a laminated structure of an SiO layer and an acrylic resin layer.
- the organic layer 30 was composed of a hole injection layer and a light emitting layer 32.
- the hole injection layer was formed on the first electrode side, and the light emitting layer 32 was formed on the second electrode 50 side.
- the hole injection layer is made of polyester.
- the thickness of the hole injection layer was formed to 60 nm by controlling the concentration of the mixed solution and the amount of ink droplets dropped.
- the light emitting layer 32 was formed by applying a solution of a polyfluorene derivative by an ink jet method and the same method as the hole injection layer.
- the second electrode 50 was formed so as to have a thickness of 10 nm.
- the planarization layer 14 was formed on the surface of the planarization layer 14 without performing the polishing treatment.
- the thickness of the acrylic resin layer 14b is 2 m
- the maximum depth D of the unevenness on the surface of the flattening layer 14 is 380 nm.
- the thickness H of the first electrode 20 is 400 nm.
- the other structure of Example 2 is the same as that of Example 1 above.
- the acrylic resin layer 14b having a thickness of 2 m was formed by polishing the acrylic resin layer 14b having an initial thickness of 4 m.
- the maximum depth D of the irregularities on the surface of the planarized layer 14 is 62 nm.
- the thickness of the first electrode 20 is 150 nm.
- the structures of the organic layer 30 and the second electrode 50 in Example 3 are the same as in Example 1 above.
- the surface of the planarization layer 14 was not polished, the acrylic resin layer 14b had a thickness of 2 Hm, and the surface of the planarization layer 14 was uneven.
- the maximum depth D is 320nm.
- the thickness H of the first electrode 20 is 400 nm.
- the structures of the organic layer 30 and the second electrode 50 in Example 4 are the same as in Example 1 above.
- Comparative Example 1 to Comparative Example 3 were also measured for an increase in pixel defects with time, as in Examples 1 to 4. Further, as Comparative Examples of Example 3 and Example 4, also in Comparative Examples 4 to 6, the increase in pixel defects with the passage of time was measured in the same manner. In the following, the organic EL display devices of Comparative Example 1 to Comparative Example 6 will be described using the same reference numerals as in Examples 1 to 4 for easy understanding.
- the thickness H force of the first electrode 20 is 300 nm, 200 nm, and 100 nm, respectively.
- the structures other than the first electrode 20 of Comparative Examples 1 to 3 are the same as those of Example 2 described above.
- the thickness H force of the first electrode 20 is 300 nm, 200 nm, and lOOnm, respectively.
- the structures other than the first electrode 20 in these comparative examples 4 to 6 are the same as those in the fourth embodiment.
- These organic EL display devices 1 of Examples 1 to 4 and Comparative Examples 1 to 6 have 320 ⁇ 240 pixels.
- a voltage was applied between 20 and the second electrode 50, and a control signal was sent to the TFT 12 so that green light was emitted uniformly over the entire display area.
- a control signal was sent to the TFT 12 so that green light was emitted uniformly over the entire display area.
- uniform green emission was confirmed.
- no noticeable nonuniform luminance distribution was observed in the pixel.
- Example 2 Example 4, and Comparative Examples 1 to 6 variation in the luminance distribution was confirmed.
- the lighting state in the pixel was observed using an optical microscope, it was confirmed that the light and darkness corresponding to the irregularities on the surface of the planarization layer 14 was confirmed in these organic EL display devices.
- the luminance of the entire panel surface of Example 2 and Comparative Examples 1 to 3 is about 40% of the luminance of the entire panel surface of Example 1, and Example 4 and Comparative Example 4 to Comparative Example
- the brightness of the entire panel surface of Example 6 was about 40% of the brightness of the entire panel surface of Example 3.
- Table 1 shows the number of increased pixel defects in Example 1, Example 2, and Comparative Examples 1 to 3.
- Table 2 shows the number of increased pixel defects in Example 3, Example 4, and Comparative Example 4 to Comparative Example 6.
- Example 1 there was no increase in pixel defects.
- Example 2 only one increase in pixel defects was confirmed.
- Comparative Example 1 to Comparative Example 3 an increase in 10 or more pixel defects was confirmed, and as the thickness H of the first electrode 20 was smaller than the maximum depth D of the unevenness on the surface of the planarization layer 14, the increased pixels were observed. The number of defects has increased.
- Example 3 there was no increase in pixel defects. On the other hand, in Example 4, only two pixel defects were confirmed. In Comparative Examples 4 to 6, in each case, 10 or more pixel defects were confirmed, and the thickness H of the first electrode 20 was smaller than the maximum depth D of the concave / convex surface of the planarizing layer 14! The number of increased pixel defects has increased.
- the first electrode 20 is formed so that the thickness H force of the first electrode 20 is greater than the maximum depth D of the unevenness on the surface of the planarizing layer 14. The ability to reduce pixel defects S
- FIG. 4 is an enlarged cross-sectional view of the sample device 2 used for confirming the influence of the luminance on the organic EL display device by the maximum depth D of the unevenness on the surface of the planarizing layer 14.
- a direction L2 in FIG. 4 indicates a light emission direction to the outside of the concave region A1
- a direction L3 indicates a light emission direction to the outside of the convex region A2.
- the sample apparatus 2 was formed so as to cover the glass substrate 11, the metal material 5 provided in a stripe shape on one surface of the glass substrate 11, and the metal material 5, as shown in FIG. Planarization layer 14, a first electrode 20 formed so as to cover the planarization layer 14, an organic layer 30 formed so as to cover the first electrode 20, and a second electrode 50 formed on the surface of the organic layer 30 And.
- the metal material 5 was formed by forming a 1 ⁇ m-thick A1 film on one surface of the glass substrate 11 by sputtering, and then forming a stripe pattern with a width and interval of lmm by a photolithography method. did.
- the planarization layer 14 was formed by applying an acrylic resin to the surface of the glass substrate 11 on which the metal material 5 was formed by spin coating, and then performing a baking treatment. On the surface of the planarizing layer 14, stripe-shaped concaves and convexes are formed corresponding to the metal material 5 formed in a stripe shape.
- the first electrode 20 was a Ni film, and was formed on the surface of the planarization layer 14 by electron vapor deposition.
- the thickness D of the first electrode 20 is lOOnm.
- the organic layer 30 was formed by applying an organic polymer material on the first electrode 20 by a spin coating method and then performing a baking treatment.
- the second electrode 50 is a laminated film of Ca and A1, and was formed by an electron vapor deposition method using a mask.
- the second electrode 50 is continuously formed in the adjacent concave and convex regions of the striped irregularities on the surface of the planarizing layer 14.
- the area of the recessed area A1 where the second electrode 50 is formed is approximately equal to the area of the raised area A2.
- Light emission is extracted in a 2 mm ⁇ 2 mm region where the first electrode 20 and the second electrode 50 overlap by applying a voltage between the first electrode 20 and the second electrode 50. That is, the luminance was measured in the region where the second electrode 50 was formed, that is, the concave region A1 and the convex region A2 having approximately the same size.
- the brightness of the concave region A1 and the convex region A2 can be measured by changing the thickness of the flattening layer 14 so that the maximum depth D of the flattened layer 14 is variously large such that it is 15 ⁇ m or more and 380nm or less. A plurality of sample devices 2 having a thickness were used.
- FIG. 5 is a graph showing the ratio of the luminance of the concave region A1 and the convex region A2 with respect to the maximum unevenness depth D of the planarization layer 14 obtained in this example. Since the luminance was measured in the concave area A1 and the convex area A2 having approximately the same area, the value of “luminance in the convex area / luminance in the concave area” on the vertical axis is 1.0. S Desirably, the closer the value is to 1.0, the higher the uniformity of the luminance distribution in the concave region A1 and the convex region A2.
- the maximum depth D of the unevenness of the planarization layer 14 is lOOnm or less, the value of “brightness of the convex region / brightness of the concave region” is 0.9 or more. In these regions Al, A2 The brightness uniformity is relatively high.
- the organic EL display devices according to Examples 5 to 7 having the structure of the third embodiment were implemented, and the maximum depth of the unevenness after the unevenness generated on the surface of the first planarization layer was polished.
- the maximum depth of the unevenness of the second planarization layer formed after the polishing treatment of the first planarization layer was measured using a stylus type step gauge.
- Table 3 shows the maximum depth of each unevenness after polishing of the first planarization layer for Examples 5 to 7 and Comparative Examples 7 to 8 as test evaluation results of the third example.
- the required time and the number of scratches, the maximum depth of each unevenness after forming the second planarization layer, the lighting state in the pixel of the organic EL display device, and the number of display defects are shown.
- ⁇ in the lighting state in the pixel in Table 3 indicates that the lighting state is good
- X indicates that the lighting state is bad.
- the number of scratches was confirmed using an optical microscope.
- the number of scratches generated was the average value of six 2.4 inch panels in a 320mm x 400mm substrate.
- Example 5 a 320 mm ⁇ 400 mm substrate on which six 2.4 inch panels were mounted was used. On the substrate on which a plurality of TFTs and signal lines were formed, an acrylic resin was laminated to a thickness of 2 m as a first planarization layer by a spin coating method. When the first planarization layer was formed on the substrate on which the TFT and the signal line were formed, a concavo-convex pattern of 470 nm was generated on the surface. By polishing the unevenness that occurred on the surface of the first planarization layer, the maximum depth of the unevenness was reduced to 50 nm.
- FIG. 6 is a diagram showing the maximum depth of the unevenness with respect to the polishing time in the CMP method of the planarization layer in Example 5.
- the second planarization layer is laminated with an acrylic resin having a thickness of 2 ⁇ 111 in the same manner as the first planarization layer. Layered. Other than these, an organic EL display device was fabricated in the same manner as in Embodiment 3 above.
- Example 6 the maximum depth of the unevenness was reduced to lOOnm by polishing the unevenness generated on the surface of the first planarization layer.
- the polishing time required 5 minutes.
- An organic EL display device was produced in the same manner as in Example 5.
- Example 7 the maximum depth of the unevenness was reduced to 200 nm by polishing the unevenness generated on the surface of the first planarization layer. The polishing time took 2 minutes.
- An organic EL display device was fabricated in the same manner as in Example 5 except for the above.
- Comparative Example 7 the maximum depth of the irregularities was reduced to 30 nm by polishing the irregularities generated on the surface of the first planarization layer.
- the polishing time required 20 minutes. This is a polishing time more than twice that of Examples 5 to 7 described above, and the productivity is remarkably inferior. As shown in Fig. 7, when the unevenness is less than 50 nm, the polishing time becomes extremely long because the unevenness change tends to be particularly small. Except for the above, an organic EL display device was produced in the same manner as in Example 1. [0181] In the organic EL display device of Comparative Example 7, when the first planarization layer was polished, 10 scratches were generated on the film surface, and an increase in the number of display defects of 16 pixels was observed. .
- Comparative Example 8 the maximum depth of the unevenness was reduced to 300 nm by polishing the unevenness that occurred on the surface of the first planarization layer. The polishing time took 1 minute. Except for the above, an organic EL display device was fabricated in the same manner as in Example 3.
- the organic EL display device of Comparative Example 8 left problems with display quality and reliability.
- the present invention is useful for an organic-electric-mouth luminescence display device and a method for manufacturing the same, and in particular, by improving the flatness of the surface of the first electrode. This is suitable for improving display quality.
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Abstract
Description
明 細 書 Specification
有機エレクト口ルミネッセンス表示装置及びその製造方法 Organic electoluminescence display device and manufacturing method thereof
技術分野 Technical field
[0001] 本発明は、有機エレクト口ルミネッセンス表示装置及びその製造方法に関するもの である。 TECHNICAL FIELD [0001] The present invention relates to an organic electoluminescence display device and a method for manufacturing the same.
背景技術 Background art
[0002] 従来から、自発光型の表示装置として、エレクト口ルミネッセンス表示装置(以下、 E L表示装置ともいう)が広く知られている。 EL表示装置として、無機 EL表示装置と有 機 EL表示装置がある。その中でも有機 EL表示装置は、低電圧駆動、全固体型、高 速応答性、 自発光性という特徴を有するため、特に盛んに研究開発が行われている Conventionally, as a self-luminous display device, an electoluminescence display device (hereinafter also referred to as an EL display device) has been widely known. There are inorganic EL display devices and organic EL display devices as EL display devices. Among them, organic EL display devices are particularly actively researched and developed because they have the characteristics of low-voltage drive, all-solid-state type, high-speed response, and self-luminance.
[0003] 一般的な有機 EL表示装置は、例えば、基板と、基板に形成された画素電極と、画 素電極に対向して配置された対向電極と、画素電極と対向電極との間に設けられた 有機層とを有している。 [0003] A general organic EL display device is provided between, for example, a substrate, a pixel electrode formed on the substrate, a counter electrode disposed to face the pixel electrode, and the pixel electrode and the counter electrode. And an organic layer formed.
[0004] ここで、画素電極が形成される領域には、高い平坦性が求められている。しかし、ァ クティブマトリクス基板には、 TFTや配線等が配置されているため、アクティブマトリク ス基板の表面には多数の凹凸が形成されている。このような凹凸が形成された基板 に画素電極を直接に形成すると、その凹凸に相応して画素電極にも多数の凹凸が 形成されやすぐ画素電極が欠損しやすい。 Here, high flatness is required in the region where the pixel electrode is formed. However, since the active matrix substrate is provided with TFTs and wirings, a large number of irregularities are formed on the surface of the active matrix substrate. When a pixel electrode is directly formed on a substrate having such irregularities, a large number of irregularities are formed on the pixel electrode corresponding to the irregularities, and the pixel electrode is easily lost.
[0005] 一般に、このような凹凸を低減させるために、例えば、特許文献 1に示されるように、 平坦化層を形成することが知られている。特許文献 1のアクティブマトリクス基板は、 マトリクス状に配列した複数の画素電極を含む上側領域と、個々の画素電極を駆動 する複数の薄膜トランジスタを含む下側領域とを互いに重ねた積層構造を有し、これ ら両領域の間に平坦化層を介在させている。この平坦化層により、画素電極を形成 する領域の平坦性を向上させている。 In general, in order to reduce such unevenness, for example, as shown in Patent Document 1, it is known to form a planarization layer. The active matrix substrate of Patent Document 1 has a laminated structure in which an upper region including a plurality of pixel electrodes arranged in a matrix and a lower region including a plurality of thin film transistors that drive the individual pixel electrodes are overlapped with each other. A planarizing layer is interposed between these regions. This flattening layer improves the flatness of the region where the pixel electrode is formed.
特許文献 1:特開平 6— 242433号公報 Patent Document 1: Japanese Patent Laid-Open No. 6-242433
発明の開示 発明が解決しょうとする課題 Disclosure of the invention Problems to be solved by the invention
[0006] アクティブマトリクス方式の有機 EL表示装置の基板には、液晶表示装置に用いら れるアクティブマトリクス基板の構造がそのまま適用されている。しかし、この場合には 、以下に述べるように、多数の画素欠陥が生じる等の表示品質が比較的悪いという 問題がある。 [0006] The structure of an active matrix substrate used in a liquid crystal display device is directly applied to the substrate of an active matrix organic EL display device. However, in this case, as described below, there is a problem that display quality is relatively poor, such as a large number of pixel defects.
[0007] 本発明者らは、有機 EL表示装置について鋭意研究を重ねた結果、上記問題の原 因力 第 1電極の表面にわずかに形成される凹凸にあることを見出した。すなわち、 特許文献 1のアクティブマトリクス基板に形成される平坦化層の表面には、平坦化層 形成前の凹凸を反映してわずかな凹凸が残りやすい。そうすると、この平坦化層表面 の凹凸を反映して第 1電極の表面にもわずかな凹凸が形成される。一方、有機層の 厚みは液晶層の厚みに比べて小さいため、上記第 1電極の凹凸がわずかなものであ つても大きな影響を受ける。 [0007] As a result of extensive research on the organic EL display device, the present inventors have found that the cause of the above problem is unevenness slightly formed on the surface of the first electrode. That is, slight irregularities are likely to remain on the surface of the planarization layer formed on the active matrix substrate of Patent Document 1, reflecting the irregularities before the planarization layer is formed. Then, slight irregularities are also formed on the surface of the first electrode reflecting the irregularities on the surface of the planarizing layer. On the other hand, since the thickness of the organic layer is smaller than the thickness of the liquid crystal layer, even if the unevenness of the first electrode is slight, it is greatly affected.
[0008] すなわち、有機層の厚みは、第 1電極のわずかな凹凸に起因して不均一になりや すくなる。特に、上記第 1電極の凹凸面で比較的急峻である領域では、有機層が途 切れて欠損する結果、画素欠陥が生ずるおそれもある。 That is, the thickness of the organic layer tends to be nonuniform due to slight unevenness of the first electrode. In particular, in a relatively steep region on the uneven surface of the first electrode, pixel defects may occur as a result of the organic layer being cut off and missing.
課題を解決するための手段 Means for solving the problem
[0009] 本発明の目的は、第 1電極の表面の平坦性を向上させることにより、画素欠陥を低 減して、表示品質を向上させようとすることである。 An object of the present invention is to improve display quality by reducing pixel defects by improving the flatness of the surface of the first electrode.
[0010] 上記の目的を達成するために、この発明では、第 1電極の厚みが平坦化層の表面 に形成される凹凸の最大深さ以上になるように、第 1電極を形成するようにした。 In order to achieve the above object, in the present invention, the first electrode is formed so that the thickness of the first electrode is equal to or greater than the maximum depth of the irregularities formed on the surface of the planarization layer. did.
[0011] 具体的に、本発明に係る有機エレクト口ルミネッセンス表示装置は、基板本体と、上 記基板本体に形成された複数のスィッチング素子と、上記スイッチング素子を覆うよう に形成された平坦化層と、上記平坦化層に所定の間隔で形成されると共に上記平 坦化層に形成されたコンタクトホールを介して上記スイッチング素子に電気的に接続 された複数の第 1電極とを有するアクティブマトリクス基板と、上記第 1電極に対向し て配置された第 2電極と、上記第 1電極と上記第 2電極との間に設けられ、発光機能 を有する有機層とを備え、上記第 1電極の厚みは、上記平坦化層の表面に形成され ている凹凸の最大深さ以上の大きさである。 [0012] さらに、上記平坦化層の表面に形成されている凹凸の最大深さは、 lOOnm以下で あることが好ましい。 [0011] Specifically, the organic electoluminescence display device according to the present invention includes a substrate body, a plurality of switching elements formed on the substrate body, and a planarization layer formed so as to cover the switching elements. And a plurality of first electrodes formed in the planarization layer at predetermined intervals and electrically connected to the switching element through contact holes formed in the planarization layer. And a second electrode disposed opposite to the first electrode, and an organic layer provided between the first electrode and the second electrode and having a light emitting function, the thickness of the first electrode Is larger than the maximum depth of the irregularities formed on the surface of the planarizing layer. [0012] Furthermore, it is preferable that the maximum depth of the unevenness formed on the surface of the planarization layer is lOOnm or less.
[0013] さらに、上記有機層は、有機高分子材料を含んでいることが好ましい。 [0013] Furthermore, the organic layer preferably contains an organic polymer material.
[0014] さらに、上記有機層の発光は、上記第 2電極側から取り出されることが好ましい。 [0014] Further, the light emission of the organic layer is preferably extracted from the second electrode side.
[0015] さらに、上記平坦化層は、上記スイッチング素子を覆うように且つ表面の凹凸の最 大深さが 50mm以上且つ 200mm以下に形成された第 1平坦化層と、上記第 1平坦 化層上に形成された少なくとも一層の第 2平坦化層と、を備えることが好ましい。 [0015] Further, the planarization layer includes a first planarization layer that covers the switching element and has a maximum depth of surface irregularities of 50 mm or more and 200 mm or less, and the first planarization layer. And at least one second planarization layer formed thereon.
[0016] さらに、上記第 1電極の直下に位置する平坦化層の表面の凹凸の最大深さが 100 mm以下であることが好まし!/、。 [0016] Further, it is preferable that the maximum depth of the irregularities on the surface of the planarization layer located immediately below the first electrode is 100 mm or less! /.
[0017] さらに、上記有機層は、有機高分子材料を含んでいることが好ましい。 [0017] Furthermore, the organic layer preferably contains an organic polymer material.
[0018] さらに、上記有機層の発光は、上記第 2電極側から取り出されることが好ましい。 [0018] Further, the light emission of the organic layer is preferably extracted from the second electrode side.
[0019] また、本発明に係る有機エレクト口ルミネッセンス表示装置の製造方法は、複数のス イッチング素子が形成された基板本体に対し、上記スイッチング素子を覆う平坦化層 を形成すると共に上記平坦化層に複数のコンタクトホールを形成する平坦化層形成 工程と、上記平坦化層に複数の第 1電極を、所定の間隔で形成すると共に上記コン タクトホールを介して上記スイッチング素子と電気的に接続する第 1電極形成工程と 、上記第 1電極の少なくとも一部を覆うように有機層を形成する有機層形成工程と、 上記有機層を覆うように第 2電極を形成する第 2電極形成工程とを含み、上記第 1電 極形成工程では、上記第 1電極の厚みが、上記平坦化層の表面に形成される凹凸 の最大深さ以上の大きさになるように上記第 1電極を形成する。 [0019] In addition, in the method for manufacturing an organic-electric-luminescence display device according to the present invention, a planarization layer that covers the switching element is formed on the substrate body on which a plurality of switching elements are formed, and the planarization layer is formed. Forming a plurality of contact holes in the planarization layer, and forming a plurality of first electrodes on the planarization layer at predetermined intervals and electrically connecting the switching elements through the contact holes. A first electrode forming step, an organic layer forming step of forming an organic layer so as to cover at least a part of the first electrode, and a second electrode forming step of forming a second electrode so as to cover the organic layer. In the first electrode forming step, the first electrode is formed so that the thickness of the first electrode is not less than the maximum depth of the unevenness formed on the surface of the planarizing layer.
[0020] さらに、上記平坦化層形成工程では、上記平坦化層の凹凸の最大深さが、 100η m以下になるように上記平坦化層を形成することが好ましい。 [0020] Furthermore, in the planarization layer forming step, it is preferable to form the planarization layer so that the maximum depth of the irregularities of the planarization layer is 100 ηm or less.
[0021] さらに、上記平坦化層形成工程では、上記平坦化層の表面に研磨処理を行うこと が好ましい。 [0021] Furthermore, in the planarization layer forming step, it is preferable to perform a polishing process on the surface of the planarization layer.
[0022] さらに、上記有機層形成工程では、有機高分子材料を含む上記有機層を形成する ことが好ましい。 [0022] Furthermore, in the organic layer forming step, it is preferable to form the organic layer containing an organic polymer material.
[0023] さらに、上記有機層形成工程では、インクジェット法により上記有機層を形成するこ とが好ましい。 [0024] さらに、上記有機エレクト口ルミネッセンス表示装置は、上記有機層の発光を上記 第 2電極側から取り出すトップェミッション方式であることが好まし!/、。 [0023] Furthermore, in the organic layer forming step, the organic layer is preferably formed by an ink jet method. [0024] Further, it is preferable that the organic-electric-mouth luminescence display device is a top emission type in which light emission of the organic layer is extracted from the second electrode side! /
[0025] さらに、上記平坦化層形成工程は、上記スイッチング素子を覆うように平坦化層を 形成する第 1平坦化層形成工程と、上記平坦化層の表面に形成されている凹凸を平 坦化処理する平坦化処理工程と、上記凹凸を平坦化処理した平坦化層上に少なくと も一層の平坦化層を形成する第 2平坦化層形成工程と、を備えたことが好ましい。 [0025] Further, the flattening layer forming step includes a first flattening layer forming step of forming a flattening layer so as to cover the switching element, and flattening unevenness formed on the surface of the flattening layer. It is preferable to include a flattening process step for performing a flattening process and a second flattening layer forming step for forming at least one flattening layer on the flattened layer obtained by flattening the unevenness.
[0026] さらに、上記平坦化処理工程では、上記凹凸の最大深さを 50mm以上且つ 200m m以下にすることが好ましい。 [0026] Furthermore, in the planarization treatment step, it is preferable that the maximum depth of the unevenness is 50 mm or more and 200 mm or less.
[0027] さらに、上記平坦化処理工程では、研磨処理によって上記凹凸を平坦化することが 好ましい。 [0027] Further, in the flattening treatment step, it is preferable to flatten the unevenness by a polishing treatment.
[0028] さらに、上記研磨処理は、 CMP(Chemical Mechanical Polishing)処理であることが 好ましい。 Furthermore, the polishing process is preferably a CMP (Chemical Mechanical Polishing) process.
[0029] さらに、上記第 2平坦化層形成工程では、上記第 1電極の直下に位置する平坦化 層の表面に形成されている凹凸の最大深さを 100mm以下にすることが好ましい。 [0029] Furthermore, in the second planarization layer forming step, it is preferable that the maximum depth of the unevenness formed on the surface of the planarization layer located immediately below the first electrode is 100 mm or less.
[0030] さらに、上記有機層形成工程では、有機高分子材料を含む上記有機層を形成する ことが好ましい。 [0030] Furthermore, in the organic layer forming step, it is preferable to form the organic layer containing an organic polymer material.
[0031] さらに、上記有機層形成工程では、インクジェット法により上記有機層を形成するこ とが好ましい。 [0031] Further, in the organic layer forming step, the organic layer is preferably formed by an ink jet method.
[0032] さらに、上記有機エレクト口ルミネッセンス表示装置は、上記有機層の発光を上記 第 2電極側から取り出すトップェミッション方式であることが好まし!/、。 [0032] Further, it is preferable that the organic electoluminescence display device is of a top emission type in which light emission of the organic layer is extracted from the second electrode side! /
[0033] 一作用 [0033] One action
次に、本発明の作用について説明する。 Next, the operation of the present invention will be described.
[0034] 第 1電極の厚みは、平坦化層の表面に形成されている凹凸の最大深さ以上の大き さであることにより、第 1電極の表面の平坦性が向上する。したがって、有機層の厚み の均一性が向上するため、画素欠陥が低減する。 [0034] The thickness of the first electrode is not less than the maximum depth of the unevenness formed on the surface of the planarization layer, so that the flatness of the surface of the first electrode is improved. Therefore, since the uniformity of the organic layer thickness is improved, pixel defects are reduced.
[0035] ところで、仮に、平坦化層に形成されている凹凸の最大深さが lOOnmよりも大きい 場合には、第 1電極の平坦性が低下するため有機層の厚みが不均一になりやすい。 したがって、輝度分布の均一性が低下しやすい。 [0036] これに対し、平坦化層の表面に形成されている凹凸の最大深さが lOOnm以下であ ると、平坦化層表面の凹凸による影響が少なくなつて、第 1電極の表面の平坦性が向 上する。これによつて、より有機層の厚みの均一性が向上するため、輝度分布の均一 性が向上する。 [0035] Incidentally, if the maximum depth of the irregularities formed in the planarization layer is larger than lOOnm, the flatness of the first electrode is degraded, and the thickness of the organic layer tends to be nonuniform. Therefore, the uniformity of the luminance distribution tends to be reduced. [0036] On the other hand, when the maximum depth of the unevenness formed on the surface of the planarization layer is lOOnm or less, the influence of the unevenness on the surface of the planarization layer is reduced, and the surface of the first electrode is flattened. Sex is improved. This further improves the uniformity of the thickness of the organic layer, thereby improving the uniformity of the luminance distribution.
[0037] さらに、有機層の発光が上記第 2電極側から取り出されると、光を透過しないスイツ チング素子や配線等によって遮られることなく有機層の発光を取り出すことができる。 このため、ボトムェミッション方式の有機 EL表示装置よりも開口率が大きくなる。 [0037] Furthermore, when the light emission of the organic layer is extracted from the second electrode side, the light emission of the organic layer can be extracted without being blocked by a switching element or wiring that does not transmit light. Therefore, the aperture ratio is larger than that of the bottom emission type organic EL display device.
[0038] 本発明に係る有機 EL表示装置の製造方法は、平坦化層形成工程にお!/、て、複数 のスイッチング素子が形成された基板本体に対し、スイッチング素子を覆う平坦化層 が形成されると共に平坦化層に複数のコンタクトホールが形成される。このとき、平坦 化層表面の凹凸の最大深さが lOOnm以下になるように平坦化層を形成すると、第 1 電極の表面の平坦性が向上するため、輝度分布の均一性が向上する。特に、平坦 化層の表面に研磨処理を行う場合には、平坦化層の厚みを比較的大きくすることな ぐ平坦化層表面の凹凸の最大深さを lOOnm以下の大きさに形成することが可能と なる。 [0038] In the method of manufacturing an organic EL display device according to the present invention, in the planarization layer forming step, a planarization layer that covers the switching elements is formed on the substrate body on which the plurality of switching elements are formed. In addition, a plurality of contact holes are formed in the planarization layer. At this time, if the flattening layer is formed so that the maximum depth of the irregularities on the flattening layer surface is lOOnm or less, the flatness of the surface of the first electrode is improved, so that the uniformity of the luminance distribution is improved. In particular, when polishing is performed on the surface of the planarizing layer, the maximum depth of the unevenness on the planarizing layer surface can be formed to a size of lOOnm or less without relatively increasing the thickness of the planarizing layer. It becomes possible.
[0039] その後に行う第 1電極形成工程において、複数の第 1電極が、平坦化層に所定の 間隔で形成される。このとき、第 1電極の厚みが平坦化層の表面に形成された凹凸 の最大深さ以上の大きさになるように形成されることにより、第 1電極の表面の平坦性 が向上する。したがって、画素欠陥が低減する。 [0039] In a first electrode formation step performed thereafter, a plurality of first electrodes are formed on the planarization layer at a predetermined interval. At this time, the flatness of the surface of the first electrode is improved by forming the thickness of the first electrode so as to be not less than the maximum depth of the unevenness formed on the surface of the planarizing layer. Therefore, pixel defects are reduced.
[0040] 有機層形成工程では、第 1電極の少なくとも一部を覆うように、有機層が形成される 。特に、有機高分子材料を含む有機層を形成する場合には、ウエットプロセスによつ て有機層を形成する。これにより、真空プロセスを施すことなぐ有機層を形成するこ とが可能となる。また、その後に行う第 2電極形成工程では、有機層を覆うように第 2 電極が形成される。以上の工程により、第 1電極の表面の平坦性を向上させ、有機層 の厚みの均一性が比較的高い有機 EL表示装置を製造する。 [0040] In the organic layer forming step, the organic layer is formed so as to cover at least a part of the first electrode. In particular, when an organic layer containing an organic polymer material is formed, the organic layer is formed by a wet process. This makes it possible to form an organic layer that is not subjected to a vacuum process. In the subsequent second electrode formation step, the second electrode is formed so as to cover the organic layer. Through the above process, the flatness of the surface of the first electrode is improved, and an organic EL display device with relatively high uniformity in the thickness of the organic layer is manufactured.
[0041] また、例えば、先行技術として、特開 2000— 258796に、平坦化層を 2層構造とし 、研磨ストツバ膜を内在させた 1層目を研磨によって研磨ストツバ膜を基準として平坦 化した後に、 2層目を形成する手法が開示されている。前記先行技術での研磨量の 制御方法はストツバ層の表面が露出するまで第 1の平坦化層を研磨することとしてい る。ここで、図 6に平坦化層の CMP法における研磨時間に対する凹凸の最大深さに ついて示す。図 6に示す様に、平坦化層の化学的機械的研磨 (CMP法)における研 磨時間に対する凹凸変化は、凹凸の最大深さが小さくなるに伴って研磨時間が長く なる傾向にある。特に、凹凸が lOOnm以下では、この凹凸変化は著しく小さくなる。 つまり、凹凸が小さくなるのに伴って段差低減速度が低下しており、有機 ELに適当 な平坦性を付与するには、著しく時間を要する。さらに、ストツバ層の形成は、パター ン及び工程の複雑化を招き、生産性及び歩留まりが低下する。また、ストツバ層を用 V、た研磨による平坦化ではストツバ層のある場所と無!/、場所での研磨速度の違レ、か ら過剰研磨等による不本意な凹凸を新たに生じさせる原因となる。 [0041] Further, for example, as a prior art, in Japanese Patent Laid-Open No. 2000-258796, after the planarization layer has a two-layer structure and the first layer including the polishing stubber film is planarized by polishing on the basis of the polishing stagger film A method for forming the second layer is disclosed. The amount of polishing in the prior art The control method is to polish the first planarizing layer until the surface of the strobe layer is exposed. Here, Fig. 6 shows the maximum depth of unevenness with respect to the polishing time in the CMP method for the planarization layer. As shown in FIG. 6, the unevenness change with respect to the polishing time in the chemical mechanical polishing (CMP method) of the planarization layer tends to increase the polishing time as the maximum depth of the unevenness decreases. In particular, when the unevenness is less than lOOnm, the unevenness change becomes extremely small. In other words, the step reduction speed decreases as the unevenness becomes smaller, and it takes a considerable amount of time to give the organic EL appropriate flatness. Furthermore, the formation of the staggered layer leads to a complicated pattern and process, and decreases productivity and yield. In addition, flattening by polishing with a staggered layer may cause unintentional irregularities due to overpolishing due to the difference in polishing speed between the location where the stubber layer is located or not! Become.
[0042] しかしながら、本発明のように、上記平坦化層形成工程が、上記スイッチング素子を 覆うように平坦化層を形成する第 1平坦化層形成工程と、上記平坦化層の表面に形 成されている凹凸を平坦化処理する平坦化処理工程と、上記凹凸を平坦化処理した 平坦化層上に少なくとも一層の平坦化層を形成する第 2平坦化層形成工程と、を備 えると、段差低減速度が著しく低下する前迄の処理により、時間制御性に優れ、平坦 化効率 ·段差低減速度の高い平坦化処理を行うことが可能となる。 [0042] However, as in the present invention, the planarization layer forming step includes a first planarization layer forming step of forming a planarization layer so as to cover the switching element, and a surface of the planarization layer. A flattening process for flattening the formed unevenness, and a second flattening layer forming process for forming at least one flattening layer on the flattened layer on which the unevenness has been flattened, By the process before the step reduction speed is significantly reduced, it is possible to perform the flattening process with excellent time controllability, flattening efficiency and high step reduction speed.
[0043] さらに、前述の平坦化処理によって凹凸を平坦化処理した第 1平坦化層の上方に 少なくとも一層の第 2平坦化層を形成することで第 1電極の下面に位置する第 2平坦 化層表面を概ね平坦にすることが可能となる。また、この第 2平坦化層の形成は、平 坦化のみならず、研磨処理による第 1平坦化層表面のスクラッチ等の影響緩和にも 効果がある。 [0043] Further, the second planarization located on the lower surface of the first electrode is formed by forming at least one second planarization layer above the first planarization layer on which the unevenness is planarized by the planarization process described above. It becomes possible to make the layer surface substantially flat. In addition, the formation of the second planarization layer is effective not only in planarization but also in mitigating the influence of scratches on the surface of the first planarization layer by the polishing process.
[0044] また、本発明は、上記平坦化処理工程では、上記凹凸の最大深さを 50mm以上且 つ 200mm以下にする。ここで、前記第 1平坦化層の凹凸の最大深さを 50nmより小 さくなるまで研磨処理を行った場合は、研磨時間の過多、及び、表面上でのスクラッ チの発生を引き起こし、生産性及び歩留まりが低下する。また、前記第 1平坦化層の 凹凸の最大深さを 200nmに達しない研磨処理を行った場合は、第 2平坦化層形成 後で平坦性を得るには第 2平坦化層の層厚を極めて厚くする必要がある。このため、 それだけ多くの時間を要する上に、第 2の平坦化層の安定形成、及びコンタクトホー ルの確実な形成が困難となり、生産性と歩留まりの低下を招く。し力、しながら、本発明 の前記第 1平坦化層で生じている凹凸の最大深さを 50nm以上且つ 200nm以下に することにより、凹凸の最大深さの減少に伴って低下する凹凸低減速度の影響を受 けることなぐ段差低減速度が大きぐ時間制御性及び平坦化効率に優れた平坦化 処理を行う事が可能となる。このため、第 2平坦化層を形成することで、容易に有機 E Lに適した平坦性を得ることができる。 [0044] Further, according to the present invention, in the planarization treatment step, the maximum depth of the unevenness is set to 50 mm or more and 200 mm or less. Here, if the polishing process is performed until the maximum depth of the unevenness of the first planarization layer becomes smaller than 50 nm, excessive polishing time and generation of scratches on the surface are caused, resulting in productivity. And the yield decreases. In addition, when a polishing process is performed in which the maximum depth of the unevenness of the first planarization layer does not reach 200 nm, the thickness of the second planarization layer is increased to obtain planarity after the formation of the second planarization layer. It needs to be very thick. For this reason, it takes much time, and stable formation of the second planarization layer and contact hole As a result, it is difficult to reliably form the steel, resulting in a decrease in productivity and yield. However, when the maximum depth of the unevenness generated in the first planarization layer of the present invention is set to 50 nm or more and 200 nm or less, the unevenness reduction speed that decreases as the maximum depth of the unevenness decreases. It is possible to perform a flattening process with excellent time controllability and flattening efficiency with a large step reduction speed without being affected by the above. For this reason, it is possible to easily obtain the flatness suitable for the organic EL by forming the second planarizing layer.
[0045] また、本発明は、上記研磨処理が CMP(Chemical Mechanical Polishing)処理である 。 CMPとは、薬液による化学的なエッチングと微細な砥粒による機械的な研磨によつ て膜面を平坦化する手法である。 CMPによると、 nmオーダーで平坦性に優れ、高 V、精度で研磨量を制御できる。 In the present invention, the polishing process is a CMP (Chemical Mechanical Polishing) process. CMP is a method of flattening the film surface by chemical etching with a chemical solution and mechanical polishing with fine abrasive grains. According to CMP, it has excellent flatness on the order of nm, and the polishing amount can be controlled with high V and accuracy.
[0046] また、本発明は、上記第 2平坦化層形成工程では、上記第 1電極の直下に位置す る平坦化層の表面に形成されている凹凸の最大深さを 100mm以下にする。これに より、平坦化層上の凹凸による輝度分布を低減し、画素電極上の有機層の膜厚分布 を改善すること力できる。このため、表示欠陥の少ない高品質の有機 EL表示装置を 高レ、歩留まりで製造することが可能となる。 [0046] Further, according to the present invention, in the second planarization layer forming step, the maximum depth of the unevenness formed on the surface of the planarization layer located immediately below the first electrode is set to 100 mm or less. This can reduce the luminance distribution due to the unevenness on the planarization layer and improve the film thickness distribution of the organic layer on the pixel electrode. This makes it possible to manufacture high-quality organic EL display devices with few display defects at a high yield.
[0047] 本発明は、上記有機層形成工程では、有機高分子材料を含む上記有機層を形成 する。液状の材料を用いる高分子材料の膜形成は、材料塗布後に焼成することで得 られる。し力、しながら、その膜厚分布は下地の凹凸の影響を著しく受ける。このため、 第 1電極の下面となる第 2平坦化層表面を概ね平坦にすることで、有機層の膜厚分 布を改善すること力できる。したがって、有機 EL部における有機層に高分子材料を 含む有機 EL表示装置において優れた表示品質及び信頼性を得ることができる。 発明の効果 In the present invention, in the organic layer forming step, the organic layer containing an organic polymer material is formed. Film formation of a polymer material using a liquid material can be obtained by baking after applying the material. However, the film thickness distribution is significantly affected by the unevenness of the base. Therefore, it is possible to improve the film thickness distribution of the organic layer by making the surface of the second planarizing layer, which is the lower surface of the first electrode, substantially flat. Therefore, excellent display quality and reliability can be obtained in an organic EL display device in which a polymer material is included in the organic layer in the organic EL portion. The invention's effect
[0048] 本発明によれば、第 1電極の厚みが、平坦化層の凹凸の最大深さ以上の大きさで あることにより、第 1電極の表面の平坦性を向上させることができる。このため、有機層 の厚みの均一性が向上する。その結果、画素欠陥を低減して、表示品質を向上させ ること力 Sでさる。 [0048] According to the present invention, the flatness of the surface of the first electrode can be improved because the thickness of the first electrode is not less than the maximum depth of the unevenness of the planarization layer. For this reason, the uniformity of the thickness of the organic layer is improved. As a result, it is possible to reduce the pixel defects and improve the display quality with the power S.
図面の簡単な説明 Brief Description of Drawings
[0049] [図 1]図 1は、実施形態 1の有機 EL表示装置を封止膜を省略して拡大した正面図で ある。 FIG. 1 is an enlarged front view of the organic EL display device of Embodiment 1 with the sealing film omitted. is there.
[図 2]図 2は、図 1の有機 EL表示装置の II II部分の断面を概略的に示す図である。 [FIG. 2] FIG. 2 is a diagram schematically showing a section of the II-II portion of the organic EL display device of FIG.
[図 3]図 3は、実施形態 2の有機 EL表示装置の断面を概略的に示す図である。 園 4]図 4は、平坦化層の凹凸の最大深さが有機 EL表示装置に及ぼす輝度の影響 について確認するために用いたサンプル装置の断面図を拡大して示す図である。 FIG. 3 is a view schematically showing a cross section of the organic EL display device of Embodiment 2. 4] Fig. 4 is an enlarged cross-sectional view of the sample device used for confirming the influence of the luminance of the maximum depth of the unevenness of the flattening layer on the organic EL display device.
[図 5]図 5は、第 2実施例により得られた平坦化層の凹凸の最大深さに対する凹部領 域と凸部領域との輝度の比を示す図である。 [FIG. 5] FIG. 5 is a graph showing the ratio of the luminance of the concave region and the convex region to the maximum depth of the concave and convex portions of the planarization layer obtained by the second example.
[図 6]図 6は、平坦化層の CMP法における研磨時間に対する凹凸の最大深さを示す 図である。 [FIG. 6] FIG. 6 is a diagram showing the maximum depth of unevenness with respect to the polishing time in the CMP method of the planarizing layer.
[図 7]図 7は、実施形態 3に係る有機 EL表示装置 100の断面図である。 FIG. 7 is a cross-sectional view of an organic EL display device 100 according to Embodiment 3.
[図 8]図 8は、実施形態 3に係る層間絶縁膜 110形成後の有機 EL表示装置 100の断 面図である。 FIG. 8 is a cross-sectional view of the organic EL display device 100 after the formation of an interlayer insulating film 110 according to the third embodiment.
[図 9]図 9は、実施形態 3に係る第 1平坦化層 108a形成後の有機 EL表示装置 100の 断面図である。 FIG. 9 is a cross-sectional view of the organic EL display device 100 after the formation of the first planarization layer 108a according to Embodiment 3.
[図 10]図 10は、実施形態 3に係る CMP研磨工程中の有機 EL表示装置 100の断面 図である。 FIG. 10 is a cross-sectional view of the organic EL display device 100 during the CMP polishing process according to the third embodiment.
[図 11]図 11は、実施形態 3に係る CMP研磨工程前の第 1平坦化層 108aの形状を 点線 120で示す有機 EL表示装置 100の断面図である。 FIG. 11 is a cross-sectional view of the organic EL display device 100 in which the shape of the first planarization layer 108a before the CMP polishing process according to the third embodiment is indicated by a dotted line 120.
[図 12]図 12は、実施形態 3に係る第 2平坦化層 108b形成後の有機 EL表示装置 10 0の断面図である。 FIG. 12 is a cross-sectional view of the organic EL display device 100 after the formation of the second planarization layer 108b according to the third embodiment.
[図 13]図 13は、実施形態 3に係る第 1電極 11 la形成後の有機 EL表示装置 100の 断面図である。 FIG. 13 is a cross-sectional view of organic EL display device 100 after formation of first electrode 11 la according to Embodiment 3.
符号の説明 Explanation of symbols
D 平坦化層表面の凹凸の最大深さ D Maximum depth of unevenness on the surface of the planarization layer
H 第 1電極の厚み H Thickness of the first electrode
I , 100 有機 EL表示装置 I, 100 OLED display
10, 101 アクティブマトリクス基板 10, 101 Active matrix substrate
I I , 105 基板本体 12, 106 スイッチング素子(TFT) II, 105 Board body 12, 106 Switching element (TFT)
14 平坦化層 14 Planarization layer
14c, 114 コンタクトホーノレ 14c, 114 Contact Honoré
20, 111a 第 1電極 20, 111a 1st electrode
30 有機層 30 Organic layer
50, 111b 第 2電極 50, 111b Second electrode
108a 第 1平坦化層 108a First planarization layer
108b 第 2平坦化層 108b Second planarization layer
112 有機層 112 Organic layer
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
[0051] 以下、本発明の実施形態を図面に基づいて詳細に説明する。尚、本発明は、以下 の実施形態に限定されるものではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following embodiment.
[0052] 《発明の実施形態 1》 [0052] Embodiment 1 of the Invention
図 1及び図 2は、本発明の実施形態 1を示している。図 1は、本実施形態の有機 EL 表示装置 1を封止膜 60を省略して拡大した正面図である。図 2は、図 1の有機 EL表 示装置 1の II II部分の断面を概略的に示す図である。また、図 1及び図 2における 方向 L1は、有機 EL表示装置 1の外部への発光方向を示す。 1 and 2 show Embodiment 1 of the present invention. FIG. 1 is an enlarged front view of the organic EL display device 1 of the present embodiment with the sealing film 60 omitted. FIG. 2 is a diagram schematically showing a cross section of the II-II portion of the organic EL display device 1 of FIG. Further, a direction L1 in FIGS. 1 and 2 indicates a light emission direction to the outside of the organic EL display device 1. FIG.
[0053] 有機 EL表示装置 1は、アクティブマトリクス基板 10を備えている。 The organic EL display device 1 includes an active matrix substrate 10.
[0054] アクティブマトリクス基板 10は、基板本体 11と、スイッチング素子である複数の TFT 12及び配線 13と、平坦化層 14と、複数の第 1電極 20とを有している。基板本体 11 は、例えば、ガラス基板、プラステイク基板、シリコンウェハー等からなる半導体基板 等である。基板本体 11の一方の面には、複数の TFT12、配線 13等が形成され、こ れら TFT12及び配線 13を覆うように平坦化層 14が形成されている。各 TFT12は、 例えば、いわゆる、トップゲート型の構造をしている。 The active matrix substrate 10 includes a substrate body 11, a plurality of TFTs 12 and wirings 13 that are switching elements, a planarization layer 14, and a plurality of first electrodes 20. The substrate body 11 is, for example, a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, or the like. A plurality of TFTs 12, wirings 13 and the like are formed on one surface of the substrate body 11, and a planarization layer 14 is formed so as to cover the TFTs 12 and the wirings 13. Each TFT 12 has, for example, a so-called top gate type structure.
[0055] トップゲート型の TFT12は、ソース領域 15とドレイン領域 16とゲート電極 17とを有 している。ソース領域 15及びドレイン領域 16は、ゲート電極 17よりも基板本体 11側 に配置されている。 The top gate type TFT 12 has a source region 15, a drain region 16, and a gate electrode 17. The source region 15 and the drain region 16 are disposed closer to the substrate body 11 than the gate electrode 17.
[0056] すなわち、ソース領域 15及びドレイン領域 16は、基板本体 11上の別個の領域に 所定の間隔でそれぞれ形成されている。ソース領域 15とドレイン領域 16との間及び これらソース領域 15とドレイン領域 16とが対向する側端部領域には、例えば、多結 晶 Si、アルファモス Si、ポリ Si、 Te等からなる半導体層 18が形成されている。ソース 領域 15、ドレイン領域 16及び半導体層 18には、これらソース領域 15、ドレイン領域 1 6及び半導体層 18を覆うようにゲート絶縁膜 19が形成されている。ゲート絶縁膜 19 には、ゲート電極 17が形成され、ゲート電極 17とソース領域 15及びドレイン領域 16 とは、ゲート絶縁膜 19を介することにより互いに絶縁している。尚、 TFT12を構成す るゲート電極 17等の材料は、何ら限定されるものではなぐ公知の材料を用いること ができる。 That is, the source region 15 and the drain region 16 are formed in separate regions on the substrate body 11. Each is formed at a predetermined interval. In the side region between the source region 15 and the drain region 16 and the side region where the source region 15 and the drain region 16 face each other, for example, a semiconductor layer made of polycrystalline Si, alpha-moss Si, poly-Si, Te, etc. 18 is formed. A gate insulating film 19 is formed on the source region 15, the drain region 16 and the semiconductor layer 18 so as to cover the source region 15, the drain region 16 and the semiconductor layer 18. A gate electrode 17 is formed on the gate insulating film 19, and the gate electrode 17 and the source region 15 and the drain region 16 are insulated from each other through the gate insulating film 19. The material of the gate electrode 17 and the like constituting the TFT 12 is not limited to any known material.
[0057] 平坦化層 14の表面には、これら TFT12及び配線 13によって、わずかな凹凸が形 成されており、その凹凸の最大深さ Dは、例えば、 48nm等である。つまり、平坦化層 14表面の凹凸の最大深さ Dは、 lOOnm以下である。この平坦化層 14表面の凹凸の 最大深さ Dは、 50nm以下であることが好ましい。 [0057] On the surface of the planarization layer 14, slight irregularities are formed by the TFT 12 and the wiring 13, and the maximum depth D of the irregularities is, for example, 48 nm. That is, the maximum depth D of the unevenness on the surface of the planarizing layer 14 is lOOnm or less. The maximum depth D of the unevenness on the surface of the planarizing layer 14 is preferably 50 nm or less.
[0058] 平坦化層 14は、例えば、窒化シリコン膜 14aと、窒化シリコン膜 14a上に形成された アクリル系樹脂層 14bとにより構成されている。窒化シリコン膜 14aは、 TFT12等の 保護膜として機能する。アクリル系樹脂層 14bは、例えば、 2 111等の厚みに形成さ れている。この平坦化層 14の厚みは、 2 m以上であることが好ましい。また、図示は 省略するが、窒化シリコン膜 14aとアクリル系樹脂層 14bとの間には、ソース領域 15 に接続されたソース配線が形成されている。平坦化層 14には、各 TFT12のドレイン 領域 16上に、窒化シリコン膜 14a、アクリル系樹脂層 14b及びゲート絶縁膜 19を貫 通するコンタクトホール 14cが形成されて!/、る。 [0058] The planarization layer 14 includes, for example, a silicon nitride film 14a and an acrylic resin layer 14b formed on the silicon nitride film 14a. The silicon nitride film 14a functions as a protective film such as TFT12. The acrylic resin layer 14b is formed to a thickness of 2111, for example. The thickness of the planarizing layer 14 is preferably 2 m or more. Although illustration is omitted, a source wiring connected to the source region 15 is formed between the silicon nitride film 14a and the acrylic resin layer 14b. In the planarizing layer 14, a contact hole 14c is formed on the drain region 16 of each TFT 12 so as to penetrate the silicon nitride film 14a, the acrylic resin layer 14b, and the gate insulating film 19.
[0059] 第 1電極 20は、平坦化層 14の表面に所定の間隔でマトリクス状に複数形成されて おり、それぞれが有機 EL表示装置 1の各画素領域 35を構成している。第 1電極 20 は、大きな仕事関数を有する金属材料、例えば、 Au, Ni, Pt等により形成されており 、各第 1電極 20は、コンタクトホール 14cとそれぞれ接続されている。コンタクトホール 14cには、第 1電極 20と同様の金属材料が充填されている。第 1電極 20は、平坦化 層 14に形成されたコンタクトホール 14cを介してドレイン領域 16に電気的に接続され 、 TFT12から入力される信号に応じて、有機層 30にホールを注入する機能を有して いる。第 1電極 20の厚み Hは、例えば、 150nm等であり、平坦化層 14の表面に形成 されている凹凸の最大深さ D以上の大きさである。 A plurality of first electrodes 20 are formed in a matrix at predetermined intervals on the surface of the planarizing layer 14, and each constitutes each pixel region 35 of the organic EL display device 1. The first electrode 20 is made of a metal material having a large work function, such as Au, Ni, Pt, etc., and each first electrode 20 is connected to the contact hole 14c. The contact hole 14c is filled with the same metal material as that of the first electrode 20. The first electrode 20 is electrically connected to the drain region 16 through a contact hole 14c formed in the planarizing layer 14, and has a function of injecting holes into the organic layer 30 in accordance with a signal input from the TFT 12. Have Yes. The thickness H of the first electrode 20 is, for example, 150 nm, and is greater than the maximum depth D of the unevenness formed on the surface of the planarization layer 14.
[0060] 有機 EL表示装置 1は、各第 1電極 20の周囲に形成された絶縁層 40と、複数の第 1 電極 20に対向して配置された第 2電極 50と、第 1電極 20と第 2電極 50との間に設け られた有機層 30と、有機層 30と第 2電極 50上に形成された封止膜 60とを備えてい [0060] The organic EL display device 1 includes an insulating layer 40 formed around each first electrode 20, a second electrode 50 disposed opposite to the plurality of first electrodes 20, and a first electrode 20, An organic layer 30 provided between the second electrode 50 and a sealing film 60 formed on the organic layer 30 and the second electrode 50.
[0061] 絶縁層 40は、複数の第 1電極 20をマトリクス状に区画しており、コンタクトホール 14 c全体に重なって形成されている。すなわち、隣接する第 1電極 20は、絶縁層 40を 介することにより互いに電気的に絶縁している。コンタクトホール 14c上に絶縁層 40 が形成されていることにより、コンタクトホール 14cは画素領域 35に含まれないように なっている。絶縁層 40は、例えば、感光性ポリイミド、アクリル系樹脂、メタリル系樹脂 又はノポラック系樹脂等により形成されている。 The insulating layer 40 partitions the plurality of first electrodes 20 in a matrix and is formed so as to overlap the entire contact hole 14c. That is, the adjacent first electrodes 20 are electrically insulated from each other through the insulating layer 40. Since the insulating layer 40 is formed on the contact hole 14c, the contact hole 14c is not included in the pixel region 35. The insulating layer 40 is made of, for example, photosensitive polyimide, acrylic resin, methallyl resin, or nopolac resin.
[0062] 有機層 30は、マトリクス状に区画されたそれぞれの第 1電極 20上に形成され、第 1 電極 20と同様に絶縁層 40により区画されている。有機層 30は、ホール輸送層 31及 び発光層 32により構成されている。ホール輸送層 31は第 1電極 20側に形成され、発 光層 32は第 2電極 50側に形成されている。 The organic layer 30 is formed on each first electrode 20 partitioned in a matrix, and is partitioned by the insulating layer 40 in the same manner as the first electrode 20. The organic layer 30 includes a hole transport layer 31 and a light emitting layer 32. The hole transport layer 31 is formed on the first electrode 20 side, and the light emitting layer 32 is formed on the second electrode 50 side.
[0063] ホール輸送層 31は、第 1電極 20力、らホール輸送層 31に注入されたホールを発光 層 32に輸送する機能を有している。ホール輸送層 31は、例えば、ポリア二リン、 3, 4 ポリエチレンジォキシチォフェン/ポリスチレンサルフォネート(PEDT/PSS)、ポ リ(トリフエニルァミン誘導体)、ポリビュル力ルバゾール(PVCz)等のホール輸送材料 である有機高分子材料等により形成されている。 The hole transport layer 31 has a function of transporting the holes injected into the hole transport layer 31 from the first electrode 20 force to the light emitting layer 32. The hole transport layer 31 is made of, for example, polyaniline, 3, 4 polyethylene dioxythiophene / polystyrene sulfonate (PEDT / PSS), poly (triphenylamine derivative), polybulur rubazole (PVCz), etc. It is made of an organic polymer material that is a hole transport material.
[0064] 発光層 32は、第 1電極 20からホール輸送層 31を介して発光層 32に注入されたホ ールと、第 2電極 50から注入された電子とを受け取って、それらを再結合させることに より、発光する機能を有している。発光層 32は、例えば、一種類又は多種類の発光 材料である有機高分子材料を含んで形成されている。発光層 32に用いられる有機 高分子材料としては、例えば、ポリ(2 デルォキシ一 1、 4 フエ二レン) (DO-PPP )、ポリ [2、 5 ビス一 [2— (N, N, N—トリェチルアンモニゥム)エトキシ ]ー1、 4 フエ 二ルーアルト一 1、 4—フエニルレン]ジブロマイド(PPP— NEt3+)、ポリ [2— (2,—ェ チルへキシルォキシ) 5—メトキシー 1、 4 フエ二レンビニレン] (MEH— PPV)等 力 S挙げられる。また、発光層 32は、その他に、レべリング剤、発光アシスト剤、添加剤 、電荷輸送剤、発光性のドーパント等を含んで形成されていてもよい。添加剤は、例 えば、ドナー、ァクセプター等である。 [0064] The light emitting layer 32 receives holes injected into the light emitting layer 32 from the first electrode 20 through the hole transport layer 31 and electrons injected from the second electrode 50, and recombines them. It has a function to emit light. The light emitting layer 32 is formed including, for example, an organic polymer material that is one or more kinds of light emitting materials. Examples of organic polymer materials used in the light emitting layer 32 include poly (2 deloxy-1,4 phenylene) (DO-PPP), poly [2,5 bis [2— (N, N, N— Triethylammonium) ethoxy] -1,4 Hue 2-rualto 1,4-Fuenyllene] dibromide (PPP— NEt 3+ ), poly [2— (2, — Tilhexyloxy) 5-methoxy-1,4 phenylenevinylene] (MEH-PPV), etc. S In addition, the light emitting layer 32 may include a leveling agent, a light emission assisting agent, an additive, a charge transporting agent, a light emitting dopant, and the like. Examples of the additive include a donor and an acceptor.
[0065] 第 2電極 50は、例えば、絶縁層 40及び有機層 30を覆うように形成されている。第 2 電極 50は、有機層 30に電子を注入する機能を有し、金属層 51と、金属層 51に形成 された透明電極層 52とから構成されている。第 2電極 50は、有機層 30及び絶縁層 4 0側に、低い仕事関数を有する金属材料、例えば、 Ca等を 5%含む A1等からなる金 属層 51を有している。金属層 51は、例えば、 ITO, IZO, ZnO, SnO等からなる透 The second electrode 50 is formed so as to cover the insulating layer 40 and the organic layer 30, for example. The second electrode 50 has a function of injecting electrons into the organic layer 30 and includes a metal layer 51 and a transparent electrode layer 52 formed on the metal layer 51. The second electrode 50 has a metal layer 51 made of a metal material having a low work function, for example, A1 containing 5% of Ca or the like on the organic layer 30 and the insulating layer 40 side. The metal layer 51 is made of, for example, a transparent material made of ITO, IZO, ZnO, SnO or the like.
2 2
明電極層 52等の導電酸化物に覆われている。 It is covered with a conductive oxide such as the bright electrode layer 52.
[0066] 封止膜 60は、有機層 30と第 2電極 50を大気中の水分から保護するために、第 2電 極 50を覆うように形成されている。封止膜 60は、例えば、ガラスやプラスティック等に より形成されている。このように、有機 EL表示装置 1は、 TFT12により第 1電極 20に 印加する電圧をスイッチングする。そうして、第 1電極 20と第 2電極 50との間に電圧を 印加することによって有機層 30を発光させる。その発光は、第 2電極 50側から取り出 されるようになつている。 The sealing film 60 is formed so as to cover the second electrode 50 in order to protect the organic layer 30 and the second electrode 50 from moisture in the atmosphere. The sealing film 60 is formed of, for example, glass or plastic. Thus, the organic EL display device 1 switches the voltage applied to the first electrode 20 by the TFT 12. Then, a voltage is applied between the first electrode 20 and the second electrode 50 to cause the organic layer 30 to emit light. The emitted light is extracted from the second electrode 50 side.
[0067] 製造方法 [0067] Manufacturing method
有機 EL表示装置 1の製造方法には、平坦化層形成工程と、第 1電極形成工程と、 有機層形成工程と、第 2電極形成工程とが含まれる。 The manufacturing method of the organic EL display device 1 includes a planarization layer forming step, a first electrode forming step, an organic layer forming step, and a second electrode forming step.
[0068] この製造方法で用いられる基板本体 11には、一般的な製造方法により予めトップ ゲート型の TFT12及び配線 13等が形成されている。 [0068] The substrate body 11 used in this manufacturing method is provided with a top gate TFT 12 and wirings 13 in advance by a general manufacturing method.
[0069] 平坦化層形成工程では、複数の TFT12及び配線 13等が形成された基板本体 11 に対し、 TFT12を覆う平坦化層 14を形成すると共に平坦化層 14に複数のコンタクト ホール 14cを形成する。 [0069] In the planarization layer forming step, the planarization layer 14 covering the TFT 12 is formed on the substrate body 11 on which the plurality of TFTs 12, the wirings 13 and the like are formed, and the plurality of contact holes 14c are formed in the planarization layer 14. To do.
[0070] まず、 TFT12等の保護膜として機能する窒化シリコン膜 14aを、例えば、プラズマ CVD法等により基板本体 11の表面に形成する。次に、エッチング等を施すことによ り、各 TFT12のソース領域 15及びドレイン領域 16上に、窒化シリコン膜 14a及びゲ ート絶縁膜 19を貫通するコンタクトホール(図示省略)を形成する。その後、ソース領 域 15に接続されたソース配線(図示省略)をパターン形成する。 First, a silicon nitride film 14a that functions as a protective film such as TFT 12 is formed on the surface of the substrate body 11 by, for example, a plasma CVD method or the like. Next, contact holes (not shown) penetrating the silicon nitride film 14a and the gate insulating film 19 are formed on the source region 15 and the drain region 16 of each TFT 12 by etching or the like. Then source region A source wiring (not shown) connected to the region 15 is patterned.
[0071] 次に、アクリル系樹脂層 14bを、スピンコート法等により窒化シリコン膜 14aに積層 する。アクリル系樹脂層 14bの厚みは、例えば、 4 m等の大きさに形成する。その後 、先にドレイン領域 16上に形成されたコンタクトホールと同様の位置に、窒化シリコン 膜 14a及びアクリル系樹脂層 14bを貫通するコンタクトホール 14cを、エッチング等を 施すことにより形成する。ここで、平坦化層 14は、アクリル系樹脂、エポキシ系樹脂、 ポリイミド系樹脂、 SOG (Spin on Glass)等により形成されていてもよぐ平坦化層 14 に用いられる公知の材料により形成することができる。 [0071] Next, the acrylic resin layer 14b is laminated on the silicon nitride film 14a by spin coating or the like. The acrylic resin layer 14b is formed to have a thickness of 4 m, for example. Thereafter, a contact hole 14c penetrating through the silicon nitride film 14a and the acrylic resin layer 14b is formed at the same position as the contact hole previously formed on the drain region 16 by etching or the like. Here, the planarizing layer 14 is formed of a known material used for the planarizing layer 14 which may be formed of acrylic resin, epoxy resin, polyimide resin, SOG (Spin on Glass), or the like. Can do.
[0072] その後、平坦化層 14の表面に、 CMP (Chemical Mechanical Polishing)等により研 磨処理を行い、平坦化層 14の厚みを、例えば、 2 in等に低減すると共に平坦化層 14の表面に形成される凹凸の最大深さ Dを、例えば、 48nm等の大きさにする。そう して、平坦化層 14表面の凹凸の最大深さ Dが、 l OOnm以下になるように平坦化層 1 4を形成する。このとき、好ましくは、平坦化層 14の表面の凹凸の最大深さ D力 50η m以下になるように平坦化層 14を形成する。また、このとき、平坦化層 14の厚みは、 2 μ m以上に形成することが好まし!/、。 [0072] Thereafter, the surface of the planarization layer 14 is polished by CMP (Chemical Mechanical Polishing) or the like, and the thickness of the planarization layer 14 is reduced to, for example, 2 inches, and the surface of the planarization layer 14 The maximum depth D of the irregularities formed on the substrate is set to a size of 48 nm, for example. Then, the planarization layer 14 is formed so that the maximum depth D of the unevenness on the surface of the planarization layer 14 is lOOnm or less. At this time, the planarizing layer 14 is preferably formed so that the maximum depth D of the unevenness on the surface of the planarizing layer 14 is 50 ηm or less. At this time, the thickness of the planarizing layer 14 is preferably 2 μm or more! / ,.
[0073] 次に行う第 1電極形成工程では、複数の第 1電極 20を、所定の間隔で形成すると 共にコンタクトホール 14cを介して TFT12に電気的に接続する。まず、例えば、 Au, Ni, Pt等の大きな仕事関数を有する金属材料の膜を、スパッタ法等の公知の成膜方 法により成膜する。このとき、コンタクトホール 14cにも上記金属材料が充填される。次 に、フォトリソグラフィ一法等を用いることにより成膜した金属材料膜を所定の間隔で マトリクス状にパターユングして矩形の第 1電極 20を複数形成する。このとき、第 1電 極 20の厚み H力 例えば、 150nm等、すなわち、平坦化層 14表面の凹凸の最大深 さ D以上の大きさになるように第 1電極 20を形成する。 In the first electrode forming step to be performed next, a plurality of first electrodes 20 are formed at a predetermined interval and electrically connected to the TFT 12 through the contact hole 14c. First, a film of a metal material having a large work function such as Au, Ni, Pt or the like is formed by a known film formation method such as sputtering. At this time, the contact hole 14c is also filled with the metal material. Next, a plurality of rectangular first electrodes 20 are formed by patterning a metal material film formed by using a photolithography method or the like in a matrix at predetermined intervals. At this time, the first electrode 20 is formed so that the thickness H force of the first electrode 20 is, for example, 150 nm or the like, that is, the size of the maximum depth D of the unevenness on the surface of the planarizing layer 14.
[0074] その後、複数の第 1電極 20をマトリクス状に区画して、隣接する第 1電極 20を互い に電気的に絶縁する絶縁層 40を形成する。絶縁層 40は、例えば、フォトリソグラフィ 一法等により、各第 1電極 20の周囲を取り囲んで第 1電極 20のエッジを覆う枠状に パターン形成する。このとき、絶縁層 40は、コンタクトホール 14cの全体に重なるよう に形成される。 [0075] 次に行う有機層形成工程では、第 1電極 20の露出している部分を覆うように、ホー ル輸送層 31及び発光層 32から構成される有機層 30を形成する。まず、溶剤にホー ル輸送材料である有機高分子材料を溶解又は分散させたホール輸送材料塗料を、 インクジェット法等により露出している第 1電極 20を覆うように供給する。その後、基板 本体 11に焼成処理を施すことによりホール輸送層 31を形成する。次に、溶剤に発光 材料である有機高分子材料を溶解又は分散させた有機発光材料塗料を、インクジェ ット法等によりホール輸送層 31を覆うように供給する。その後、基板本体 11に焼成処 理を施すことにより発光層 32を形成する。溶剤は、例えば、純水等を用いる。 [0074] Thereafter, the plurality of first electrodes 20 are partitioned in a matrix, and the insulating layer 40 that electrically insulates the adjacent first electrodes 20 from each other is formed. The insulating layer 40 is patterned into a frame shape surrounding the periphery of each first electrode 20 and covering the edge of the first electrode 20 by, for example, a photolithography method or the like. At this time, the insulating layer 40 is formed so as to overlap the entire contact hole 14c. In the organic layer forming step to be performed next, the organic layer 30 composed of the hole transport layer 31 and the light emitting layer 32 is formed so as to cover the exposed portion of the first electrode 20. First, a hole transport material paint in which an organic polymer material that is a hole transport material is dissolved or dispersed in a solvent is supplied so as to cover the exposed first electrode 20 by an inkjet method or the like. Thereafter, the hole transport layer 31 is formed by baking the substrate body 11. Next, an organic light emitting material coating material in which an organic polymer material as a light emitting material is dissolved or dispersed in a solvent is supplied so as to cover the hole transport layer 31 by an inkjet method or the like. Thereafter, the substrate body 11 is subjected to a firing process to form the light emitting layer 32. For example, pure water or the like is used as the solvent.
[0076] その後に行う第 2電極形成工程では、例えば、有機層 30及び絶縁層 40を覆うよう に、金属層 51及び透明電極層 52等からなる第 2電極 50を形成する。まず、例えば、 Caを 5%含む A なる金属層 51を、抵抗加熱蒸着法等により有機層 30及び絶縁 層 40の表面に形成する。その後、 ITO, IZO, ZnO, SnO等からなる透明電極層 5 In the subsequent second electrode formation step, for example, the second electrode 50 including the metal layer 51 and the transparent electrode layer 52 is formed so as to cover the organic layer 30 and the insulating layer 40. First, for example, a metal layer 51 made of A containing 5% Ca is formed on the surfaces of the organic layer 30 and the insulating layer 40 by resistance heating vapor deposition or the like. Thereafter, a transparent electrode layer made of ITO, IZO, ZnO, SnO, etc. 5
2 2
2を、 DCスパッタ法等により金属層 51を覆うように形成する。 2 is formed so as to cover the metal layer 51 by DC sputtering or the like.
[0077] その後、第 2電極 50上に、プラズマ CVD法等により封止膜 60を有機層 30と第 2電 極 50を覆うように形成する。 Thereafter, the sealing film 60 is formed on the second electrode 50 so as to cover the organic layer 30 and the second electrode 50 by a plasma CVD method or the like.
[0078] 尚、上記実施形態では、第 1電極 20の厚み Hは、 150nmであり、平坦化層 14の凹 凸の最大深さ Dは 48nmであるとした力 本発明はこれに限られず、平坦化層 14表 面の凹凸の最大深さ Dが、 lOOnm以下になるように平坦化層 14が形成され、第 1電 極 20の厚み H力 平坦化層 14の凹凸の最大深さ D以上の大きさになるように第 1電 極 20が形成されて!/、ればよ!/、。 In the above embodiment, the force that the thickness H of the first electrode 20 is 150 nm and the maximum depth D of the unevenness of the planarization layer 14 is 48 nm. The present invention is not limited to this. Flattening layer 14 The flattening layer 14 is formed so that the maximum depth D of the surface irregularities is lOOnm or less, and the thickness of the first electrode 20 H force The maximum unevenness depth D of the flattening layer 14 or more The first electrode 20 is formed so as to have a size of! /.
[0079] 一実施形態 1の効果 [0079] Effect of Embodiment 1
この実施形態 1によると、第 1電極 20の厚み H力 平坦化層 14の表面に形成されて いる凹凸の最大深さ D以上の大きさであることにより、第 1電極 20表面の平坦性を向 上させることができるため、有機層 30の厚みの均一性が向上する。その結果、画素 欠陥を低減して、表示品質を向上させることができる。 According to the first embodiment, the thickness of the first electrode 20 is equal to or greater than the maximum depth D of the unevenness formed on the surface of the flattening layer 14, so that the flatness of the surface of the first electrode 20 is reduced. Since the thickness can be improved, the uniformity of the thickness of the organic layer 30 is improved. As a result, pixel defects can be reduced and display quality can be improved.
[0080] ところで、仮に、平坦化層 14に形成されている凹凸の最大深さ D力 lOOnmよりも 大きい場合には、第 1電極 20の平坦性が低下して、有機層 30の厚みが不均一にな りやすい。したがって、輝度分布の均一性が低下しやすい。 [0081] これに対し、平坦化層 14の凹凸の最大深さ D力 S、 lOOnm以下であることによって、 平坦化層 14表面の凹凸による影響が少なくなつて、第 1電極の表面の平坦性を向上 させること力 Sできる。そうして、有機層 30の厚みの均一性をより向上させることができる 。その結果、輝度分布の均一性を向上させて、表示品質を向上させることができる。 By the way, if the maximum depth D force lOOnm of the unevenness formed in the planarization layer 14 is larger than the flatness of the first electrode 20, the planarity of the first electrode 20 is deteriorated and the thickness of the organic layer 30 is unsatisfactory. It tends to be uniform. Therefore, the uniformity of the luminance distribution tends to be reduced. [0081] On the other hand, since the maximum depth D of the flattening layer 14 is D force S, lOOnm or less, the influence of the unevenness of the surface of the flattening layer 14 is reduced, and the flatness of the surface of the first electrode is reduced. Power S can be improved. Thus, the thickness uniformity of the organic layer 30 can be further improved. As a result, the uniformity of the luminance distribution can be improved and the display quality can be improved.
[0082] さらに、有機 EL表示装置 1は、有機層 30の発光を第 2電極 50側から取り出すトツ プェミッション方式であるため、光を透過しない TFT12や配線 13等によって遮られる ことなく有機層 30の発光を取り出せる。その結果、ボトムェミッション方式の EL表示 装置よりも開口率を大きくすることができる。 [0082] Further, since the organic EL display device 1 is a top emission method in which the light emitted from the organic layer 30 is extracted from the second electrode 50 side, the organic layer is not blocked by the TFT 12 or the wiring 13 that does not transmit light. 30 luminescence can be extracted. As a result, the aperture ratio can be made larger than the bottom emission type EL display device.
[0083] また、第 1電極形成工程において、第 1電極 20の厚み H力、平坦化層 14表面の凹 凸の最大深さ D以上の大きさになるように第 1電極 20が形成される。このため、第 1電 極 20表面の平坦性を向上させることができる。その結果、画素欠陥を低減して、表示 品質を向上させることができる。 Further, in the first electrode forming step, the first electrode 20 is formed so that the thickness H force of the first electrode 20 and the maximum depth D of the concave and convex on the surface of the planarizing layer 14 are not less than D. . For this reason, the flatness of the surface of the first electrode 20 can be improved. As a result, pixel defects can be reduced and display quality can be improved.
[0084] さらに、平坦化層形成工程において、平坦化層 14の凹凸の最大深さ D力 l OOnm 以下になるように平坦化層 14が形成される。このため、第 1電極 20表面の平坦性を 向上させること力 Sできる。その結果、輝度分布の均一性を向上させて、表示品質を向 上させること力 Sでさる。 Further, in the planarization layer forming step, the planarization layer 14 is formed so that the maximum depth D of the planarization layer 14 is less than D force l OOnm. For this reason, it is possible to improve the flatness of the surface of the first electrode 20. As a result, the power S improves the uniformity of the luminance distribution and improves the display quality.
[0085] さらに、上記平坦化層形成工程において、平坦化層 14の表面に研磨処理を行う。 Further, in the planarization layer forming step, the surface of the planarization layer 14 is polished.
このため、平坦化層 14の厚みを比較的大きくすることなぐ平坦化層 14の凹凸の最 大深さ Dを lOOnm以下の大きさにすることができる。その結果、平坦化層 14を比較 的薄く形成することができるため、有機 EL表示装置 1の薄型化を図ることができる。 For this reason, the maximum depth D of the unevenness of the planarizing layer 14 can be made less than lOOnm without increasing the thickness of the planarizing layer 14 relatively. As a result, since the planarization layer 14 can be formed relatively thin, the organic EL display device 1 can be thinned.
[0086] さらに、有機層形成工程において、有機高分子材料を含む有機層 30をインクジェ ット法により形成しているため、真空プロセスを施すことなぐ有機層 30を形成するこ とができる。その結果、生産性を向上させることができると共に製造コストを低減させる こと力 Sでさる。 [0086] Further, in the organic layer forming step, since the organic layer 30 containing the organic polymer material is formed by the inkjet method, it is possible to form the organic layer 30 without performing a vacuum process. As a result, productivity can be improved and manufacturing cost can be reduced with the power S.
[0087] 《発明の実施形態 2》 << Embodiment 2 of the Invention >>
図 3は、本発明の実施形態 2を示している。尚、以降の各実施形態では、図 1及び 図 2と同じ部分については同じ符号を付して、その詳細な説明を省略する。図 3は、 本実施形態の有機 EL表示装置 1の断面を概略的に示す図である。 [0088] 実施形態 1の有機 EL表示装置 1は、基板本体 11にトップゲート型の TFT12が形 成されているのに対し、本実施形態の有機 EL表示装置 1は、図 3に示すように、基板 本体 11にボトムゲート型の TFT12が形成されて!/、る。 FIG. 3 shows Embodiment 2 of the present invention. In the following embodiments, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof is omitted. FIG. 3 is a diagram schematically showing a cross section of the organic EL display device 1 of the present embodiment. In the organic EL display device 1 of the first embodiment, the top gate type TFT 12 is formed on the substrate body 11, whereas the organic EL display device 1 of the present embodiment is as shown in FIG. A bottom-gate TFT 12 is formed on the substrate body 11! /.
[0089] ボトムゲート型の TFT12は、ソース領域 70及びドレイン領域 71と、ゲート電極 72と を有し、ゲート電極 72は、ソース領域 70及びドレイン領域 71よりも基板本体 11側に 配置されている。すなわち、基板本体 11にゲート電極 72が形成されており、ゲート電 極 72を覆うようにゲート絶縁膜 19が形成されている。ゲート絶縁膜 19には、ゲート絶 縁膜 19を介することによりゲート電極 72と絶縁している島状の半導体層 73が、ゲート 電極 72を覆うように形成されている。島状の半導体層 73には、ドレイン領域 71及び ソース領域 70がそれぞれ別々の領域に互いに接触することなく形成されている。す なわち、ゲート電極 72とソース領域 70及びドレイン領域 71とは、ゲート絶縁膜 19を 介することにより絶縁している。尚、このボトムゲート型の TFT12を構成する材料は、 何ら限定されるものではなぐ上記実施形態 1のトップゲート型の TFT12と同様に公 知の材料を用いることができる。 The bottom gate TFT 12 includes a source region 70 and a drain region 71, and a gate electrode 72. The gate electrode 72 is disposed closer to the substrate body 11 than the source region 70 and the drain region 71. . That is, the gate electrode 72 is formed on the substrate body 11, and the gate insulating film 19 is formed so as to cover the gate electrode 72. In the gate insulating film 19, an island-shaped semiconductor layer 73 that is insulated from the gate electrode 72 through the gate insulating film 19 is formed so as to cover the gate electrode 72. In the island-shaped semiconductor layer 73, the drain region 71 and the source region 70 are formed in separate regions without contacting each other. In other words, the gate electrode 72 is insulated from the source region 70 and the drain region 71 through the gate insulating film 19. The material constituting the bottom gate type TFT 12 is not limited in any way, and a known material can be used similarly to the top gate type TFT 12 of the first embodiment.
[0090] 一実施形態 2の効果 [0090] Effect of Embodiment 2
したがって、この実施形態 2によると、ボトムゲート型の TFT12が基板本体 11に形 成されている場合にも、平坦化層 14が形成される前の基板本体 11の表面には、トツ プゲート型の TFT12が基板本体 11に形成されて!/、る場合と同程度の最大深さを有 する凹凸が形成される。このため、本実施形態においても、実施形態 1と同様の効果 を得ること力 Sでさる。 Therefore, according to the second embodiment, even when the bottom gate TFT 12 is formed on the substrate body 11, the top gate type TFT 12 is not formed on the surface of the substrate body 11 before the planarization layer 14 is formed. The TFT 12 is formed on the substrate body 11 to form irregularities having the same maximum depth as that of the case! For this reason, in this embodiment, the force S can be obtained to obtain the same effect as in the first embodiment.
[0091] 《発明の実施形態 3》 << Embodiment 3 of the Invention >>
図 7は、本発明の実施形態 3に係る有機 EL表示装置 100の断面図を示す。 FIG. 7 shows a cross-sectional view of an organic EL display device 100 according to Embodiment 3 of the present invention.
[0092] 有機 EL表示装置 100は、アクティブマトリクス基板 101、アクティブマトリクス基板 1 01上に形成された有機 EL部 102及び有機 EL部 102上に形成された絶縁膜 103及 び封止基板 104を備えている。 The organic EL display device 100 includes an active matrix substrate 101, an organic EL portion 102 formed on the active matrix substrate 101, an insulating film 103 formed on the organic EL portion 102, and a sealing substrate 104. ing.
[0093] アクティブマトリクス基板 101は、基板本体 105と、スイッチング素子である複数の T FT106及び配線 107と、第 1平坦化層 108a及び第 2平坦化層 108bとを有している 。アクティブマトリクス基板 101に形成される TFT106は、トップゲート型であってもよ く、また、ボトムゲート型であってもよい。 The active matrix substrate 101 includes a substrate body 105, a plurality of TFTs 106 and wirings 107 that are switching elements, and a first planarization layer 108a and a second planarization layer 108b. The TFT 106 formed on the active matrix substrate 101 may be a top gate type. In addition, a bottom gate type may be used.
[0094] 基板本体 105は、例えば、ガラス基板、プラステイク基板、シリコンウェハー等からな る半導体基板等である。基板本体 105の一方の面には、それぞれゲート電極 109a や TFT電極 109b等を有する複数の TFT106、配線 107等が形成されている。 TFT[0094] The substrate body 105 is, for example, a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, or the like. On one surface of the substrate body 105, a plurality of TFTs 106 each having a gate electrode 109a, a TFT electrode 109b, and the like, wirings 107, and the like are formed. TFT
106及び配線 107を覆うように、層間絶縁膜 110、第 1平坦化層 108a及び第 2平坦 化層 108bが形成されている。 An interlayer insulating film 110, a first planarizing layer 108a, and a second planarizing layer 108b are formed so as to cover 106 and the wiring 107.
[0095] 層間絶縁膜 110は、例えば、酸化シリコン膜、窒化シリコン膜等で形成されている。 The interlayer insulating film 110 is formed of, for example, a silicon oxide film, a silicon nitride film, or the like.
[0096] 第 1平坦化層 108aは、 TFT106を覆うように且つ表面の凹凸の最大深さが 50mm 以上且つ 200mm以下に形成されて!/、る。 The first planarization layer 108a is formed so as to cover the TFT 106 and have a maximum depth of unevenness on the surface of 50 mm or more and 200 mm or less.
[0097] 第 2平坦化層 108bは、第 1平坦化層 108a上で、表面の凹凸の最大深さが 100m m以下に形成されている。第 2平坦化層 108bは、本実施形態のように 1層で構成さ れて!/、なくてもよく、複数の層で構成されてレ、てもよレ、。 The second planarization layer 108b is formed on the first planarization layer 108a so that the maximum depth of surface irregularities is 100 mm or less. The second planarizing layer 108b may be formed of a single layer as in the present embodiment! / May not be formed, and may be formed of a plurality of layers.
[0098] 第 1平坦化層 108a及び第 2平坦化層 108bは、それぞれ例えば、アクリル系、ェポ キシ系、ポリイミド系、ポリアミド系、ポリイミドアミド等の樹脂層、 SOG (Spin on Glass) 等の液状ガラス材料等が好適に用いられる。 [0098] The first flattening layer 108a and the second flattening layer 108b are, for example, resin layers such as acrylic, epoxy, polyimide, polyamide, and polyimideamide, SOG (Spin on Glass), and the like. A liquid glass material or the like is preferably used.
[0099] 有機 EL部 102は、各々離間して設けられた複数の第 1電極 11 la (陽極)、第 1電 極 11 la上に設けられた有機層 112、第 1電極 11 l aのエッジ部を覆うように設けられ た絶縁層 113、及び、これらを覆うように設けられた第 2電極 11 lb (陰極)で構成され ている。 [0099] The organic EL portion 102 includes a plurality of first electrodes 11la (anode) provided separately from each other, an organic layer 112 provided on the first electrode 11la, and an edge portion of the first electrode 11la. The insulating layer 113 is provided so as to cover the electrode, and the second electrode 11 lb (cathode) is provided so as to cover the insulating layer 113.
[0100] 第 1電極 11 laは、第 2平坦化層 108bの表面に所定の間隔でマトリクス状に複数形 成されている。第 1電極 11 laは、それぞれ矩形に形成されており、それぞれが有機 E L表示装置 100の各画素領域を構成している。各第 1電極 11 laは、コンタクトホール 114とそれぞれ接続されている。コンタクトホール 114には、第 1電極 11 laと同様の 金属材料が充填されている。このようにして、第 1電極 111aは、第 1平坦化層 108a 及び第 2平坦化層 108bに形成されたコンタクトホール 114を介して TFT電極 109b に電気的に接続され、 TFT106から入力される信号に応じて、有機層 112にホール を注入する機能を有している。第 1電極 111aの厚みは、例えば、 150nm等であり、 第 2平坦化層 108bの表面に形成されている凹凸の最大深さ以上の大きさである。 [0101] 絶縁層 113は、複数の第 1電極 111aをマトリクス状に区画しており、コンタクトホー ノレ 114全体に重なって形成されている。すなわち、隣接する第 1電極 11 laは、絶縁 層 113を介することにより互いに電気的に絶縁して!/、る。コンタクトホール 114上に絶 縁層 113が形成されて!/、ることにより、コンタクトホール 18は画素領域に含まれな!/、よ うになつている。絶縁層 113は、例えば、感光性ポリイミド、アクリル系樹脂、メタリル系 樹脂又はノポラック系樹脂等により形成されている。 [0100] A plurality of first electrodes 11la are formed in a matrix at predetermined intervals on the surface of the second planarization layer 108b. Each of the first electrodes 11 la is formed in a rectangular shape, and each of the first electrodes 11 la constitutes each pixel region of the organic EL display device 100. Each first electrode 11 la is connected to a contact hole 114. The contact hole 114 is filled with the same metal material as the first electrode 11 la. In this way, the first electrode 111a is electrically connected to the TFT electrode 109b via the contact hole 114 formed in the first planarization layer 108a and the second planarization layer 108b, and the signal input from the TFT 106 Accordingly, the organic layer 112 has a function of injecting holes. The thickness of the first electrode 111a is, for example, 150 nm, and is larger than the maximum depth of the unevenness formed on the surface of the second planarization layer 108b. [0101] The insulating layer 113 partitions the plurality of first electrodes 111a in a matrix and is formed so as to overlap the entire contact hole 114. That is, the adjacent first electrodes 11 la are electrically insulated from each other through the insulating layer 113. Since the insulating layer 113 is formed on the contact hole 114! /, The contact hole 18 is not included in the pixel region! /. The insulating layer 113 is made of, for example, photosensitive polyimide, acrylic resin, methallyl resin, or nopolac resin.
[0102] 有機層 112は、マトリクス状に区画されたそれぞれの第 1電極 111a上に形成され、 第 1電極 1 1 laと同様に絶縁層 113により区画されている。有機層 112は、ホール輸 送層 112a、発光層 112b及び電子注入層 112cで構成されて!/、る。 [0102] The organic layer 112 is formed on each first electrode 111a partitioned in a matrix, and is partitioned by the insulating layer 113 in the same manner as the first electrode 11 la. The organic layer 112 includes a hole transport layer 112a, a light emitting layer 112b, and an electron injection layer 112c.
[0103] ホール輸送層 112aは、第 1電極 111aからホール輸送層 112aに注入されたホー ルを発光層 32に輸送する機能を有している。ホール輸送層 112aは、例えば、ポリア 二リン等のホール輸送材料である有機高分子材料等により形成されている。 The hole transport layer 112a has a function of transporting holes injected from the first electrode 111a to the hole transport layer 112a to the light emitting layer 32. The hole transport layer 112a is formed of, for example, an organic polymer material that is a hole transport material such as polyaniline.
[0104] 発光層 112bは、第 1電極 111aからホール輸送層 112aを介して発光層 112bに注 入されたホールと、第 2電極 11 lbから注入された電子とを受け取って、それらを再結 合させることにより、発光する機能を有している。発光層 112bは、例えば、一種類又 は多種類の発光材料である有機高分子材料を含んで形成されている。発光層 1 12b に用いられる有機高分子材料としては、例えば、ポリ(2—デルォキシ一 1、 4 フエ二 レン)(DO— PPP)等が用いられる。発光層 112bは、その他に、レべリング剤、発光 アシスト剤、添加剤、電荷輸送剤、発光性のドーパント等を含んで形成されていても よい。添加剤は、例えば、ドナー、ァクセプター等である。 [0104] The light-emitting layer 112b receives holes injected from the first electrode 111a through the hole transport layer 112a into the light-emitting layer 112b and electrons injected from the second electrode 11lb, and recombines them. By combining them, it has a function of emitting light. The light emitting layer 112b is formed including, for example, an organic polymer material which is one kind or many kinds of light emitting materials. As the organic polymer material used for the light emitting layer 1 12b, for example, poly (2-deoxy-1,4-phenylene) (DO-PPP) or the like is used. In addition, the light emitting layer 112b may include a leveling agent, a light emission assisting agent, an additive, a charge transporting agent, a light emitting dopant, and the like. Additives are a donor, an acceptor, etc., for example.
[0105] 第 2電極 111bは、有機層 112に電子を注入する機能を有する。第 2電極 111bとし ては、例えば、 Ca等を 5%含む A傳からなる金属等で構成された仕事関数の小さな ( 仕事関数 4. OeV以下)材料が好ましい。これは、多くの有機材料は金属や無機半導 体に比べて電子親和力が小さいために電子注入のためには仕事関数の小さな電極 が必要となるためである。 [0105] The second electrode 111b has a function of injecting electrons into the organic layer 112. As the second electrode 111b, for example, a material having a small work function (work function 4. OeV or less) made of a metal made of A and containing 5% of Ca or the like is preferable. This is because many organic materials have a lower electron affinity than metals and inorganic semiconductors, and thus an electrode with a low work function is required for electron injection.
[0106] 絶縁膜 103は、珪素、酸素、窒素を含む膜、例えば、酸化シリコン膜、窒化シリコン 膜等で構成されている。 The insulating film 103 is composed of a film containing silicon, oxygen, and nitrogen, for example, a silicon oxide film, a silicon nitride film, or the like.
[0107] 封止基板 104は、第 2電極 11 lbを大気中の水分から保護するために、第 2電極 11 lbを覆うように形成されている。封止基板 104は、例えば、ガラスやブラスティック等 により形成されている。 [0107] The sealing substrate 104 has a second electrode 11 in order to protect the second electrode 11 lb from moisture in the atmosphere. It is formed to cover lb. The sealing substrate 104 is made of, for example, glass or plastic.
[0108] 製造方法 [0108] Manufacturing Method
本発明の実施形態 3に係る有機 EL表示装置 100を構成する製造プロセスについ て、図を用いて詳細に説明する。図 8〜; 13は本発明の実施形態 3に係る薄膜トランジ スタを備えたアクティブマトリクス型有機 EL表示装置 100の製造方法を示す工程図 である。 A manufacturing process constituting the organic EL display device 100 according to Embodiment 3 of the present invention will be described in detail with reference to the drawings. FIGS. 8 to 13 are process diagrams illustrating a method of manufacturing the active matrix organic EL display device 100 including the thin film transistor according to the third embodiment of the present invention.
[0109] まず、図 8に示すように、基板本体 105上に TFT106及び配線 107を形成し、 TFT 106及び配線 107上に保護膜として層間絶縁膜 110を形成する。ここで形成される 層間絶縁膜 110は公知の技術 (減圧 CVD法、プラズマ CVD法、熱酸化法等)により 形成する。 First, as shown in FIG. 8, the TFT 106 and the wiring 107 are formed on the substrate body 105, and the interlayer insulating film 110 is formed on the TFT 106 and the wiring 107 as a protective film. The interlayer insulating film 110 formed here is formed by a known technique (such as a low pressure CVD method, a plasma CVD method, or a thermal oxidation method).
[0110] 次に、図 9に示すように、第 1平坦化層 108aを形成する。第 1平坦化層 108aの形 成は、スピンコート法やその他の塗布法によって行い、塗布後、直ちに焼成を行なう 。第 1平坦化層 108aは、その層間絶縁機能として、少なくとも 2 m以上の膜厚があ ることが好ましい。 Next, as shown in FIG. 9, the first planarizing layer 108a is formed. The first planarizing layer 108a is formed by spin coating or other coating method, and is fired immediately after coating. The first planarizing layer 108a preferably has a film thickness of at least 2 m as an interlayer insulating function.
[0111] 次いで、この第 1平坦化層 108aにリソグラフィ一法によってコンタクトホール 114を 形成する。 Next, a contact hole 114 is formed in the first planarizing layer 108a by a lithography method.
[0112] 次に、図 10に示すように、形成された第 1平坦化層 108aの凹凸の大きさを研磨処 理により低減する。ここで、図 10の方向 C1は、第 1平坦化層 108aに対する研磨処理 方向を示している。 [0112] Next, as shown in FIG. 10, the size of the unevenness of the formed first planarization layer 108a is reduced by a polishing process. Here, a direction C1 in FIG. 10 indicates a polishing process direction with respect to the first planarization layer 108a.
[0113] 研磨後の第 1平坦化層 108aの凹凸の最大深さは 50nm以上且つ 200nm以下に することが好ましい。ここで、図 11は、図 10に対し、 CMP研磨工程前の第 1平坦化 層 108aの形状を点線 120で示す有機 EL表示装置 100の断面図である。図 11は、 研磨処理によって第 1平坦化層 108aの凹凸が低減されることを表している。研磨処 理においては、 nmオーダーで平坦性に優れ、高い精度で研磨量を制御できる化学 的機械的研磨(CMP法)を用いる。 CMP法とは薬液による化学的なエッチングと微 細な砥粒による機械的な研磨によって被研磨部材の処理面を平坦化する手法であ る。スラリーとしては、酸化セリウム、アルミナ、シリカ等を用い、ノ ッドとしては、ポリウ レタン、スウェード等を用いる。本発明の実施の形態ではスラリーは酸化セリウム、パ ッドはポリウレタンを使用する力 何らこれに限定されるものではない。処理条件につ いては、基板圧力 0. lMPa、回転数 50rpm、研磨時間 3〜; 15分とする。 [0113] The maximum depth of the unevenness of the first planarized layer 108a after polishing is preferably 50 nm or more and 200 nm or less. Here, FIG. 11 is a cross-sectional view of the organic EL display device 100 in which the shape of the first planarization layer 108a before the CMP polishing step is indicated by a dotted line 120 with respect to FIG. FIG. 11 shows that the unevenness of the first planarization layer 108a is reduced by the polishing process. In the polishing process, chemical mechanical polishing (CMP method) that has excellent flatness on the order of nm and can control the polishing amount with high accuracy is used. The CMP method is a method of flattening the surface to be polished by chemical etching with chemicals and mechanical polishing with fine abrasive grains. As the slurry, cerium oxide, alumina, silica, etc. are used, and as the node, polyurethane is used. Letan, suede, etc. are used. In the embodiment of the present invention, the force of using cerium oxide as the slurry and polyurethane as the pad is not limited to this. Regarding processing conditions, the substrate pressure is 0.1 MPa, the rotation speed is 50 rpm, the polishing time is 3 to 15 minutes, and 15 minutes.
[0114] 次に、図 12に示すように、第 1平坦化層 108a上に第 2平坦化層 108bを形成する。 Next, as shown in FIG. 12, the second planarizing layer 108b is formed on the first planarizing layer 108a.
第 2平坦化層 108bは、その第 1電極 111aの直下に位置する表面の凹凸を、概ね平 坦にする。第 2平坦化層 108bは、第 1平坦化層 108aと同様の手法で形成し、その後 にコンタクトホール 114を形成する。第 2平坦化層 108bの膜厚は、第 1電極 111aの 下方の層の凹凸を概ね平坦にすることができ、コンタクトホール 114が容易に形成す ること力 Sできる大きさ、すなわち、 1 · 5 ^ 01-2. 0 mであることが好ましい。第 2平坦 化層 108bの形成は、平坦化のみならず、研磨処理による第 1平坦化層 108aの膜面 上のスクラッチ等の影響緩和にも効果がある。この第 1平坦化層 108aの研磨工程、 及び、第 2平坦化層 108bの形成は、画素電極下方にある平坦化層を概ね平坦にし 、後述の画素電極、発光層 112bを形成する際に膜厚分布を低減できる重要な役割 を担う。 The second planarization layer 108b makes the unevenness of the surface located immediately below the first electrode 111a substantially flat. The second planarization layer 108b is formed by the same method as the first planarization layer 108a, and then the contact hole 114 is formed. The film thickness of the second planarizing layer 108b is such that the unevenness of the layer below the first electrode 111a can be made almost flat and the contact hole 114 can be easily formed. 5 ^ 01-2.0 m is preferable. The formation of the second planarization layer 108b is effective not only for planarization but also for mitigating the influence of scratches on the film surface of the first planarization layer 108a by the polishing process. The polishing process of the first planarization layer 108a and the formation of the second planarization layer 108b are performed when the planarization layer under the pixel electrode is substantially planarized, and a film is formed when a pixel electrode and a light emitting layer 112b described later are formed. It plays an important role in reducing the thickness distribution.
[0115] 次に、図 13に示すように、第 1及び第 2平坦化層 108a, 108bをそれぞれ貫通する ようにコンタクトホール 114を形成し、続!/、てコンタクトホール 114を埋める接続用の 導電体を介してアクティブマトリクス基板 101と電気的に接続するように第 1電極 111 aを形成する。ここで、接続用の導電体として第 1電極 11 laを用いてもよい。 Next, as shown in FIG. 13, contact holes 114 are formed so as to penetrate the first and second planarization layers 108a and 108b, respectively. A first electrode 111a is formed so as to be electrically connected to the active matrix substrate 101 through a conductor. Here, the first electrode 11 la may be used as a conductor for connection.
[0116] 次に、第 1電極 111aのエッジ部を覆うように絶縁層 113を形成する。絶縁層 113に は SiO絶縁膜及びアクリル系樹脂を用いることができる。 [0116] Next, the insulating layer 113 is formed so as to cover the edge portion of the first electrode 111a. For the insulating layer 113, a SiO insulating film and an acrylic resin can be used.
2 2
[0117] 次に、これらを覆うように有機層 112を形成し、さらに有機層 112上に第 2電極 111 bを形成する。 Next, an organic layer 112 is formed so as to cover them, and a second electrode 111 b is formed on the organic layer 112.
[0118] 次に、図 7に示すように、第 2電極 11 lb上に薄膜封止層として機能する絶縁膜 103 を公知の技術 (減圧 CVD法、プラズマ CVD法、熱酸化法等)により形成する。 Next, as shown in FIG. 7, an insulating film 103 functioning as a thin film sealing layer is formed on the second electrode 11 lb by a known technique (low pressure CVD method, plasma CVD method, thermal oxidation method, etc.). To do.
[0119] 次いで絶縁膜 103上にシール材を介して封止基板 104を接着する。これによつて 有機 EL表示装置 100を完成させる。 [0119] Next, the sealing substrate 104 is bonded to the insulating film 103 through a sealant. As a result, the organic EL display device 100 is completed.
[0120] 一実施形態 3の効果 [0120] Effect of Embodiment 3
実施形態 3においては、 TFT106あるいは配線 107上に形成される第 1平坦化層 1 08aの研磨は、段差低減速度が著しく低下する前までの処理であるため、時間制御 性に優れ、研磨効率性 ·段差低減速度の高い研磨処理を行い、凹凸を 50nm以上 且つ 200nm以下まで低減する。さらに、前述の研磨を施した第 1平坦化層 108aの 上方に第 2平坦化層 108bを形成することにより、第 1電極 111a直下の凹凸に関して lOOnm以下、好ましくは 50nm以下の平坦性を得ることができる。第 2平坦化層 108 bの形成は、平坦化のみならず、研磨処理による第 1平坦化層 108a表面のスクラッチ 等の影響緩和にも効果がある。これにより、第 1電極 111a上に形成される発光層 11 2bを含む有機層 112において、第 1電極 111aの下方にある TFT106等の構造物に 相応した膜厚分布を低減し、画素内の輝度分布を改善させ、画素内を一様に高い輝 度で発光を得ることが出来る。これにより、有機 EL表示装置 100において優れた発 光取り出しが可能となる。第 1電極 111a上に形成される発光層 112bを含む有機層 1 12において、第 1電極 11 laの下方にある TFT106等の構造物に相応した凹凸が小 さいため、凹凸に起因する著しく膜厚の薄い領域を低減することができる。このため、 表示欠陥の少な!/、高品質の有機 EL表示装置 100を高!/、生産性及び高!/、歩留まり で製造することが可能となる。 In Embodiment 3, the first planarization layer 1 formed on the TFT 106 or the wiring 107 is used. Since the polishing of 08a is a process before the step reduction rate is significantly reduced, the time controllability is excellent, and polishing processing with high polishing efficiency and high step reduction rate is performed to reduce the unevenness to 50 nm or more and 200 nm or less. . Further, by forming the second planarization layer 108b above the polished first planarization layer 108a, the flatness of lOOnm or less, preferably 50nm or less, can be obtained with respect to the irregularities immediately below the first electrode 111a. Can do. The formation of the second planarization layer 108b is effective not only in planarization but also in mitigating the influence of scratches on the surface of the first planarization layer 108a by the polishing process. As a result, in the organic layer 112 including the light emitting layer 112b formed on the first electrode 111a, the film thickness distribution corresponding to the structure such as the TFT 106 below the first electrode 111a is reduced, and the luminance within the pixel is reduced. The distribution can be improved and light emission can be obtained with high brightness uniformly in the pixel. As a result, excellent light extraction can be performed in the organic EL display device 100. In the organic layer 112 including the light emitting layer 112b formed on the first electrode 111a, the unevenness corresponding to the structure such as the TFT 106 below the first electrode 11la is small, so the film thickness due to the unevenness is extremely large. The thin region can be reduced. Therefore, it is possible to manufacture a high-quality organic EL display device 100 with few display defects and high yield, high productivity, and high yield.
[0121] 尚、上記実施形態;!〜 3では、 TFTに用いられる半導体層は、アモルファス膜でも よぐ多結晶膜でもよい。 [0121] In the above embodiments;! To 3, the semiconductor layer used in the TFT may be an amorphous film or a polycrystalline film.
[0122] また、上記実施形態;!〜 3では、平坦化層 14又は第 1平坦化層 108aに研磨処理を 行うことにより平坦化層 14又は第 1平坦化層 108aの凹凸の最大深さを lOOnm以下 にするとしたが、本発明はこれに限られない。すなわち、平坦化層 14又は第 1平坦化 層 108aを形成する際に平坦化層 14又は第 1平坦化層 108aの厚みを調整すること により、平坦化層 14又は第 1平坦化層 108aの凹凸の最大深さを lOOnm以下にして いてもよぐ平坦化層 14又は第 1平坦化層 108aの凹凸の最大深さが lOOnm以下で あればよい。 [0122] In the above embodiments;! To 3, the maximum depth of the unevenness of the planarization layer 14 or the first planarization layer 108a is obtained by polishing the planarization layer 14 or the first planarization layer 108a. Although it is assumed to be lOOnm or less, the present invention is not limited to this. That is, the unevenness of the planarization layer 14 or the first planarization layer 108a is adjusted by adjusting the thickness of the planarization layer 14 or the first planarization layer 108a when forming the planarization layer 14 or the first planarization layer 108a. The maximum depth of the unevenness of the planarization layer 14 or the first planarization layer 108a, which may be set to a maximum depth of 10 nm or less, is only required to be 10 nm or less.
[0123] また、上記実施形態では、第 1電極 20又は第 1電極 11 la (陽極)は、仕事関数の 大きな (仕事関数 4. OeV以上)材料で形成するのが望ましい。これは、電圧が印加さ れた際に陽極から正孔が有機化合物層に注入されることにより、有機化合物層を形 成する有機化合物よりも HOMO順位の高い材料であることが要求されるためである 。陽極は TFTと接続して形成されることから低抵抗な材料で形成されることが望まし い。例えば、金属材料 (Au, Ni, Pt, W, Cr, Mo, Fe, Co, Cu等)や導電性金属酸 化物(ITO, IZO, ZnO, SnO , GZO等)を単層あるいは複数の材料の積層膜とし [0123] In the above embodiment, the first electrode 20 or the first electrode 11la (anode) is preferably formed of a material having a high work function (work function 4. OeV or more). This is because when a voltage is applied, holes are injected from the anode into the organic compound layer, so that the material must have a higher HOMO level than the organic compound forming the organic compound layer. Is . Since the anode is connected to the TFT, it is desirable that the anode be made of a low resistance material. For example, metallic materials (Au, Ni, Pt, W, Cr, Mo, Fe, Co, Cu, etc.) and conductive metal oxides (ITO, IZO, ZnO, SnO, GZO, etc.) As a laminated film
2 2
て用いること力 Sできる。また、第 1電極 20又は第 1電極 11 la上には、有機発光材料 塗料及び有機輸送材料塗料等の被覆性を高めるための酸化物層、例えば、 SiO層 Can be used S On the first electrode 20 or the first electrode 11 la, an oxide layer, for example, an SiO layer, for enhancing the covering properties of the organic light emitting material paint and the organic transport material paint, etc.
2 、第 1電極 20の導電性を妨げない程度の厚み、例えば、 lnm程度の厚みに形 成されていてもよい。 2. The first electrode 20 may be formed to a thickness that does not interfere with the conductivity of the first electrode 20, for example, a thickness of about 1 nm.
[0124] さらに、上記実施形態;!〜 3において、有機層 30又は有機層 112は、インクジェット 法の他、例えば、スピンコート法、ドクターブレード法、吐出コート法、スプレーコート 法、凸版印刷法、凹版印刷法、スクリーン印刷法、マイクログラビアコート法等の公知 のウエットプロセスにより形成されていてもよぐ公知の有機層形成プロセスにより形 成されていればよい。 [0124] Further, in the above-mentioned embodiments;! To 3, the organic layer 30 or the organic layer 112 may be formed by, for example, spin coating, doctor blade method, discharge coating method, spray coating method, letterpress printing method, in addition to the inkjet method. It may be formed by a known organic layer forming process which may be formed by a known wet process such as an intaglio printing method, a screen printing method or a micro gravure coating method.
[0125] また、上記実施形態;!〜 3において、有機層 30又は有機層 112の有機高分子材料 は、有機 LED素子用の公知の発光材料を用いることが出来る。このような発光材料 は、高分子発光材料、高分子発光材料の前駆体等に分類される。 [0125] In the above embodiments;! To 3, the organic polymer material of the organic layer 30 or the organic layer 112 may be a known light-emitting material for an organic LED element. Such light emitting materials are classified into polymer light emitting materials, precursors of polymer light emitting materials, and the like.
[0126] ここで、高分子発光材料としては、例えば、ポリ(2 デシルォキシー 1、 4 フエユレ ン)(DO— PPP)、ポリ [2、 5 ビス一 [2—(N, N, N トリェチルアンモニゥム)エト キシ] 1、 4 フエ二ルーアルト一 1、 4 フエニルレン]ジブロマイド(PPP— NEt3+) 、ポリ [2—(2 '—ェチルへキシルォキシ) 5—メトキシー 1、 4 フエ二レンビニレン] ( MEH— PPV)等を用いてもよい。 [0126] Here, as the polymer light emitting material, for example, poly (2 decyloxy 1, 4 phenylene) (DO—PPP), poly [2,5 bis [2— (N, N, N triethylammonium) Um) Etoxy] 1, 4 Phenyl Alto 1, 4 Phenylylene] Dibromide (PPP— NEt 3+ ), Poly [2— (2′-Ethylhexyloxy) 5-Methoxy-1, 4 Phenylylene Vinylene] (MEH—PPV) or the like may be used.
[0127] また、高分子発光材料の前駆体としては、例えば、ポリ(P—フエ二レンビニレン)前 駆体(Pre— PPV)、ポリ(P ナフタレンビニレン)前駆体(Pre— PNV)等を用レ、ても よい。 [0127] Further, as a precursor of the polymer light emitting material, for example, a poly (P-phenylene vinylene) precursor (Pre-PPV), a poly (P naphthalene vinylene) precursor (Pre-PNV) or the like is used. You can.
[0128] また、溶剤としては上記発光材料を溶解または分散できる溶剤であればよく、例え ば、純水、メタノール、エタノール、 THF (テトラヒドロフラン)、クロ口ホルム、トルエン、 キシレン、トリメチルベンゼン等を用いることができる。 [0128] The solvent may be any solvent that can dissolve or disperse the light-emitting material. For example, pure water, methanol, ethanol, THF (tetrahydrofuran), chloroform, toluene, xylene, trimethylbenzene, or the like is used. be able to.
[0129] 電荷輸送層を構成するホール輸送層 31又はホール輸送層 17b、及び、電子輸送 層 17dは、それぞれ単層構造でも多層構造でも良!/、。 [0130] 電荷輸送層の電荷輸送材料としては、以下に示すような公知の材料を用いることが できる。 [0129] The hole transport layer 31 or the hole transport layer 17b and the electron transport layer 17d constituting the charge transport layer may have a single layer structure or a multilayer structure, respectively. [0130] As the charge transport material of the charge transport layer, the following known materials can be used.
[0131] ホール輸送材料としては、例えば、ポルフィリン化合物、 N, N,—ビス—(3 メチル フエニル) N, N'—ビス一(フエニル)一ベンジジン(TPD)、 N, N,一ジ(ナフタレ ンー 1ーィノレ) N, N,ージフエニノレーべンジジン(NPD)、ビス [N—(1 ナフチノレ) — N フエ二ノレ]ベンジジン(α NPD)、 N, N,一ジフエニル一 N, N,一(4— (ジ( 3—トリル)ァミノ)フエ二ル)— 1 , 1,—ビフエニル— 4, 4,—ジァミン(DNTPD)、等 の芳香族第 3級ァミン化合物、ヒドラゾン化合物、キナクリドン化合物、スチルァミン化 合物等の低分子材料、ポリア二リン、 3, 4—ポリエチレンジォキシチォフェン/ポリス チレンサルフォネート(PEDT/PSS)、ポリ(トリフエニルァミン誘導体)、ポリビュル力 ルバゾール(PVD)等の高分子材料、ポリ(P フエ二レンビニレン)前駆体、ポリ(P— ナフタレンビニレン)前駆体等の高分子材料前駆体を用いることができる。 [0131] Examples of hole transport materials include porphyrin compounds, N, N, -bis- (3 methylphenyl) N, N'-bis- (phenyl) -benzidine (TPD), N, N, 1-di (naphthalenes). N-1 Ninore) N, N, Diphenenolevendidine (NPD), Bis [N— (1 Naphthinore) — N Phenylenore] benzidine (α NPD), N, N, 1 Diphenyl 1 N, N, 1 (4— (Di (3-tolyl) amino) phenyl) — 1, 3, 1, -biphenyl-4, 4, —diamine (DNTPD), etc., aromatic tertiary amine compounds, hydrazone compounds, quinacridone compounds, stilamine compounds Low molecular weight materials such as polyaniline, 3,4-polyethylenedioxythiophene / polystyrene sulfonate (PEDT / PSS), poly (triphenylamine derivative), polybulur rubazole (PVD), etc. Polymer material, poly (P-phenylene vinylene ) Precursors such as precursors and poly (P-naphthalene vinylene) precursors can be used.
[0132] 電子輸送材料としては、例えば、トリス(8 キノリノラト)アルミニウム (Alq3)、ビス(1 0 ヒドロキシベンゾ [h] キノリナト)ベリリウム(BeBq2)、ビス(2 メチル 8 キノリ ノラト) 4 フエニノレフエノラト一ァノレミニゥム(BAlq)、ビス [2— (2 ヒドロキシフエ二 ノレ)ベンゾォキサゾラト]亜鉛 (Zn (BOX) )等の金属錯体の材料を用いることができる 。さらに、金属錯体以外にも、 2- (4 ビフエ二リル)一 5— (4— tert ブチルフエ二 ノレ) 1 , 3, 4—ォキサジァゾール(PBD)、 3—(4ー 6 1—ブチルフェニル)ー4ーフ ェニル—5— (4) ビフエ二リル)— 1 , 2, 4 トリァゾール(TAZ) )、 3— (4— tert— ブチルフエニル)ー4 (4 ェチルフエニル)ー5—(4ービフエ二リル)—1 , 2, 4 ト リアゾール(p— EtTAZ)等を用いることができる。 [0132] Examples of the electron transport material include tris (8 quinolinolato) aluminum (Alq3), bis (1 0 hydroxybenzo [h] quinolinato) beryllium (BeBq2), bis (2 methyl 8 quinolinolato) 4 phenolinophenol. Metal complex materials such as tanenoreminium (BAlq) and bis [2- (2 hydroxyphenol) benzoxazolate] zinc (Zn (BOX)) can be used. In addition to metal complexes, 2- (4 biphenyl) -1- (4-tert-butylphenol) 1, 3, 4-oxadiazole (PBD), 3- (4-6 1-butylphenyl)- 4-phenyl-5- (4) biphenyl)-1, 2, 4 triazole (TAZ)), 3- (4-tert-butylphenyl) -4 (4-ethylphenyl) -5- (4-biphenyl) —1, 2, 4 Triazole (p—EtTAZ) and the like can be used.
[0133] また、上記実施形態;!〜 3において、溶剤は、純水の他、例えば、メタノール、ェタノ ール、 THF (テトラヒドロフラン)、クロ口ホルム、トルエン、キシレン、トリメチルベンゼン 等であり、上記ホール輸送材料である有機高分子材料又は上記発光材料である有 機高分子材料を溶解又は分散できるものであればよい。 [0133] In the above embodiments;! To 3, the solvent is pure water, for example, methanol, ethanol, THF (tetrahydrofuran), chloroform, toluene, xylene, trimethylbenzene, and the like. Any organic polymer material that is a hole transport material or any organic polymer material that is a light emitting material may be used as long as it can be dissolved or dispersed.
[0134] さらに、上記実施形態;!〜 3において、有機層 30又は有機層 112は、発光層 32又 は発光層 112bのみからなるものでもよい。また、有機層 30又は有機層 112は、発光 層 32又は発光層 112bと、ホール注入層、ホール輸送層 31又はホール輸送層 112a 、電子輸送層及び電子注入層 112cのうち 1層以上とにより構成されていてもよぐこ れらの各層は、公知の有機低分子材料、有機高分子材料又はこれらの前駆体によつ て形成すること力できる。 [0134] Furthermore, in the above embodiments;! To 3, the organic layer 30 or the organic layer 112 may be composed of only the light emitting layer 32 or the light emitting layer 112b. Further, the organic layer 30 or the organic layer 112 includes the light emitting layer 32 or the light emitting layer 112b, the hole injection layer, the hole transport layer 31 or the hole transport layer 112a. The electron transport layer and the electron injection layer 112c may be composed of one or more layers, and each of these layers is formed of a known organic low molecular weight material, organic polymer material, or a precursor thereof. I can do it.
[0135] また、上記実施形態;!〜 3において、発光層 32又は発光層 17cは、インクジェット法 に限らず、その他の公知の方法で成膜することが可能である。低分子有機発光層は 、例えば、真空蒸着法で成膜することができる。高分子有機発光層は、例えば、有機 発光層形成用塗液を用いて、スピンコート法、ドクターブレード法、吐出コート法、ス プレーコート法、凸版印刷法、凹版印刷法、スクリーン印刷法、マイクログラビアコート 法等のウエットプロセスで成膜することができる。また、上記有機発光層形成用塗液 は、少なくとも発光材料を含有した溶液であり、一種類もしくは多種類の発光材料を 含有していてもよい。また、その他にレべリング剤、発光アシスト剤、添加剤(ドナー、 ァクセプター等)電荷輸送剤、発光性のドーパント等が含有されて!/、てもよ!/、。 [0135] In the above embodiments;! To 3, the light emitting layer 32 or the light emitting layer 17c is not limited to the ink jet method, and can be formed by other known methods. The low molecular organic light emitting layer can be formed by, for example, a vacuum deposition method. For example, the organic organic light emitting layer is formed by using a coating liquid for forming an organic light emitting layer, using a spin coating method, a doctor blade method, a discharge coating method, a spray coating method, a relief printing method, an intaglio printing method, a screen printing method, a micro printing method, or the like. The film can be formed by a wet process such as a gravure coating method. The organic light emitting layer forming coating solution is a solution containing at least a light emitting material, and may contain one or more kinds of light emitting materials. In addition, it contains leveling agents, light emission assist agents, additives (donors, acceptors, etc.), charge transport agents, luminescent dopants, etc.
[0136] また、上記実施形態;!〜 3において、第 2電極 50又は第 2電極 11 lb (陰極)は、例 えば、元素周期律の第 1族または第 2族、すなわち Li, Cs, Rb等のアルカリ金属、お よび Ca, Sr, Ba, Mg等のアルカリ土類金属、およびこれらを含む合金(Mg: Ag, A1 : Li)や化合物(LiF, CsF, CaF )のを用いてもよぐさらに高分子有機発光層に対し [0136] In the above embodiments;! To 3, the second electrode 50 or the second electrode 11 lb (cathode) is, for example, the first group or the second group of the element periodic rule, that is, Li, Cs, Rb. Alkali metals such as Ca, Sr, Ba, Mg, etc., and alloys containing these (Mg: Ag, A1: Li) and compounds (LiF, CsF, CaF) may also be used. In addition to the polymer organic light emitting layer
2 2
ては Ca、 Baが好適に用いられる。第 2電極は、酸素や水等による変質を抑えるため に、 Ni, Os, Pt, Pd, Al, Au, Rh, Ag等の科学的に比較的安定な金属との合金あ るいは積層構造が好適に用いられる。 In particular, Ca and Ba are preferably used. The second electrode has an alloy or laminated structure with a scientifically relatively stable metal such as Ni, Os, Pt, Pd, Al, Au, Rh, Ag, etc., in order to suppress deterioration due to oxygen, water, etc. Preferably used.
[0137] また、トップェミッション型の有機 ELでは、透光性を与えるために第 2電極を薄く形 成する必要がある。したがって、電極として十分な導電性を確保するために ITO, IZ O, ZnO, SnO等の導電性金属酸化物を透明電極層として透光性を有する金属層 [0137] In addition, in the top emission type organic EL, it is necessary to form the second electrode thinly in order to provide translucency. Therefore, in order to ensure sufficient conductivity as an electrode, a light-transmitting metal layer using a conductive metal oxide such as ITO, IZO, ZnO, SnO or the like as a transparent electrode layer
2 2
上に形成することができる。透明電極層は、単層あるいは複数の材料の積層膜として あよい。 Can be formed on top. The transparent electrode layer may be a single layer or a laminated film of a plurality of materials.
[0138] さらに、上記実施形態;!〜 3において、第 2電極 50又は第 2電極 11 lbには、第 2電 極 50又は第 2電極 11 lbとは別個に補助的な金属配線等である補助電極配線を形 成することが可能である。その場合には、透明電極 52は形成されていなくてもよい。 また、補助電極配線が形成されている場合には、第 2電極 50又は第 2電極 11 lbは、 有機層 30又は有機層 112の表面にのみ形成されていてもよぐ少なくとも有機層 30 又は有機層 112を覆うように形成されて!/、ればよ!/、。 [0138] Further, in the above embodiments;! To 3, the second electrode 50 or the second electrode 11 lb is an auxiliary metal wiring or the like separately from the second electrode 50 or the second electrode 11 lb. Auxiliary electrode wiring can be formed. In that case, the transparent electrode 52 may not be formed. When the auxiliary electrode wiring is formed, the second electrode 50 or the second electrode 11 lb It may be formed only on the surface of the organic layer 30 or the organic layer 112, and may be formed so as to cover at least the organic layer 30 or the organic layer 112! /.
[0139] また、上記実施形態;!〜 3において、基板本体 11は、ガラス基板、プラステイク基板 、シリコンウェハー等からなる半導体基板等であるとした力 本発明はこれに限られず 、有機 EL表示装置 1 , 100の機械的強度を担保でき、且つ、絶縁性を有する基板で あればよい。 [0139] In the above embodiments;! To 3, a force that the substrate body 11 is a semiconductor substrate made of a glass substrate, a plastic substrate, a silicon wafer, etc. The present invention is not limited to this, and an organic EL display Any substrate can be used as long as it can guarantee the mechanical strength of the devices 1 and 100 and has an insulating property.
[0140] また、上記実施形態;!〜 3において、スイッチング素子を TFT12又は TFT106であ るとしたが、本発明はこれに限られず、他の公知のスイッチング素子を用いていてもよ い。 [0140] In the above embodiments;! To 3, the switching element is assumed to be TFT12 or TFT106. However, the present invention is not limited to this, and other known switching elements may be used.
[0141] さらに、上記実施形態;!〜 3において、複数の第 1電極 20又は第 1電極 11 laのそ れぞれは矩形に形成していた力 本発明はこれに限られず、種々の形状を有してい てもよい。 [0141] Further, in the above-mentioned embodiments;! To 3, each of the plurality of first electrodes 20 or first electrodes 11 la is formed in a rectangular shape. The present invention is not limited to this, and various shapes are possible. You may have.
[0142] また、上記実施形態;!〜 3において、第 2電極 50又は第 2電極 11 lb上には、封止 膜 60又は封止基板 104が、有機層 30又は有機層 112と第 2電極 50又は第 2電極 1 l ibを覆うように形成されているとした力 本発明はこれに限られない。すなわち、有 機層 30又は有機層 112と第 2電極 50又は第 2電極 11 lb上には、有機層 30又は有 機層 112と第 2電極 50又は第 2電極 11 lbを大気中の水分から保護するための、レ、 わゆる、封止缶が設けられていてもよぐ有機層 30又は有機層 112と第 2電極 50又 は第 2電極 11 lbが大気中の水分力 保護されて!/、ればよ!/、。 [0142] In the above embodiments;! To 3, the sealing film 60 or the sealing substrate 104 is formed on the second electrode 50 or the second electrode 11 lb, the organic layer 30 or the organic layer 112, and the second electrode. The force formed so as to cover 50 or the second electrode 1 l ib is not limited to this. That is, the organic layer 30 or the organic layer 112 and the second electrode 50 or the second electrode 11 lb are placed on the organic layer 30 or the organic layer 112 and the second electrode 50 or the second electrode 11 lb from moisture in the atmosphere. The organic layer 30 or organic layer 112 and the second electrode 50 or the second electrode 11 lb, which may be provided with a can, sealed or sealed can, are protected against moisture in the atmosphere! / Do it !!
[0143] 《実施例》 [0143] Example
(第 1実施例) (First example)
第 1実施例では、上記実施形態 1の構造を有する実施例 1及び実施例 2、上記実 施形態 2の構造を有する実施例 3及び実施例 4につ!/、て実施し、時間経過に伴う画 素欠陥の増加について測定した。尚、以降で説明する平坦化層 14表面の凹凸の最 大深さ Dは、触針式段差計により測定した。 In the first example, Example 1 and Example 2 having the structure of Embodiment 1 above, and Example 3 and Example 4 having the structure of Embodiment 2 described above were carried out over time. The accompanying increase in pixel defects was measured. Note that the maximum depth D of the unevenness on the surface of the planarizing layer 14 described below was measured with a stylus type step gauge.
[0144] 実施例 1の有機 EL表示装置は、平坦化層 14の表面に研磨処理を行わずに平坦 化層 14を形成した。アクリル系樹脂層 14bの厚みは、 8 であり、平坦化層 14表面 の凹凸の最大深さ Dは、 48nmである。第 1電極 20は、 Niにより 150nmの膜厚に形 成した。絶縁層 40は、 SiO層及びアクリル系樹脂層の積層構造に形成した。 [0144] In the organic EL display device of Example 1, the planarization layer 14 was formed on the surface of the planarization layer 14 without performing the polishing treatment. The thickness of the acrylic resin layer 14b is 8, and the maximum depth D of the unevenness on the surface of the planarizing layer 14 is 48 nm. The first electrode 20 is formed with Ni to a thickness of 150 nm. Made. The insulating layer 40 was formed in a laminated structure of an SiO layer and an acrylic resin layer.
2 2
[0145] 有機層 30は、ホール注入層及び発光層 32により構成した。ホール注入層は、第 1 電極側に形成し、発光層 32は、第 2電極 50側に形成した。ホール注入層は、ポリエ [0145] The organic layer 30 was composed of a hole injection layer and a light emitting layer 32. The hole injection layer was formed on the first electrode side, and the light emitting layer 32 was formed on the second electrode 50 side. The hole injection layer is made of polyester.
1電極 20上に塗布し、 150°Cで 20分間乾燥させて形成した。ホール注入層の厚み は、混合液の濃度及びインクジェットの液滴下量を制御することにより 60nmに形成し た。発光層 32は、ポリフルオレン誘導体の溶液をインクジェット法により塗布し、ホー ル注入層と同様の方法によって形成した。また、第 2電極 50は、厚みが 10nmになる ように形成した。 1 electrode 20 was coated on the electrode 20 and dried at 150 ° C. for 20 minutes to form. The thickness of the hole injection layer was formed to 60 nm by controlling the concentration of the mixed solution and the amount of ink droplets dropped. The light emitting layer 32 was formed by applying a solution of a polyfluorene derivative by an ink jet method and the same method as the hole injection layer. The second electrode 50 was formed so as to have a thickness of 10 nm.
[0146] 実施例 2の有機 EL表示装置 1は、平坦化層 14の表面に研磨処理を行わずに、平 坦化層 14を形成した。アクリル系樹脂層 14bの厚みは 2 mであり、平坦化層 14表 面の凹凸の最大深さ Dは 380nmである。また、第 1電極 20の厚み Hは、 400nmであ る。実施例 2のその他の構造は、上記実施例 1と同様である。 [0146] In the organic EL display device 1 of Example 2, the planarization layer 14 was formed on the surface of the planarization layer 14 without performing the polishing treatment. The thickness of the acrylic resin layer 14b is 2 m, and the maximum depth D of the unevenness on the surface of the flattening layer 14 is 380 nm. The thickness H of the first electrode 20 is 400 nm. The other structure of Example 2 is the same as that of Example 1 above.
[0147] 実施例 3の有機 EL表示装置 1は、初期の厚みが 4 mであったアクリル系樹脂層 1 4bを研磨処理することにより、厚みが 2 mのアクリル系樹脂層 14bを形成した。平 坦化層 14表面の凹凸の最大深さ Dは、 62nmである。また、第 1電極 20の厚みは、 1 50nmである。実施例 3の有機層 30及び第 2電極 50の構造は、上記実施例 1と同様 である。 [0147] In the organic EL display device 1 of Example 3, the acrylic resin layer 14b having a thickness of 2 m was formed by polishing the acrylic resin layer 14b having an initial thickness of 4 m. The maximum depth D of the irregularities on the surface of the planarized layer 14 is 62 nm. The thickness of the first electrode 20 is 150 nm. The structures of the organic layer 30 and the second electrode 50 in Example 3 are the same as in Example 1 above.
[0148] 実施例 4の有機 EL表示装置 1は、平坦化層 14の表面に研磨処理を行わずに、ァ クリル系樹脂層 14bの厚みは 2 H mであり、平坦化層 14表面の凹凸の最大深さ Dは 320nmである。また、第 1電極 20の厚み Hは、 400nmである。実施例 4の有機層 30 及び第 2電極 50の構造は、上記実施例 1と同様である。 [0148] In the organic EL display device 1 of Example 4, the surface of the planarization layer 14 was not polished, the acrylic resin layer 14b had a thickness of 2 Hm, and the surface of the planarization layer 14 was uneven. The maximum depth D is 320nm. The thickness H of the first electrode 20 is 400 nm. The structures of the organic layer 30 and the second electrode 50 in Example 4 are the same as in Example 1 above.
[0149] 実施例 1及び実施例 2の比較例として、比較例 1〜比較例 3についても、実施例 1 〜実施例 4と同様に時間経過に伴う画素欠陥の増加について測定した。また、実施 例 3及び実施例 4の比較例として、比較例 4〜比較例 6についても、同様に時間経過 に伴う画素欠陥の増加について測定した。尚、以降では、比較例 1〜比較例 6の有 機 EL表示装置について、理解しやすいように上記実施例 1〜実施例 4と同様の参照 符号を用いて説明する。 [0150] 比較例 1〜比較例 3は、第 1電極 20の厚み H力 それぞれ 300nm、 200nm、 100 nmである。これら比較例 1〜比較例 3の第 1電極 20以外の構造は、上記実施例 2と 同様である。比較例 4〜比較例 6は、第 1電極 20の厚み H力 それぞれ 300nm、 20 0nm、 lOOnmである。これら比較例 4〜比較例 6の第 1電極 20以外の構造は、上記 実施例 4と同様である。尚、これら実施例 1〜実施例 4及び比較例 1〜比較例 6の有 機 EL表示装置 1は、 320 X 240個の画素数を有して!/、る。 [0149] As a comparative example of Example 1 and Example 2, Comparative Example 1 to Comparative Example 3 were also measured for an increase in pixel defects with time, as in Examples 1 to 4. Further, as Comparative Examples of Example 3 and Example 4, also in Comparative Examples 4 to 6, the increase in pixel defects with the passage of time was measured in the same manner. In the following, the organic EL display devices of Comparative Example 1 to Comparative Example 6 will be described using the same reference numerals as in Examples 1 to 4 for easy understanding. [0150] In Comparative Examples 1 to 3, the thickness H force of the first electrode 20 is 300 nm, 200 nm, and 100 nm, respectively. The structures other than the first electrode 20 of Comparative Examples 1 to 3 are the same as those of Example 2 described above. In Comparative Examples 4 to 6, the thickness H force of the first electrode 20 is 300 nm, 200 nm, and lOOnm, respectively. The structures other than the first electrode 20 in these comparative examples 4 to 6 are the same as those in the fourth embodiment. These organic EL display devices 1 of Examples 1 to 4 and Comparative Examples 1 to 6 have 320 × 240 pixels.
[0151] これら実施例 1〜実施例 4及び比較例 1〜比較例 6の有機 EL表示装置の第 1電極 [0151] First electrodes of organic EL display devices of Examples 1 to 4 and Comparative Examples 1 to 6
20と第 2電極 50との間に電圧を印加して、表示領域全面に亘つて一様に緑色発光 するように TFT12に制御信号を送った。実施例 1及び実施例 3については、一様な 緑色発光が確認された。また、画素内の点灯状態について光学顕微鏡を用いて観 察したところ、画素内に目立った輝度分布の不均一さは確認できなかった。 A voltage was applied between 20 and the second electrode 50, and a control signal was sent to the TFT 12 so that green light was emitted uniformly over the entire display area. For Example 1 and Example 3, uniform green emission was confirmed. In addition, when the lighting state in the pixel was observed using an optical microscope, no noticeable nonuniform luminance distribution was observed in the pixel.
[0152] 一方、実施例 2、実施例 4及び比較例 1〜比較例 6については、輝度分布にばらつ きが確認された。また、画素内の点灯状態について光学顕微鏡を用いて観察したと ころ、これらの有機 EL表示装置には、平坦化層 14の表面の凹凸に相応した明暗が 確認された。 [0152] On the other hand, for Example 2, Example 4, and Comparative Examples 1 to 6, variation in the luminance distribution was confirmed. In addition, when the lighting state in the pixel was observed using an optical microscope, it was confirmed that the light and darkness corresponding to the irregularities on the surface of the planarization layer 14 was confirmed in these organic EL display devices.
[0153] また、実施例 2及び比較例 1〜比較例 3のパネル面全体の輝度は、実施例 1のパネ ル面全体の輝度の 4割程度であり、実施例 4及び比較例 4〜比較例 6のパネル面全 体の輝度は、実施例 3のパネル面全体の輝度の 4割程度であった。 [0153] The luminance of the entire panel surface of Example 2 and Comparative Examples 1 to 3 is about 40% of the luminance of the entire panel surface of Example 1, and Example 4 and Comparative Example 4 to Comparative Example The brightness of the entire panel surface of Example 6 was about 40% of the brightness of the entire panel surface of Example 3.
[0154] 次に、これら実施例 1〜実施例 4及び比較例 1〜比較例 6の有機 EL表示装置をそ れぞれ 500時間点灯させた後、新たに表示欠陥となった画素の数を画素欠陥の数と して、時間経過に伴う画素欠陥の増加について測定した。 [0154] Next, after lighting the organic EL display devices of Examples 1 to 4 and Comparative Examples 1 to 6 for 500 hours, the number of pixels that newly became display defects was determined. As the number of pixel defects, we measured the increase in pixel defects over time.
[0155] [表 1] [0155] [Table 1]
[0156] [表 2] 実施例 3 実施例 4 比較例 4 比較例 5 比較例 6 画素欠陥 [0156] [Table 2] Example 3 Example 4 Comparative Example 4 Comparative Example 5 Comparative Example 6 Pixel Defect
0 2 14 25 31 0 2 14 25 31
の増加数 Increased number of
[0157] 表 1は、実施例 1、実施例 2及び比較例 1〜比較例 3の増加した画素欠陥の数を表 している。表 2は、実施例 3、実施例 4及び比較例 4〜比較例 6の増加した画素欠陥 の数を表している。実施例 1については、画素欠陥の増加はなかった。一方、実施例 2については、画素欠陥の増加が 1個だけ確認された。比較例 1〜比較例 3について は、 10個以上の画素欠陥の増加が確認され、第 1電極 20の厚み Hが平坦化層 14 表面の凹凸の最大深さ Dよりも小さいほど、増加した画素欠陥の数は多くなつた。 [0157] Table 1 shows the number of increased pixel defects in Example 1, Example 2, and Comparative Examples 1 to 3. Table 2 shows the number of increased pixel defects in Example 3, Example 4, and Comparative Example 4 to Comparative Example 6. For Example 1, there was no increase in pixel defects. On the other hand, in Example 2, only one increase in pixel defects was confirmed. In Comparative Example 1 to Comparative Example 3, an increase in 10 or more pixel defects was confirmed, and as the thickness H of the first electrode 20 was smaller than the maximum depth D of the unevenness on the surface of the planarization layer 14, the increased pixels were observed. The number of defects has increased.
[0158] また、実施例 3については、画素欠陥の増加はなかった。一方、実施例 4について は、画素欠陥の増加が 2個だけ確認された。比較例 4〜比較例 6については、いずれ も 10個以上の画素欠陥が確認され、第 1電極 20の厚み Hが平坦化層 14表面の凹 凸の最大深さ Dよりも小さ!/、ほど、増加した画素欠陥の数は多くなつた。 [0158] In Example 3, there was no increase in pixel defects. On the other hand, in Example 4, only two pixel defects were confirmed. In Comparative Examples 4 to 6, in each case, 10 or more pixel defects were confirmed, and the thickness H of the first electrode 20 was smaller than the maximum depth D of the concave / convex surface of the planarizing layer 14! The number of increased pixel defects has increased.
[0159] 以上に示した第 1実施例により、第 1電極 20の厚み H力 平坦化層 14表面の凹凸 の最大深さ D以上の大きさになるように第 1電極 20を形成することにより、画素欠陥を 低減すること力 Sできること力 Sゎカゝつた。 [0159] According to the first embodiment described above, the first electrode 20 is formed so that the thickness H force of the first electrode 20 is greater than the maximum depth D of the unevenness on the surface of the planarizing layer 14. The ability to reduce pixel defects S
[0160] (第 2実施例) [0160] (Second embodiment)
第 2実施例では、図 4に示すサンプル装置 2を用いて平坦化層 14の表面に形成さ れた凹凸の凹部領域 A1及び凸部領域 A2の発光の輝度をそれぞれ測定することに より、平坦化層 14表面の凹凸の最大深さ Dが有機 EL表示装置に及ぼす影響につ いて確認した。図 4は、平坦化層 14表面の凹凸の最大深さ Dが有機 EL表示装置に 及ぼす輝度の影響について確認するために用いたサンプル装置 2の断面図を拡大 して示す図である。また、図 4における方向 L2は凹部領域 A1の外部への発光方向 を示し、方向 L3は凸部領域 A2の外部への発光方向を示す。 In the second example, the sample device 2 shown in FIG. 4 is used to measure the luminance of light emitted from the concave and convex portions A1 and A2 formed on the surface of the flattening layer 14, thereby flattening. The effect of the maximum depth D on the surface of the organic layer 14 on the organic EL display device was confirmed. FIG. 4 is an enlarged cross-sectional view of the sample device 2 used for confirming the influence of the luminance on the organic EL display device by the maximum depth D of the unevenness on the surface of the planarizing layer 14. In addition, a direction L2 in FIG. 4 indicates a light emission direction to the outside of the concave region A1, and a direction L3 indicates a light emission direction to the outside of the convex region A2.
[0161] サンプル装置 2は、図 4に示すように、ガラス基板 11と、ガラス基板 11の一方の表 面にストライプ状に設けられた金属材 5と、金属材 5を覆うように形成された平坦化層 14と、平坦化層 14を覆うように形成された第 1電極 20と、第 1電極 20を覆うように形 成された有機層 30と、有機層 30の表面に形成された第 2電極 50とを備えている。 [0161] The sample apparatus 2 was formed so as to cover the glass substrate 11, the metal material 5 provided in a stripe shape on one surface of the glass substrate 11, and the metal material 5, as shown in FIG. Planarization layer 14, a first electrode 20 formed so as to cover the planarization layer 14, an organic layer 30 formed so as to cover the first electrode 20, and a second electrode 50 formed on the surface of the organic layer 30 And.
[0162] 金属材 5は、ガラス基板 11の一方の表面にスパッタ法より A1膜を 1 μ mの厚みで成 膜した後、フォトリソグラフィ一法によって lmmの幅及び間隔でストライプ状にパター ン形成した。平坦化層 14は、ガラス基板 11の金属材 5が形成された面にアクリル系 樹脂をスピンコート法によって塗布した後、焼成処理を行うことにより形成した。平坦 化層 14の表面には、ストライプ状に形成された金属材 5に相応してストライプ状の凹 凸が形成されている。 [0162] The metal material 5 was formed by forming a 1 μm-thick A1 film on one surface of the glass substrate 11 by sputtering, and then forming a stripe pattern with a width and interval of lmm by a photolithography method. did. The planarization layer 14 was formed by applying an acrylic resin to the surface of the glass substrate 11 on which the metal material 5 was formed by spin coating, and then performing a baking treatment. On the surface of the planarizing layer 14, stripe-shaped concaves and convexes are formed corresponding to the metal material 5 formed in a stripe shape.
[0163] 第 1電極 20は、 Ni膜であり、電子蒸着法により平坦化層 14の表面に形成した。第 1 電極 20の厚み Dは、 lOOnmである。有機層 30は、有機高分子材料を第 1電極 20上 にスピンコート法により塗布した後、焼成処理を行うことにより形成した。第 2電極 50 は、図示は省略するが、 Caと A1との積層膜であり、マスクを用いた電子蒸着法により 形成した。第 2電極 50は、平坦化層 14表面のストライプ状の凹凸の隣接する凹部の 領域及び凸部の領域に連続して形成されて!/、る。第 2電極 50が形成された凹部領 域 A 1の面積と凸部領域 A2の面積とは、略等しい。 [0163] The first electrode 20 was a Ni film, and was formed on the surface of the planarization layer 14 by electron vapor deposition. The thickness D of the first electrode 20 is lOOnm. The organic layer 30 was formed by applying an organic polymer material on the first electrode 20 by a spin coating method and then performing a baking treatment. Although not shown, the second electrode 50 is a laminated film of Ca and A1, and was formed by an electron vapor deposition method using a mask. The second electrode 50 is continuously formed in the adjacent concave and convex regions of the striped irregularities on the surface of the planarizing layer 14. The area of the recessed area A1 where the second electrode 50 is formed is approximately equal to the area of the raised area A2.
[0164] 発光は、第 1電極 20と第 2電極 50との間に電圧を印加することにより、これら第 1電 極 20と第 2電極 50とが重なる 2mm X 2mmの領域において取り出される。すなわち、 輝度の測定は、第 2電極 50を形成した領域、すなわち、略等しい大きさの凹部領域 A1と凸部領域 A2とで行った。凹部領域 A1及び凸部領域 A2の輝度の測定には、平 坦化層 14の厚みを変化させることによって、平坦化層 14の凹凸の最大深さ Dが 15η m以上且つ 380nm以下の種々の大きさを有する複数のサンプル装置 2を用いた。 Light emission is extracted in a 2 mm × 2 mm region where the first electrode 20 and the second electrode 50 overlap by applying a voltage between the first electrode 20 and the second electrode 50. That is, the luminance was measured in the region where the second electrode 50 was formed, that is, the concave region A1 and the convex region A2 having approximately the same size. The brightness of the concave region A1 and the convex region A2 can be measured by changing the thickness of the flattening layer 14 so that the maximum depth D of the flattened layer 14 is variously large such that it is 15ηm or more and 380nm or less. A plurality of sample devices 2 having a thickness were used.
[0165] 図 5は、本実施例により得られた平坦化層 14の凹凸の最大深さ Dに対する凹部領 域 A1と凸部領域 A2との輝度の比を示す図である。輝度の測定は、略等しい面積の 凹部領域 A1及び凸部領域 A2でそれぞれ行ったことから、縦軸の「凸部領域の輝度 /凹部領域の輝度」の値は、 1. 0であること力 S望ましく、 1. 0に近い値であるほど、凹 部領域 A1と凸部領域 A2との輝度分布の均一性は高いといえる。したがって、平坦 化層 14の凹凸の最大深さ Dが lOOnm以下の場合には、「凸部領域の輝度/凹部 領域の輝度」の値が、 0. 9以上であるため、この場合には、これらの領域 Al , A2の 輝度の均一性は比較的高レ、。 FIG. 5 is a graph showing the ratio of the luminance of the concave region A1 and the convex region A2 with respect to the maximum unevenness depth D of the planarization layer 14 obtained in this example. Since the luminance was measured in the concave area A1 and the convex area A2 having approximately the same area, the value of “luminance in the convex area / luminance in the concave area” on the vertical axis is 1.0. S Desirably, the closer the value is to 1.0, the higher the uniformity of the luminance distribution in the concave region A1 and the convex region A2. Therefore, when the maximum depth D of the unevenness of the planarization layer 14 is lOOnm or less, the value of “brightness of the convex region / brightness of the concave region” is 0.9 or more. In these regions Al, A2 The brightness uniformity is relatively high.
[0166] 以上に示した第 2実施例から、平坦化層 14の表面に形成される凹凸の最大深さ D 1S lOOnm以下になるように平坦化層 14を形成することにより、輝度分布の均一性 を向上させることができることがわかった。 [0166] From the second embodiment shown above, by forming the planarization layer 14 so that the maximum depth of unevenness formed on the surface of the planarization layer 14 is D 1S lOOnm or less, the luminance distribution is uniform. It was found that the property can be improved.
[0167] (第 3実施例) [0167] (Third example)
第 3実施例では、上記実施形態 3の構造を有する実施例 5〜7に係る有機 EL表示 装置について実施し、第 1平坦化層表面で生じた凹凸を研磨処理した後での凹凸の 最大深さ、第 1平坦化層の研磨処理後に形成した第 2平坦化層の凹凸の最大深さを 触針式段差計を用いて計測した。 In the third example, the organic EL display devices according to Examples 5 to 7 having the structure of the third embodiment were implemented, and the maximum depth of the unevenness after the unevenness generated on the surface of the first planarization layer was polished. The maximum depth of the unevenness of the second planarization layer formed after the polishing treatment of the first planarization layer was measured using a stylus type step gauge.
[0168] また、表 3に、第 3実施例の試験評価結果として、実施例 5〜7、比較例 7〜8につい て、第 1平坦化層の研磨処理後でのそれぞれの凹凸の最大深さにおける所要時間と スクラッチ発生数、及び第 2平坦化層を形成後でのそれぞれの凹凸の最大深さ、有 機 EL表示装置の画素内の点灯状態と表示欠陥数を示す。ここで、表 3の画素内の 点灯状態における〇は、点灯状態が良好であることを示し、 Xは点灯状態が不良で あることを示している。 [0168] Further, Table 3 shows the maximum depth of each unevenness after polishing of the first planarization layer for Examples 5 to 7 and Comparative Examples 7 to 8 as test evaluation results of the third example. The required time and the number of scratches, the maximum depth of each unevenness after forming the second planarization layer, the lighting state in the pixel of the organic EL display device, and the number of display defects are shown. Here, ○ in the lighting state in the pixel in Table 3 indicates that the lighting state is good, and X indicates that the lighting state is bad.
[0169] [表 3] [0169] [Table 3]
[0170] 第 1平坦化層表面の研磨処理時における表面観察として、光学顕微鏡を用いてス クラッチ発生数を確認した。スクラッチ発生数は 320mm X 400mmの基板内の 2. 4 インチパネル 6枚の平均値とした。 [0170] As the surface observation during the polishing treatment of the surface of the first planarizing layer, the number of scratches was confirmed using an optical microscope. The number of scratches generated was the average value of six 2.4 inch panels in a 320mm x 400mm substrate.
[0171] これらの有機 EL表示装置の画素内の点灯状態については、光学顕微鏡観察によ り画素電極下の薄膜トランジスタ等に相応した明暗を確認した。 [0172] また、これらの有機 EL表示装置を 500時間点灯させた後に、それらの表示欠陥数 の増加について確認した。表示欠陥数は 320mm X 400mmの基板内の 2. 4インチ パネル 6枚の平均値とした。この有機 EL表示装置はパネル内に 320 X 240個の画 素を有している。 [0171] Regarding the lighting state in the pixel of these organic EL display devices, the light and darkness corresponding to the thin film transistor under the pixel electrode was confirmed by observation with an optical microscope. [0172] After these organic EL display devices were lit for 500 hours, the number of display defects was confirmed. The number of display defects was the average of six 2.4 inch panels in a 320mm x 400mm substrate. This OLED display has 320 x 240 pixels in the panel.
[0173] (実施例 5) [Example 5]
実施例 5においては、 2· 4インチのパネル 6枚が搭載された 320mm X 400mmの 基板を用いた。複数の TFT及び信号線が形成された基板上に、第 1平坦化層として 、アクリル系樹脂をスピンコート法によって 2 mの膜厚で積層した。第 1平坦化層は 、 TFT及び信号線が形成された基板上に形成した際、表面に 470nmの凹凸を生じ た。第 1平坦化層表面で生じた凹凸を研磨処理することにより、凹凸の最大深さを 50 nmまで低減した。図 6は、実施例 5における平坦化層の CMP法における研磨時間 に対する凹凸の最大深さを示す図である。 In Example 5, a 320 mm × 400 mm substrate on which six 2.4 inch panels were mounted was used. On the substrate on which a plurality of TFTs and signal lines were formed, an acrylic resin was laminated to a thickness of 2 m as a first planarization layer by a spin coating method. When the first planarization layer was formed on the substrate on which the TFT and the signal line were formed, a concavo-convex pattern of 470 nm was generated on the surface. By polishing the unevenness that occurred on the surface of the first planarization layer, the maximum depth of the unevenness was reduced to 50 nm. FIG. 6 is a diagram showing the maximum depth of the unevenness with respect to the polishing time in the CMP method of the planarization layer in Example 5.
[0174] 本実施例では、第 1平坦化層の凹凸の研磨処理として CMPを用い、研磨時間は 1 0分を要した。研磨処理を施して表面の凹凸の最大深さを小さくした前記第 1平坦化 層の上方に、第 2平坦化層を第 1平坦化層と同様に膜厚 2 ^ 111のアクリル系樹脂を積 層した。これら以外は上記実施形態 3と同様にして有機 EL表示装置を作製した。 [0174] In this example, CMP was used as the unevenness polishing process of the first planarization layer, and the polishing time required 10 minutes. Above the first planarization layer, which has been polished to reduce the maximum depth of unevenness on the surface, the second planarization layer is laminated with an acrylic resin having a thickness of 2 ^ 111 in the same manner as the first planarization layer. Layered. Other than these, an organic EL display device was fabricated in the same manner as in Embodiment 3 above.
[0175] 実施例 5の有機 EL表示装置は、スクラッチの発生数 1で発光上での影響はほとん ど見られず、画素電極下の凹凸に影響した輝度分布も確認されなかった。その結果 、画素欠陥数の増加は 0であり、画素内の点灯状態も良好であった。これは第 1平坦 化層表面の凹凸の最大深さが 50nmとなるまで研磨処理を行い、第 2平坦化層形成 後の凹凸の最大深さを 27nmにすることで、画素電極下方にある平坦化層を概ね平 坦にすることができ、平坦化層上の凹凸による輝度分布を低減し、画素電極上の有 機層の膜厚分布を改善することができたことによる。したがって、本発明によれば、表 示欠陥の少ない高品質の有機 EL表示装置を高い生産性及び高い歩留まりで製造 すること力 Sでさること力 Sゎカゝる。 [0175] In the organic EL display device of Example 5, the number of occurrences of scratch was 1 and almost no influence on light emission was observed, and the luminance distribution that affected the unevenness under the pixel electrode was not confirmed. As a result, the increase in the number of pixel defects was 0, and the lighting state in the pixel was also good. This is because polishing is performed until the maximum depth of unevenness on the surface of the first planarization layer reaches 50 nm, and the maximum depth of unevenness after the formation of the second planarization layer is set to 27 nm. This is because the planarization layer can be made almost flat, the luminance distribution due to the unevenness on the planarization layer can be reduced, and the film thickness distribution of the organic layer on the pixel electrode can be improved. Therefore, according to the present invention, it is possible to manufacture a high-quality organic EL display device with few display defects with high productivity and high yield.
[0176] (実施例 6) [0176] (Example 6)
実施例 6においては、第 1平坦化層表面で生じた凹凸を研磨処理することにより、 凹凸の最大深さを lOOnmまで低減した。研磨時間は 5分を要した。上記以外は実施 例 5と同様にして有機 EL表示装置を作製した。 In Example 6, the maximum depth of the unevenness was reduced to lOOnm by polishing the unevenness generated on the surface of the first planarization layer. The polishing time required 5 minutes. Other than above An organic EL display device was produced in the same manner as in Example 5.
[0177] 実施例 6の有機 EL表示装置は、スクラッチの発生数が 0で、画素電極下の凹凸に 影響した輝度分布も確認されなかった。その結果、画素欠陥数の増加は無ぐ画素 内の点灯状態も良好であった。これは第 1平坦化層表面の凹凸の最大深さを 100η mとなるまで研磨処理を行い、第 2平坦化層形成後の凹凸の最大深さを 42nmにす ることで、画素電極下方にある平坦化層を概ね平坦にすることができ、平坦化層上の 凹凸による輝度分布を低減し、画素電極上の有機層の膜厚分布を改善することがで きたことによる。したがって本発明によれば、表示欠陥の少ない高品質の有機 EL表 示装置を高レ、生産性及び高レ、歩留まりで製造することができることがわかる。 [0177] In the organic EL display device of Example 6, the number of scratches was 0, and the luminance distribution that affected the unevenness under the pixel electrode was not confirmed. As a result, there was no increase in the number of pixel defects, and the lighting state in the pixel was also good. This is performed by polishing until the maximum depth of the unevenness on the surface of the first planarizing layer reaches 100 ηm, and the maximum depth of the unevenness after forming the second planarizing layer is set to 42 nm. This is because a certain leveling layer can be made almost flat, the luminance distribution due to unevenness on the leveling layer can be reduced, and the film thickness distribution of the organic layer on the pixel electrode can be improved. Therefore, according to the present invention, it can be seen that a high-quality organic EL display device with few display defects can be manufactured with high productivity, high productivity, and high yield.
[0178] (実施例 7) [Example 7]
実施例 7においては、第 1平坦化層表面で生じた凹凸を研磨処理することにより、 凹凸の最大深さを 200nmまで低減した。研磨時間は 2分を要した。上記以外は実施 例 5と同様にして有機 EL表示装置を作製した。 In Example 7, the maximum depth of the unevenness was reduced to 200 nm by polishing the unevenness generated on the surface of the first planarization layer. The polishing time took 2 minutes. An organic EL display device was fabricated in the same manner as in Example 5 except for the above.
[0179] 実施例 7の有機 EL表示装置は、スクラッチの発生数が 0で、画素電極下の凹凸に 影響した輝度分布も確認されなかった。その結果、画素欠陥数の増加は 1であり、画 素内の点灯状態も良好であった。これは前記第 1平坦化層表面の凹凸の最大深さを lOOnmとなるまで研磨処理を行い、第 2平坦化層形成後の凹凸の最大深さを 80nm にすることで、画素電極下方にある平坦化層を概ね平坦にすることができ、平坦化層 上の凹凸による輝度分布を低減し、画素電極上の有機層の膜厚分布を改善すること 力 Sできたことによる。したがって、本発明によれば、表示欠陥の少ない高品質の有機 EL表示装置を高レ、生産性及び高レ、歩留まりで製造することができることがわかる。 [0179] In the organic EL display device of Example 7, the number of scratches was 0, and the luminance distribution that affected the unevenness under the pixel electrode was not confirmed. As a result, the increase in the number of pixel defects was 1, and the lighting state in the pixels was good. This is because the polishing process is performed until the maximum depth of the unevenness on the surface of the first planarization layer becomes lOOnm, and the maximum depth of the unevenness after the formation of the second planarization layer is set to 80 nm. This is because the planarization layer can be made almost flat, the luminance distribution due to the unevenness on the planarization layer can be reduced, and the film thickness distribution of the organic layer on the pixel electrode can be improved. Therefore, according to the present invention, it can be seen that a high-quality organic EL display device with few display defects can be manufactured with high productivity, high productivity, and high yield.
[0180] (比較例 7) [0180] (Comparative Example 7)
比較例 7においては、第 1平坦化層表面で生じた凹凸を研磨処理することにより、 凹凸の最大深さを 30nmまで低減した。研磨時間は 20分を要した。これは前述の実 施例 5〜7に比べて 2倍以上の研磨時間であり、生産性は著しく劣る。図 7に示す様 に、凹凸が 50nm未満では、凹凸変化が特に小さくなる傾向にあることより、研磨時 間は極めて長くなつた。上記以外は実施例 1と同様にして有機 EL表示装置を作製し た。 [0181] 比較例 7の有機 EL表示装置は、前記第 1平坦化層を研磨処理した際、膜面上に 1 0本のスクラッチが発生し、 16画素の表示欠陥数の増加が見られた。これは、膜面上 のスクラッチの発生については、実施例 1で 50nmまで研磨処理した際にはスクラッ チが問題とならなかったが、 50nmまでの研磨処理に対してその 2倍の所要時間を要 したことで膜面への負荷が大きくなり、比較的深く大きなスクラッチが多数発生したこ とによると考えられる。表示欠陥数の増加は、スクラッチが発生している膜面上に第 2 平坦化層形成後においても凹凸の最大深さが lOOnmを超える形跡が存在している と考えられる。有機 EL部は各層の膜厚が lOOnm以下で構成されていることより、 10 Onmを超える凹凸上に第 1電極を形成した場合、前記凹凸により生じた第 1電極の 欠陥は、その上方の lOOnm以下の薄い有機層への影響は著しいために、表示欠陥 数の増加につながったものと考えられる。比較例 1の有機 EL表示装置は、生産性及 び歩留まりで課題を残す結果となった。 In Comparative Example 7, the maximum depth of the irregularities was reduced to 30 nm by polishing the irregularities generated on the surface of the first planarization layer. The polishing time required 20 minutes. This is a polishing time more than twice that of Examples 5 to 7 described above, and the productivity is remarkably inferior. As shown in Fig. 7, when the unevenness is less than 50 nm, the polishing time becomes extremely long because the unevenness change tends to be particularly small. Except for the above, an organic EL display device was produced in the same manner as in Example 1. [0181] In the organic EL display device of Comparative Example 7, when the first planarization layer was polished, 10 scratches were generated on the film surface, and an increase in the number of display defects of 16 pixels was observed. . This is because scratching did not become a problem when polishing to 50 nm in Example 1 with respect to the generation of scratches on the film surface, but the required time twice that for polishing to 50 nm was taken. This is thought to be due to the fact that the load on the film surface increased and a large number of relatively deep and large scratches were generated. The increase in the number of display defects is considered to be evidence that the maximum depth of irregularities exceeds lOOnm even after the second planarization layer is formed on the film surface where scratches are generated. Since the thickness of each layer is less than lOOnm in the organic EL part, when the first electrode is formed on the unevenness exceeding 10 Onm, the defect of the first electrode caused by the unevenness is lOOnm above it. The following effects on the thin organic layer are significant, which is thought to have led to an increase in the number of display defects. The organic EL display device of Comparative Example 1 left problems in terms of productivity and yield.
[0182] (比較例 8) [0182] (Comparative Example 8)
比較例 8においては、第 1平坦化層表面で生じた凹凸を研磨処理することにより、 凹凸の最大深さを 300nmまで低減した。研磨時間は 1分を要した。上記以外は実施 例 3と同様にして有機 EL表示装置を作製した。 In Comparative Example 8, the maximum depth of the unevenness was reduced to 300 nm by polishing the unevenness that occurred on the surface of the first planarization layer. The polishing time took 1 minute. Except for the above, an organic EL display device was fabricated in the same manner as in Example 3.
[0183] 比較例 8の有機 EL表示装置は、画素内の点灯状態において画素電極下の TFT 等に相応した明暗が確認され、 9画素の表示欠陥数の増加が見られた。画素電極下 の TFT等に相応した明暗については、第 2の平坦化層形成後の凹凸の最大深さが 1 OOnmを超えることから、画素電極上に形成される有機層に膜厚分布を生じさせ、画 素内に画素電極下の凹凸に相応した輝度分布が生じたものと考えられる。また、 100 nmを超える凹凸上に第 1電極を形成した場合、前記凹凸により第 1電極上は容易に 欠陥が発生し、その上方の lOOnm以下の薄い有機層は前記第 1電極の欠陥の影響 を受けて、表示欠陥数の増加につながつたものと考えられる。比較例 8の有機 EL表 示装置は、表示品質及び信頼性で課題を残す結果となった。 [0183] In the organic EL display device of Comparative Example 8, brightness and darkness corresponding to the TFT under the pixel electrode was confirmed in the lighting state in the pixel, and an increase in the number of display defects of 9 pixels was observed. For the light and darkness corresponding to the TFT under the pixel electrode, the maximum depth of the unevenness after the second planarization layer formation exceeds 1 OOnm, resulting in a film thickness distribution in the organic layer formed on the pixel electrode. It is considered that the luminance distribution corresponding to the unevenness under the pixel electrode was generated in the pixel. In addition, when the first electrode is formed on the unevenness exceeding 100 nm, a defect is easily generated on the first electrode due to the unevenness, and the thin organic layer of less than lOOnm above it is affected by the defect of the first electrode. Therefore, it is considered that the number of display defects has been increased. The organic EL display device of Comparative Example 8 left problems with display quality and reliability.
産業上の利用可能性 Industrial applicability
[0184] 以上説明したように、本発明は、有機エレクト口ルミネッセンス表示装置及びその製 造方法について有用であり、特に、第 1電極の表面の平坦性を向上させることによつ て、表示品質を向上させる場合に適している。 [0184] As described above, the present invention is useful for an organic-electric-mouth luminescence display device and a method for manufacturing the same, and in particular, by improving the flatness of the surface of the first electrode. This is suitable for improving display quality.
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