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WO2008001363A3 - Mémoire flash monolithique ayant des parties de mémoire de code et de mémoire de données intégrées - Google Patents

Mémoire flash monolithique ayant des parties de mémoire de code et de mémoire de données intégrées Download PDF

Info

Publication number
WO2008001363A3
WO2008001363A3 PCT/IL2007/000778 IL2007000778W WO2008001363A3 WO 2008001363 A3 WO2008001363 A3 WO 2008001363A3 IL 2007000778 W IL2007000778 W IL 2007000778W WO 2008001363 A3 WO2008001363 A3 WO 2008001363A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory portion
memory
data
fabricated
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IL2007/000778
Other languages
English (en)
Other versions
WO2008001363A2 (fr
Inventor
Rony Levy
Lior Kruh
Adir Raz
Shlomo Berkovitch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KDR FLASHWARE Ltd
Original Assignee
KDR FLASHWARE Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KDR FLASHWARE Ltd filed Critical KDR FLASHWARE Ltd
Publication of WO2008001363A2 publication Critical patent/WO2008001363A2/fr
Publication of WO2008001363A3 publication Critical patent/WO2008001363A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)

Abstract

Cette invention a pour objet une puce mémoire (10) comprenant une première partie de mémoire (11) fabriquée à l'aide d'une technologie de piégeage de charge et configurée à l'aide d'une architecture de réseau de cellules mémoire NAND, et une seconde partie de mémoire (12) fabriquée à l'aide d'une technologie de piégeage de charge et ayant respectivement des premier et second ensembles d'adresses mutuellement distincts. Une partie de mémoire tampon (14) est couplée à la première partie de mémoire en vue d'un stockage temporaire de blocs de données écrits ou lus à partir de la première partie de mémoire. Des registres (18) stockent une instruction pour commander la première partie de mémoire. Une première interface (19) possède un bus d'adresse pour recevoir une adresse à l'intérieur des premier ou second ensembles d'adresses et un bus de données pour transporter des données vers et depuis la première partie de mémoire ou la seconde partie de mémoire, conformément à l'adresse. Tous les composants sont fabriqués sur une seule puce.
PCT/IL2007/000778 2006-06-27 2007-06-26 Mémoire flash monolithique ayant des parties de mémoire de code et de mémoire de données intégrées Ceased WO2008001363A2 (fr)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US81659606P 2006-06-27 2006-06-27
US60/816,596 2006-06-27
US84340606P 2006-09-11 2006-09-11
US60/843,406 2006-09-11
US86205406P 2006-10-19 2006-10-19
US60/862,054 2006-10-19
US88716207P 2007-01-30 2007-01-30
US60/887,162 2007-01-30

Publications (2)

Publication Number Publication Date
WO2008001363A2 WO2008001363A2 (fr) 2008-01-03
WO2008001363A3 true WO2008001363A3 (fr) 2008-04-24

Family

ID=38561212

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2007/000778 Ceased WO2008001363A2 (fr) 2006-06-27 2007-06-26 Mémoire flash monolithique ayant des parties de mémoire de code et de mémoire de données intégrées

Country Status (1)

Country Link
WO (1) WO2008001363A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9690650B2 (en) * 2013-03-11 2017-06-27 Macronix International Co., Ltd. Storage scheme for built-in ECC operations
US11640308B2 (en) * 2021-02-19 2023-05-02 Macronix International Co., Ltd. Serial NAND flash with XiP capability

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001084556A1 (fr) * 2000-05-03 2001-11-08 Advanced Technology Materials, Inc. Memoire morte programmable et effaçable electriquement dotee d'une capacite de programmation et d'effacement a taille de page reduite
US20040027856A1 (en) * 2002-07-05 2004-02-12 Aplus Flash Technology, Inc. Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
US20040071030A1 (en) * 2002-07-03 2004-04-15 Kabushiki Kaisha Toshiba Semiconductor integrated circuits, fabrication method for the same and semiconductor integrated circuit systems

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001084556A1 (fr) * 2000-05-03 2001-11-08 Advanced Technology Materials, Inc. Memoire morte programmable et effaçable electriquement dotee d'une capacite de programmation et d'effacement a taille de page reduite
US20040071030A1 (en) * 2002-07-03 2004-04-15 Kabushiki Kaisha Toshiba Semiconductor integrated circuits, fabrication method for the same and semiconductor integrated circuit systems
US20040027856A1 (en) * 2002-07-05 2004-02-12 Aplus Flash Technology, Inc. Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

Also Published As

Publication number Publication date
WO2008001363A2 (fr) 2008-01-03

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