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WO2008099878A1 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
WO2008099878A1
WO2008099878A1 PCT/JP2008/052434 JP2008052434W WO2008099878A1 WO 2008099878 A1 WO2008099878 A1 WO 2008099878A1 JP 2008052434 W JP2008052434 W JP 2008052434W WO 2008099878 A1 WO2008099878 A1 WO 2008099878A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
supply voltage
monitor
voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/052434
Other languages
English (en)
French (fr)
Inventor
Yoshifumi Ikenaga
Masahiro Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to US12/526,988 priority Critical patent/US8004348B2/en
Priority to JP2008558118A priority patent/JP5359279B2/ja
Priority to CN2008800052244A priority patent/CN101617398B/zh
Publication of WO2008099878A1 publication Critical patent/WO2008099878A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00369Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Power Sources (AREA)

Abstract

 制御回路(40)は、電源電圧供給回路(50)を制御し、ターゲット回路(60)に供給する電源電圧を制御する。基準速度モニター(20)は、ターゲット回路におけるクリティカルパスの遅延時間が、要求される動作速度を満たしているか否かをモニターする。電圧差モニター(30)は、ターゲット回路の電源電圧とターゲット回路におけるしきい電圧との差をモニターし、電圧差情報を出力する。制御回路は、基準速度モニターでのモニター結果に基づいて、電源電圧を上げるか又は下げるかを決定する。また、制御回路は、電源電圧を変化させる際には、電源電圧制御速度が、電圧差モニターが出力する電圧差情報に比例するように、電源電圧の変化レートを決定する。
PCT/JP2008/052434 2007-02-14 2008-02-14 半導体集積回路装置 Ceased WO2008099878A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/526,988 US8004348B2 (en) 2007-02-14 2008-02-14 Semiconductor circuit device controlling power source voltage
JP2008558118A JP5359279B2 (ja) 2007-02-14 2008-02-14 半導体集積回路装置
CN2008800052244A CN101617398B (zh) 2007-02-14 2008-02-14 半导体集成电路器件

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-033450 2007-02-14
JP2007033450 2007-02-14

Publications (1)

Publication Number Publication Date
WO2008099878A1 true WO2008099878A1 (ja) 2008-08-21

Family

ID=39690105

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/052434 Ceased WO2008099878A1 (ja) 2007-02-14 2008-02-14 半導体集積回路装置

Country Status (4)

Country Link
US (1) US8004348B2 (ja)
JP (1) JP5359279B2 (ja)
CN (1) CN101617398B (ja)
WO (1) WO2008099878A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010226076A (ja) * 2009-02-27 2010-10-07 Fujitsu Semiconductor Ltd 半導体集積回路、及び信号調整方法
US20110068855A1 (en) * 2009-09-18 2011-03-24 Renesas Electronics Corporation Semiconductor integrated circuit device and method for controlling power supply voltage
US8378738B1 (en) * 2009-10-16 2013-02-19 Marvell International Ltd. Adaptive voltage scaling using a delay line
JP2015115586A (ja) * 2013-12-16 2015-06-22 富士通株式会社 半導体装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100937939B1 (ko) * 2008-04-24 2010-01-21 주식회사 하이닉스반도체 반도체 소자의 내부전압 생성회로
US8130027B1 (en) * 2009-01-22 2012-03-06 Xilinx, Inc. Apparatus and method for the detection and compensation of integrated circuit performance variation
US8154335B2 (en) * 2009-09-18 2012-04-10 Stmicroelectronics Pvt. Ltd. Fail safe adaptive voltage/frequency system
US9223327B1 (en) * 2012-11-26 2015-12-29 Marvell International Ltd. Universal adaptive voltage scaling system
US20150180482A1 (en) * 2013-12-23 2015-06-25 Marvell Israel (M.I.S.L) Ltd. Apparatus and method for reacting to a change in supply voltage
JP6466761B2 (ja) * 2015-03-31 2019-02-06 ラピスセミコンダクタ株式会社 半導体装置、及び電源供給方法
JP6764299B2 (ja) * 2016-09-30 2020-09-30 ルネサスエレクトロニクス株式会社 半導体装置
US10055526B1 (en) * 2017-06-27 2018-08-21 Intel Corporation Regional design-dependent voltage control and clocking

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216338A (ja) * 1999-01-20 2000-08-04 Sony Corp 電源電圧制御装置
JP2000216337A (ja) * 1999-01-20 2000-08-04 Sony Corp 電源電圧制御装置
JP2003330549A (ja) * 2002-05-10 2003-11-21 Hitachi Ltd 半導体集積回路、電源回路及び情報記録媒体
JP2005141757A (ja) * 2003-11-07 2005-06-02 Hewlett-Packard Development Co Lp クロック信号を動的に変化させるためのシステムおよび方法
JP2005340426A (ja) * 2004-05-26 2005-12-08 Sony Corp 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4114291B2 (ja) * 1999-01-20 2008-07-09 ソニー株式会社 半導体装置およびその構成方法
EP1164454A4 (en) * 1999-12-22 2003-06-11 Sony Corp POWER SUPPLY CIRCUIT AND YOUR CONTROL METHOD
JP4783976B2 (ja) 1999-12-22 2011-09-28 ソニー株式会社 電圧供給回路及びその制御方法
US7755418B2 (en) * 2005-04-29 2010-07-13 Xerox Corporation Current source generator utilizing a portion of a targeted analog circuit
JP4542978B2 (ja) * 2005-10-27 2010-09-15 パナソニック株式会社 電源電圧制御装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216338A (ja) * 1999-01-20 2000-08-04 Sony Corp 電源電圧制御装置
JP2000216337A (ja) * 1999-01-20 2000-08-04 Sony Corp 電源電圧制御装置
JP2003330549A (ja) * 2002-05-10 2003-11-21 Hitachi Ltd 半導体集積回路、電源回路及び情報記録媒体
JP2005141757A (ja) * 2003-11-07 2005-06-02 Hewlett-Packard Development Co Lp クロック信号を動的に変化させるためのシステムおよび方法
JP2005340426A (ja) * 2004-05-26 2005-12-08 Sony Corp 半導体装置

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010226076A (ja) * 2009-02-27 2010-10-07 Fujitsu Semiconductor Ltd 半導体集積回路、及び信号調整方法
US20110068855A1 (en) * 2009-09-18 2011-03-24 Renesas Electronics Corporation Semiconductor integrated circuit device and method for controlling power supply voltage
US8368457B2 (en) * 2009-09-18 2013-02-05 Renesas Electronics Corporation Semiconductor integrated circuit device and method for controlling power supply voltage
US8378738B1 (en) * 2009-10-16 2013-02-19 Marvell International Ltd. Adaptive voltage scaling using a delay line
US8519781B1 (en) 2009-10-16 2013-08-27 Marvell International Ltd. Adaptive voltage scaling using a delay line
US8717089B1 (en) 2009-10-16 2014-05-06 Marvell International Ltd. Adaptive voltage scaling using a delay line
US9264030B1 (en) 2009-10-16 2016-02-16 Marvell International Ltd. Adaptive voltage scaling using a delay line
JP2015115586A (ja) * 2013-12-16 2015-06-22 富士通株式会社 半導体装置

Also Published As

Publication number Publication date
CN101617398B (zh) 2011-05-11
US20100033235A1 (en) 2010-02-11
JP5359279B2 (ja) 2013-12-04
CN101617398A (zh) 2009-12-30
US8004348B2 (en) 2011-08-23
JPWO2008099878A1 (ja) 2010-05-27

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