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WO2006082164A1 - Structure supraconductrice stratifiee haute temperature et procede de realisation associe - Google Patents

Structure supraconductrice stratifiee haute temperature et procede de realisation associe Download PDF

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Publication number
WO2006082164A1
WO2006082164A1 PCT/EP2006/050500 EP2006050500W WO2006082164A1 WO 2006082164 A1 WO2006082164 A1 WO 2006082164A1 EP 2006050500 W EP2006050500 W EP 2006050500W WO 2006082164 A1 WO2006082164 A1 WO 2006082164A1
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WIPO (PCT)
Prior art keywords
layer
temperature
buffer layer
cerium
cei
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2006/050500
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German (de)
English (en)
Inventor
Bernhard Holzapfel
Sebastian Engel
Ruben HÜHNE
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Leibniz Institut fuer Festkorper und Werkstofforschung Dresden eV
Original Assignee
Leibniz Institut fuer Festkorper und Werkstofforschung Dresden eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication of WO2006082164A1 publication Critical patent/WO2006082164A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0268—Manufacture or treatment of devices comprising copper oxide
    • H10N60/0296—Processes for depositing or forming copper oxide superconductor layers
    • H10N60/0576—Processes for depositing or forming copper oxide superconductor layers characterised by the substrate
    • H10N60/0632—Intermediate layers, e.g. for growth control

Definitions

  • the invention relates to the field of materials science and high-temperature superconducting technology and relates to a high-temperature layer superconductor structure, such as can be used in devices for transport, storage or conversion of electrical energy and a method for its preparation.
  • Coatings made of high-temperature superconductors are frequently used for applications in energy technology.
  • the disappearance of the electrical resistance below the transition temperature allows an increase in the efficiency of various devices, as well as more compact designs.
  • Such layer constructions usually consist of a carrier material, which in many cases is a thin metal strip with a layer of nonconductive material applied thereto, or it is a carrier of a non-conductive material, such as ceramic. Then there is the high-temperature superconducting layer.
  • band conductors can replace copper lines in established applications, which are loaded with high currents. The existing high copper losses high losses can be significantly reduced by the use of this band conductor and high current densities are feasible. For technical applications, the current carrying capacity of a superconductor is still of great importance. Investigations have shown that in order to maintain the current carrying capacity of superconductor layers either a monocrystalline or textured substrate and an epitaxially grown buffer layer must be present between superconductor layer and substrate.
  • a polycrystalline or amorphous substrate is provided with a biaxially textured buffer layer by means of coating under oblique deposit direction (ISD).
  • ISD under oblique deposit direction
  • Buffer layers also serve to prevent the diffusion of metal atoms of the carrier material into the superconducting material (diffusion barrier). At the same time, such a buffer layer can prevent the uncontrolled oxidation of the metallic substrate material during superconductor coating and specific temperature treatment in an oxygen-rich atmosphere, adjust the lattice parameters of the various materials, smooth the surface of the substrate to be coated and improve the adhesion of the superconducting material.
  • buffer layers consist in particular of oxides of metals, such as zirconium, cerium, yttrium, aluminum, strontium or magnesium or their mixed oxides and are generally electrically insulating (DE 299 23 162 U1).
  • the superconducting material is then located on the intermediate layers, the intermediate layer facing the carrier consisting of an yttrium oxide and a comparatively thin intermediate layer facing the superconductor layer consisting of a cerium oxide.
  • the disadvantage is that pure Ce ⁇ 2 layers are known to tend to form cracks from a layer thickness of> 30 nm because of the oxygen deficit.
  • a disadvantage of the known solutions is that the buffer layers must be used from several layers of different materials and with relatively large thicknesses.
  • the object of the invention is to specify a high-temperature layer superconductor structure which has a reliable diffusion barrier with a comparatively thin buffer layer and to specify a simple process for its production.
  • the high-temperature layer superconductor structure according to the invention consists of a carrier material, at least one buffer layer and a high-temperature superconductor layer, in which the buffer layer contains cerium oxides doped with cations.
  • the carrier material has a textured surface and is still advantageously a metal having a textured surface.
  • the support material is Ni or Hastalloy + IBAD.
  • the buffer layer contains CeO 2. It is furthermore advantageous if the buffer layers contain cations of calcium, magnesium, manganese, zinc, potassium, lanthanum, samarium and / or zirconium as doping.
  • At least one buffer layer containing cerium oxides and / or their precursor substances is applied to a carrier material, the cerium oxides or their precursor substances may already contain cations as dopants, and / or at least one layer of cation-containing doping elements applied on or between the buffer layer (s) and then after the temperature treatment, at 700 to 1000 0 C in a reducing atmosphere, at least one high-temperature superconductor layer is applied.
  • cerium CeO 2
  • Cei-x Ca x ⁇ 2 Cei-x Sm x ⁇ 2, Ce2Zr 2 + ⁇ ⁇ 6>
  • Cei-x Zr x O 2 Cei-x Nd x O 2
  • Cei-x La x O 2 Cei-x Zn x O 2
  • Cei-x Mn x O 2 Cei-x Mg x O 2
  • cerium (III) acetate cerium (III) nitrate, cerium (IV) nitrate, cerium (IV) ammonium nitrate, cerium (IV) isopropoxide.
  • the precursors of the doping elements are calcium acetate, calcium acetylacetonate, calcium nitrate, calcium nitrides, calcium peroxides, calcium hydrides, zinc acetate, zinc acetylacetonate, zinc 2-ethylhexonate, zinc nitrate, samarium (IM) acetylacetonate, samarium (III) isopropoxide, neodymium acetylacetonate, neodymium (IM ) isopropoxide, neodymium (III) nitrate,
  • IM Lanthanum (IM) acetate, lanthanum (IM) acetylacetonate, zirconium (IM) acetylacetonate, zirconium acetate, potassium acetate, potassium acetylacetonate, potassium benzoates, potassium tert-butoxide, potassium cabonate, potassium ethoxide, potassium ethylhexanoate, potassium hydroxide, Magnesium acetate, magnesium acetylacetonate, manganese acetate, manganese acetylacetonate, manganese nitrate, manganese oxalate, used.
  • buffer layer (s), the cation-containing dopant element layers and the high-temperature superconductor layers by MOD / CSD or sol-gel technologies, as solutions by dipping, spin coating, spin coating, pouring, knife coating, spraying, printing or by CVD or MOCVD or PLD or vapor deposition or sputtering.
  • a solution is prepared from precursor substances of the cerium oxides with a solvent and precursors of the cation-containing doping elements, this solution is applied to the substrate, dried and synthesized in a reducing atmosphere at 700 0 C to 1000 0 C, a buffer layer and subsequently a High-temperature superconducting layer is applied and subjected to a temperature treatment, being advantageously used as the solvent carboxylic acids and alkanols or mixtures thereof or short-chain organic acids, short-chain alcohols and acetylacetone or propionic acid, isopropanol or acetylacetone.
  • a very thin buffer layer of cerium oxides is applied to the carrier material, then a likewise very thin layer of cation-containing doping elements is applied and then a further buffer layer of cerium oxides can be applied, which in turn is followed by a layer of cation-containing doping elements can be applied, wherein advantageously after the layer of cation-containing doping elements either another layer of cerium oxides or at least one further layer of other buffer layer materials is applied.
  • At least one buffer layer of cerium oxides which either contains cations as dopants or is applied to at least one layer of cation-containing doping elements, is applied to the substrate at least one layer below After cooling, at least one further buffer layer without cations is applied as doping and the composite is synthesized under an oxidizing atmosphere.
  • thinner ( ⁇ 250 nm) and reliable buffer layers between the support material and the high-temperature superconductor layer can be realized. It is also particularly advantageous that a sufficient barrier effect can be achieved here by a single buffer layer according to the invention.
  • the use of only one buffer layer ( ⁇ 250 nm) or lower layer thicknesses of several buffer layers using at least one buffer layer according to the invention on the carrier material improves the mechanical properties of the high-temperature layer superconductor structure according to the invention.
  • a smaller bending radius in bands from the high-temperature layer superconductor construction according to the invention becomes possible, and flaking of the buffer layer and / or the high-temperature superconductor layer can be reduced or avoided altogether.
  • crack-free buffer layers according to the invention can be produced.
  • the barrier effect is ensured by partially replacing cerium in its lattice with a cation of the doping elements. This stabilizes oxygen vacancies and causes an increase in the binding energies within the cerium oxide lattice. It is likewise advantageous in the case of the high-temperature layer superconductor structure according to the invention that, in the case of production, a concentration gradient is achieved by using one or more layers with cation-containing doping elements, via the location of the layers in the layer structure of the entire buffer layer and via the thickness and the content of cations can be achieved in the synthesized buffer layer.
  • This grading affects the lattice parameters of the cerium oxides and allows the possibility of minimizing lattice mismatch of the various materials. In this way stresses within the layers are reduced and heteroepitaxial growth of comparatively thick and crack-free cerium oxide layers possible.
  • a further advantage is that the doping of the cerium oxide buffer layer with cations, in particular with cations of calcium, has a positive effect on the grain boundaries of the high-temperature superconductor and thus the critical current carrying capacity of the high-temperature layer superconductor structure according to the invention is improved.
  • YBCO can be used as the superconducting material for the high-temperature layer superconductor structure according to the invention.
  • high-temperature layer superconductor structure according to the invention is also advantageous that can be dispensed in the case of production on the application of solutions to the use of toxic substances. Also, the stability of various solutions over several weeks is stable, with consistently good coating properties. This makes a large-scale process easier to handle, cheaper and safer.
  • the coating is carried out on the textured nickel tape with the dimensions 10 x 10 x 0.08 mm 3 by means of a dipping apparatus.
  • the sample is drawn from the coating solution at a speed of 0.2 cm / s at a 90 ° angle to the solution surface.
  • the sample is introduced into the oven preheated to 600 ° C. under a reducing atmosphere (Ar / 5% H 2 ) and, after reaching the temperature, a holding time of 0.5 h takes place.
  • a temperature treatment includes at peak temperature (600 ° C / h to 1000 0 C, holding time 1 h).

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)

Abstract

L'invention concerne, dans le domaine des sciences des matériaux, une structure supraconductrice stratifiée haute température qui peut servir, par exemple, dans des dispositifs pour le transport du courant. L'invention vise à réaliser une structure supraconductrice stratifiée haute température présentant une barrière de diffusion fiable tout en étant dotée d'une couche tampon comparativement mince. A cet effet, la structure supraconductrice stratifiée haute température de l'invention comprend une matière support, au moins une couche tampon et une couche supraconductrice haute température, la couche tampon contenant du ou des céroxydes dopés avec des cations. La présente invention porte également sur un procédé pour réaliser une structure supraconductrice stratifiée haute température, selon lequel sur une matière support est appliquée au moins une couche tampon contenant du ou des céroxydes et/ou leurs substances précurseurs. Les céroxydes ou leurs substances précurseurs contiennent des cations comme dopants et/ou au moins une couche d'éléments de dopage contenant des cations est appliquée sur ou entre les couches tampons avec application, après traitement thermique de 700 à 1000 °C en atmosphère réduite, d'au moins une couche supraconductrice haute température.
PCT/EP2006/050500 2005-02-04 2006-01-29 Structure supraconductrice stratifiee haute temperature et procede de realisation associe Ceased WO2006082164A1 (fr)

Applications Claiming Priority (2)

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DE102005005800A DE102005005800A1 (de) 2005-02-04 2005-02-04 Hochtemperatur-Schichtsupraleiteraufbau und Verfahren zu seiner Herstellung
DE102005005800.0 2005-02-04

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2105978A1 (fr) * 2008-03-29 2009-09-30 Zenergy Power GmbH Système de couches comprenant un matériau supraconducteur à haute température
WO2009121321A1 (fr) * 2008-03-29 2009-10-08 Zenergy Power Gmbh Ensemble de couches de supraconducteur à haute température

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006041513B4 (de) * 2006-08-29 2008-10-16 Evico Gmbh Hochtemperatur-Schichtsupraleiteraufbau und Verfahren zu seiner Herstellung

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US5332689A (en) * 1993-02-17 1994-07-26 Micron Technology, Inc. Method for depositing low bulk resistivity doped films
US20020032125A1 (en) * 1997-04-14 2002-03-14 Erdal Celik Method of applying high temperature compatible insulation to superconductors
EP1195819A1 (fr) * 2000-10-09 2002-04-10 Nexans Couche tampon à base d'oxyde de cerium dopée pour adaption du réseau optimale d'une couche YBCO dans un conducteur et son procédé de fabrication
US20020139960A1 (en) * 2001-03-27 2002-10-03 National Institute Of Advanced Industrial Science And Technology Rare earth-Ba-Cu complex composition and method of producing superconductor using same
US20020144838A1 (en) * 1999-07-23 2002-10-10 American Superconductor Corporation, A Delaware Corporation Enhanced high temperature coated superconductors
US20020178999A1 (en) * 1997-09-02 2002-12-05 Beach David B. Laminate articles on biaxially textured metal substrates
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US20040157747A1 (en) * 2003-02-10 2004-08-12 The University Of Houston System Biaxially textured single buffer layer for superconductive articles

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DE29923162U1 (de) * 1999-02-01 2000-04-27 Siemens AG, 80333 München Langgestreckter Supraleiteraufbau mit Hoch-T¶c¶·-Supraleitermaterial und metallischem Träger
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US20020032125A1 (en) * 1997-04-14 2002-03-14 Erdal Celik Method of applying high temperature compatible insulation to superconductors
US20020178999A1 (en) * 1997-09-02 2002-12-05 Beach David B. Laminate articles on biaxially textured metal substrates
US20020144838A1 (en) * 1999-07-23 2002-10-10 American Superconductor Corporation, A Delaware Corporation Enhanced high temperature coated superconductors
EP1195819A1 (fr) * 2000-10-09 2002-04-10 Nexans Couche tampon à base d'oxyde de cerium dopée pour adaption du réseau optimale d'une couche YBCO dans un conducteur et son procédé de fabrication
US20040147403A1 (en) * 2001-03-02 2004-07-29 Bielefeldt Hartmut Ulrich Superconductor system with enhanced current carrying capability
US20020139960A1 (en) * 2001-03-27 2002-10-03 National Institute Of Advanced Industrial Science And Technology Rare earth-Ba-Cu complex composition and method of producing superconductor using same
US20040157747A1 (en) * 2003-02-10 2004-08-12 The University Of Houston System Biaxially textured single buffer layer for superconductive articles

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2105978A1 (fr) * 2008-03-29 2009-09-30 Zenergy Power GmbH Système de couches comprenant un matériau supraconducteur à haute température
WO2009121321A1 (fr) * 2008-03-29 2009-10-08 Zenergy Power Gmbh Ensemble de couches de supraconducteur à haute température
US20090298698A1 (en) * 2008-03-29 2009-12-03 Zenergy Power Gmbh High-temperature superconductor layer arrangement
JP2011520215A (ja) * 2008-03-29 2011-07-14 ゼナジー・パワー・ゲゼルシャフト・ミト・ベシュレンクテル・ハフツング 高温超電導体層配列
US8394741B2 (en) 2008-03-29 2013-03-12 Basf Se High-temperature superconductive layer arrangement

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