WO2003096427A1 - Rear surface irradiation photodiode array and method for producing the same - Google Patents
Rear surface irradiation photodiode array and method for producing the same Download PDFInfo
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- WO2003096427A1 WO2003096427A1 PCT/JP2003/005852 JP0305852W WO03096427A1 WO 2003096427 A1 WO2003096427 A1 WO 2003096427A1 JP 0305852 W JP0305852 W JP 0305852W WO 03096427 A1 WO03096427 A1 WO 03096427A1
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- semiconductor substrate
- photodiode array
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/809—Constructional details of image sensors of hybrid image sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/199—Back-illuminated image sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
Definitions
- the present invention relates to a back-illuminated photodiode array and a method for manufacturing the same.
- Three-dimensional packaging technology has been studied in many fields. Conventionally, in three-dimensional mounting, a hole penetrating the upper and lower surfaces of a substrate is formed, and an electrode on one side is drawn out to the other side through the hole.
- ICP plasma etching is usually used, but the thickness of the wafer is 300 ⁇ ! Since it is as thick as about 400 / i i, it takes a lot of time to form a through hole.
- the etching process using the ICP plasma etching apparatus is performed once per wafer Z, it is impossible to process a plurality of wafers at the same time. As a result, a through hole is formed per wafer. Requires a lot of time. Therefore, if such an etching technique is used, a product that can form only a small amount of products by one etching, that is, a large-area photodiode array cannot be mass-produced industrially. For example, even if it takes several hours per wafer to form a hole and several large-area photodiode arrays are formed, it is not industrially feasible.
- the present invention has been made in view of such problems, and has as its object to provide a back-illuminated photodiode array that can be mass-produced and a method for manufacturing the same.
- a method for manufacturing a back-illuminated photodiode array includes: (a) a step of forming a high-concentration impurity region on one surface side of a semiconductor substrate; (C) polishing the other surface of the semiconductor substrate to reduce the thickness of the semiconductor substrate; and (d) polishing the other surface of the semiconductor substrate to reduce the thickness of the semiconductor substrate.
- Side with a high concentration impurity region and multiple photodiodes (E) forming a hole from the high-concentration impurity region on the other surface side of the semiconductor substrate to reach the high-concentration impurity region on the one surface side; and (f) the one-side surface.
- One of the anode and the power source of the photodiode is located on one side or the other side of the semiconductor substrate, and the other is located on the remaining side.
- the photodiode array is thinned by the polishing process, so that the time for forming the holes is reduced, and the high-concentration impurity regions formed on both sides of the semiconductor substrate are connected through the holes. Therefore, the anode and the power source of the photodiode can be electrically led to the same surface (the other surface) of the semiconductor substrate.
- the problem related to the reduction of the substrate strength due to the thin film bonding and further to the problem of wafer breakage can be reinforced because the support substrate is provided on one side of the semiconductor substrate during wafer production.
- a photodiode array having a plurality of photodiodes can be mass-produced for the first time in the industry. Further, since the photodiode array is of the back-illuminated type, it has a high signal-to-noise ratio and can be used for a highly accurate photodetector.
- the semiconductor substrate and the high-concentration impurity region are of a first conductivity type (for example, n-type), and the plurality of photodiodes are composed of a plurality of second conductivity type (for example,!) Impurity regions and a semiconductor substrate.
- the anode or the force sword located on the one surface side of any of the photodiodes may be electrically guided to the other surface side.
- the whole-surface impurity semiconductor layer functions as an accumulation layer.
- the method of manufacturing a back-illuminated photodiode array of the present invention is characterized by further comprising a step of embedding a resin in the hole.
- a resin in the hole By embedding resin in the holes, the strength of the semiconductor substrate can be improved.
- the resin can be embedded by an ordinary photolithography process using a small resist, and the electrodes can be exposed by the photoresist.
- the above-described method for manufacturing a back-illuminated photodiode array includes a step of forming a bump on the other surface of the semiconductor substrate so that an anode and a cathode of the photodiode are electrically connected to a circuit board. It is preferable that the method further includes a step of attaching to the circuit board via
- the anode of the photodiode and the connection wiring of the force sword electrically connected to the circuit board by the bump can extend in the direction of the circuit board, that is, in the thickness direction of the semiconductor substrate, so that the mounting area can be reduced. That is, since the dead space is reduced in the plane direction, a plurality of back-illuminated photodiode arrays can be arranged in the lateral direction (two-dimensionally) of the semiconductor substrate. Can be provided.
- This large-area back-illuminated photodiode array can be applied to computer tomography (CT) and positron emission tomography (PET) equipment by combining it with a scintillator that converts X-rays and ⁇ -rays into visible light. can do.
- CT computer tomography
- PET positron emission tomography
- the back-illuminated photodiode array of the present invention can be manufactured by the above-described method, and the high concentration impurity region is formed on one side and the other side of the semiconductor substrate.
- the high-concentration impurity regions make the semiconductor substrate thick. It is electrically connected via a hole penetrating in the direction, and the hole is filled with a resin.
- This backside illuminated photodiode array has advantages in three-dimensional mounting and manufacturing method, and the resin in the holes can suppress a decrease in substrate strength of the backside illuminated photodiode.
- the semiconductor substrate and the high-concentration impurity region are of a first conductivity type, and a photodiode formed on the other surface side of the semiconductor substrate includes a second conductivity-type impurity region and a semiconductor substrate. It is preferable to provide a first-conductivity-type full-surface impurity semiconductor layer shallower than the high-concentration impurity region on the entire surface on one side of the semiconductor substrate.
- the entire impurity semiconductor layer can function as an accumulation layer, and high-performance detection can be performed.
- FIG. 1A is an explanatory diagram for explaining a method of manufacturing a back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1B is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1C is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1D is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1E is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1F is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1G is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1H is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1I is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 1J is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array.
- FIG. 2 is an explanatory diagram of an imaging apparatus including a plurality of back-illuminated photodiode arrays PDA shown in FIG.
- 1A to 1J are explanatory views for explaining a method of manufacturing the back-illuminated photodiode array according to the embodiment, and show a vertical cross-sectional configuration of the back-illuminated photodiode array. The details are described below.
- a semiconductor substrate (wafer) 1 made of Si is prepared.
- the conductivity type of the semiconductor substrate 1 is n-type, and the specific resistance is about lk ⁇ ⁇ cm.
- the specific resistance of the semiconductor substrate 1 is set in consideration of the balance between low capacitance, low noise, and high-speed response.
- a plurality of n-type high-concentration impurity regions In having a thickness of a predetermined number / space are formed (FIG. 1A).
- the “back surface” is a light incident surface of a back-illuminated photodiode that is finally manufactured, and is a rule used for convenience of description, and is not a lower surface of the drawing. I want to.
- the high-concentration impurity region In is n-type and is formed by diffusion of phosphorus. 10 17 cm—means a region with a carrier concentration of 3 or more.
- a thin impurity semiconductor 1nc is formed on the entire back surface of the semiconductor substrate 1 (FIG. 1B).
- the conductivity type of the impurity semiconductor layer 1nc is n-type, and the impurity concentration is high.
- the impurity used in this formation step is arsenic, and the depth of the ion implantation is set to be smaller than the diffusion depth of phosphorus, so that the depth becomes shallow (0.1 ⁇ or less).
- the method for forming this layer is an ion implantation method.
- the implantation energy is 80 kev and the dose is 2 ⁇ 10 15 cm ⁇ 2 . Since the depth of this layer is shallow, the sensitivity of the photodetector is high.
- the support substrate 3 is bonded to the back surface of the semiconductor substrate 1 (FIG. 1D).
- the material of the support substrate 3 does not need to be a special material because it is removed in a later step as described later.
- p-type silicon of several tens ⁇ ⁇ cm which is generally available, is used.
- the bonding step the supporting substrate 3 is pressed against the semiconductor substrate 1 via the oxide film 2 and bonded by applying heat of 100 ° C. or less.
- the support substrate 3 is polished from the front side (the side opposite to the back side: the other side) to thin the semiconductor substrate 1 to a predetermined thickness (FIG. 1E).
- the thickness of the semiconductor substrate 1 after this mirror polishing step is, for example, several tens ⁇ to 150 / im, and preferably about 50 ⁇ to 100 m.
- n-type high-concentration impurity regions I n ′ and a plurality of p-type impurity regions 1 P separated by a predetermined distance are formed on the surface side of the semiconductor substrate 1, and further, the surface side of the semiconductor substrate 1 is thermally oxidized.
- An oxide film (S i 0 2 ) 4 is formed (FIG. 1F).
- n-type high concentration impurity region Region I n ' is formed by diffusing phosphorus.
- the ⁇ > type impurity region lp is formed by diffusing or implanting boron into the substrate.
- the P-type impurity region 1 P forms a PN junction with the n-type semiconductor substrate 1 to form a photodiode. This photodiode is located on the front surface side of the semiconductor substrate 1.
- the photodiode can be an avalanche photodiode or a PIN photodiode.
- a hole H reaching the back side from the front side of the semiconductor substrate 1 is formed (FIG. 1G).
- the hole H is formed by using the oxide film 4 on the surface side of the semiconductor substrate 1 to form a mask having an opening on the high-concentration impurity region 1 n ′, and etching the surface of the semiconductor substrate 1 through the mask.
- the oxide film 4 can be patterned by photolithography so that the oxide film 4 is used as a mask.
- isotropic wet etching can be used, and isotropic dry etching such as atmospheric pressure plasma etching (ADP) can also be used.
- H F ZHN Og or the like can be used as an etchant for wet etching.
- the shape of the hole H becomes a mortar shape, that is, a tapered shape, so that step coverage in the subsequent electrode formation is improved.
- the exposed side of the high-concentration impurity region 1 n ′ on the front surface side of the semiconductor substrate 1 and the exposed side surface of the high-concentration impurity region 1 n on the back surface and the etched side surface of the semiconductor substrate 1 constitute the inner surface of the hole H. Will be done.
- an n-type impurity is added into the semiconductor substrate 1 from the side surface of the hole H to electrically connect the n-type high-concentration impurity region 1 n ′ on the front surface and the n-type high-concentration impurity region 1 n on the back surface.
- This impurity added region is indicated by reference numeral h1.
- This impurity addition step The ion implantation or diffusion of the n-type impurity is performed from the surface side of the semiconductor substrate 1 with the mask left or with the oxide film 4 as a mask. Process (9)
- a metal electrode film h2 made of aluminum is formed on the inner surface of the hole H. This forms a force sword common electrode and extends to the surface of the semiconductor substrate 1. If the oxide film 4 is patterned so that the surface of the p-type impurity region 1 p of the semiconductor substrate 1 is exposed before the formation of the metal electrode film h 2, the p-type impurity region 1 p is formed simultaneously with the metal electrode film h 2. Can be formed. Thereafter, a photosensitive resin (photoresist such as polyimide) R is applied on the surface of the semiconductor substrate 1 so as to fill the inner surface of the hole H, and a metal electrode made of aluminum is formed by a photolithography process. Expose. Further, Ni and Au are sequentially plated on the exposed metal electrode portion, thereby forming an electrode OM on the photodiode array.
- photosensitive resin photoresist such as polyimide
- the support substrate 3 is completely removed by grinding and dry etching to expose the oxide film 2 serving as a light incident surface.
- the photodiode array chip is arranged upside down, that is, in such a manner that the front side of the semiconductor substrate 1 is located on the circuit board C side and the light incident surface is the back side. That is, the semiconductor substrate 1 is placed on the circuit board C via bumps B made of Au or solder, and the bumps B electrically connect the photodiode electrodes OM to the wiring on the circuit board C (see FIG. 1 J).
- the cathode of the photodiode that is, the n-type semiconductor substrate 1 and the n-type high-concentration impurity region 1 n are connected to the electrode OM located on the surface side of the semiconductor substrate 1 via the metal electrode film h2 and the impurity-doped region h1. ing.
- the anode of the photodiode that is, the P-type impurity region 1 P is It is connected to the polar membrane h2 and the electrode ⁇ M. These electrodes are connected to the power source wiring and the anode wiring of the circuit board C via the bumps B, respectively.
- the method of manufacturing the back-illuminated photodiode array described above includes: (a) forming a high-concentration impurity region 1 n on one surface (back surface) of the semiconductor substrate 1; (C) bonding the support substrate 3 to the back surface of the semiconductor substrate 1; (c) polishing the other surface (front surface) of the semiconductor substrate 1 to thin the semiconductor substrate 1; (E) forming a high-concentration impurity region 1 n ′ and a plurality of photodiodes on the front surface of the semiconductor substrate 1; (F) electrically connecting the high-concentration impurity regions I n and In ′ on the back side and the front side via the hole H; and (g) forming the step (g). removing the supporting substrate 3 after f).
- One of the anode and the power source of the photodiode is located on one of the one surface side and the other surface side of the semiconductor substrate, and the other is located on the remaining surface side.
- the photodiode array that is, the semiconductor substrate 1 is thinned to a predetermined thickness by the polishing step, so that the time for forming the hole H is shortened, and the semiconductor substrate 1 is formed through the hole H. Since the high-concentration impurity regions 1 ⁇ , I n ′ formed on both sides of the semiconductor substrate 1 are connected, the anode and the power source of the photodiode can be electrically guided to the same surface (front surface) of the semiconductor substrate 1. Although the strength of the substrate is reduced by thinning, a supporting substrate is provided on the back surface side of the semiconductor substrate 1, which can be reinforced during the pre-processing (process) step.
- a photodiode array equipped with a photodiode will become commercially viable. Furthermore, since this photodiode array is of the back-illuminated type, it has a high signal-to-noise ratio and can be used for a highly accurate detection device.
- the above-described method for manufacturing a back-illuminated photodiode array further includes a step of embedding a resin R in the hole H, and improving the strength of the semiconductor substrate 1 by embedding the resin in the hole H.
- the resin to be embedded in the hole H has photosensitivity.
- a step of applying a photoresist to be the resin to the entire surface on the other surface (front surface) side of the semiconductor substrate 1 includes: The method further includes a step of removing only the photoresist in the region where the electrode (h2, OM) on the other surface side of the substrate 1 is to be formed, and a step of forming the electrode h2 in the region where the photoresist has been removed.
- the resin R can be buried by a normal photolithography process using a photoresist, and an electrode having a contact formed by an oxide film patterned with a photoresist can be exposed before the electrode is formed.
- the semiconductor substrate 1 and the high-concentration impurity regions 1 n and In ′ are of the first conductivity type (n-type in the above), and the plurality of photodiodes are a plurality of impurity types in the second conductivity type (p-type in the above).
- the anode or the force sword which is composed of 1 p and the semiconductor substrate 1 and is located on one side (back side) of one of the photodiodes, is electrically guided to the other side (front side).
- the above-described manufacturing method includes a step of forming a first-conductivity-type (n-type in the above) full-surface impurity semiconductor layer 1nc shallower than the high-concentration impurity region over the entire surface on one side of the semiconductor substrate 1. Therefore, the entire impurity semiconductor layer 1nc can function as an accumulation layer.
- the above-described manufacturing method includes a step of forming the oxide film 2 on one surface side (back surface) of the semiconductor substrate 1, it can function as a protective film.
- the above-described method for manufacturing a back-illuminated photodiode array includes a bump B on the front side of the semiconductor substrate 1 so that the anode and the power source of the photodiode are electrically connected to the circuit board C. And a process of attaching to the circuit board C via the In this case, the connection node of the photodiode node and the force source electrically connected to the circuit board C by the bump B can extend in the circuit board direction, that is, the thickness direction of the semiconductor substrate 1, so that the mounting area is reduced.
- high-concentration impurity regions 1 n and In ′ are formed on the back side and the front side of the semiconductor substrate 1, and PN junctions are formed on the front side of the semiconductor substrate 1, respectively.
- the high-concentration impurity regions 1 ⁇ and In ′ are connected to each other through a hole H penetrating the semiconductor substrate 1 in the thickness direction. It is electrically connected, and the resin H is filled in the hole H.
- the backside illuminated photodiode array has advantages in three-dimensional mounting and manufacturing method, and the resin in the holes can suppress a decrease in the substrate strength of the backside illuminated photodiode.
- the semiconductor substrate 1 and the high-concentration impurity regions I n and I n ′ are of the first conductivity type (11 type in the above description).
- the photodiode formed on the other surface side is composed of the impurity region 1 p and the semiconductor substrate 1 of the second conductivity type (above!) Type. Since there is a shallow first-conductivity-type whole-surface impurity semiconductor layer 1 nc, the whole-surface impurity semiconductor layer 1 nc can function as an accumulation layer, and high-performance detection can be performed.
- FIG. 3 is an explanatory diagram of an imaging device including a plurality of 0s on a circuit board. According to the configuration described above, three-dimensional mounting is possible, so that a back-illuminated photodiode array PDA with a small dead space in a plurality of planar directions can be two-dimensionally arranged without gaps. That is, it is possible to provide an imaging device having a larger area as a whole.
- Such large-area back-illuminated photodiode arrays are applied to X-ray computer tomography (CT) equipment, specifically, panel-shaped multi-X-ray CT equipment and positron emission tomography (PET) equipment. can do.
- CT computer tomography
- PET positron emission tomography
- a two-dimensionally divided scintillator BGO, CS ⁇ , CWO, etc.
- chemical polishing can be used in addition to mechanical polishing, and the exposed surface of the semiconductor substrate 1 can be mirror-finished.
- the entire impurity semiconductor layer 1nc on the rear surface side functions as an accumulation layer.
- the accumulation layer can be at ground potential, but it can also be given a positive potential so that a reverse bias is applied.
- the ultraviolet sensitivity can be improved because the entire impurity semiconductor layer serving as the accumulation layer can be formed thin.
- a dicing tape is attached to the semiconductor substrate 1, and the dicing is performed.
- the bonded support substrate 3 can be removed by mechanical polishing and dry etching. In this case, other methods such as laser can be adopted in addition to the normal blade dicing.
- a bias can be applied via the bump B, and not only a photodiode with a simple zero bias, but also a high-speed, low-noise sensor (PIN photodiode, avalanche photodiode) can be realized. According to the backside illumination type photodiode array and the method of manufacturing the same of the present invention, mass production becomes possible.
- the present invention can be used for a back-illuminated photodiode array and a method for manufacturing the same.
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Abstract
Description
糸田 » Itoda »
裏面照射型ホトダイォードアレイ及びその製造方法 Backside illuminated photodiode array and method of manufacturing the same
技術分野 Technical field
本発明は、 裏面照射型ホトダイォードアレイ及びその製造方法に関する。 The present invention relates to a back-illuminated photodiode array and a method for manufacturing the same.
背景技術 Background art
三次元実装技術が多くの分野で研究されている。従来、三次元実装においては、 基板上下面を貫通する孔を形成し、 この孔を介して一方面側の電極を他方面側に 引き出すことが行われている。 Three-dimensional packaging technology has been studied in many fields. Conventionally, in three-dimensional mounting, a hole penetrating the upper and lower surfaces of a substrate is formed, and an electrode on one side is drawn out to the other side through the hole.
発明の開示 Disclosure of the invention
ところが、 このような三次元実装における貫通孔形成工程では、 通常 ICPブラ ズマエッチングを用いるが、 ウェハの厚さは 3 0 0 μ π!〜 4 0 0 /i i 程度と厚い ため、 貫通孔を形成するためには多大な時間を要する。 また、 I CPプラズマエツ チング装置によるエツチング処理はウェハ 1枚 Z 1回であるので、 複数枚のゥェ ハを同時に処理することができないため、 結果として 1枚のウェハ当たりに貫通 孔を形成するのに多大な時間を要する。 したがってこのようなエッチング技術を 用いていたのでは、 一度のエッチングで少量の製品しか形成できない製品、 すな わち、 大面積ホトダイオードアレイは工業的な量産ができない。 例えば、 孔の形 成に 1ウェハ当たり数時間も要して数個の大面積ホトダイォードアレイを形成し ても工業的には成立しない。 However, in the through-hole forming process in such three-dimensional mounting, ICP plasma etching is usually used, but the thickness of the wafer is 300 μπ! Since it is as thick as about 400 / i i, it takes a lot of time to form a through hole. In addition, since the etching process using the ICP plasma etching apparatus is performed once per wafer Z, it is impossible to process a plurality of wafers at the same time. As a result, a through hole is formed per wafer. Requires a lot of time. Therefore, if such an etching technique is used, a product that can form only a small amount of products by one etching, that is, a large-area photodiode array cannot be mass-produced industrially. For example, even if it takes several hours per wafer to form a hole and several large-area photodiode arrays are formed, it is not industrially feasible.
本発明は、 このような課題に鑑みてなされたものであり、 量産が可能な裏面照 射型ホトダイォードアレイ及びその製造方法を提供することを目的とする。 The present invention has been made in view of such problems, and has as its object to provide a back-illuminated photodiode array that can be mass-produced and a method for manufacturing the same.
上述の課題を解決するため、 本発明に係る裏面照射型ホトダイォードアレイの 製造方法は、 (a ) 半導体基板の一方面側に高濃度不純物領域を形成する工程と、 ( b )前記半導体基板の前記一方面側に支持基板を貼り合わせる工程と、 (c )前 記半導体基板の他方面側を研磨して前記半導体基板を薄膜化する工程と、 (d )前 記半導体基板の前記他方面側に高濃度不純物領域及び複数のホトダイォードを形 成する工程と、 (e )前記半導体基板の前記他方面側の前記高濃度不純物領域から 前記一方面側の前記高濃度不純物領域に到達する孔を形成する工程と、 ( f )前記 一方面側と前記他方面側の前記高濃度不純物領域を前記孔を介して電気的に接続 する工程と、 (g ) 前記工程(f ) の後に前記支持基板を除去する工程とを備える ことを特徴とする。 ホトダイオードのアノード及び力ソードの一方は、 半導体基 板の一方面側及び他方面側のいずれか一方に位置し、 他方は残りの面側に位置す る。 In order to solve the above-mentioned problems, a method for manufacturing a back-illuminated photodiode array according to the present invention includes: (a) a step of forming a high-concentration impurity region on one surface side of a semiconductor substrate; (C) polishing the other surface of the semiconductor substrate to reduce the thickness of the semiconductor substrate; and (d) polishing the other surface of the semiconductor substrate to reduce the thickness of the semiconductor substrate. Side with a high concentration impurity region and multiple photodiodes (E) forming a hole from the high-concentration impurity region on the other surface side of the semiconductor substrate to reach the high-concentration impurity region on the one surface side; and (f) the one-side surface. Electrically connecting the high-concentration impurity region on the other surface side through the hole, and (g) removing the support substrate after the step (f). . One of the anode and the power source of the photodiode is located on one side or the other side of the semiconductor substrate, and the other is located on the remaining side.
この製造方法によれば、 研磨工程によってホトダイオードアレイが薄膜化され るので、 孔の形成時間が短縮され、 且つ、 この孔を介して半導体基板の両面側に 形成された高濃度不純物領域を接続するので、 ホトダイオードのアノード及び力 ソードを半導体基板の同一面 (他方面) 側に電気的に導くことができる。 薄膜ィ匕 による基板強度の低下、 更にはウェハ破損に係る問題は、 ウェハ製造中に、 半導 体基板の一方面側には支持基板が設けられるので、これを補強することができる。 かかる発明によって、 複数のホトダイォードを備えたホトダイォードアレイがェ 業的に初めて量産可能となる。 更に、 このホトダイオードアレイは裏面照射型で あるため、 信号雑音比が高く、 高精度の光検出装置に用いることができることと なる。 According to this manufacturing method, the photodiode array is thinned by the polishing process, so that the time for forming the holes is reduced, and the high-concentration impurity regions formed on both sides of the semiconductor substrate are connected through the holes. Therefore, the anode and the power source of the photodiode can be electrically led to the same surface (the other surface) of the semiconductor substrate. The problem related to the reduction of the substrate strength due to the thin film bonding and further to the problem of wafer breakage can be reinforced because the support substrate is provided on one side of the semiconductor substrate during wafer production. According to this invention, a photodiode array having a plurality of photodiodes can be mass-produced for the first time in the industry. Further, since the photodiode array is of the back-illuminated type, it has a high signal-to-noise ratio and can be used for a highly accurate photodetector.
また、 前記半導体基板及び前記高濃度不純物領域は第一導電型 (例えば n型) であって、 前記複数のホトダイオードは複数の第二導電型 (例えば!)型) 不純物 領域と半導体基板とで構成され、 いずれかの前記ホトダイォードの前記一方面側 に位置するアノード又は力ソードは前記他方面側に電気的に導かれている構成と することができる。 The semiconductor substrate and the high-concentration impurity region are of a first conductivity type (for example, n-type), and the plurality of photodiodes are composed of a plurality of second conductivity type (for example,!) Impurity regions and a semiconductor substrate. The anode or the force sword located on the one surface side of any of the photodiodes may be electrically guided to the other surface side.
また、 前記半導体基板の一方面側の全面に前記高濃度不純物領域より浅い第一 導電型の全面不純物半導体層を形成する工程を備えると、 この全面不純物半導体 層はアキュムレーシヨン層として機能する。 Further, when a step of forming a first-conductivity-type full-surface impurity semiconductor layer shallower than the high-concentration impurity region on the entire surface on one surface side of the semiconductor substrate, the whole-surface impurity semiconductor layer functions as an accumulation layer.
また、 前記半導体基板の一方面側に酸化膜を形成する工程を備える場合には、 これを保護膜として機能させることができる。 In the case where a step of forming an oxide film on one surface side of the semiconductor substrate is provided, This can function as a protective film.
また、 本発明の裏面照射型ホトダイオードアレイの製造方法は、 前記孔内に樹 脂を埋め込む工程を更に備えることを特徴とする。 孔内に樹脂を埋め込むことに よって、 半導体基板の強度を向上させることができる。 Further, the method of manufacturing a back-illuminated photodiode array of the present invention is characterized by further comprising a step of embedding a resin in the hole. By embedding resin in the holes, the strength of the semiconductor substrate can be improved.
また、 前記孔内に埋め込む樹脂は感光性を有し、 この樹脂となるフォトレジス トを前記半導体基板の他方面側の全面に塗布する工程と、 前記半導体基板の他方 面側の電極形成予定領域のフォトレジス トのみ除去する工程と、 フォトレジスト が除去された領域に電極を形成する工程と、 を更に備えることが好ましい。 この 場合には、 フォ小レジストを用いた通常のフォトリソグラフィプロセスにより樹 脂を埋設できるとともに、 当該フォトレジス トによって電極の露出を行うことが できる。 A step of applying a photoresist as the resin to the entire surface on the other surface side of the semiconductor substrate; and a step of forming an electrode on the other surface side of the semiconductor substrate. It is preferable that the method further includes a step of removing only the photoresist and a step of forming an electrode in a region from which the photoresist has been removed. In this case, the resin can be embedded by an ordinary photolithography process using a small resist, and the electrodes can be exposed by the photoresist.
更に、 三次元実装という観点から、 上述の裏面照射型ホトダイオードアレイの 製造方法は、 前記ホトダイオードのアノード及びカソードが回路基板に電気的に 接続されるよう、 前記半導体基板の前記他方面側をバンプを介して前記回路基板 に取り付ける工程を更に備えることが好ましい。 この場合、 バンプによって回路 基板に電気的に接続されるホトダイォードのアノード及び力ソードの接続配線は 回路基板方向、 すなわち、 半導体基板厚み方向に延びることができるので、 実装 面積を小さくすることができる。 すなわち、 平面方向にデッドスペースが小さく なるため半導体基板横方向 (二次元的に) に複数の裏面照射型ホトダイオードァ レイを配列することができるようになり、 全体として、 更に大面積の撮像装置を 提供することができる。 Further, from the viewpoint of three-dimensional mounting, the above-described method for manufacturing a back-illuminated photodiode array includes a step of forming a bump on the other surface of the semiconductor substrate so that an anode and a cathode of the photodiode are electrically connected to a circuit board. It is preferable that the method further includes a step of attaching to the circuit board via In this case, the anode of the photodiode and the connection wiring of the force sword electrically connected to the circuit board by the bump can extend in the direction of the circuit board, that is, in the thickness direction of the semiconductor substrate, so that the mounting area can be reduced. That is, since the dead space is reduced in the plane direction, a plurality of back-illuminated photodiode arrays can be arranged in the lateral direction (two-dimensionally) of the semiconductor substrate. Can be provided.
なお、 このような大面積の裏面照射型ホトダイオードアレイは、 X線、 τ 線を 可視光に変換するシンチレータと組み合わせることで、コンピュータ断層撮影( C T ) 装置や陽電子放射断層撮影 (P E T ) 装置に適用することができる。 This large-area back-illuminated photodiode array can be applied to computer tomography (CT) and positron emission tomography (PET) equipment by combining it with a scintillator that converts X-rays and τ-rays into visible light. can do.
また、 本発明の裏面照射型ホトダイオードアレイは上述の方法によって作製す ることができ、 半導体基板の一方面側及び他方面側に高濃度不純物領域が形成さ れ、 それぞれが前記半導体基板の他方面側に形成されたホトダイォードのァノー ド及び力ソードに選択的に接続された裏面照射型ホトダイォードアレイにおいて、 前記高濃度不純物領域同士は前記半導体基板を厚み方向に貫通する孔を介して電 気的に接続されており、 前記孔内には樹脂が充填されていることを特徴とする。 この裏面照射型ホトダイォードアレイは三次元実装上の及び製造方法上の利点 を有すると共に、 孔内の樹脂が裏面照射型ホトダイォードの基板強度低下を抑制 することができる。 Further, the back-illuminated photodiode array of the present invention can be manufactured by the above-described method, and the high concentration impurity region is formed on one side and the other side of the semiconductor substrate. In a back-illuminated photodiode array, each of which is selectively connected to a photodiode node and a force source formed on the other surface side of the semiconductor substrate, the high-concentration impurity regions make the semiconductor substrate thick. It is electrically connected via a hole penetrating in the direction, and the hole is filled with a resin. This backside illuminated photodiode array has advantages in three-dimensional mounting and manufacturing method, and the resin in the holes can suppress a decrease in substrate strength of the backside illuminated photodiode.
また、 前記半導体基板、 及び前記高濃度不純物領域は第一導電型であって、 前 記半導体基板の他方面側に形成されたホトダイォードは第二導電型不純物領域と 半導体基板とで構成され、 前記半導体基板の一方面側の全面に前記高濃度不純物 領域より浅い第一導電型の全面不純物半導体層を備えることが好ましい。 The semiconductor substrate and the high-concentration impurity region are of a first conductivity type, and a photodiode formed on the other surface side of the semiconductor substrate includes a second conductivity-type impurity region and a semiconductor substrate. It is preferable to provide a first-conductivity-type full-surface impurity semiconductor layer shallower than the high-concentration impurity region on the entire surface on one side of the semiconductor substrate.
' この場合、 全面不純物半導体層をアキュムレーシヨン層として機能させること ができ、 高性能の検出を行うことができるようになる。 In this case, the entire impurity semiconductor layer can function as an accumulation layer, and high-performance detection can be performed.
図面の簡単な説明 BRIEF DESCRIPTION OF THE FIGURES
図 1 Aは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Bは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Cは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイオードアレイの縦断面構成を示す。 図 1 Dは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Eは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Fは実施の形態に係る裏面照射型ホトダイオードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Gは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイォードアレイの縦断面構成を示す。 図 1 Hは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイオードアレイの縦断面構成を示す。 図 1 Iは実施の形態に係る裏面照射型ホトダイオードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイオードアレイの縦断面構成を示す。 図 1 Jは実施の形態に係る裏面照射型ホトダイォードアレイの製造方法を説明 するための説明図であり、裏面照射型ホトダイオードアレイの縦断面構成を示す。 図 2は、 図 1 Jに示した裏面照射型ホトダイオードアレイ P D Aを回路基板 C 上に複数備えてなる撮像装置の説明図である。 FIG. 1A is an explanatory diagram for explaining a method of manufacturing a back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1B is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1C is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1D is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1E is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1F is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1G is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1H is an explanatory diagram for explaining the method for manufacturing the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1I is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 1J is an explanatory diagram for explaining the manufacturing method of the back-illuminated photodiode array according to the embodiment, and shows a vertical cross-sectional configuration of the back-illuminated photodiode array. FIG. 2 is an explanatory diagram of an imaging apparatus including a plurality of back-illuminated photodiode arrays PDA shown in FIG.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
以下、 実施の形態に係る裏面照射型ホトダイォードアレイについて説明する。 なお、 同一要素には同一符号を用い、 重複する説明は省略する。 Hereinafter, the backside illuminated photodiode array according to the embodiment will be described. Note that the same reference numerals are used for the same elements, and duplicate descriptions are omitted.
図 1 A〜図 1 Jは実施の形態に係る裏面照射型ホトダイォードアレイの製造方 法を説明するための説明図であり、 裏面照射型ホトダイオードアレイの縦断面構 成を示す。 以下、 詳説する。 1A to 1J are explanatory views for explaining a method of manufacturing the back-illuminated photodiode array according to the embodiment, and show a vertical cross-sectional configuration of the back-illuminated photodiode array. The details are described below.
. この製造方法では、 以下の工程 (1 ) 〜 (1 0 ) を順次実行する。 In this manufacturing method, the following steps (1) to (10) are sequentially performed.
工程 ( 1 ) Process (1)
まず、 S iからなる半導体基板 (ウェハ) 1を用意する。 半導体基板 1の伝導 型は n型であり、 比抵抗は l k Ω ■ c m程度である。 半導体基板 1の比抵抗は低 容量、 低ノイズ、 高速応答のバランスを考慮して設定される。 次に、 半導体基板 1の裏面側 (一方面側) に所定間隔離隔した厚さ数 / の n型高濃度不純物領域 I nを複数形成する (図 1 A)。 ここで、 「裏面」 とは、 最終的に製造される裏面 照射型ホトダイオードにおける光入射面のことであって、 説明の便宜上用いる規 定であり、 図面の下側の面ではないことに留意されたい。 また、 高濃度不純物領 域 I nは n型であり、 燐の拡散によって形成され、 高濃度とは、 少なくとも I X 1017c m— 3以上のキヤリァ濃度を有する領域を意味するものとする。 First, a semiconductor substrate (wafer) 1 made of Si is prepared. The conductivity type of the semiconductor substrate 1 is n-type, and the specific resistance is about lkΩ ■ cm. The specific resistance of the semiconductor substrate 1 is set in consideration of the balance between low capacitance, low noise, and high-speed response. Next, on the back surface (one surface side) of the semiconductor substrate 1, a plurality of n-type high-concentration impurity regions In having a thickness of a predetermined number / space are formed (FIG. 1A). Here, the “back surface” is a light incident surface of a back-illuminated photodiode that is finally manufactured, and is a rule used for convenience of description, and is not a lower surface of the drawing. I want to. The high-concentration impurity region In is n-type and is formed by diffusion of phosphorus. 10 17 cm—means a region with a carrier concentration of 3 or more.
工程 (2) Process (2)
次に、 半導体基板 1の同じ裏面側の全面に薄い不純物半導体 1 n cを形成する (図 1 B)。不純物半導体層 1 n cの伝導型は n型であって不純物濃度は高濃度で ある。 なお、 この形成工程に用いられる不純物は砒素であり、 イオン注入の飛程 が燐の拡散深さよりも小さく設定されているため、 その深さが浅くなる (0. 1 πι以下)。 この層の形成方法はイオン注入法であり、例えば、注入エネルギーは 80 k e v、 ドーズ量は 2 X 1015 cm—2とする。 この層の深さは浅いため、 光検 出器の性能としては高感度となる。 Next, a thin impurity semiconductor 1nc is formed on the entire back surface of the semiconductor substrate 1 (FIG. 1B). The conductivity type of the impurity semiconductor layer 1nc is n-type, and the impurity concentration is high. The impurity used in this formation step is arsenic, and the depth of the ion implantation is set to be smaller than the diffusion depth of phosphorus, so that the depth becomes shallow (0.1 πι or less). The method for forming this layer is an ion implantation method. For example, the implantation energy is 80 kev and the dose is 2 × 10 15 cm− 2 . Since the depth of this layer is shallow, the sensitivity of the photodetector is high.
工程 (3) Process (3)
次に、 半導体基板 1の裏面側に酸化膜 2を熱酸化により形成する (図 1 C)。 工程 (4) Next, an oxide film 2 is formed on the rear surface side of the semiconductor substrate 1 by thermal oxidation (FIG. 1C). Process (4)
更に、半導体基板 1の裏面側に支持基板 3を貼り合わせる (図 1D)。 この支持 基板 3の材料は、 後述のように後工程で除去するため、 特別な材料である必要は なく、例えば一般的に入手し易い数 10 Ω· cm程度の p型のシリコンを用いる。 貼り合わせ工程では、 酸化膜 2を介して支持基板 3を半導体基板 1に押し付け、 100 o°c以下の熱を加えて貼り合せる。 Further, the support substrate 3 is bonded to the back surface of the semiconductor substrate 1 (FIG. 1D). The material of the support substrate 3 does not need to be a special material because it is removed in a later step as described later. For example, p-type silicon of several tens Ω · cm, which is generally available, is used. In the bonding step, the supporting substrate 3 is pressed against the semiconductor substrate 1 via the oxide film 2 and bonded by applying heat of 100 ° C. or less.
工程 (5) Process (5)
しかる後、 支持基板 3を表面側 (裏面とは逆の面:他方面) から研磨し、 半導 体基板 1を所定の厚さまで薄膜化する (図 1 E)。 この鏡面研磨工程後の半導体基 板 1の厚みは、例えば数 10 μπι〜150 /imであり、好適には 50 μιη〜100 m程度である。 Thereafter, the support substrate 3 is polished from the front side (the side opposite to the back side: the other side) to thin the semiconductor substrate 1 to a predetermined thickness (FIG. 1E). The thickness of the semiconductor substrate 1 after this mirror polishing step is, for example, several tens μπι to 150 / im, and preferably about 50 μπη to 100 m.
工程 (6) Process (6)
次に、 半導体基板 1の表面側に所定間隔離隔した複数の n型高濃度不純物領域 I n' 及び複数の p型不純物領域 1 Pを形成し、 更に、 半導体基板 1の表面側に 熱酸化によって酸化膜 (S i 02) 4を形成する (図 1 F)。 n型高濃度不純物領 域 I n ' は燐を拡散することによって形成される。 また、 ί>型不純物領域 l pは ホウ素を基板内に拡散又はイオン注入することによって形成される。 かかる P型 不純物領域 1 Pは n型の半導体基板 1と P N接合を構成することにより、 ホトダ ィォードが構成される。 このホトダイォードは半導体基板 1の表面側に位置する こととなる。 また、 このホトダイオードはアバランシェホトダイオードや P I N ホトダイオードとすることもできる。 Next, a plurality of n-type high-concentration impurity regions I n ′ and a plurality of p-type impurity regions 1 P separated by a predetermined distance are formed on the surface side of the semiconductor substrate 1, and further, the surface side of the semiconductor substrate 1 is thermally oxidized. An oxide film (S i 0 2 ) 4 is formed (FIG. 1F). n-type high concentration impurity region Region I n 'is formed by diffusing phosphorus. The ί> type impurity region lp is formed by diffusing or implanting boron into the substrate. The P-type impurity region 1 P forms a PN junction with the n-type semiconductor substrate 1 to form a photodiode. This photodiode is located on the front surface side of the semiconductor substrate 1. The photodiode can be an avalanche photodiode or a PIN photodiode.
工程 ( 7 ) Process (7)
次に、 半導体基板 1の表面側から裏面側に到達する孔 Hを形成する (図 1 G)。 この孔 Hは半導体基板 1の表面側の酸化膜 4を利用して、 高濃度不純物領域 1 n ' 上に開口を有するマスクを形成し、 かかるマスクを介して半導体基板 1の表 面をエッチングすることによって行う。 エッチングの際には酸化膜 4をマスクと するように、 当該酸化膜 4をホトリソグラフィによってパターユングすることも できる。 このエッチングには等方性のゥエツトエッチングを用いることができる し、 常圧プラズマエッチング (A D P ) 等の等方性のドライエッチングを用いる こともできる。 ウエットエッチングの際のエッチング液としては、 H F ZH N Og 等を用いることができる。 Next, a hole H reaching the back side from the front side of the semiconductor substrate 1 is formed (FIG. 1G). The hole H is formed by using the oxide film 4 on the surface side of the semiconductor substrate 1 to form a mask having an opening on the high-concentration impurity region 1 n ′, and etching the surface of the semiconductor substrate 1 through the mask. By doing. At the time of etching, the oxide film 4 can be patterned by photolithography so that the oxide film 4 is used as a mask. For this etching, isotropic wet etching can be used, and isotropic dry etching such as atmospheric pressure plasma etching (ADP) can also be used. H F ZHN Og or the like can be used as an etchant for wet etching.
このようなェツチング方法を用いれば、 比較的生産性の高いエッチングが可能 となるばかりでなく、孔 Hの形状はすり鉢状、すなわち、テーパー状となるため、 後段の電極形成におけるステップカバレージが向上する。 孔 Hは半導体基板 1の 表面側の高濃度不純物領域 1 n ' の露出側面と裏面側の高濃度不純物領域 1 nの 露出側面と半導体基板 1のェツチングされた側面とが孔 Hの内面を構成すること となる。 If such an etching method is used, not only etching with relatively high productivity can be performed, but also the shape of the hole H becomes a mortar shape, that is, a tapered shape, so that step coverage in the subsequent electrode formation is improved. . The exposed side of the high-concentration impurity region 1 n ′ on the front surface side of the semiconductor substrate 1 and the exposed side surface of the high-concentration impurity region 1 n on the back surface and the etched side surface of the semiconductor substrate 1 constitute the inner surface of the hole H. Will be done.
工程 (8 ) Process (8)
更に、 孔 Hの側面から半導体基板 1内に n型不純物を添加し、 表面側の n型高 濃度不純物領域 1 n ' と裏面側の n型高濃度不純物領域 1 nとを電気的に接続す る (図 1 H)。 この不純物添加領域を符号 h 1で示す。 この不純物添加工程は、 上 記マスクを残したままで或いは酸化膜 4をマスクとして、 n型不純物のイオン注 入又は拡散を半導体基板 1の表面側から行うことにより実行することができる。 工程 (9 ) Further, an n-type impurity is added into the semiconductor substrate 1 from the side surface of the hole H to electrically connect the n-type high-concentration impurity region 1 n ′ on the front surface and the n-type high-concentration impurity region 1 n on the back surface. (Fig. 1H). This impurity added region is indicated by reference numeral h1. This impurity addition step The ion implantation or diffusion of the n-type impurity is performed from the surface side of the semiconductor substrate 1 with the mask left or with the oxide film 4 as a mask. Process (9)
次に、 直列抵抗を低減するため、 孔 Hの内面上にアルミニウムからなる金属電 極膜 h 2を形成する。 これは力ソード共通電極を形成し、 半導体基板 1の表面ま で延びている。 金属電極膜 h 2の形成前に、 半導体基板 1の p型不純物領域 1 p の表面が露出するように酸化膜 4をパターニングしておけば、 金属電極膜 h 2と 同時に p型不純物領域 1 pのコンタクトを形成することができる。 しかる後、 孔 Hの内面を埋めるように感光性樹脂:(ポリイミド等のフォトレジスト) Rを半導 体基板 1の表面上に塗布し、 ホトリソグラフィー工程によりア^^ミニゥムからな る金属電極を露出させる。 更に、 この露出した金属電極部に N i、 A uを順次メ ツキすることにより、 ホトダイォードアレイに電極 OMを形成する。 Next, in order to reduce the series resistance, a metal electrode film h2 made of aluminum is formed on the inner surface of the hole H. This forms a force sword common electrode and extends to the surface of the semiconductor substrate 1. If the oxide film 4 is patterned so that the surface of the p-type impurity region 1 p of the semiconductor substrate 1 is exposed before the formation of the metal electrode film h 2, the p-type impurity region 1 p is formed simultaneously with the metal electrode film h 2. Can be formed. Thereafter, a photosensitive resin (photoresist such as polyimide) R is applied on the surface of the semiconductor substrate 1 so as to fill the inner surface of the hole H, and a metal electrode made of aluminum is formed by a photolithography process. Expose. Further, Ni and Au are sequentially plated on the exposed metal electrode portion, thereby forming an electrode OM on the photodiode array.
最後に支持基板 3をグラインド及びドライエツチングにより完全に除去し、 光 入射面となる酸化膜 2を露出させる。 Finally, the support substrate 3 is completely removed by grinding and dry etching to expose the oxide film 2 serving as a light incident surface.
次にダイシングにより所定のチップサイズに切り出すことにより、 半導体基板 の一方の表面側 (他方面側) にのみ電極を有する裏面照射型ホトダイオードァレ ィが完成する (図 1 1 )。 Next, by cutting the chip into a predetermined chip size by dicing, a back-illuminated photodiode array having an electrode on only one surface side (the other surface side) of the semiconductor substrate is completed (FIG. 11).
工程 (1 0 ) Process (10)
このホトダイオードアレイチップは、 上下を逆転させて、 すなわち、 半導体基 板 1の表面側が回路基板 C側に位置し、 光入射面が裏面となるように配置する。 すなわち、 半導体基板 1を A u又は半田等からなるバンプ Bを介して回路基板 C 上に配置し、 かかるバンプ Bによって上記ホトダイォードの電極 OMを回路基板 C上の配線に電気的に接続する(図 1 J )。ホトダイォードのカソード、すなわち、 n型半導体基板 1及び n型高濃度不純物領域 1 nは、 金属電極膜 h 2及び不純物 添加領域 h 1を介して半導体基板 1の表面側に位置する電極 OMに接続されてい る。 また、 ホトダイオードのアノード、 すなわち、 P型不純物領域 1 Pは金属電 極膜 h 2及び電極〇Mに接続されている。 これらの電極は、 それぞれバンプ Bを 介して回路基板 Cの力ソード用配線及びアノード用配線に接続される。 The photodiode array chip is arranged upside down, that is, in such a manner that the front side of the semiconductor substrate 1 is located on the circuit board C side and the light incident surface is the back side. That is, the semiconductor substrate 1 is placed on the circuit board C via bumps B made of Au or solder, and the bumps B electrically connect the photodiode electrodes OM to the wiring on the circuit board C (see FIG. 1 J). The cathode of the photodiode, that is, the n-type semiconductor substrate 1 and the n-type high-concentration impurity region 1 n are connected to the electrode OM located on the surface side of the semiconductor substrate 1 via the metal electrode film h2 and the impurity-doped region h1. ing. The anode of the photodiode, that is, the P-type impurity region 1 P is It is connected to the polar membrane h2 and the electrode ΔM. These electrodes are connected to the power source wiring and the anode wiring of the circuit board C via the bumps B, respectively.
以上、説明したように、上述の裏面照射型ホトダイォードアレイの製造方法は、 ( a ) 半導体基板 1の一方面 (裏面) 側に高濃度不純物領域 1 nを形成する工程 と、 (b ) 半導体基板 1の裏面側に支持基板 3を貼り合わせる工程と、 (c ) 半導 体基板 1の他方面 (表面) 側を研磨して半導体基板 1を薄膜化する工程と、 (d ) 半導体基板 1の表面側に高濃度不純物領域 1 n ' 及び複数のホトダイォードを形 成する工程と、 (e )半導体基板 1の表面側の高濃度不純物領域 1 n ' から裏面側 の高濃度不純物領域 1 nに到達する孔 Hを形成する工程と、 (f )裏面側と表面側 の高濃度不純物領域 I n , I n ' を孔 Hを介して電気的に接続する工程と、 (g ) 前記工程 (f ) の後に支持基板 3を除去する工程とを備える。 ホトダイオードの ァノード及ぴ力ソードの一方は、 半導体基板の一方面側及び他方面側のいずれか 一方に位置し、 他方は残りの面側に位置する。 As described above, the method of manufacturing the back-illuminated photodiode array described above includes: (a) forming a high-concentration impurity region 1 n on one surface (back surface) of the semiconductor substrate 1; (C) bonding the support substrate 3 to the back surface of the semiconductor substrate 1; (c) polishing the other surface (front surface) of the semiconductor substrate 1 to thin the semiconductor substrate 1; (E) forming a high-concentration impurity region 1 n ′ and a plurality of photodiodes on the front surface of the semiconductor substrate 1; (F) electrically connecting the high-concentration impurity regions I n and In ′ on the back side and the front side via the hole H; and (g) forming the step (g). removing the supporting substrate 3 after f). One of the anode and the power source of the photodiode is located on one of the one surface side and the other surface side of the semiconductor substrate, and the other is located on the remaining surface side.
この製造方法によれば、 研磨工程によってホトダイオードアレイ、 すなわち、 半導体基板 1が所定の厚さに薄膜化されるので、 孔 Hの形成時間が短縮され、 且 つ、この孔 Hを介して半導体基板 1の両面側に形成された高濃度不純物領域 1 η , I n ' を接続するので、 ホトダイオードのアノード及び力ソードを半導体基板 1 の同一面 (表面) 側に電気的に導くことができる。 薄膜化によって基板強度は低 下するが、 半導体基板 1の裏面側には支持基板が設けられるので、 前処理 (プロ セス) 工程の間は、 これを補強することができ、 かかる構成によって、 複数のホ トダイォードを備えたホトダイォードアレイが工業的に初めて量産可能となる。 更に、 このホトダイオードアレイは裏面照射型であるため、 信号雑音比が高く、 高精度の検出装置に用いることができることとなる。 According to this manufacturing method, the photodiode array, that is, the semiconductor substrate 1 is thinned to a predetermined thickness by the polishing step, so that the time for forming the hole H is shortened, and the semiconductor substrate 1 is formed through the hole H. Since the high-concentration impurity regions 1 η, I n ′ formed on both sides of the semiconductor substrate 1 are connected, the anode and the power source of the photodiode can be electrically guided to the same surface (front surface) of the semiconductor substrate 1. Although the strength of the substrate is reduced by thinning, a supporting substrate is provided on the back surface side of the semiconductor substrate 1, which can be reinforced during the pre-processing (process) step. For the first time, a photodiode array equipped with a photodiode will become commercially viable. Furthermore, since this photodiode array is of the back-illuminated type, it has a high signal-to-noise ratio and can be used for a highly accurate detection device.
また、 上述の裏面照射型ホトダイオードアレイの製造方法は、 孔 H内に樹脂 R を埋め込む工程を更に備えており、 孔 H内に樹脂を埋め込むことによって、 半導 体基板 1の強度を向上させることができる。 また、 この孔 H内に埋め込む樹脂は感光性を有し、 上述の製造方法は、 この樹 脂となるフォトレジストを半導体基板 1の他方面 (表面) 側の全面に塗布するェ 程と、 半導体基板 1の他方面側の電極 (h 2、 OM) 形成予定領域のフォトレジ ストのみ除去する工程と、 フォトレジストが除去された領域に電極 h 2を形成す る工程とを更に備えているので、 フォトレジストを用いた通常のフォトリソグラ フィプロセスにより樹脂 Rを埋設できるとともに、 電極形成前にフォトレジスト でパターエングされた酸化膜によってコンタクトを形成した電極の露出を行うこ とができる。 In addition, the above-described method for manufacturing a back-illuminated photodiode array further includes a step of embedding a resin R in the hole H, and improving the strength of the semiconductor substrate 1 by embedding the resin in the hole H. Can be. The resin to be embedded in the hole H has photosensitivity. According to the above-described manufacturing method, a step of applying a photoresist to be the resin to the entire surface on the other surface (front surface) side of the semiconductor substrate 1 includes: The method further includes a step of removing only the photoresist in the region where the electrode (h2, OM) on the other surface side of the substrate 1 is to be formed, and a step of forming the electrode h2 in the region where the photoresist has been removed. In addition, the resin R can be buried by a normal photolithography process using a photoresist, and an electrode having a contact formed by an oxide film patterned with a photoresist can be exposed before the electrode is formed.
また、 半導体基板 1及び高濃度不純物領域 1 n , I n ' は第一導電型 (上記で は n型) であって、 複数のホトダイオードは複数の第二導電型 (上記では p型) 不純物領域 1 pと半導体基板 1とで構成され、 いずれかのホトダイォードの一方 面 (裏面) 側に位置するアノード又は力ソードは他方面 (表面) 側に電気的に導 かれている。 "' また、 上述の製造方法では、 半導体基板 1の一方面側の全面に高濃度不純物領 域より浅い第一導電型 (上記では n型) の全面不純物半導体層 1 n cを形成する 工程を備えているので、 この全面不純物半導体層 1 n cはアキュムレーシヨン層 として機能させることができる。 The semiconductor substrate 1 and the high-concentration impurity regions 1 n and In ′ are of the first conductivity type (n-type in the above), and the plurality of photodiodes are a plurality of impurity types in the second conductivity type (p-type in the above). The anode or the force sword, which is composed of 1 p and the semiconductor substrate 1 and is located on one side (back side) of one of the photodiodes, is electrically guided to the other side (front side). "'In addition, the above-described manufacturing method includes a step of forming a first-conductivity-type (n-type in the above) full-surface impurity semiconductor layer 1nc shallower than the high-concentration impurity region over the entire surface on one side of the semiconductor substrate 1. Therefore, the entire impurity semiconductor layer 1nc can function as an accumulation layer.
また、 上述の製造方法では、 半導体基板 1の一方面側 (裏面) に酸化膜 2を形 成する工程を備えているので、 これを保護膜として機能させることができる。 更に、 三次元実装という観点から、 上述の裏面照射型ホトダイオードアレイの 製造方法は、 ホトダイォードのァノード及び力ソードが回路基板 Cに電気的に接 続されるよう、 半導体基板 1の表面側をバンプ Bを介して回路基板 Cに取り付け る工程を備えている。 この場合、 バンプ Bによって回路基板 Cに電気的に接続さ れるホトダイォードのァノード及び力ソードの接続配線は回路基板方向、 すなわ ち、 半導体基板 1の厚み方向に延びることができるので、 実装面積を小さくする ことができる。 - また、 上述の裏面照射型ホトダイォードアレイは、 半導体基板 1の裏面側及び 表面側に高濃度不純物領域 1 n, I n ' が形成され、 それぞれが半導体基板 1の 表面側に P N接合が形成されたホトダイォードのァノード及び力ソードに選択的 に接続された裏面照射型ホトダイォードアレイにおいて、高濃度不純物領域 1 η , I n ' 同士は半導体基板 1を厚み方向に貫通する孔 Hを介して電気的に接続され ており、 孔 H内には樹脂 Rが充填されている。 Further, since the above-described manufacturing method includes a step of forming the oxide film 2 on one surface side (back surface) of the semiconductor substrate 1, it can function as a protective film. Further, from the viewpoint of three-dimensional mounting, the above-described method for manufacturing a back-illuminated photodiode array includes a bump B on the front side of the semiconductor substrate 1 so that the anode and the power source of the photodiode are electrically connected to the circuit board C. And a process of attaching to the circuit board C via the In this case, the connection node of the photodiode node and the force source electrically connected to the circuit board C by the bump B can extend in the circuit board direction, that is, the thickness direction of the semiconductor substrate 1, so that the mounting area is reduced. It can be smaller. - Also, in the above-described back-illuminated photodiode array, high-concentration impurity regions 1 n and In ′ are formed on the back side and the front side of the semiconductor substrate 1, and PN junctions are formed on the front side of the semiconductor substrate 1, respectively. In the back-illuminated photodiode array selectively connected to the anode and the force node of the photodiode thus formed, the high-concentration impurity regions 1 η and In ′ are connected to each other through a hole H penetrating the semiconductor substrate 1 in the thickness direction. It is electrically connected, and the resin H is filled in the hole H.
この裏面照射型ホトダイォードアレイは三次元実装上の及び製造方法上の利点 を有すると共に、 孔内の樹脂が裏面照射型ホトダイォードの基板強度低下を抑制 することができる。 The backside illuminated photodiode array has advantages in three-dimensional mounting and manufacturing method, and the resin in the holes can suppress a decrease in the substrate strength of the backside illuminated photodiode.
また、 上記裏面照射型ホトダイオードアレイの構造によれば、 半導体基板 1及 び高濃度不純物領域 I n , I n ' は第一導電型 (上記では 11型) であって、 半導 体基板 1の他方面側に形成されたホトダイォードは第二導電型 (上記では!)型) 不純物領域 1 pと半導体基板 1とで構成され、 半導体基板 1の一方面側の全面に 高濃度不純物領域 1 nより浅い第一導電型の全面不純物半導体層 1 n cがあるの で、 全面不純物半導体層 1 n cをアキュムレーシヨン層として機能させることが でき、 高性能の検出を行うことができるようになる。 In addition, according to the structure of the back-illuminated photodiode array, the semiconductor substrate 1 and the high-concentration impurity regions I n and I n ′ are of the first conductivity type (11 type in the above description). The photodiode formed on the other surface side is composed of the impurity region 1 p and the semiconductor substrate 1 of the second conductivity type (above!) Type. Since there is a shallow first-conductivity-type whole-surface impurity semiconductor layer 1 nc, the whole-surface impurity semiconductor layer 1 nc can function as an accumulation layer, and high-performance detection can be performed.
図 2は図 1 Jに示した裏面照射型ホトダイォードアレイ?0 を回路基板じ上 に複数備えてなる撮像装置の説明図である。 上述の構成によれば、 三次元実装が 可能となるので、 複数の平面方向にデッドスペースの少ない裏面照射型ホトダイ オードアレイ P D Aを隙間なく二次元的に配列することができる。 すなわち、 全 体として、 更に大面積の撮像装置を提供することができる。 Figure 2 shows the back-illuminated photodiode array shown in Figure 1J? FIG. 3 is an explanatory diagram of an imaging device including a plurality of 0s on a circuit board. According to the configuration described above, three-dimensional mounting is possible, so that a back-illuminated photodiode array PDA with a small dead space in a plurality of planar directions can be two-dimensionally arranged without gaps. That is, it is possible to provide an imaging device having a larger area as a whole.
なお、 このような大面積の裏面照射型ホトダイオードアレイは、 X線コンビュ ータ断層撮影 (C T) 装置、 具体的にはパネル状のマルチ X線 C T装置や陽電子 放射断層撮影 (P E T ) 装置に適用することができる。 このような装置の場合に は、 光入射面上に二次元的に分割されたシンチレータ (B G O、 C S〇、 CWO 等) を設ける。 なお、 上述の研磨工程においては、 機械研磨の他、 化学研磨を用いることがで き、 半導体基板 1の露出面は鏡面加工することができる。 また、 裏面側の全面不 純物半導体層 1 n cはアキュムレーション層として機能する。 アキュムレーショ ン層はグランド電位とすることもできるが、 逆バイアスが印加されるように、 正 電位を与えることもできる。 Note that such large-area back-illuminated photodiode arrays are applied to X-ray computer tomography (CT) equipment, specifically, panel-shaped multi-X-ray CT equipment and positron emission tomography (PET) equipment. can do. In the case of such a device, a two-dimensionally divided scintillator (BGO, CS 等, CWO, etc.) is provided on the light incident surface. In the above-described polishing step, chemical polishing can be used in addition to mechanical polishing, and the exposed surface of the semiconductor substrate 1 can be mirror-finished. Further, the entire impurity semiconductor layer 1nc on the rear surface side functions as an accumulation layer. The accumulation layer can be at ground potential, but it can also be given a positive potential so that a reverse bias is applied.
また、 上述の裏面照射型ホトダイオードアレイは、 アキュムレーシヨン層とな る全面不純物半導体層を薄く形成することができるため、 紫外感度を向上させる ことができる。 Further, in the above-mentioned back-illuminated photodiode array, the ultraviolet sensitivity can be improved because the entire impurity semiconductor layer serving as the accumulation layer can be formed thin.
また、 支持基板 3の除去前の工程において、 電極 OM形成や共通電極取り出し 穴埋めを行った後に、 半導体基板 1にダイシングテープを貼り付け、 ダイシング (完全にチップを分離するダイシングでなくとも、 半導体基板 1がチップとして 分離される位置 (酸化膜 4まで達する位置) までダイシングブレードを入れる) を行つた後、 貼り合わせた支持基板 3を機械研磨及びドライエッチングによって 除去することもできる。 この場合には通常のブレードダイシングの他にもレーザ 等のほかの方式も採用できる。 Also, in the process before the removal of the support substrate 3, after forming the electrodes OM and filling the common electrode extraction holes, a dicing tape is attached to the semiconductor substrate 1, and the dicing is performed. After performing a dicing blade to a position where 1 is separated as a chip (a position reaching the oxide film 4), the bonded support substrate 3 can be removed by mechanical polishing and dry etching. In this case, other methods such as laser can be adopted in addition to the normal blade dicing.
この製造方法では、 ダイシング終了までのすべての工程が厚いウェハのままで 行われるため、 プロセスの生産性は高く、 歩留を向上させることが可能な画期的 な片面電極ホトダイオード生産方式となる。 し力 も、 バンプ Bを介してバイアス が印加でき、 単なるゼロバイアスのホトダイオードのみならず、 高速、 低ノイズ センサー ( P I Nホトダイォード、アバランシエホトダイォード)も実現できる。 本発明の裏面照射型ホトダイォードアレイ及びその製造方法によれば、 量産が 可能となる。 In this manufacturing method, since all processes up to the end of dicing are performed on a thick wafer, the productivity of the process is high, and an epoch-making single-sided electrode photodiode production method capable of improving the yield is achieved. A bias can be applied via the bump B, and not only a photodiode with a simple zero bias, but also a high-speed, low-noise sensor (PIN photodiode, avalanche photodiode) can be realized. According to the backside illumination type photodiode array and the method of manufacturing the same of the present invention, mass production becomes possible.
産業上の利用可能性 Industrial applicability
本発明は、 裏面照射型ホトダイォードアレイ及びその製造方法に利用すること ができる。 INDUSTRIAL APPLICABILITY The present invention can be used for a back-illuminated photodiode array and a method for manufacturing the same.
Claims
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| JP2004504299A JP4478012B2 (en) | 2002-05-10 | 2003-05-09 | Back-illuminated photodiode array and manufacturing method thereof |
| AU2003235925A AU2003235925A1 (en) | 2002-05-10 | 2003-05-09 | Rear surface irradiation photodiode array and method for producing the same |
| DE10392637.2T DE10392637B4 (en) | 2002-05-10 | 2003-05-09 | Backlit photodiode array and method of making the same |
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| JP (1) | JP4478012B2 (en) |
| CN (1) | CN100388503C (en) |
| AU (1) | AU2003235925A1 (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN1653617A (en) | 2005-08-10 |
| JP4478012B2 (en) | 2010-06-09 |
| CN100388503C (en) | 2008-05-14 |
| AU2003235925A1 (en) | 2003-11-11 |
| JPWO2003096427A1 (en) | 2005-09-15 |
| DE10392637T5 (en) | 2005-06-16 |
| DE10392637B4 (en) | 2014-09-04 |
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