JPH04286160A - Photodetector and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the degree of integration without relatively reducing the storage of signal charges regarding a hybrid type photodetector detecting light and conducting photoelectric conversion. CONSTITUTION:A fixed number of picture element regions 6 are formed extendingly over an opposed surface 5b from one surface 5a of a semiconductor substrate 5 in a light-receiving section 2, drain regions 7 are formed to said opposed surface 5b and P-N junction regions are shaped, and input gates(IG) are formed and the action of an input diode is conducted. The forbidden band width of an energy band on a reflecting surface is made larger than one surface in the light-receiving section 2 at that time, thus preventing an effect on the P-N junction regions of projecting light.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid photodetector that detects light and performs photoelectric conversion. In recent years, photodetectors (image sensors) have been increasing in image quality and increasing the number of pixels, and there is a demand for highly integrated pixels in the light receiving section. Therefore, it is necessary to reduce the pitch of each pixel and each signal processing section.

0002

2. Description of the Related Art FIG. 6 shows a side sectional view of a conventional photodetector. In FIG. 6, the photodetector 50 includes a light receiving section 51 and a signal processing section 52. In the light receiving section 51, a predetermined number of n+ type pixel regions 54 are formed in close proximity to a P type semiconductor substrate (for example, HgCdTe, mercury, cadmium telluride) 53 by ion implantation and thermal diffusion. Further, an insulating film 55 of, for example, zinc sulfide (ZnS) is formed on this surface, and an opening 56 is formed above the pixel region 54 .

On the other hand, the signal processing section 52 includes an n+ region 5 corresponding to the pixel region 54 on a P-type silicon substrate 57.
8 is formed by ion implantation and thermal diffusion to constitute a PN junction input diode. This surface is coated with an insulating film (SiO
2) 59 is formed and an opening 60 is formed over n+ region 58; Further, on the insulating film 59 between the n+ regions 58, electrodes of an input gate (IG), a storage gate (SG), a transfer gate (TG), and a transfer gate (φ) are formed, respectively. Then, the pixel region 54 exposed through the openings 56 and 60 and the n+ region (input diode) 58 are electrically connected by a coupling electrode 61.

In such a photodetector 50, when the light receiving section 51 is irradiated with infrared rays, electron-hole pairs are generated, the electrons of which are collected in the pixel region 54, and are sent as a signal via the coupling electrode 61. They gather in the n+ region 58 of the processing section 52. n+
The charges collected in the region 58 are stored in the storage section 62 by applying signals to the input gate (IG) and the storage gate (SG).
Accumulate in. Then, a signal is applied to the transfer gate (TG) and the transfer gate (φ) to transfer the charge accumulated in the storage section 62 to the transfer section 63, and output it as an electric signal (imaging signal).

[0005]

[Problems to be Solved by the Invention] By the way, when the pixel pitch is reduced by hybridization of the photodetector, the n+ region (input diode) in the signal processing section 52,
The input gate (IG) and storage section 62 must be made smaller. Therefore, the charge accumulation time is shortened, and line address type signal processing is performed in which one pixel is selected using horizontal and vertical address lines. In the case of this line address type, a line address gate (not shown) is formed in the insulating film 59 of the signal processing section 52. However, if the storage section 62 or the like is made smaller, the amount of accumulated charge decreases, resulting in poor utilization efficiency of optical signals, which in turn causes a problem in that the S/N ratio decreases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a photodetector that can be highly integrated without relatively reducing the amount of accumulated signal charges.

[0007]

[Means for Solving the Problem] The above problem is to provide a light receiving section that performs photoelectric conversion by irradiating light, and a signal that accumulates the charges generated in the light receiving section in an accumulation region, transfers them to a transfer region, and outputs a signal. In the photodetector comprising a processing section, the light receiving section extends from one side to the opposite side of a predetermined semiconductor substrate,
A predetermined number of pixel regions in which the charges of a predetermined polarity are collected are formed by photoelectric conversion, and a predetermined number of pixel regions are formed between the pixel regions on the opposite surface for accumulating the charges in the accumulation region of the signal processing section. A PN junction region is formed, and an input gate is formed between the pixel region and the PN junction region, and the light receiving section converts the forbidden band width of the energy band on the opposite surface to the one surface. This can be solved by forming the forbidden band width to be larger than the forbidden band width.

FIG. 1 is a diagram illustrating the principle of the method of the present invention. In the method for manufacturing the photodetector shown in FIG. 1, in the first step of the light receiving section, a light receiving layer of a predetermined material having a large forbidden band width at the interface with the substrate is formed on a predetermined substrate. In the second step, a pixel region having a conductivity type different from that of the light-receiving layer is formed on one side of the light-receiving layer. In the third step, holes are formed from the charge separation region to the opposite surface of the light-receiving layer while forming a region of the same conductivity type as the charge separation region, thereby integrating the region with the pixel region. . In the fourth step, a PN junction region configured between the pixel region and the pixel region is formed on the opposite surface, and a coupling electrode for coupling with the signal processing section is formed on the PN junction region. Then, in the fifth step, an input gate is formed between the pixel region and the PN junction region.

[0009]

[Function] As mentioned above, the light receiving section has a pixel region formed from one side to the opposite side, and a PN junction region on the opposite side that serves as an input gate for inputting electric charge to the accumulation region of the signal processing section. It is formed. That is, the input gate, which was conventionally formed in the signal processing section, is formed as a PN junction region between the pixel regions of the light receiving section, and the input gate is formed between them. As a result, when each signal processing system is narrowed in order to narrow the pitch of the pixel regions, it becomes possible to allocate the space for the input gate to the storage region. Therefore, it is possible to achieve high integration without relatively reducing the accumulation of signal charges.

Furthermore, the forbidden band width of the energy band on the reflective surface of the light receiving section is formed to be larger than the forbidden band width on one surface. Thereby, the light of the predetermined wavelength does not reach the opposite surface of the light receiving section, making it possible to prevent the influence of the light from reaching the surface.

Next, in such a photodetector, when forming a light-receiving layer (semiconductor substrate) on a predetermined substrate, the interface side of the light-receiving layer can be adjusted by selecting materials for the substrate and the light-receiving layer. The prohibited band width is widened. This makes it possible to prevent the irradiation light from affecting the PN junction region that will be formed later, as described above. Further, when forming a pixel region from one side to the opposite side of the light-receiving layer constituting the light-receiving section, holes are formed by ion milling or the like from the regions of different conductivity types formed on one side. In this case, the area around the perforation in the light-receiving layer becomes of the same type of conductivity as the pixel area due to damage during the perforation.
This makes it possible to easily form a pixel region from one side to the opposite side.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 shows a side sectional view of an embodiment of the present invention. The photodetector shown in FIG. 2 is of a so-called interline type. Here, the interline type is one in which charges are transferred to a vertical CCD (charge-coupled device) for all pixels at the same time and then transferred to a horizontal CCD for each horizontal line, thereby reading out each pixel in series.

In FIG. 2, a photodetector 1 has a light receiving section 2 and a signal processing section 3 connected by a plurality of coupling electrodes 4. As shown in FIG. A P-type HgCdTe semiconductor substrate 5 is provided in the light receiving section.
An n+ type pixel region 6 is formed from one surface 5a to the opposite surface 5b. This pixel area 6 is on the opposite side 5
The area of one surface 5a is formed larger than that of pixel region 6 on the opposite surface 5ab, which is below the pixel region 6 on one surface 5a.
An n+ type drain region 7 is formed by refraction. That is, the n+ type pixel region 6, the P type semiconductor substrate 5, and the n+ type drain region 7 form a PN junction region of the MOS transistor. In addition, the opposite surface 5 of the light receiving section 2
An insulating film 8 made of, for example, ZnS (zinc sulfide) is formed in the region b, and an opening 9 is formed in the drain region 7 portion. Then, an input gate (IG) made of, for example, aluminum is provided in the PN junction region between the pixel region 6 and the drain region 7 on the insulating film 8.

On the other hand, an n + -type drain region 11 is formed in a P-type silicon (Si) semiconductor substrate 10 . A storage section 12 and a transfer section 13 are located between this drain region 11 . Further, on the semiconductor substrate 10, for example, SiO
An insulating film 14 of 2 (silicon oxide) is formed, and an opening 15 is formed on the drain region 11. This insulating film 14
Above, a storage gate (SG) is formed in the storage part 12 part, a transfer gate (φ) is formed in the transfer part 13 part, and a transfer gate (TG) is formed in the part between the storage part 12 and the transfer part 13. . The storage gate (SG), transfer gate (φ), and transfer gate (TG) are formed of, for example, polysilicon electrodes. Then, the drain regions 7 and 11 are connected by a coupling electrode 4.

FIG. 3 shows a diagram for explaining the light receiving section of FIG. 2. The semiconductor substrate 5 of the light receiving section 2 has an opposite surface 5
The forbidden band width of the energy band at b is formed to be larger than the forbidden band width of the one side 5a. That is, the opposite surface 5b is formed to have a high energy gap voltage EC. In this case, the semiconductor substrate 5 has a bandgap width on one side 5a set in advance to a value matching a predetermined photosensitive wavelength.

In such a photodetector 1, when the light receiving section 2 is irradiated with infrared rays, it passes through the pixel area 6 on one side 5a,
Photoelectric conversion is performed in the P-HgCdTe portion of the semiconductor substrate 5, and charges of electron-hole pairs are generated. Of this charge, electrons gather in the pixel region 6. Therefore, when a signal is applied to the input gate (IG), electrons in the pixel region 6 are amplified by the action of the MOS transistor, move to the drain region 7, and collect in the drain region 11 of the signal processing section 3 via the coupling electrode 4. do. At this time, when a signal is applied to the storage gate (SG), the charges are stored in the storage section 12. Then, by applying signals to the transfer gate (TG) and the transfer gate (φ), the charges in the storage section 12 are transferred to the transfer section 13, read out, and output as an image pickup signal.

In this way, the photodetector 1 can reduce the pitch of the pixel regions 6 by forming a PN junction region in the light receiving section 2, which functions as an input gate (IG) and a conventional input diode. However, the storage section 12 in the signal processing section 3 can be made large. Therefore, it is possible to increase the charge storage time by increasing the storage gate (SG), thereby improving the light utilization efficiency and the S/N ratio.

Furthermore, by making the forbidden width of the energy band on the opposite surface 5b of the light receiving section 2 larger than the forbidden width of the energy band on one surface, light of a predetermined photosensitive wavelength is absorbed only on one surface 5a, and the light of the opposite surface 5b is absorbed. It is possible to prevent an adverse effect on the PN junction region of.

Note that the semiconductor substrate 5 has the above-mentioned Hg1-x
In addition to Cdx Te, Gax Alx-1 As (gallium aluminum arsenic), Pb1-x Snx T
e (lead, tin, tellurium), etc. may also be used. That is, I
Any compound or mixed crystal semiconductor of the II-V group, II-VI group, IV-VI group may be used.

Next, FIG. 4 shows an example of a manufacturing process diagram of the method of the present invention. In FIG. 4, first, a P-type HgCdTe light-receiving layer (
For example, the semiconductor substrate 5) is grown by epitaxial growth.
It is formed with a thickness of 0 μm (FIG. 4(A)). At this time, Cd (cadmium) from CdTe of the substrate 20 becomes HgCdTe.
The HgCdTe composition is supplied to the epitaxial layer side, and the forbidden band width is narrow on the one side 5a side and wide at the interface.

Next, boron ions are implanted into the surface (one side 5a) of the light-receiving layer 5 at a predetermined pitch.
The pixel region 6 of the region is formed on one side 5a (see FIG. 4(B)
)). Then, the n+
A hole 21 is formed from the region 6 (FIG. 4(C)). At this time, the area around the hole 21 becomes n-type due to ionization due to damage during drilling, and is integrated as the same conductivity type.

Next, the surface (one side 5a) of the light-receiving layer 5 is inactivated by forming, for example, a ZnS layer 22 by vapor deposition, and on the ZnS layer 22, for example, GaAs (Gallium.
A support substrate 23 transparent to infrared light such as arsenic (arsenic) is bonded to an epoxy adhesive 24 (FIG. 4(D)). Therefore, the substrate 20 is removed by etching or polishing (FIG. 4(E)).
). Then, the source region 6b and drain region 7 of the pixel region 6 are formed by boron ion implantation to form a PN junction region, and the surface (opposite surface 5b) is inactivated and ZnS
An insulating film 8 is formed (FIG. 4(F)). An opening 9 is formed on the drain region 7 of this insulating film 8 by etching or the like, and a portion 4 of the coupling electrode 4 made of indium or the like is formed on the opening 9.
a (Fig. 4(F)). Furthermore, an input gate (IG) is formed by forming aluminum by vapor deposition or the like in the intermediate portion between the drain region 7 and the pixel region 6 on the insulating film 8 (FIG. 4(F)). Although not shown, the substrate 23 and adhesive 24 are removed by polishing or the like.

On the other hand, although not shown, the signal processing section 3 is formed by a conventional method except for the input gate, and the other portion 4b of the indium coupling electrode 4 is formed on the drain region 11. Then, the electrode 4a on the light receiving section 2 side and the electrode 4b on the signal processing section 3 side are coupled by pressure bonding or thermal welding.

In this manner, the forbidden band width of the energy band in the light receiving section 2 can be easily varied, and the pixel region 6 can be formed.

Next, FIG. 5 shows a side sectional view of another embodiment of the present invention. Note that the same components as in FIG. 2 are denoted by the same reference numerals and explanations are omitted, and the manufacturing method is also the same as in FIG. 4, so explanations are omitted. In FIG. 5, photodetector 1
A is a line address type, in which the input gate (IG) in FIG. 2 is connected as a shift register as a switching gate (G), and the input gate (IG) is formed on the signal processing section 3 side.

Although not shown in the conventional line address type photodetecting device, the switching gate (G) is formed on the signal processing section 3 side, and in the present invention, the switching gate (G) is used to receive light. It is formed on the part 2 side to relatively maintain the accumulation of signal charges in the storage part 12 in the case of high integration.

[0027]

As described above, according to the present invention, a PN junction region acting as an input gate is formed on the surface opposite to the light-receiving section, and an energy band on the surface opposite to the light-receiving section is inhibited by selecting the material. By making the band width larger than that on one side, the accumulation area of the signal processing section can be increased without affecting the PN junction region formed in the light receiving section, and the accumulation of signal charges is not relatively reduced. Furthermore, high integration can be achieved without deteriorating the SN ratio.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the method of the present invention.

FIG. 2 is a side cross-sectional view of one embodiment of the invention.

FIG. 3 is a diagram for explaining the light receiving section of FIG. 2;

FIG. 4 is a manufacturing process diagram of the method of the present invention.

FIG. 5 is a side cross-sectional view of another embodiment of the invention.

FIG. 6 is a side cross-sectional view of a conventional photodetector.

[Explanation of symbols]

1, 1a Photodetector 2 Light receiving part 3 Signal processing section 4 Coupling electrode 5,10 Semiconductor substrate 6 Pixel area 7,11 Drain region 12 Accumulation section 13 Phase shift section

Claims (3)

[Claims] 1. A light receiving section (2) that performs photoelectric conversion by irradiation with light, and an accumulation region (2) for storing charges generated in the light receiving section (2).
12), and a signal processing section (3) that outputs a signal by transferring it to a transfer region (13). From one surface (5a) to the opposite surface (5b), a predetermined number of pixel regions (
6) is formed, and a predetermined number of PN junctions are formed between the pixel regions (6) on the opposite surface (5b) for accumulating the charges in the accumulation region (12) of the signal processing section (3). region(
7) is formed, and the pixel region (6) and the PN
A photodetector characterized in that an input gate (IG) is formed between the junction region (7). 2. The light receiving section (2) is arranged on the opposite surface (5).
The forbidden band width of the energy band in b) is determined from the one side (5
2. The photodetector according to claim 1, wherein the photodetector has a width larger than the forbidden band width in a). 3. A light receiving section (2) that performs photoelectric conversion by irradiation with light, and an accumulation region (2) for storing charges generated in the light receiving section (2).
12), and a signal processing section (3) that outputs a signal by transferring it to a transfer region (13). )
a step of forming a light-receiving layer (5) of a predetermined material having a large forbidden band width at the interface with the substrate (20);
), a step of forming a pixel region (6) of a conductivity type different from the light-receiving layer (5) on one surface (5a) of the light-receiving layer (5); ) to form a region of the same conductivity type as the pixel region (6) around the pixel region (6) and integrate the region with the pixel region (6); A PN junction region (7) is formed between the pixel region (6), and a coupling electrode (4) is provided on the PN junction region (7) for coupling with the signal processing section (3).
a); and forming an input gate (IG) between the pixel region (6) and the PN junction region (7). How to make the utensils.