WO1999042986A1 - Method and apparatus for displaying image - Google Patents
Method and apparatus for displaying image Download PDFInfo
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- WO1999042986A1 WO1999042986A1 PCT/JP1999/000744 JP9900744W WO9942986A1 WO 1999042986 A1 WO1999042986 A1 WO 1999042986A1 JP 9900744 W JP9900744 W JP 9900744W WO 9942986 A1 WO9942986 A1 WO 9942986A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/005—Adapting incoming signals to the display format of the display terminal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0232—Special driving of display border areas
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
- G09G2340/0421—Horizontal resolution change
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0442—Handling or displaying different aspect ratios, or changing the aspect ratio
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0464—Positioning
- G09G2340/0471—Vertical positioning
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0464—Positioning
- G09G2340/0478—Horizontal positioning
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0464—Positioning
- G09G2340/0485—Centering horizontally or vertically
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/02—Graphics controller able to handle multiple formats, e.g. input or output formats
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
- G09G5/008—Clock recovery
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/66—Transforming electric information into light information
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
Definitions
- the present invention provides an image display method of sequentially sampling an input video signal and displaying an image in an effective display area having an aspect ratio x ZY (X: horizontal length, Y: vertical length). And equipment.
- Displays represented by liquid crystal display devices are thin, light, and have low power consumption, and are used for display devices such as personal computers and word processors.
- televisions are used in various fields as display devices for power-navigating systems, and as projection display devices. ing.
- an active matrix liquid crystal display device in which a switch element is electrically connected to each display pixel has no cross-talk between adjacent pixels. Active research and development are being carried out because of the ability to achieve good display images.
- a display device having an effective display area with an aspect ratio of 4Z3 has been used.
- the display is shifting to a display with an effective display area extending in the scanning line direction.
- a method of sequentially sampling based on a predetermined sampling clock and displaying as shown in 2B.
- the aspect ratio of the video signal V video having an aspect ratio of 4/3 is not faithfully reproduced.
- the image extends in the horizontal scanning direction.
- the effective display area with an aspect ratio of 16/9 and the display area with an aspect ratio of 4Z9 are added as shown in Fig. 12D.
- this display method is referred to as a right-aligned display mode in which the display method is shifted left according to the display position.
- the sampling period corresponding to the display area of (3)) is at least 08 H for one horizontal scanning period (1 H) in the case of the NTSC system.
- the sampling period corresponding to the display area with a cut ratio of 4/9 is less than 0.2H.
- this display method is called a centering display mode.
- Fig. 13E there is an anomalous composite display mode in which the centering display mode and the full display mode are irregularly combined (hereinafter referred to as the centering-nothing anomalous composite display).
- the centering-nothing anomalous composite display an irregular composite display mode of left-aligned display mode and full display mode (hereinafter referred to as left-aligned Z full irregular composite display mode), right-aligned display mode and full display.
- left-aligned Z full irregular composite display mode left-aligned Z full irregular composite display mode
- right-aligned display mode There is also a request for an irregular composite mode with the mode (hereinafter referred to as right-aligned no-fault irregular composite display mode).
- An object of the present invention is to address the above-described technical problems, and to provide an image display method and an image display method capable of supporting various display modes, particularly, a composite or irregular composite display mode. Equipment is provided.
- a pixel electrode arranged via a switch element near an intersection of a plurality of signal lines and scanning lines orthogonal to each other and each signal line and scanning line.
- a display panel comprising: a counter electrode facing the pixel electrode; and a light modulating layer disposed between the pixel electrode and the counter electrode.
- a scanning pulse for sequentially conducting between the pixel electrode and the pixel electrode is sequentially output, and each signal line is sequentially sampled from a video signal including a plurality of horizontal scanning periods within a vertical scanning period to a predetermined period of each horizontal selection period.
- the image is displayed by outputting the pixel signal voltage to the ring and outputting the counter electrode voltage to the counter electrode.
- the image display method is shorter than the horizontal scanning period of the video signal.
- Sequential pixels over the first period The pixel signal voltage is sampled and displayed sequentially during a first vertical scanning period in which the signal voltage is sampled and displayed, and in a second period substantially equal to the horizontal scanning period.
- an image display method is provided in which the horizontal selection period is synchronized with the second period of the second vertical scanning period.
- a plurality of signal lines and scanning lines orthogonal to each other are arranged via a switch element in the vicinity of the intersection of each of the signal lines and scanning lines.
- a display panel comprising: a pixel electrode to be formed; a counter electrode facing the pixel electrode; and a light modulation layer disposed between the pixel electrode and the counter electrode.
- a scan line drive circuit that sequentially outputs a scan pulse for conducting between a signal line and a pixel electrode, and a video signal that includes a plurality of horizontal scan periods within a vertical scan period for each signal line.
- a signal line drive circuit that sequentially samples for a predetermined period of the horizontal selection period and outputs a pixel signal voltage, a counter electrode drive circuit that outputs a counter electrode voltage to a counter electrode, and an external input Based on display mode selection signal
- a control circuit for determining the timing of the horizontal selection period, wherein the control circuit samples the pixel signal voltage sequentially over a first period shorter than the horizontal scanning period of the video signal.
- a second vertical scanning period in which the pixel signal voltages are sampled and displayed sequentially over a second period substantially equal to the horizontal scanning period.
- the drive timing that is, the timing of the horizontal selection period is restricted in the composite or irregular composite display mode.
- display can be performed with a simple circuit configuration.
- a display panel having a display area composed of a plurality of horizontal scanning lines including display pixels connected to a plurality of signal lines, respectively, is provided.
- a video signal including a plurality of effective video periods and a blanking period between the effective video periods is sampled at a predetermined timing to obtain a pixel signal voltage, and each horizontal scanning line is sampled.
- a signal line driving circuit for supplying a signal line to the first and second timings different from the first timing and the first timing within a blanking period of the video signal;
- the video signal is supplied to a reference voltage based on the first or second timing of the drive timing selection circuit for selecting one of the two.
- a polarity inversion circuit for inverting the polarity.
- the selector circuit section outputs the pixel signal voltage corresponding to the first video signal from the video signal including the first video signal to each signal line for each horizontal scanning line during the effective video period.
- An image display device is provided in which both the second timing and the second timing are set to be selectable.
- the drive timing selection circuit unit switches the pixel signal voltage corresponding to the first video signal from the video signal including the first video signal during the effective video period.
- the display with different drive timing In this case, it is possible to display in a composite or irregular composite display mode in which the image is combined within the vertical scanning period.
- FIG. 1 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention.
- FIG. 2 is a partial schematic cross-sectional view of the liquid crystal panel shown in FIG. 1
- FIG. 3 is a schematic configuration diagram of the X drive circuit unit shown in FIG. 1
- FIG. 4 is a Y drive circuit unit shown in FIG.
- FIG. 5 is a schematic configuration diagram of the control circuit unit shown in FIG. 1
- FIG. 6 is a diagram illustrating a driving waveform in the full display mode.
- FIG. 7 is a diagram for explaining another driving waveform in the full display mode.
- FIG. 8 is a diagram for explaining another driving waveform in the full display mode.
- FIG. 9 is a diagram for explaining the drive waveform in the left-aligned display mode.
- FIG. 10 is a diagram for explaining the drive waveform in the right-justified display mode.
- Fig. 11 is a diagram for explaining the drive waveform in the centering display mode.
- Fig. 12A-Fig. 12D is a diagram for explaining various display states.
- Figure 13A- Figure 13E is a diagram for explaining various display states.
- the liquid crystal display device of this embodiment has a full display mode, a right-aligned display. Mode, left-aligned display mode, centering display mode, left-aligned Z full composite display mode, right-aligned Z full composite display mode, centering Z It is configured to be able to display full composite display mode and various irregular composite display modes.
- the liquid crystal display device 1 has a display area 103 having a diagonal width of 7 inches and an aspect ratio of 16 Z9, and has the highest display luminance when no voltage is applied. This is a normal white light mode.
- the liquid crystal display device 1 sequentially samples the video signal Video supplied from the control circuit unit 401, the liquid crystal panel 101, and the control circuit unit 401 over a horizontal selection period.
- a counter electrode driving circuit 501 for supplying a counter electrode voltage V com is included.
- the liquid crystal panel 101 includes a twisted nematic liquid crystal in which an array substrate 110 and a counter substrate 150 are interposed via alignment films 181 and 183, respectively. Holds layer 185 and seals
- Polarizing plates 191 and 193 are arranged on the outer surfaces of the substrates 110 and 150, respectively, such that their polarization axes are orthogonal to each other.
- An amorphous silicon thin film is used for the active layer 123, a channel protective film 4 is further formed thereon, a drain electrode 125 connected to the active layer 123 and extending from the signal line Xi,
- An inverted staggered thin-film transistor 121 (hereinafter, abbreviated as TFT) having a source electrode 126 connected to the active layer 123 is provided.
- the source electrode 126 of the TFT 121 is connected to a pixel electrode 131 composed of an ITO (Indium Tin Oxide).
- the auxiliary capacitance line C j is electrically connected to a counter electrode driving circuit 501 (not shown).
- the opposing substrate 150 is a mat for shielding the TFT 121 formed on the array substrate 110, the gap between the signal line Xi and the pixel electrode 131, and the gap between the scanning line Yj and the pixel electrode 131.
- the light-shielding layer 153 has a color composed of three primary colors of red (R), green (G), and blue (B) arranged between the light-shielding layers 153 to realize a color display.
- a filter layer 155 is provided, and a counter electrode 157 made of I.T.O. is further arranged.
- the display area 103 of the cell 101 includes 480 display pixels in which one horizontal pixel line is composed of red (R), green (G), and blue (B) display pixels. Such a horizontal pixel line force S 240 is arranged in a row.
- the control circuit 401 includes first to fourth video signals Video1 to Video4, a horizontal / vertical synchronization signal HZV sync, and a screen switching signal SE. L is input. Based on the screen switching signal SEL i, the control circuit section 401 controls the X driving circuit 201—1, 201—2, 201—3, 201—4, and the corresponding horizontal clock signal. XCK: Provides the horizontal start signal XST and the video signal Video. Further, based on the screen switching signal SEL, the Y drive circuit 301 sends the corresponding vertical clock signal YCK and vertical start signal YST to the counter electrode drive circuit 501. Outputs each of the corresponding polarity inversion signals POL.
- the X drive circuit 201-1 sequentially transfers the horizontal start signal XST corresponding to the screen switching signal SEL based on the horizontal clock signal XCK.
- each horizontal selection period is applied to the video signal Video.
- a latch circuit 221 for holding and a buffer circuit 231 are provided. Since the X drive circuits 201-2, 201-3, and 201-4 have the same configuration, the description is omitted.
- the Y drive circuit 301 sequentially transfers the vertical start signal YST corresponding to the screen switching signal SEL based on the vertical lock signal YCK.
- a buffer circuit 311 for sequentially outputting the data for the selected period.
- the counter electrode drive circuit 501 outputs a counter electrode voltage Vcom whose polarity is inverted with respect to the reference voltage in synchronization with the polarity inversion signal POL. In this embodiment, a square having 0 V and 5 V is used. Consists of waves.
- the control circuit unit 401 includes a control unit 411 and a control unit 411 that output a control signal CONT based on an input screen switching signal SEL.
- the memory 413 holds the current display mode based on the instruction
- the ROM 415 holds various display mode data
- the horizontal / vertical synchronization signal HZV sync holds various display mode data
- the horizontal / vertical synchronization signal HZV sync holds various display mode data
- ST generator 421 that generates horizontal start signal XST and vertical start signal YST based on control signal CONT, horizontal / vertical synchronization signal H / V sync, and control port
- the POL generation section 431 that generates the polarity inversion signal POL based on the control signal CONT from the 411, the horizontal / vertical synchronization signal H / V sync, and the control signal CONT from the controller section 411 Based on horizontal lock signal XCK and vertical lock Click signal Y C K that generates a C K generating portion 441, co emissions collected by filtration over la section 411 or et video signal V i de on the basis of the control signal C O N T of.
- a Video generation unit 461 for generating a video signal.
- the POL generating unit 431 is configured to output a video signal Video whose polarity is inverted every horizontal scanning period and a common electrode voltage Vcom in order to reduce the frit force.
- the relationship between the video signal Video and the common electrode voltage Vcom has a relationship in which the phases are different by 180 ° in order to reduce the withstand voltage of each drive circuit.
- the video generation section 461 receives the first to fourth video signals Vide ol to Video4 are synthesized based on the control signal CONT from the controller unit 411 corresponding to the display mode, and the output from the video processing unit 463 and the polarity from the video processing unit 463 are A polarity reversing unit 465 for outputting as a video signal Video whose polarity is inverted with respect to a reference voltage in synchronization with the inversion signal POL.
- the video signal Video that is polarity-inverted every horizontal selection period is output in order to reduce the flit force.
- the CK generation unit 441 includes a reference clock generation circuit 445 that generates the reference clock CK ref, and a frequency divider (A, A) that divides the reference clock CK ref by a predetermined ratio.
- A, A a frequency divider that divides the reference clock CK ref by a predetermined ratio.
- B, C 446, 447, 448, frequency divider
- (A, ⁇ ) Selects one of the outputs 446 and 447.CK adjustment circuit 443 that outputs the frequency division switching signal SWCK.Clock selection circuit 449 that selects and outputs based on the frequency division switching signal SWCK.
- a phase adjustment unit 451 for adjusting the output phase from the mouth selection circuit 449 and a phase adjustment unit 453 for adjusting the output phase from the frequency divider (C) 448 are provided.
- the liquid crystal display device 1 includes a common electrode drive circuit that supplies the common electrode voltage Vcom to the common electrode 157.
- the counter electrode voltage V com is inverted in polarity with respect to the reference voltage in the opposite phase to the video signal Vi deo based on the polarity inversion signal POL from the control circuit unit 401, whereby the X drive is performed.
- Circuit 201-1, 20 ton 2 '201-3, 201-4 achieve low withstand voltage.
- the liquid crystal display device 1 has the following three types of driving timings in the full display mode, and will be described in order with reference to FIGS.
- the drive waveforms in FIGS. 6 to 8 show the drive waveforms of black raster display.
- the video signal Videol includes a plurality of horizontal scanning periods within one field (vertical scanning) period, and includes an effective video period within each horizontal scanning period. Then, a period between each effective video period is a horizontal blanking period.
- the full-display mode is selected by the screen switching signal SEL; if specified, the controller unit 411 corresponds to the full display mode from the ROM415 level. Acquires data and outputs control signal CONT.
- the POL generator 431 generates a polarity inversion signal POL based on the control signal CONT and the horizontal / vertical synchronization signal H / Vsync.
- the polarity inversion signal POL is set in synchronization with each horizontal scanning period of the video signal Video 1.
- the video processing section 461 outputs the video signal Video 1 without synthesizing the video signal in accordance with the control signal CONT based on the display mode.
- the polarity of the inversion unit 465 is inverted with respect to the reference voltage in synchronization with the polarity inversion signal POL. Generates and outputs video signal Video.
- the common electrode drive circuit 501 outputs the common electrode voltage Vcom whose polarity is inverted with respect to the reference voltage in the opposite phase to the video signal Vide0.
- ST generator 421 based on the control signal CONT Contact good beauty horizontal and vertical sync signals H / V S ync, generates a horizontal scan te preparative signal XST Contact and vertical scan te preparative signal VST as shown in FIG. 6 . Since the horizontal start signal XST is located within the horizontal blanking period corresponding to the effective video period of each horizontal scan period, a predetermined horizontal clock after a predetermined time after the horizontal scan period. It is controlled so that it is located after the hike. Further, the vertical start signal VST is set within the vertical blanking period corresponding to each field period.
- the CK adjustment circuit 443 selects an output of the frequency divider (A) 446 based on the control signal CONT and the horizontal / vertical synchronization signal HZV sync, and outputs the selected signal as the horizontal clock signal XCK. Output .
- Each of the X drive circuits 201-1, 201 ′ has a sampling port corresponding to an effective video period based on the horizontal start signal XST and the horizontal clock signal XCK. , And sequentially samples the video signal Video in the effective video period, and outputs the image signal voltage Vsig to each signal line X1, X2,.
- the Y drive circuit 301 applies a horizontal scanning period of the video signal Vide 01 to each scanning line Yl, ⁇ 2,... Based on the vertical clock signal VCK and the vertical start signal VST. scan pulses VY 1, VY 2 synchronized with, ... sequentially outputs the image signal voltage V S ig to the pixel electrode 131 corresponding Ri by the Re this is written, the counter electrode voltage V c 0 An indication is made based on the potential difference between m and.
- the polarity inversion of the video signal Vide0 and the counter electrode voltage Vcom is the polarity inversion signal synchronized with the horizontal scanning period of the video signal Vide01.
- the horizontal selection period of each scanning pulse VY is also synchronized with the horizontal scanning period of the video signal Vide01.
- the full display mode 2 differs from the full display mode 1 in the timing of the polarity inversion signal POL and the vertical start signal VST.
- the POL generating section 431 is synchronized with the effective video period of each horizontal scanning period, that is, almost coincides with the start position of the effective video period, and the horizontal running period of the video signal Video 1
- the polarity inversion signal POL located within a horizontal blanking period after a predetermined time after a predetermined horizontal lock after the start position of the signal is generated. Accordingly, the polarity inversion of the video signal Video and the counter electrode voltage Vcomm is also performed in synchronization with the timing of the polarity inversion signal POL.
- the vertical start signal VST is also synchronized with the timing of the polarity inversion signal POL. For this reason, the horizontal selection period of the liquid crystal display device 1 is delayed by a predetermined horizontal clock as shown in FIG. 7 with respect to the horizontal scanning period of the video signal Vide 01. It becomes a ring.
- the polarity inversion of the video signal Vide0 and the common electrode voltage Vcom is inverted by the polarity inversion signal POL synchronized with the effective video period of the video signal Video1.
- Each scan based on The horizontal selection period of the pulse VY is also synchronized with the effective video period of the video signal Video 1.
- This full display mode 3 is different from the above full display modes 1 and 2 in the timing of the polarity inversion signal POL and the vertical start signal VST.
- the POL generation section 431 is synchronized with the end position of the effective image period of each horizontal scanning period, that is, in synchronization with the horizontal blanking period, and a predetermined time before the horizontal scanning period and a predetermined horizontal clock period. Generates a polarity inversion signal POL located within the horizontal planning period before locking. Therefore, the video signal V ideo your good beauty counter electrode voltage V C. The polarity inversion of m is also performed in synchronization with the timing of the polarity inversion signal POL.
- the vertical start signal VST is synchronized with the timing of the polarity inversion signal POL. For this reason, as compared with the horizontal scanning period of the video signal Video, the horizontal selection period of the liquid crystal display device 1 has a predetermined horizontal clock advance rate and timing as shown in FIG. It becomes a bug.
- the polarity inversion of the video signal Video and the counter electrode voltage Vcom is changed to the polarity inversion signal POL synchronized with the horizontal blanking period of the video signal Vide01. Based on this, the horizontal selection period of each scanning pulse VY is also synchronized with the horizontal blanking period of the video signal Video 1.
- the liquid crystal display device 1 has the full display mode in the horizontal selection period and the polarity inversion timing. It has a kind of drive timing.
- the video signal Video 1 of the NTSC system is displayed in the area A of the aspect ratio 43 while maintaining its aspect ratio, and the video signal Vide 0 2 is displayed in the area ratio 4.
- the left-aligned display mode displayed in the area B of Z9 will be described with reference to FIG.
- the video signal Vide01 includes a plurality of horizontal scanning periods in one build period, and an effective video period in each horizontal scan period, as described above.
- the period between each effective video period is the horizontal blanking period.
- the video signal Vide02 has an effective video period corresponding to the blanking period of the video signal Videol
- the control unit 411 acquires data corresponding to the left-aligned display mode from the ROM 415. Output the control signal CONT
- the controller unit 411 compares the data held in the memory 4 13 with the current display mode held in the memory 4 13. Update . If the full display mode 1 or 3 described above is held as the current display mode in the memory 4 13, the controller 4 1 1 switches the mode. Display mode switching is set within the vertical blanking period to prevent the occurrence of display failure at the time of display, and when full display mode 2 is held, the display mode is switched. Is set immediately during the horizontal planning period.
- the ST generator 421 outputs the control signal CONT and the horizontal and vertical signals.
- a horizontal start signal XST and a vertical start signal VST shown in FIG. 9 are generated based on the direct synchronization signal H / V sync.
- the horizontal start signal XST and the vertical start signal VST are the same as the drive timing of the full display mode 2 shown in FIG.
- the POL generation unit 431 generates the same polarity inversion signal POL as the drive timing of the full display mode 2 shown in FIG. 7 based on the control signal CONT and the horizontal / vertical synchronization signal HZVsync.
- the CK adjustment circuit 443 determines the effective video period of each horizontal scanning period of the video signal Video 1 from the frequency divider (A) 446 based on the control signal CONT and the horizontal / vertical synchronization signal HZV sync. Select the output and the blanking period of the video signal Videol
- the video processing unit 463 of the video generation unit 461 assigns the video signal Video2 to the blanking period of the video signal Video 1 based on the control signal CONT and the polarity inversion signal POL, and the polarity inversion unit 465 Outputs a video signal Video whose polarity is inverted with respect to the reference voltage in synchronization with the polarity inversion signal POL.
- the polarity inversion signal POL also controls the polarity inversion of the common electrode voltage Vc0m.
- Each of the X drive circuits 201-1,..., 201-4 is provided with a signal for an effective video period and a horizontal blanking period based on the horizontal start signal XST and the horizontal clock signal XCK. A sampling clock is generated, the video signal Vide0 is sampled sequentially, and an image signal voltage Vsig is output to each signal line XI, X2,.
- the Y drive circuit 301 is connected to the vertical clock signal VCK and the vertical clock signal VCK. Based on the vertical start signal VST, the scanning pulses VY 1, VY 2,... Synchronized with the effective video period of the video signal Videol are sequentially output to each scanning line Y l, ⁇ 2,. Accordingly, the image signal voltage Vsig is written to the corresponding pixel electrode 131, and display is performed based on the potential difference from the common electrode voltage Vcom.
- the full display mode 2 and the drive timing are set to be the same.
- an NTSC video signal Videol having an aspect ratio of 4 Z3 is converted to an aspect ratio of 4 while maintaining the aspect ratio.
- the right-justified display mode in which the video signal Video3 is displayed in the area A of the aspect ratio 4Z9 by displaying the video signal Video3 in the area B of / 3 will be described with reference to FIG.
- the video signal Videol includes a plurality of horizontal scanning periods in one field period as described above, and includes an effective video period in each horizontal scanning period. The period between each effective video period is a horizontal blanking period.
- the video signal Video3 has an effective video period corresponding to the blanking period of the video signal Videol.
- the controller unit 411 acquires data corresponding to the rightward display mode from the ROM 415, and outputs the data corresponding to the control signal CONT. Is output.
- the controller unit 411 compares the current display mode held in the memory 413 with the current display mode. Data held in memory 413 Update the data.
- the controller unit 411 will operate at the time of mode switching. Set the display mode switching within the vertical blanking period to prevent the occurrence of display failure, and if full display mode 3 is maintained, switch the display mode Set immediately during the ringing period.
- horizontal scan Turn-door signal XST your good beauty vertical scan Turn-door signal VST as shown in FIG. 1 0 Generate.
- the horizontal start signal XST is synchronized with the end position of the effective video period of each horizontal scanning period of the video signal Videol and the blanking period, and is a predetermined horizontal period and a predetermined horizontal period before each horizontal scanning period. It is set to be located within the horizontal blanking period before opening. Further, the vertical start signal VST is the same as the drive timing of the full display mode 3 shown in FIG.
- the POL generation section 431 Based on the control signal C431NT and the horizontal and vertical synchronization signals HZV sync, the POL generation section 431 generates the same polarity inversion signal POL as the drive timing of the full display mode 3 shown in FIG.
- the CK adjustment circuit 443 sets the effective video period of each horizontal scanning period of the video signal Videol to a frequency divider (A Select output from 449 and select output from frequency divider (B) 447 during the blanking period of video signal Vide 01 and output as horizontal clock signal XCK .
- the Video generation unit 461 divides the video signal Video3 during the blanking period of each horizontal scan period of the video signal Vide01 based on the control signal CONT and the polarity inversion signal POL. At the same time, it outputs a video signal V id eo whose polarity is inverted with respect to the reference voltage based on the polarity inversion signal POL. This polarity inversion signal POL also controls the polarity inversion of the common electrode voltage Vcom.
- Each of the X drive circuits 201-1,..., 201-4 is connected to the horizontal blanking period and the effective video period based on the horizontal start signal XST and the horizontal clock signal XCK.
- a sampling clock is generated, the video signal Video is sampled sequentially, and an image signal voltage Vsig is output to each signal line XI, X2,.
- the Y drive circuit 301 applies an effective video of the video signal Video 1 to each of the scanning lines Yl, ⁇ 2,... based on the vertical clock signal VCK and the vertical start signal VST.
- the scanning pulses VY 1, VY 2,... Synchronized with the horizontal blanking period are sequentially output, whereby the image signal voltage V sig is written to the corresponding pixel electrode 131, and the counter signal is output.
- the display is made based on the potential difference from the electrode voltage V com.
- the right alignment display mode is set to have the same drive timing as the full display mode 3.
- an NTSC video signal having an aspect ratio of 4/3 is placed at the center of the display area 103 while maintaining the aspect ratio.
- the centering display mode in which the display is performed by the centering will be described with reference to FIG.
- the NTSC video signal corresponding to area B with an aspect ratio of 4 Z3 is the video signal Videol
- the video signal corresponding to area A with an aspect ratio of 29 is the video signal V.
- the video signal corresponding to the area C with the aspect ratio 2Z9 is input as the video signal Video3 as i deo2.
- the controller unit 411 compares the current display mode held in the memory 413 with the current display mode. At the same time, the data held in the memory 413 is updated.
- the controller unit 411 displays the display when the mode is switched. To prevent the occurrence of defects, switch the display mode within the vertical blanking period, and if full display mode 1 is maintained, switch the display mode to the horizontal blanking period. Set immediately between.
- the controller unit 411 acquires data corresponding to the centering display mode from the ROM 415 and outputs a corresponding control signal CONT.
- the ST generator 421 generates the horizontal start signal XST and the vertical start signal VST shown in FIG. 11 based on the control signal CONT and the horizontal and vertical synchronization signals HZV sync. To This horizontal start signal XST is set synchronously with the start position of each horizontal scanning period.
- the vertical start signal V ST is the same as the drive timing of the full display mode 1 shown in FIG.
- the POL generation unit 431 controls the control signal C ⁇ NT and the horizontal and vertical Based on the synchronization signal H / Vsync, the same polarity inversion signal POL as the drive timing of the full display mode 1 shown in FIG. 6 is generated, and the CK adjustment circuit 443 controls the control signal CONT Based on the vertical synchronization signal HZV sync, the output from the frequency divider (A) 446 is selected for the effective video period of each horizontal scanning period of the video signal Video 1 and the video signal Video L During the blanking period, the output from the frequency divider (B447 is selected and output as the horizontal clock signal XCK.
- Vide 0 generating section 461 divides video signals Video2 and 3 during the banking period of each horizontal scanning period of video signal Video 1 based on control signal CONT and polarity reversal signal POL. At the same time, the video signal Video whose gender is inverted with respect to the reference voltage based on the polarity inversion signal POL is output. This polarity inversion port POL also controls the polarity inversion of the counter electrode voltage Vc0m at the same time.
- Each of the X drive circuits 201-1, ... 201-4 is connected to the horizontal start signal described above.
- a sampling clock is generated over the horizontal blanking period and the effective video period, and the video signal Video is sequentially sampled. And outputs an image signal voltage Vsig to each signal line X 1 X 2,.
- the Y drive circuit 301 applies the video signal Video 1 to each of the scanning lines Y1, Y2,... Based on the vertical clock signal VCK and the vertical start signal VST.
- the scanning pulses VY 1, VY 2,... Substantially synchronized with the horizontal scanning period are sequentially output, and the corresponding image is output.
- the drive timing is set to be the same as the full display mode 1.
- the full display mode has three drive timings, that is, the horizontal selection period and the drive timing such as the polarity inversion timing. There are few restrictions.
- the full display mode has a horizontal selection period and a drive timing such as a polarity inversion timing corresponding to the left alignment, the right alignment, and the centering display mode, respectively.
- the horizontal selection period and the drive timing such as the polarity inversion timing are uniquely determined.
- the drive timing of the horizontal selection period and the polarity inversion timing is determined by giving priority to the drive timing of the right-justified and centering display modes, and based on this. If the drive timing of the full display mode is determined in this way, the drive timing such as the horizontal selection period and the polarity inversion timing within the vertical scanning period can be changed. It can correspond to various composite display modes or irregular composite display modes.
- the controller section 4 11 1 is held in the memory 4 13
- the data held in the memory 413 is updated while being compared with the current display mode.
- the controller unit 411 acquires data corresponding to the left-aligned / full composite display mode from the ROM 415, and outputs a corresponding control signal CONT.
- the control signal CONT is set so that the display of the areas A and B is controlled by the drive timing of the left-aligned display mode described above, and the ST generator 421, the POL generator 431, and the CK generator. 441 and the video generation section 461 are controlled, and the area C is driven in the full display mode 2 due to the restriction on the drive timing of the left display mode. Is selected to control the ST generator 421, the POL generator 431, the CK generator 441, and the Video generator 461.
- the polarity inversion signal POL, the vertical start signal VST, and the vertical opening signal VCK are the same as those in the left-aligned display mode and full-display mode 2 described above. Therefore, during the horizontal selection period of the liquid crystal display device 1, the polarity inversion timing of the video signal Video and the common electrode voltage Vcom coincide. Therefore, it is possible to mix the left-aligned display mode and the full display mode 2 within the field period, and it is possible to mix left-aligned display mode and full- Display is possible.
- the display of the areas A and B is based on the control signal C_NT from the controller unit 411.
- the full display mode 3 drive timing is limited due to the right-aligned display mode drive timing restriction. Select and control each one. That is, in the right display mode and the full display mode 3 described above, the polarity inversion signal POL, the vertical start signal VST, and the vertical clock signal VCK are the same. Therefore, during the horizontal selection period of the liquid crystal display device 1, the polarity inversion timing of the video signal Vide0 and the counter electrode voltage Vccm match. Therefore, it is possible to switch between right-aligned display mode and full-display mode 3 during the field period, and special display such as right-aligned Z full composite display mode is possible. Become .
- the areas A and B are controlled based on the control signal C_NT from the controller section 41 1.
- C are the driving timings of the above-mentioned centering display mode
- area D is the constraint timing of the driving timing of the centering display mode. Each is controlled by the drive timing of full display mode 1.
- the above-mentioned centering display mode and full display mode 1 are different from the polarity inversion signal P ⁇ L, the vertical start signal VST, and the vertical clock signal VCK. Therefore, the polarity inversion timing of the video signal Video and the polarity of the common electrode voltage Vcom coincide during the horizontal selection period of the liquid crystal display device 1. Therefore, it is possible to switch between the centering display mode and the full display mode 1 during the field period, and it is possible to switch the special display mode such as the centering Z full composite display mode. Display is possible.
- the timing for switching between the left-aligned display mode and the full display mode 2 or the timing for switching between the right-aligned display mode and the full display mode 3 is the vertical scanning period.
- the video signal Video of the NTSSC system has been described as an example, but various signals can be displayed.
- the displayable mode is increased by appropriately combining with a zoom display mode or the like in which only a part of the effective video period of the video signal Video 1 is sampled and displayed. It is also possible to let them do it.
- an active matrix type display device in which a TFT is electrically connected to each pixel has been described as an example.
- a MIM (Metal Insulator Metal) element may be used as the element.
- the image display method and the apparatus thereof of the present invention it is possible to cope with various display modes, in particular, a composite or irregular composite display mode without requiring a complicated circuit configuration or the like. .
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
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Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/403,024 US6304242B1 (en) | 1998-02-19 | 1999-02-19 | Method and apparatus for displaying image |
| EP99906449A EP0980060A4 (en) | 1998-02-19 | 1999-02-19 | IMAGE DISPLAY TECHNIQUE AND DEVICE |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10/36919 | 1998-02-19 | ||
| JP10036919A JPH11231844A (ja) | 1998-02-19 | 1998-02-19 | 画像表示方法及びその装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1999042986A1 true WO1999042986A1 (en) | 1999-08-26 |
Family
ID=12483182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP1999/000744 Ceased WO1999042986A1 (en) | 1998-02-19 | 1999-02-19 | Method and apparatus for displaying image |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6304242B1 (ja) |
| EP (1) | EP0980060A4 (ja) |
| JP (1) | JPH11231844A (ja) |
| WO (1) | WO1999042986A1 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109869592A (zh) * | 2019-03-27 | 2019-06-11 | 深圳市亮彩科技有限公司 | 一种可自动化控制旋转的led齿轮屏 |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100653751B1 (ko) * | 1998-10-27 | 2006-12-05 | 샤프 가부시키가이샤 | 표시 패널의 구동 방법, 표시 패널의 구동 회로 및 액정 표시 장치 |
| JP3620434B2 (ja) * | 2000-07-26 | 2005-02-16 | 株式会社日立製作所 | 情報処理システム |
| US6806015B2 (en) * | 2001-02-06 | 2004-10-19 | Konica Corporation | Image forming method using flattened spheroidal toner |
| TW562972B (en) * | 2001-02-07 | 2003-11-21 | Toshiba Corp | Driving method for flat-panel display device |
| JP4053508B2 (ja) * | 2004-03-10 | 2008-02-27 | シャープ株式会社 | 表示装置の駆動方法および表示装置 |
| KR20060104223A (ko) * | 2005-03-29 | 2006-10-09 | 삼성에스디아이 주식회사 | 전자방출소자의 구동장치 및 그 구동 방법 |
| KR20060104222A (ko) * | 2005-03-29 | 2006-10-09 | 삼성에스디아이 주식회사 | 전자방출표시장치의 구동장치 및 그의 구동방법 |
| JP2006284708A (ja) * | 2005-03-31 | 2006-10-19 | Sony Corp | 表示パネル、その駆動方法および駆動装置、並びに表示装置 |
| JP2007241029A (ja) * | 2006-03-10 | 2007-09-20 | Toshiba Matsushita Display Technology Co Ltd | 液晶表示装置 |
| US8552953B2 (en) * | 2006-09-29 | 2013-10-08 | Sharp Kabushiki Kaisha | Display device |
| JP4992969B2 (ja) * | 2007-04-27 | 2012-08-08 | 富士通株式会社 | 表示装置の駆動方法及び表示装置 |
| CN111473207A (zh) * | 2020-06-04 | 2020-07-31 | 深圳市亮彩科技有限公司 | 一种led四屏自动推出旋转装置 |
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| JPH066678A (ja) * | 1992-06-16 | 1994-01-14 | Canon Inc | 画像処理装置 |
| JPH07115610A (ja) * | 1993-10-15 | 1995-05-02 | Mitsubishi Electric Corp | ワイドアスペクトテレビジョン受像機 |
| JPH08304774A (ja) * | 1995-05-01 | 1996-11-22 | Canon Inc | 画像表示装置 |
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| TW356546B (en) * | 1993-08-10 | 1999-04-21 | Sharp Kk | An image display apparatus and a method for driving the same |
| JP3243932B2 (ja) * | 1994-04-22 | 2002-01-07 | ソニー株式会社 | アクティブマトリクス表示装置 |
| JPH09212139A (ja) * | 1996-02-02 | 1997-08-15 | Sony Corp | 画像表示システム |
| JPH09325741A (ja) * | 1996-05-31 | 1997-12-16 | Sony Corp | 画像表示システム |
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- 1998-02-19 JP JP10036919A patent/JPH11231844A/ja active Pending
-
1999
- 1999-02-19 US US09/403,024 patent/US6304242B1/en not_active Expired - Lifetime
- 1999-02-19 EP EP99906449A patent/EP0980060A4/en not_active Withdrawn
- 1999-02-19 WO PCT/JP1999/000744 patent/WO1999042986A1/ja not_active Ceased
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH066678A (ja) * | 1992-06-16 | 1994-01-14 | Canon Inc | 画像処理装置 |
| JPH07115610A (ja) * | 1993-10-15 | 1995-05-02 | Mitsubishi Electric Corp | ワイドアスペクトテレビジョン受像機 |
| JPH08304774A (ja) * | 1995-05-01 | 1996-11-22 | Canon Inc | 画像表示装置 |
| JPH10143106A (ja) * | 1996-09-11 | 1998-05-29 | Toshiba Corp | 画像表示装置および画像表示方法 |
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| CN109869592A (zh) * | 2019-03-27 | 2019-06-11 | 深圳市亮彩科技有限公司 | 一种可自动化控制旋转的led齿轮屏 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0980060A4 (en) | 2001-01-17 |
| EP0980060A1 (en) | 2000-02-16 |
| US6304242B1 (en) | 2001-10-16 |
| JPH11231844A (ja) | 1999-08-27 |
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