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WO1996009647A1 - Procede de mise en contact d'un composant electronique sur un substrat - Google Patents

Procede de mise en contact d'un composant electronique sur un substrat Download PDF

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Publication number
WO1996009647A1
WO1996009647A1 PCT/DE1995/001322 DE9501322W WO9609647A1 WO 1996009647 A1 WO1996009647 A1 WO 1996009647A1 DE 9501322 W DE9501322 W DE 9501322W WO 9609647 A1 WO9609647 A1 WO 9609647A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
contact
bumps
gold
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE1995/001322
Other languages
German (de)
English (en)
Inventor
Joachim Eldring
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Priority to JP8510532A priority Critical patent/JPH10503059A/ja
Publication of WO1996009647A1 publication Critical patent/WO1996009647A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Definitions

  • the invention relates to a method for connecting aluminum connection surfaces of an electronic component to contact surfaces of a substrate, and to an electronic circuit produced using this method.
  • connection or metallization pads
  • a large number of permanent connections are then produced in a single process step by soldering, thermocompression welding or gluing, and a high connection density or connection density can also be achieved.
  • the flip-chip assembly technology is used, for example, in the connection of two or more chips or else for fastening and / or contacting chips on substrates, in particular for forming multi-chip modules (MCM).
  • MCM multi-chip modules
  • the contact bumps can be applied either only to the substrate connection area, only to the chip connection area or to both.
  • the application of Contact bumps on bumps also called "bumping".
  • the invention can be advantageously used in the context of flip-chip technology in all areas where, in particular, ever smaller components or higher frequencies (or very small capacitances and inductors) or high integration densities are necessary or useful, for example on the Fields of application of integrated optics and / or microwave technology.
  • the flip-chip method in the cited document also comes with a low bonding temperature (less than 350 °) C) and a reduced contact pressure to good quality connections, especially in terms of shear strength.
  • a silicon IC with aluminum pads is connected on the one hand to a substrate ("chip on substrate") and on the other hand to an III-V semiconductor component ("chip on chip”).
  • the substrate and the Ill-V semiconductor component are equipped with gold surface metallizations at the contact points.
  • a connecting layer made of titanium-tungsten and a gold layer are first applied by sputtering to the aluminum pads of the silicon ICs, which are usually present in the wafer composite, before the gold contact bumps are deposited electrochemically.
  • the many process steps for the construction of gold contact bumps on the aluminum connection pads of the silicon IC are disadvantageous and are therefore exposed to increased thermal and mechanical loads. Another disadvantage is that these process steps for Contact bump construction is only profitable with many silicon ICs to be contacted or is a significant cost factor for smaller quantities.
  • An achievement of this object consists in a method for contacting aluminum pads of an electronic component on a substrate in accordance with the characterizing features of claim 1
  • an object of the present invention to provide an electronic circuit in which a plurality of aluminum pads of an electronic component are connected to contact areas on a substrate using gold as the predominant connecting material, in such a way that the mechanical and thermal properties are low Stress for the electronic component and with few process steps and with low technical equipment costs, environmentally friendly and inexpensive connections produced have high quality, reproducible mechanical and electrical properties, especially with a large number of contacted aluminum pads.
  • This object is achieved by an electronic circuit according to claim 18.
  • a method for connecting an electronic component which has a plurality of aluminum connection surfaces on one surface, to a substrate having a plurality of contact surfaces via contact metallizations formed between the aluminum connection surfaces and the contact surfaces the contact metallizations at least forming one largely consist of the connecting material gold
  • the contact surfaces on the substrate are provided with contact bumps, which at least consist largely of gold.
  • a plurality of aluminum connection areas of the electronic component are also aligned with the contact areas provided with contact bumps on the substrate.
  • a third step under the exclusive action of pressure and temperature, a connection is made between the aluminum connection areas and the contact bumps, which largely consist of gold, on the contact areas of the substrate.
  • All aluminum connections usually used in semiconductor processes can be used as aluminum connection surfaces, e.g. B. about a pad composition of about 99 percent by weight aluminum and the rest silicon.
  • the electronic components include, for example, individual chips, IC components or also substrates provided with conductor tracks, both inorganic (for example silicon, ceramic) and organic (for example fiber composite materials).
  • the contact bumps on the contact surfaces of the substrate are formed in such a way that they have a narrow contact bump tip and one in comparison have a wider base of bumps.
  • These contact bumps are preferably generated mechanically by so-called “ball bumping” (or “stud bumping” or “mechanical bumping”).
  • ball bumping refers to rell a method for producing contact bumps on connection areas of a chip or a substrate. Ball bumping is derived from the known wire bonding process and can be implemented with only a slight change in the control hardware and software of a wire bonder.
  • the bonding wire is not guided in a loop to the second contact point and a second contact ball is applied, as is the case with the usual wire bonding, but the bonding wire is cut off by a flame device after an adjustable length.
  • the advantages of these gold ball bumps are on the one hand the selectively adjustable deformability properties during the later bonding process due to the selected geometric dimensions of a gold ball bump, the deformable and narrow conical shape being more deformable than the gold ball bump base Trained gold ball bump tip is of particular importance.
  • gold ball bumps that consist at least to a large extent of gold (in short: gold ball bumps)
  • palladium-doped gold wires are used, in particular bond wire with approximately 98 percent by weight gold and the rest palladium.
  • wires with approximately 99 percent by weight gold and approximately 1 percent by weight palladium are advantageous. Common wire diameters are between 18 ⁇ m to 33 ⁇ m.
  • Temperatures suitable for printed wiring boards are between 170 ° C and 230 ° C.
  • Standard metallization on printed wiring boards is a copper-nickel-gold layer system, with the top layer being deposited very thinly in an electroless process.
  • multi-stacked gold ball bumps are formed on the contact surfaces of the substrate, in particular double-stacked gold ball bumps. With them, the distance between the chip contacted on the substrate and the substrate can be increased.
  • the aluminum contact surfaces of the chip to be contacted are aligned with the gold ball bumps on the contact surfaces of the substrate.
  • the aluminum pads are exposed to the associated substrate-side gold ball under the exclusive effect of pressure and temperature (thermocompression bonding) - Contacted bumps.
  • the chip is heated for the application of temperature.
  • temperature-sensitive substrates which are very inexpensive can also be used.
  • Good welding of the gold ball bumps is carried out on these substrates the substrate contact surfaces achieved by ultrasound application and on the other hand the subsequent welding between the gold ball bumps and the aluminum connection surfaces of the chip can be carried out in the thermocompression process, preferably only the chip being heated.
  • a short bonding process eg less than 10 seconds with pulse heating is advantageous so that the heat from the chip does not flow to the colder substrate and damage it to a great extent.
  • the electronic component or the chip and the substrate are also connected by an electrically non-conductive adhesive layer which is located in the space between the chip and the substrate.
  • an electrically non-conductive adhesive layer which is located in the space between the chip and the substrate.
  • the adhesive is provided with suitable fillers or adhesives already containing suitable fillers are used. A sufficiently high temperature and / or electromagnetic waves, in particular UV light, are preferably applied to activate and harden the adhesive.
  • the adhesive layer is arranged on the surface of the electronic component or chip having the aluminum connection surfaces before the connection is established with the substrate, the aluminum connection surfaces preferably being at least partially covered by the adhesive layer be covered.
  • the adhesive layer is preferably applied as a liquid paste. It is also advantageous to apply the adhesive layer in the form of an adhesive film, for. B. a polymer film.
  • the aluminum pads of the chip are aligned with the substrate-side gold ball bumps. This Alignment is independent of whether the aluminum connection surfaces are not, partially or completely covered by the adhesive layer.
  • the geometric shape of the substrate-side contact bumps and / or the pressure-temperature-time profile acted upon causes puncturing and / or displacement the adhesive layer over the aluminum connection surfaces of the chip through the substrate-side contact bumps.
  • a defined deformation of the gold ball bumps occurs under the influence of pressure and temperature, which leads to the breaking up and removal of oxide layers present on the aluminum pads of the chip.
  • a temperature-hardening adhesive is used for the adhesive layer and the adhesive layer and its fillers are selected or matched to the bonding parameters so that the temperature applied to establish the connection by thermocompression is sufficient to activate the adhesive layer.
  • the curing process of the adhesive is also completed after the pressure and temperature exposure has ended.
  • the welded connections serve as electrical connections between the chip and the substrate and at the same time lead to a mechanical fixation between the chip and the substrate.
  • the embedded adhesive layer provides additional mechanical fixation between the chip and the substrate.
  • This adhesive layer has the further advantage that it at least partially reduces or compensates for existing and / or emerging mechanical and / or thermomechanical stresses and thus leads to a significant increase in the reliability of the flip-chip connections produced using the method according to the invention .
  • This advantage is particularly pronounced in the case of a flip-chip connection between a silicon chip and a circuit board substrate (for example: FR-4 circuit board), since, due to the different expansion coefficients between the circuit board and silicon in the welding process, mechanical stresses arising without the use of an adhesive layer would easily lead to contact failures.
  • Another exemplary embodiment of the invention comprises an electronic circuit consisting of an electronic component which has a plurality of aluminum connection surfaces on one surface and a substrate having a plurality of contact surfaces, a plurality of aluminum connection surfaces being connected to the contact surfaces of the substrate by contact metallizations are connected and these contact metallizations consist at least to a large extent of the connecting material gold, contact bumps, in particular ball bumps, applied to the contact metallizations of the substrate are used for the contact metallizations.
  • the electronic component and the substrate are also connected by an electrically nonconductive adhesive layer.
  • This adhesive layer is preferably designed as a film and advantageously fills the entire space remaining outside the welded connections between the chip and the substrate, which brings about very good compensation of thermo-mechanical stresses.
  • the method according to the invention permits the flip-chip assembly of silicon chips with aluminum pads which are not provided with bumps (ie not bumped) and which are not suitable for known bumping methods owing to their small dimensions (for example for high-frequency applications).
  • chips are so expensive and rare that they are not only available occasionally, but also only in small quantities.
  • the ball bumping of very small chips e.g. smaller than 1 mm
  • Other bumping processes such as B. galvanic processes, electroless deposition processes, vapor deposition are used on many chips that still in the silicon wafer or wafer composite. This is the only way to make these processes profitable.
  • Another advantage of the invention results from the fact that the otherwise customary bumping process for the chip is omitted due to the use of non-bumped silicon chips. As a result, the chip is less exposed to a thermal and mechanical loading step in the chip contacting method according to the invention, which greatly reduces the risk of chip damage, in particular in the subsequent thermocompression bonding. In addition, the saved bumping process for a chip also results in considerable cost savings.
  • the bump process is software controllable, which is why it can be quickly defined and modified. In particular, they can be adapted to subsequent changes to chips or substrates, for example.
  • This high flexibility and high development speed is of particular advantage in small series and prototype production, in which the electronic components are available in isolated form instead of in wafers and in small numbers due to their sometimes high price or their limited availability. In this case, galvanic processes and vapor deposition processes with their expensive mask processes and clean room conditions are unprofitable.
  • mask-oriented processes are inflexible, since the geometries can no longer be changed after the mask production.
  • the invention thus enables in particular a quick and inexpensive production of flip-chip-bonded prototypes and small series.
  • By generating gold ball bumps on the substrate side mask process steps are completely eliminated. This significantly reduces manufacturing time and costs.
  • the bonding equipment used for the mechanical bumping process namely a wire bonder
  • the wire bonder used is inexpensive compared to a clean room infrastructure and is already available in most of the larger development departments. With the wire bonder used, only a modification of the control software is necessary in order to generate gold ball bumps.
  • a great advantage of the method according to the invention is that even with chips with a large number of aluminum connection surfaces, the welded connections to the substrate-side gold ball bumps produced with the sole action of pressure and temperature (thermocompression bonding) have reproducibly good electrical and mechanical properties. Because each individual gold ball bump, owing to its conical, pointed geometry, together with the pressure and temperature, ensures that the oxide layer on the associated aluminum connection surface of the chip is reliably removed without it being removed . B. still needs a support by ultrasound impact.
  • Another advantage of the invention is that no flux and no toxic lead are required in the connection. The dangers and disadvantages of the sometimes very aggressive flux and their residues are thus avoided in the invention. In addition, due to the cleaning steps not required in this regard, fewer process steps and thus also cost savings are associated with the inventive method.
  • Fig. 1.3 Aligning and contacting the aluminum pads of the chip of Fig. 1.1 with the substrate-side gold ball bumps of Fig. 1.2 (cross-sectional view) when pressure and temperature are applied to produce welded connections between the aluminum pads and the associated gold ball bumps
  • Fig. 1.6 Infrared micrograph of a chip-side pad (in Fig. 1.4) through the back of the chip, the darker areas indicate intermetallic phases between gold and aluminum.
  • Fig. 1.7 Geometric dimensions of a gold ball bump
  • Fig. 2.0 Top view of a flip-chip connection of a silicon IC with aluminum pads on a ceramic substrate
  • Fig. 3.2 Cross-sectional representation of the silicon substrate according to Fig. 1.0 with double-stacked gold ball bumps applied to the contact surfaces
  • Fig.3.3 Aligning and contacting the aluminum pads of the chip of Fig.3.1 with the substrate-side double-stacked gold ball bumps of Fig.3.2 (cross-sectional view) when pressure and temperature are applied to produce welded connections between the aluminum pads and the associated stacked gold ball bumps
  • Fig. 4.3 Aligning and contacting the aluminum pads of the chip from Fig. 4.1 with the substrate-side gold ball bumps from Fig. 4.2 (cross-sectional view) when pressure and temperature are applied to produce welded connections between the aluminum pads and the associated gold ball bumps and to activate the adhesive layer for an additional connection of chip and substrate.
  • the contact areas (2) having a minimum width of approximately 100 ⁇ m and a minimum distance of approximately 130 ⁇ m, and of approximately 99 Ge ⁇ weight percent aluminum and the rest silicon.
  • the bonding wire used to produce the gold ball bumps (3) has a diameter of 25 ⁇ m and consists of about 98 percent by weight gold and the rest palladium.
  • the last-mentioned value results from the use of a bond capillary with a hole diameter of 33 ⁇ m.
  • a silicon chip (5) to be connected to the silicon substrate has a structure of aluminum pads (4) that matches the contact surface structure of the silicon substrate (1) (see FIG. 1.1).
  • the aluminum connection surfaces (4) of the chip (5) to be connected to contact surfaces (2) of the substrate (1) are aligned with the gold ball bumps (3) on the contact surfaces (2) of the substrate (1) and in contact brought (Fig. 1.3).
  • the connection is established by thermocompression bonding at a temperature rature of 320 ° C and a force of 100 cN per gold ball bump, the (bond) force being applied slowly at a rate of 10 cN per second up to the maximum value of 100 cN and at this value and the set temperature is maintained for about 10 seconds (in Fig. 1.3: F ... force, T ... temperature).
  • 1.6 shows an infrared microscopic image of the interface between an aluminum pad (4) of the chip and the associated gold contact metallization (7) through the back of the chip.
  • the recognizable darker areas indicate intermetallic phases (8) between gold and aluminum and are evidence of a good weld.
  • a silicon IC (11) with aluminum connection surfaces is attached to the contact surfaces of the conductor tracks (10), which consist of gold, of a ceramic substrate (9) using the method according to the invention.
  • the gold contact areas of the conductor tracks (10) of the ceramic substrate (9) are provided with gold ball bumps.
  • a wire bonder with bond wire with a diameter of 18 ⁇ m and a composition of 98 percent by weight gold and the rest palladium is used.
  • the initial diameter of the gold ball bumps on the gold contact areas is approximately 60 ⁇ m.
  • the silicon IC with its aluminum connection surface structure matching the contact surface structure of the ceramic substrate is bonded at a temperature of 320 ° C.
  • a further exemplary embodiment of the invention differs from the first exemplary embodiment listed above in that instead of simple gold ball bumps (FIG. 1.2), now twice stacked gold ball bumps (12) on the contact surfaces (2) of the silicon substrate (1 ) are applied (Fig.3.2).
  • Figures 3.0 and 3.1 correspond to Figures 1.0 and 1.1.
  • stacked GoJd ball bumps (12) With stacked GoJd ball bumps (12), a higher height of the later weld connections between the chip and the substrate can be set.
  • the remaining method steps of the method according to the invention take place analogously to FIGS. 1.3 and 1.4 and are shown in FIGS. 3.3 and 3.4.
  • the two-stacked gold ball bumps (13) deformed as a result of the connection process can be seen, according to which a greater distance between chip and substrate is realized.
  • an electrically non-conductive adhesive layer (17) in the form of an adhesive film is placed on the surface of a silicon chip (5) provided with aluminum connection surfaces (4) in such a way that all with gold ball bumps (3) on contact surfaces (2) of a silicon substrate (1), (Fig. 4.2, Fig. 4.0) aluminum contact surfaces (4) to be contacted are completely covered by the adhesive film (17) (Fig. 4.1).
  • the thickness of the film is matched to the height and the deformability of the gold ball bumps as well as the bonding parameters pressure and temperature so that the film after the contacting of the chip with the substrate both on the chip surface as well as on the substrate surface outside of the respective connection or contact surfaces completely and completely fills the space between the chip and the substrate except for the welded connections.
  • 4.3 shows the chip (5) provided with the adhesive film (17) with aluminum connection surfaces (4) aligned with the gold ball bumps (3) on the substrate side.
  • the gold ball bumps (3) first penetrate the adhesive layer (17) before they deform under the action of pressure and temperature and thereby an existing oxide layer on the aluminum connection surfaces (4) break up and remove.
  • 4.4 shows the finished connection between the chip (5) and the substrate (1), the welded connections mechanically fixing the chip and the substrate to one another and serving as electrically conductive connections between the chip and the substrate.
  • the embedded adhesive film (17) effects an additional mechanical fixation between the chip (5) and the substrate (1). Since it fills the entire space remaining outside of the welded connections between the chip and the substrate, it also provides very good compensation for thermo-mechanical stresses.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

L'invention concerne un procédé permettant de connecter un composant (5) électronique, dont une surface comporte plusieurs surfaces de raccordement en aluminium (4), à un substrat (1) pourvu de plusieurs surfaces de contact (2), par l'intermédiaire de métallisations de contact réalisées entre les surfaces de raccordement en aluminium et les surfaces de contact. Au moins la majeure partie des métallisations de contact sont en or. Les surfaces de contact situées sur le substrat sont munies de pics de contact (3) dont au moins la majeure partie sont en or (par ex. bosses en or). Plusieurs surfaces de raccordement en aluminium du composant électronique sont alignées avec les surfaces de contact du substrat munies de pics de contact. Une connexion est effectuée entre les surfaces de raccordement en aluminium et les pics de contact dont la majeure partie sont en or, situés sur les surfaces de contact du substrat, uniquement sous l'effet de la pression et de la température, c'est-à-dire notamment sans application d'ultrasons. L'invention convient tout particulièrement au montage par bosses soudées de puces de silicium individuelles avec des surfaces de raccordement en aluminium standard, sur des substrats inorganiques (par ex. céramique) et des substrats organiques (par ex. plaque de circuits FR-4).
PCT/DE1995/001322 1994-09-23 1995-09-22 Procede de mise en contact d'un composant electronique sur un substrat Ceased WO1996009647A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8510532A JPH10503059A (ja) 1994-09-23 1995-09-22 アルミニウム接続面を有する電子部品を基板に接続する方法およびこの方法によって製造された電子回路

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DE4434104 1994-09-23
DEP4434104.0 1994-09-23

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Cited By (1)

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US11016052B2 (en) 2007-08-30 2021-05-25 Pepex Biomedical Inc. Electrochemical sensor and method for manufacturing

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Publication number Priority date Publication date Assignee Title
KR100384314B1 (ko) 1996-12-27 2003-05-16 마츠시타 덴끼 산교 가부시키가이샤 회로기판에의 전자부품 실장방법 및 장치
DE102004055061A1 (de) * 2004-11-15 2006-05-18 Robert Bosch Gmbh Verfahren zur Anordnung eines Flip-Chips auf einem Substrat
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法
DE102006045836B4 (de) * 2006-09-22 2015-12-31 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen einer Durchkontaktierung zwischen zwei Oberflächen eines Halbleitersubstrats
DE102008060862B4 (de) 2008-12-09 2010-10-28 Werthschützky, Roland, Prof. Dr.-Ing.habil. Verfahren zur miniaturisierbaren Kontaktierung isolierter Drähte
WO2024187432A1 (fr) * 2023-03-15 2024-09-19 京东方科技集团股份有限公司 Substrat électroluminescent et procédé de préparation associé ainsi que dispositif électroluminescent

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EP0388011A2 (fr) * 1989-03-14 1990-09-19 Kabushiki Kaisha Toshiba Procédé de fabrication d'un dispositif semi-conducteur
EP0402756A2 (fr) * 1989-06-07 1990-12-19 Nec Corporation Procédé de formation d'une électrode à protubérance dans une électrode d'un dispositif semi-conducteur, et appareil pour utiliser ce procédé

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DE2348325A1 (de) * 1973-09-26 1975-04-03 Licentia Gmbh Halbleiteranordnung mit fuer die drahtlose kontaktierung geeigneten anschlusskontakten
EP0388011A2 (fr) * 1989-03-14 1990-09-19 Kabushiki Kaisha Toshiba Procédé de fabrication d'un dispositif semi-conducteur
EP0402756A2 (fr) * 1989-06-07 1990-12-19 Nec Corporation Procédé de formation d'une électrode à protubérance dans une électrode d'un dispositif semi-conducteur, et appareil pour utiliser ce procédé

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US11016052B2 (en) 2007-08-30 2021-05-25 Pepex Biomedical Inc. Electrochemical sensor and method for manufacturing

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DE19535282A1 (de) 1996-03-28

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