US20160128183A1 - Wiring board - Google Patents
Wiring board Download PDFInfo
- Publication number
- US20160128183A1 US20160128183A1 US14/918,618 US201514918618A US2016128183A1 US 20160128183 A1 US20160128183 A1 US 20160128183A1 US 201514918618 A US201514918618 A US 201514918618A US 2016128183 A1 US2016128183 A1 US 2016128183A1
- Authority
- US
- United States
- Prior art keywords
- conductor
- thickness
- insulating layer
- strip
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
Definitions
- the present invention relates to a wiring board for mounting a semiconductor element such as a semiconductor integrated circuit device.
- FIG. 3 shows a conventional wiring board B for mounting a semiconductor element such as a semiconductor integrated circuit device.
- the wiring board B includes an insulating layer 11 , a conductor layer 12 , and a solder resist layer 13 .
- this wiring board is described in Japanese Unexamined Patent Application Publication No. 2014-130974.
- a plurality of through-holes 14 are formed in the insulating layer 11 .
- a part of the conductor layer 12 is deposited on the upper and lower surfaces of the insulating layer 11 and in the through-holes 14 .
- the conductor layer 12 includes a plurality of strip-shaped wiring conductors 12 a for signals where electrical signals are transmitted, and a plurality of plane conductors 12 b for grounding or power for the potential supply or the power supply.
- the solder resist layer 13 is deposited on the upper and lower surfaces of the insulating layer 11 .
- An opening portion 13 a exposing a part of the conductor layer 12 as a semiconductor element connection pad 15 is formed in the solder resist layer 13 deposited on the upper surface of the insulating layer 11 .
- An electrode terminal of the semiconductor element is connected to the semiconductor element connection pad 15 via the solder.
- An opening portion 13 b exposing a part of the conductor layer 12 as an external connection pad 16 is formed in the solder resist layer 13 deposited on the lower surface of the insulating layer 11 .
- a wiring conductor of an external electric circuit board is connected to the external connection pad 16 via the solder.
- the plane conductor 12 b and the strip-shaped wiring conductor 12 a are formed by the electroplating being simultaneously precipitated on the insulating layer 11 , and therefore the strip-shaped wiring conductor 12 a also becomes thicker.
- the strip-shaped wiring conductor 12 a becomes thicker, there is a problem that the wiring of the fine line-and-space cannot be formed, and the board cannot be miniaturized.
- the present invention provides a small high-density wiring board capable of adequate power supply to a semiconductor element to be mounted, capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space.
- the wiring board according to an embodiment of the present invention includes an insulating layer, a strip-shaped wiring conductor for signals disposed on a main surface of the insulating layer, and a plain conductor for grounding or power disposed on the main surface of the insulating layer; and the thickness of the plane conductor is larger than the thickness of the strip-shaped wiring conductor.
- the thickness of the plane conductor for grounding or power is larger than the thickness of the strip-shaped wiring conductor for signals. Therefore, adequate power supply to the semiconductor element to be mounted is made possible. Therefore, the embodiment of the present invention can provide a small high-density wiring board capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space.
- FIG. 1 is a schematic cross-sectional view showing a wiring board according to one embodiment of the present invention
- FIG. 2 is a main part enlarged cross-sectional view showing the wiring board according to the one embodiment of the present invention.
- FIG. 3 is a schematic cross-sectional view showing a conventional wiring board.
- FIG. 1 A schematic cross-sectional view of a wiring board A according to the one embodiment is shown in FIG. 1 .
- the wiring board A includes an insulating layer 1 , a conductor layer 2 , and a solder resist layer 3 .
- the insulating layer 1 is, for example, formed of electrically insulating material where the glass cloth in which a glass fiber bundle is woven in the vertical and horizontal directions is impregnated with a thermosetting resin such as an epoxy resin and a bismaleimide triazine resin.
- the thickness of the insulating layer 1 is preferably about 50 to 800 ⁇ m.
- a plurality of through-holes 4 penetrating from the upper surface to the lower surface and having a diameter of about 100 to 300 ⁇ m are formed.
- the through-hole 4 is formed by, for example, drilling and laser processing, blast processing, and the like.
- the conductor layer 2 is deposited on the upper and lower surfaces of the insulating layer 1 and in the through-holes 4 .
- the conductor layer 2 includes a plurality of strip-shaped wiring conductors 2 a for signals where electrical signals are transmitted, and a plurality of plane conductors 2 b for grounding or power for the potential supply or the power supply.
- the thickness of the plane conductor 2 b is formed larger than the thickness of the strip-shaped wiring conductor 2 a.
- the thickness of the plane conductor 2 b is about 1 to 15 ⁇ m larger than the thickness of strip-shaped wiring conductor 2 a.
- the thickness of the strip-shaped wiring conductor 2 a is, for example, about 3 to 10 ⁇ m, preferably about 6 ⁇ m, and the width of each wiring is about 2 ⁇ m to 10 ⁇ m.
- the thickness of the plane conductor 2 b is, for example, about 5 to 15 ⁇ m, preferably about 7 ⁇ m to 8 ⁇ m.
- the electroless copper plating layer and the electrolytic copper plating layer are precipitated on the surface of the insulating layer 1 by, for example, a well-known semi-additive method, whereby the conductor layer 2 is formed.
- the method is as follows. First, the electroless copper plating processing is performed on the surface of the insulating layer 1 . After the processing, the surface of the insulating layer 1 is dried, and a pattern is formed by the plating resist. The part not forming a pattern is masked by the plating resist. Then, the electrolytic copper plating processing is performed, whereby a pattern is grown only in a part where the electroless copper plating is exposed. After the electrolytic copper plating processing, the plating resist is peeled off, and the electroless copper plating exposing from the electrolytic copper plating is removed by etching.
- the electrolytic copper plating in the semi-additive method it is sufficient to perform the electrolytic copper plating in a relatively large current density by using a DC power supply.
- the current density is preferably 3 A/dm 2 or more.
- the thickness of the plane conductor 2 b can be increased more than the thickness of the strip-shaped wiring conductor 2 a.
- the wiring width of the strip-shaped wiring conductor 2 a has a limit in the processing by the semi-additive method, and is at least about 2 ⁇ m.
- the solder resist layer 3 is formed of an electrically insulating material containing a thermosetting resin such as an epoxy resin and a polyimide resin.
- the solder resist layer 3 is deposited on the upper and lower surfaces of the insulating layer 1 .
- An opening portion 3 a exposing a part of the conductor layer 2 as a semiconductor element connection pad 5 is formed in the solder resist layer 3 deposited on the upper surface of the insulating layer 1 .
- the opening portion 3 a has a circular shape usually.
- the semiconductor element connection pad 5 also has a circular shape depending on the shape of the opening portion 3 a.
- An electrode terminal of the semiconductor element is connected to the semiconductor element connection pad 5 via the solder.
- An opening portion 3 b exposing a part of the conductor layer 2 as an external connection pad 6 is formed in the solder resist layer 3 deposited on the lower surface of the insulating layer 1 .
- the opening portion 3 b has a circular shape usually.
- the external connection pad 6 also has a circular shape depending on the shape of the opening portion 3 b.
- a wiring conductor of an external electric circuit board is connected to the external connection pad 6 via the solder.
- the thickness of the plane conductor 2 b is formed larger than the thickness of the strip-shaped wiring conductor 2 a. Therefore, adequate power supply to the semiconductor element to be mounted is made possible. Therefore, the one embodiment of the present invention can provide a small high-density wiring board capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space.
- the present invention is not intended to be limited to the one embodiment described above, and various modifications are possible as long as they are within the scope of the claims.
- the insulating layer 1 has a single layer structure.
- the insulating layer may have a structure where a plurality of insulating layers formed of the same or different insulating materials are laminated.
- the opening portion 3 a has a circular shape usually.
- the shape of the opening portion 3 a is not limited to a circular shape.
- the opening portion 3 a may have a shape such as an elliptical shape and a polygonal shape (a triangular shape, a quadrangular shape, a pentagonal shape, a hexagonal shape, and the like).
- the semiconductor element connection pad 5 may also have a shape such as an elliptical shape and a polygonal shape depending on the shape of the opening portion 3 a.
- the opening 3 b has a circular shape usually.
- the shape of the opening portion 3 b is not limited to a circular shape.
- the opening portion 3 b may have a shape such as an elliptical shape and a polygonal shape (a triangular shape, a quadrangular shape, a pentagonal shape, a hexagonal shape, and the like).
- the external connection pad 6 may also have a shape such as an elliptical shape and a polygonal shape depending on the shape of the opening portion 3 b.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing & Machinery (AREA)
Abstract
The wiring board of the present invention includes an insulating layer, a strip-shaped wiring conductor for signals disposed on a main surface of the insulating layer, and a plain conductor for grounding or power disposed on the main surface of the insulating layer; and the thickness of the plane conductor is larger than the thickness of the strip-shaped wiring conductor. In the wiring board of the present invention, the thickness of the plane conductor is preferably 1 to 15 μm larger than the thickness of the strip-shaped wiring conductor. The strip-shaped wiring conductor has a thickness of preferably 3 to 10 μm, and the plane conductor has a thickness of preferably 5 to 15 μm.
Description
- 1. TECHNICAL FIELD
- The present invention relates to a wiring board for mounting a semiconductor element such as a semiconductor integrated circuit device.
- 2. BACKGROUND
-
FIG. 3 shows a conventional wiring board B for mounting a semiconductor element such as a semiconductor integrated circuit device. The wiring board B includes aninsulating layer 11, aconductor layer 12, and asolder resist layer 13. For example, this wiring board is described in Japanese Unexamined Patent Application Publication No. 2014-130974. - A plurality of through-
holes 14 are formed in theinsulating layer 11. A part of theconductor layer 12 is deposited on the upper and lower surfaces of theinsulating layer 11 and in the through-holes 14. Theconductor layer 12 includes a plurality of strip-shaped wiring conductors 12 a for signals where electrical signals are transmitted, and a plurality ofplane conductors 12 b for grounding or power for the potential supply or the power supply. Thesolder resist layer 13 is deposited on the upper and lower surfaces of theinsulating layer 11. Anopening portion 13 a exposing a part of theconductor layer 12 as a semiconductorelement connection pad 15 is formed in thesolder resist layer 13 deposited on the upper surface of theinsulating layer 11. An electrode terminal of the semiconductor element is connected to the semiconductorelement connection pad 15 via the solder. - An
opening portion 13 b exposing a part of theconductor layer 12 as anexternal connection pad 16 is formed in thesolder resist layer 13 deposited on the lower surface of theinsulating layer 11. A wiring conductor of an external electric circuit board is connected to theexternal connection pad 16 via the solder. - In recent years, power consumption of the electronic devices represented by portable music players and communications devices is increased due to the higher functionality thereof. Therefore, a power-saving type wiring board is required for the wiring board B to be used for these electronic devices. Thus, it is considered to lower the operating voltage of the semiconductor element for power saving.
- However, when the operating voltage is lowered, a malfunction is likely to occur because of the less margin against noise. Adequate power supply is desired to reduce such noise. For this purpose, it is necessary to increase the thickness of the
plane conductor 12 b. However, theplane conductor 12 b and the strip-shaped wiring conductor 12 a are formed by the electroplating being simultaneously precipitated on theinsulating layer 11, and therefore the strip-shaped wiring conductor 12 a also becomes thicker. When the strip-shaped wiring conductor 12 a becomes thicker, there is a problem that the wiring of the fine line-and-space cannot be formed, and the board cannot be miniaturized. - The present invention provides a small high-density wiring board capable of adequate power supply to a semiconductor element to be mounted, capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space.
- The wiring board according to an embodiment of the present invention includes an insulating layer, a strip-shaped wiring conductor for signals disposed on a main surface of the insulating layer, and a plain conductor for grounding or power disposed on the main surface of the insulating layer; and the thickness of the plane conductor is larger than the thickness of the strip-shaped wiring conductor.
- According to the wiring board according to the embodiment of the present invention, the thickness of the plane conductor for grounding or power is larger than the thickness of the strip-shaped wiring conductor for signals. Thereby, adequate power supply to the semiconductor element to be mounted is made possible. Therefore, the embodiment of the present invention can provide a small high-density wiring board capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space.
-
FIG. 1 is a schematic cross-sectional view showing a wiring board according to one embodiment of the present invention; -
FIG. 2 is a main part enlarged cross-sectional view showing the wiring board according to the one embodiment of the present invention; and -
FIG. 3 is a schematic cross-sectional view showing a conventional wiring board. - Next, the wiring board according to one embodiment will be described in detail with reference to
FIGS. 1 and 2 . A schematic cross-sectional view of a wiring board A according to the one embodiment is shown inFIG. 1 . The wiring board A includes aninsulating layer 1, a conductor layer 2, and asolder resist layer 3. - The
insulating layer 1 is, for example, formed of electrically insulating material where the glass cloth in which a glass fiber bundle is woven in the vertical and horizontal directions is impregnated with a thermosetting resin such as an epoxy resin and a bismaleimide triazine resin. The thickness of theinsulating layer 1 is preferably about 50 to 800 μm. In theinsulating layer 1, a plurality of through-holes 4 penetrating from the upper surface to the lower surface and having a diameter of about 100 to 300 μm are formed. The through-hole 4 is formed by, for example, drilling and laser processing, blast processing, and the like. - The conductor layer 2 is deposited on the upper and lower surfaces of the
insulating layer 1 and in the through-holes 4. The conductor layer 2 includes a plurality of strip-shaped wiring conductors 2 a for signals where electrical signals are transmitted, and a plurality ofplane conductors 2 b for grounding or power for the potential supply or the power supply. - As shown in
FIG. 2 , the thickness of theplane conductor 2 b is formed larger than the thickness of the strip-shaped wiring conductor 2 a. Preferably, the thickness of theplane conductor 2 b is about 1 to 15 μm larger than the thickness of strip-shaped wiring conductor 2 a. The thickness of the strip-shaped wiring conductor 2 a is, for example, about 3 to 10 μm, preferably about 6 μm, and the width of each wiring is about 2 μm to 10 μm. In addition, the thickness of theplane conductor 2 b is, for example, about 5 to 15 μm, preferably about 7 μm to 8 μm. - The electroless copper plating layer and the electrolytic copper plating layer are precipitated on the surface of the
insulating layer 1 by, for example, a well-known semi-additive method, whereby the conductor layer 2 is formed. Specifically, the method is as follows. First, the electroless copper plating processing is performed on the surface of theinsulating layer 1. After the processing, the surface of theinsulating layer 1 is dried, and a pattern is formed by the plating resist. The part not forming a pattern is masked by the plating resist. Then, the electrolytic copper plating processing is performed, whereby a pattern is grown only in a part where the electroless copper plating is exposed. After the electrolytic copper plating processing, the plating resist is peeled off, and the electroless copper plating exposing from the electrolytic copper plating is removed by etching. - So as to precipitate a
plane conductor 2 b thicker than the thickness of the strip-shaped wiring conductor 2 a, for example, when the electrolytic copper plating in the semi-additive method is precipitated, it is sufficient to perform the electrolytic copper plating in a relatively large current density by using a DC power supply. The current density is preferably 3 A/dm2 or more. When the electrolytic copper plating is precipitated in a large current density, there is a tendency that the precipitation rate of the part with a large precipitation area is faster than that of the part with a small precipitation area. Therefore, the thickness of theplane conductor 2 b can be increased more than the thickness of the strip-shaped wiring conductor 2 a. The wiring width of the strip-shaped wiring conductor 2 a has a limit in the processing by the semi-additive method, and is at least about 2 μm. - The
solder resist layer 3 is formed of an electrically insulating material containing a thermosetting resin such as an epoxy resin and a polyimide resin. Thesolder resist layer 3 is deposited on the upper and lower surfaces of theinsulating layer 1. Anopening portion 3 a exposing a part of the conductor layer 2 as a semiconductorelement connection pad 5 is formed in thesolder resist layer 3 deposited on the upper surface of theinsulating layer 1. Theopening portion 3 a has a circular shape usually. The semiconductorelement connection pad 5 also has a circular shape depending on the shape of theopening portion 3 a. An electrode terminal of the semiconductor element is connected to the semiconductorelement connection pad 5 via the solder. - An
opening portion 3 b exposing a part of the conductor layer 2 as anexternal connection pad 6 is formed in the solder resistlayer 3 deposited on the lower surface of the insulatinglayer 1. Theopening portion 3 b has a circular shape usually. Theexternal connection pad 6 also has a circular shape depending on the shape of theopening portion 3 b. A wiring conductor of an external electric circuit board is connected to theexternal connection pad 6 via the solder. - Thus, according to the wiring board according to the one embodiment, the thickness of the
plane conductor 2 b is formed larger than the thickness of the strip-shapedwiring conductor 2 a. Thereby, adequate power supply to the semiconductor element to be mounted is made possible. Therefore, the one embodiment of the present invention can provide a small high-density wiring board capable of operating a semiconductor element with a low operating voltage stably, and including a fine line-and-space. - The present invention is not intended to be limited to the one embodiment described above, and various modifications are possible as long as they are within the scope of the claims. For example, in the wiring board A described above, the insulating
layer 1 has a single layer structure. However, the insulating layer may have a structure where a plurality of insulating layers formed of the same or different insulating materials are laminated. - As described above, the
opening portion 3 a has a circular shape usually. However, the shape of theopening portion 3 a is not limited to a circular shape. Theopening portion 3 a may have a shape such as an elliptical shape and a polygonal shape (a triangular shape, a quadrangular shape, a pentagonal shape, a hexagonal shape, and the like). The semiconductorelement connection pad 5 may also have a shape such as an elliptical shape and a polygonal shape depending on the shape of theopening portion 3 a. - As described above, the
opening 3 b has a circular shape usually. However, the shape of theopening portion 3 b is not limited to a circular shape. Theopening portion 3 b may have a shape such as an elliptical shape and a polygonal shape (a triangular shape, a quadrangular shape, a pentagonal shape, a hexagonal shape, and the like). Theexternal connection pad 6 may also have a shape such as an elliptical shape and a polygonal shape depending on the shape of theopening portion 3 b.
Claims (4)
1. A wiring board comprising:
an insulating layer;
a strip-shaped wiring conductor for a signal disposed on a main surface of the insulating layer; and
a plane conductor for grounding or power disposed on the main surface of the insulating layer, wherein the thickness of the plane conductor is larger than the thickness of the strip-shaped wiring conductor.
2. The wiring board according to claim 1 , wherein the thickness of the plane conductor is 1 to 15 μm larger than the thickness of the strip-shaped wiring conductor.
3. The wiring board according to claim 1 , wherein the strip-shaped wiring conductor has a thickness of 3 to 10 μm.
4. The wiring board according to claim 1 , wherein the plane conductor has a thickness of 5 to 15 μm.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014-221171 | 2014-10-30 | ||
| JP2014221171A JP2016092053A (en) | 2014-10-30 | 2014-10-30 | Wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US20160128183A1 true US20160128183A1 (en) | 2016-05-05 |
Family
ID=55854370
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US14/918,618 Abandoned US20160128183A1 (en) | 2014-10-30 | 2015-10-21 | Wiring board |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20160128183A1 (en) |
| JP (1) | JP2016092053A (en) |
| KR (1) | KR20160051614A (en) |
| CN (1) | CN105578711A (en) |
| TW (1) | TW201624635A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160216827A1 (en) * | 2015-01-28 | 2016-07-28 | Samsung Display Co., Ltd. | Touch sensor device and manufacturing method thereof |
| US20160224170A1 (en) * | 2015-02-04 | 2016-08-04 | Samsung Display Co., Ltd. | Touch screen panel and manufacturing method thereof |
| US20200100354A1 (en) * | 2018-09-25 | 2020-03-26 | International Business Machines Corporation | Automatic determination of power plane shape in printed circuit board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7145411B1 (en) * | 2002-03-18 | 2006-12-05 | Applied Micro Circuits Corporation | Flexible differential interconnect cable with isolated high frequency electrical transmission line |
| US20140326484A1 (en) * | 2011-11-24 | 2014-11-06 | Tatsuta Electric Wire & Cable Co., Ltd. | Shield Film, Shielded Printed Wiring Board, And Method for Manufacturing Shield Film |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63250191A (en) * | 1987-04-07 | 1988-10-18 | 古河電気工業株式会社 | Manufacture of hybrid ic circuit substrate |
| JPH02109390A (en) * | 1988-10-18 | 1990-04-23 | Furukawa Electric Co Ltd:The | High-density flexible printed circuit board |
| JPH04268783A (en) * | 1991-02-25 | 1992-09-24 | Furukawa Electric Co Ltd:The | Composite circuit board |
| JPH09199816A (en) * | 1996-01-16 | 1997-07-31 | Sumitomo Wiring Syst Ltd | Flexible printed circuit board and manufacture thereof |
| JP2001007456A (en) * | 1999-06-17 | 2001-01-12 | Toshiba Corp | Printed circuit board |
-
2014
- 2014-10-30 JP JP2014221171A patent/JP2016092053A/en active Pending
-
2015
- 2015-10-21 KR KR1020150146798A patent/KR20160051614A/en not_active Withdrawn
- 2015-10-21 US US14/918,618 patent/US20160128183A1/en not_active Abandoned
- 2015-10-22 TW TW104134660A patent/TW201624635A/en unknown
- 2015-10-28 CN CN201510711701.0A patent/CN105578711A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7145411B1 (en) * | 2002-03-18 | 2006-12-05 | Applied Micro Circuits Corporation | Flexible differential interconnect cable with isolated high frequency electrical transmission line |
| US20140326484A1 (en) * | 2011-11-24 | 2014-11-06 | Tatsuta Electric Wire & Cable Co., Ltd. | Shield Film, Shielded Printed Wiring Board, And Method for Manufacturing Shield Film |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160216827A1 (en) * | 2015-01-28 | 2016-07-28 | Samsung Display Co., Ltd. | Touch sensor device and manufacturing method thereof |
| US10254902B2 (en) * | 2015-01-28 | 2019-04-09 | Samsung Display Co., Ltd. | Touch sensor device including a polymer layer having conductive and non-conductive regions |
| US20160224170A1 (en) * | 2015-02-04 | 2016-08-04 | Samsung Display Co., Ltd. | Touch screen panel and manufacturing method thereof |
| US9830031B2 (en) * | 2015-02-04 | 2017-11-28 | Samsung Display Co., Ltd. | Touch screen panel and manufacturing method thereof |
| US20200100354A1 (en) * | 2018-09-25 | 2020-03-26 | International Business Machines Corporation | Automatic determination of power plane shape in printed circuit board |
| US10785867B2 (en) * | 2018-09-25 | 2020-09-22 | International Business Machines Corporation | Automatic determination of power plane shape in printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105578711A (en) | 2016-05-11 |
| TW201624635A (en) | 2016-07-01 |
| KR20160051614A (en) | 2016-05-11 |
| JP2016092053A (en) | 2016-05-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: KYOCERA CIRCUIT SOLUTIONS, INC., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MATSUMOTO, KEISAKU;REEL/FRAME:036853/0547 Effective date: 20151016 |
|
| AS | Assignment |
Owner name: KYOCERA CORPORATION, JAPAN Free format text: CHANGE OF NAME;ASSIGNOR:KYOCERA CIRCUIT SOLUTIONS, INC.;REEL/FRAME:038806/0631 Effective date: 20160401 |
|
| STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |