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US20090289276A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
US20090289276A1
US20090289276A1 US12/188,497 US18849708A US2009289276A1 US 20090289276 A1 US20090289276 A1 US 20090289276A1 US 18849708 A US18849708 A US 18849708A US 2009289276 A1 US2009289276 A1 US 2009289276A1
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cathode
region
semiconductor device
type
state
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US12/188,497
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English (en)
Inventor
Yasuhiro Yoshiura
Masanori Inoue
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Assigned to MITSUBISHI ELECTRIC CORPORATION reassignment MITSUBISHI ELECTRIC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: INOUE, MASANORI, YOSHIURA, YASUHIRO
Publication of US20090289276A1 publication Critical patent/US20090289276A1/en
Priority to US14/705,647 priority Critical patent/US9704946B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/141—Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs
    • H10D62/142—Anode regions of thyristors or collector regions of gated bipolar-mode devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/192—Base regions of thyristors
    • H10D62/199—Anode base regions of thyristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/411—PN diodes having planar bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/141—VDMOS having built-in components
    • H10D84/143—VDMOS having built-in components the built-in components being PN junction diodes
    • H10D84/144—VDMOS having built-in components the built-in components being PN junction diodes in antiparallel diode configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions

Definitions

  • the present invention relates to a semiconductor device, and particularly to a high-withstand-voltage semiconductor device including a diode and for use in electric-power applications.
  • inverters are used in those fields such as the field of industrial power units.
  • a commercial power source AC power source
  • the inverter includes a converter unit first converting an AC voltage into a DC voltage (forward conversion), a smoothing circuit unit and an inverter unit converting the DC voltage into an AC voltage (inverse conversion).
  • an insulated gate bipolar transistor hereinafter referred to as “IGBT”) capable of performing switching operation at a relatively high speed is chiefly employed.
  • the load of the inverter is an electric induction machine (motor which is an inductive load).
  • the inductive load is connected to a point of an intermediate potential between an upper arm element and a lower arm element, and electric current flows to the inductive load in both of the positive and negative directions. Therefore, in order to direct the current flowing in the inductive load from the end where the load is connected back to the power supply of a high potential and to direct the current from the end where the load is connected to the ground, a freewheel diode for circulating the current between the inductive load and the closed circuit of the arm elements is necessary.
  • the IGBT In the inverter, usually the IGBT is operated as a switch to repeat the OFF state and the ON state so as to control the power energy.
  • the ON state is reached through a turn-on process while the OFF state is reached through a turn-off process.
  • the turn-on process refers to a change of the IGBT from the OFF state to the ON state
  • the turn-off process refers to a change of the IGBT from the ON state to the OFF state.
  • the IGBT While the IGBT is in the ON state, current does not flow through the diode and the diode is in the OFF state. In contrast, while the IGBT is in the OFF state, current flows through the diode and the diode is in the ON state.
  • a p-type diffusion region to serve as an anode is formed on one main surface side of an n-type low-concentration semiconductor substrate.
  • an anode electrode is formed such that the anode electrode contacts the p-type diffusion region.
  • an n-type ultrahigh-concentration impurity layer is formed as the topmost surface.
  • an n-type high-concentration impurity layer is formed.
  • a cathode electrode is formed such that the cathode electrode contacts the n-type ultrahigh-concentration impurity layer.
  • the diode including a guard ring is commonly and widely used.
  • the guard ring is formed to surround the anode at a distance from an end of the anode (p-type diffusion region), so that the electric field on an outer peripheral end portion of the p-type diffusion region is alleviated.
  • Japanese Patent Laying-Open Nos. 2003-152197 and 09-246570 for example disclose a diode including a guard ring.
  • the conventional semiconductor device has the following problem. In the ON state of the diode, carriers are diffused and accumulated not only in a region of the drift layer that is located immediately under the anode but also a region of the drift layer that is located immediately under the guard ring.
  • the present invention has been made for solving the above-described problem, and an object of the invention is to provide a semiconductor device in which current concentration on an outer peripheral end portion of the anode is suppressed.
  • a semiconductor device has a diode, and includes a semiconductor substrate of a first conductivity type, an anode of a second conductivity type, a guard ring, a cathode of the first conductivity type, and a cathode-side impurity region of the second conductivity type.
  • the semiconductor substrate of the first conductivity type has a first main surface and a second main surface opposite to each other.
  • the anode of the second conductivity type is formed on a first main surface side of the semiconductor substrate.
  • the guard ring is formed at a distance from the anode and surrounds the anode.
  • the cathode of the first conductivity type is formed on a second main surface side of the semiconductor substrate.
  • the cathode-side impurity region of the second conductivity type is formed in a region located in the cathode and opposite to the guard ring.
  • the cathode-side impurity region of the second conductivity type is formed in the region in the cathode that is opposite to the guard ring, so that the volume of the n-type region of the cathode is decreased and accordingly the carriers accumulated in the region of the first conductivity type of the semiconductor substrate that is located immediately under the guard ring can be reduced in the ON state.
  • carriers flowing from the region of the first conductivity type immediately under the guard ring into an outer peripheral end portion of the anode in close proximity to the guard ring decrease at the time when a change from the ON state to the OFF state occurs.
  • concentration of the current on the outer peripheral end portion of the anode is suppressed and thus the breakdown tolerance can be improved.
  • FIG. 1 is a cross section of a semiconductor device according to a first embodiment of the present invention.
  • FIGS. 2 and 3 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIGS. 4 and 5 are cross sections of a semiconductor device according to a comparative example, showing a first state and a second state respectively for illustrating an operation of the semiconductor device.
  • FIG. 6 is a cross section of a semiconductor device according to a second embodiment of the present invention.
  • FIGS. 7 and 8 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIGS. 9 and 10 are respectively a first graph and a second graph showing a relation between a recovery loss and a forward voltage drop for illustrating an effect of the semiconductor device in the embodiment.
  • FIG. 11 is a graph showing a reverse recovery current for illustrating a recovery loss in the embodiment.
  • FIG. 12 is a cross section of a semiconductor device according to a third embodiment of the present invention.
  • FIGS. 13 and 14 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIG. 15 is a graph showing a relation between a recovery loss and a forward voltage drop for illustrating an effect of the semiconductor device in the embodiment.
  • FIG. 16 is a cross section of a semiconductor device according to a fourth embodiment of the present invention.
  • FIGS. 17 and 18 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIG. 19 is a cross section of a semiconductor device according to a fifth embodiment of the present invention.
  • FIGS. 20 and 21 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIG. 22 is a cross section of a semiconductor device according to a sixth embodiment of the present invention.
  • FIGS. 23 and 24 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • FIG. 25 is a cross section of a semiconductor device according to a seventh embodiment of the present invention.
  • FIGS. 26 and 27 are cross sections respectively showing a first state and a second state for illustrating an operation of the semiconductor device in the embodiment.
  • an anode 2 of the diode is formed on one main surface side of an n-type semiconductor substrate 1 , and a cathode is formed on the other main surface side.
  • a p-type diffusion region 3 is formed to serve as anode 2 .
  • P-type diffusion region 3 is formed to a predetermined depth from the main surface of semiconductor substrate 1 .
  • the impurity concentration of p-type diffusion region 3 is approximately 1 ⁇ 10 16-18 ions/cm 3 .
  • an anode electrode 4 is formed on p-type diffusion region 3 .
  • a guard ring 6 formed of a p-type diffusion region 5 is formed at a distance from anode 2 to surround anode 2 .
  • P-type diffusion region 5 is formed to a predetermined depth from the main surface of semiconductor substrate 1 .
  • an insulating film 7 is formed to cover guard ring 6 .
  • n-type ultrahigh-concentration impurity layer 12 and an n-type high-concentration impurity layer 11 are formed to serve as the cathode.
  • the impurity concentration of n-type ultrahigh-concentration impurity layer 12 is approximately 1 ⁇ 10 19-21 ions/cm 3
  • the impurity concentration of n-type high-concentration impurity layer 11 is approximately 1 ⁇ 10 14-19 ions/cm 3 .
  • N-type ultrahigh-concentration impurity layer 12 is formed to a predetermined depth from the other main surface of semiconductor substrate 1 , and n-type high-concentration impurity layer 11 is formed subsequently to n-type ultrahigh-concentration impurity layer 12 to a greater depth.
  • a cathode-side p-type diffusion region 14 is formed in a guard-ring opposed region 15 which is located opposite to guard ring 6 .
  • a cathode electrode 13 is formed to contact cathode-side p-type diffusion region 14 and n-type ultrahigh-concentration impurity layer 12 .
  • a diode in an inverter circuit alternates between an ON state and an OFF state according to a switching operation of an IGBT.
  • the IGBT When the IGBT is in the ON state, the diode is in the OFF state.
  • the IGBT is in the OFF state, the diode is in the ON state.
  • drift layer 10 In the ON state of the diode where a high voltage is applied in the forward direction between anode electrode 4 and cathode electrode 13 , a large number of carriers are accumulated in a first-conductivity-type region (hereinafter referred to as “drift layer 10 ”) of semiconductor substrate 1 as shown in FIG. 2 . Specifically, holes are injected from p-type diffusion region 3 toward drift layer 10 of semiconductor substrate 1 , while electrons are injected from n-type ultrahigh-concentration impurity layer 12 and n-type high-concentration impurity layer 11 toward drift layer 10 of semiconductor substrate 1 .
  • a high voltage is applied in the reverse direction between anode electrode 4 and cathode electrode 13 of the diode, so that the diode changes to the OFF state.
  • FIG. 3 at the OFF time when the diode changes from the ON state to the OFF state, from the carriers accumulated in drift layer 10 in the ON state, electrons are discharged from cathode electrode 13 and holes are discharged from anode electrode 4 . A part of the electrons and holes are recombined to disappear, and the injected carriers disappear in the end.
  • cathode-side p-type diffusion region 14 is formed in guard-ring opposed region 15 located in the cathode (n-type ultrahigh-concentration impurity layer 12 and n-type high-concentration impurity layer 11 ) and located opposite to the guard ring.
  • the volume (electron concentration) of the n-type region is decreased and consequently an electric field concentration on an outer peripheral end portion of the anode at the OFF time can be alleviated. This will be described in connection with a semiconductor device of a comparative example without the p-type diffusion region on the cathode side.
  • the semiconductor device of the comparative example has the same structure as that of the above-described semiconductor device except that the former semiconductor device does not have the p-type diffusion region formed on the cathode side.
  • a p-type diffusion region 103 to server as an anode 102 , an anode electrode 104 and a p-type diffusion region 105 to serve as a guard ring 106 are formed on one main surface side of a semiconductor substrate 101 , and an n-type ultrahigh-concentration impurity layer 112 and an n-type high-concentration impurity layer 111 to serve as a cathode and a cathode electrode 113 are formed on the other main surface side.
  • the cathode side is occupied by only the n-type region that is n-type ultrahigh-concentration impurity layer 112 and n-type high-concentration impurity layer 111 . Therefore, as compared with the case where the p-type region is formed in this n-type region, the n-type region of the comparative example has a larger volume. Particularly in a region 110 a of the drift layer that is located immediately under guard ring 106 , more carriers (electrons) are injected and accumulated.
  • both of the carriers (holes) accumulated in the region of drift layer 110 immediately under anode 102 and the carriers (holes) accumulated in region 110 a of drift layer 110 immediately under guard ring 106 flow into p-type diffusion region 103 of anode 102 . Therefore, the electric current concentrates particularly on an outer peripheral end portion (the portion encircled by a dotted line E) of p-type diffusion region 103 that is located in close proximity to guard ring 106 .
  • cathode-side p-type diffusion region 14 is formed in guard-ring opposed region 15 opposite to guard ring 6 . Therefore, the volume (electron concentration) of the n-type region in guard-ring opposed region 15 is decreased. Accordingly, the concentration of carriers (electrons) injected from the cathode into region 10 a of the drift layer immediately under guard ring 6 in the ON state decreases, so that the carriers accumulated in region 10 a decreases.
  • a semiconductor device in which the volume of the cathode-side p-type diffusion region can be adjusted.
  • FIG. 6 in guard-ring opposed region 15 in the cathode, a plurality of cathode-side p-type diffusion regions 14 each having a width Sp and a depth Xj are formed.
  • This semiconductor device is similar to the semiconductor device shown in FIG. 1 except for this feature. Therefore, like components are denoted by like reference characters and the description thereof will not be repeated.
  • a desired depth Xj and a desired width Sp of cathode-side p-type diffusion region 14 formed in guard-ring opposed region 15 can be set based on the tradeoff between a recovery tolerance and a forward voltage drop.
  • FIGS. 9 and 10 are each a graph showing this relation.
  • FIG. 9 shows graphs A, B and C where respective depths of the cathode-side p-type diffusion regions are identical while three different widths Sp are provided (Spa>Spb>Spc).
  • FIG. 10 shows graphs D, E and F where respective widths of the cathode-side p-type diffusion regions are identical while three different depths are provided (Xjd>Xje>Xjf).
  • FIG. 9 shows this by the tendency of the graphs that the right side rises and the left side falls as width Sp is larger.
  • the recovery loss refers to a loss generated by the flow of a reverse recovery current when a reverse bias voltage is applied to the diode.
  • the cathode-side p-type diffusion region is extended to a part of the region opposite to the anode.
  • the cathode-side p-type diffusion region includes an extended region 14 a extended to a part of the region opposite to the anode.
  • This semiconductor device is similar to the semiconductor device shown in FIG. 1 except for this feature. Therefore, like components are denoted by like reference characters and the description thereof will not be repeated.
  • cathode-side p-type diffusion region 14 is formed in guard-ring opposed region 15 . Therefore, the volume of the n-type region (electron concentration) is decreased, so that carriers accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state can be decreased. Accordingly, at the OFF time when a change from the ON state to the OFF state occurs, the carriers flowing from region 10 a of the drift layer immediately under guard ring 6 into an outer peripheral end portion of p-type diffusion region 3 in close proximity to guard ring 6 decreases. As a result, concentration of the current (reverse recovery current) on the outer peripheral end portion of p-type diffusion region 3 can be suppressed to improve the breakdown tolerance.
  • extended region 14 a extended into a part of the region located opposite to the anode is formed.
  • the amount of extension (area or volume) of extended region 14 a will be described based on graphs showing a relation between a recovery loss and a forward voltage drop.
  • FIG. 15 is a graph showing this relation.
  • the depth of the anode (p-type diffusion region) and the depth of the n-type ultrahigh-concentration impurity layer are constant.
  • cathode-side p-type diffusion region 14 As cathode-side p-type diffusion region 14 is extended gradually to the region opposite to anode 2 , area Sk of the n-type ultrahigh-concentration impurity layer decreases and the area ratio decreases. Then, the volume of the n-type region of the cathode decreases. The carriers accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state decreases. At the OFF time when a change from the ON state to the OFF state occurs, the time consumed by carriers to disappear is shortened, so that the diode becomes the OFF state more speedily.
  • FIG. 15 shows this by a tendency of the inclination of the graph that the right side of the graph rises while the left side thereof falls as the area ratio (Sk/Sa) decreases.
  • graph C corresponding to the area ratio (Sk/Sa) of 0.4 shows that the recovery loss of the right end portion of graph C is higher than graph T showing the tradeoff tolerance value. It is seen from this that, in order to increase the speed of the switching of the diode and reduce the recovery loss, it is necessary that the area ratio (Sk/Sa) is not 0.5 or less. In other words, the dimension of the extension of extended region 14 d of cathode-side p-type diffusion region 14 has to be set less than 50% of area Sa of anode 2 (p-type diffusion region 3 ).
  • extended region 14 a is provided to cathode-side p type diffusion region 14 .
  • holes are also injected from this extended region 14 a and accordingly a variation of the current with respect to the time in a final operation of the recovery can be made gentler.
  • oscillation of the diode is suppressed, so that breakage of the diode due to the action of a voltage exceeding a tolerance, and generation of noise having an adverse influence on peripherals can be suppressed.
  • a cathode-side p-type diffusion region 14 b is formed in which a heavy metal (such as Au or Pt) is selectively diffused.
  • a heavy metal such as Au or Pt
  • cathode-side p-type diffusion region 14 b is formed in guard-ring opposed region 15 , the volume (electron concentration) of the n-type region is decreased so that the carriers accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state can be decreased.
  • the heavy metal since the heavy metal is diffused in cathode-side p-type diffusion region 14 b, the diffused heavy metal serves as a center of recombination at the OFF time when the change from the ON state to the OFF state occurs, so that the ratio of accumulated electrons and holes recombined at the center of recombination to disappear is increased.
  • the carriers flowing from region 10 a of the drift layer immediately under guard ring 6 into an outer peripheral end portion of p-type diffusion region 3 in close proximity to guard ring 6 further decrease.
  • concentration of the current (reverse recovery current) on the outer peripheral end portion of p-type diffusion region 3 can be surely suppressed to improve the breakdown tolerance.
  • the heavy metal can be diffused in cathode-side diffusion region 14 b by performing appropriate heat treatment after the heavy metal is supplied into the cathode-side p-type diffusion region by the sputtering or vapor deposition method using an oxide film mask for example.
  • FIG. 19 a cathode-side p-type diffusion region 14 c irradiated selectively with electron beam, proton or helium is formed.
  • This semiconductor device is similar to the semiconductor device shown in FIG. 1 except for this feature. Therefore, like components are denoted by like reference characters and the description thereof will not be repeated.
  • cathode-side p-type diffusion region 14 c is formed in guard-ring opposed region 15 , and thus the volume (electron concentration) of the n-type region is decreased.
  • the carries accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state can be decreased.
  • the crystal defect serves as a center of recombination at the OFF time when the change from the ON state to the OFF state occurs, so that the ratio of accumulated electrons and holes recombined at the center of recombination to disappear increases.
  • n-type ultrahigh-concentration impurity layer 12 is located between cathode electrode 13 and a cathode-side p-type diffusion region 14 d formed in guard-ring opposed region 15 in the cathode, and thus cathode-side p-type diffusion region 14 d is electrically floating with respect to cathode electrode 13 .
  • This semiconductor device is similar to the semiconductor device shown in FIG. 1 except for this feature. Therefore, like components are denoted by like reference characters and the description thereof will not be repeated.
  • cathode-side p-type diffusion region 14 d is formed in the guard-ring opposed region, so that the volume (electron concentration) of the n-type region is decreased, so that the carriers accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state can be decreased. Accordingly, the carriers flowing from region 10 a of the drift layer into an outer peripheral end portion of p-type diffusion region 3 in close proximity to guard ring 6 at the OFF time decrease. As a result, concentration of the current (reverse recovery current) on the outer peripheral end portion of p-type diffusion region 3 can be suppressed to improve the breakdown tolerance.
  • cathode-side p-type diffusion region 14 d is electrically floating with respect to cathode electrode 13 , any manufacturing method different from the one in the case where cathode-side p-type diffusion region 14 d is connected to cathode electrode 13 can be used and thus variations of the manufacturing method are increased.
  • this structure can be formed in the following way. First, the n-type high-impurity-concentration layer is formed. Then, impurities are injected for forming the cathode-side p-type diffusion region. Then, heat treatment is performed to thermally diffuse the impurities to form the cathode-side p-type diffusion region. Then, the n-type ultrahigh-impurity-concentration layer is formed.
  • n-type ultrahigh-impurity-concentration layer 12 is formed over the whole of the other main surface of semiconductor substrate 1 , the contact resistance between the other main surface and cathode electrode 13 can be reduced.
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • a p-type diffusion region 22 is formed from the main surface of semiconductor substrate 1 to a predetermined depth.
  • an n-type diffusion region 23 is formed.
  • a gate electrode 24 and a source electrode 25 are formed on p-type diffusion region 22 .
  • electrodes 13 , 26 serving as both of a cathode electrode and a drain electrode are formed.
  • cathode-side p-type diffusion region 14 is formed in guard-ring opposed region 15 of the cathode, so that the volume (electron concentration) of the n-type region is decreased and, as shown in FIG. 26 , the carriers accumulated in region 10 a of the drift layer immediately under guard ring 6 in the ON state can be decreased, as described above. Accordingly, as shown in FIG. 27 , at the OFF time when a change from the ON state to the OFF state occurs, carriers flowing from region 10 a of the drift layer immediately under guard ring 6 into an outer peripheral end portion of p-type diffusion region 3 in close proximity to guard ring 6 decrease. As a result, concentration of the current (reverse recovery current) on the outer peripheral end portion of p-type diffusion region 3 can be suppressed to improve the breakdown tolerance.
  • This semiconductor device provides the following effect in addition to the above-described effect. Specifically, the diode and the MOSFET are formed at the same semiconductor substrate, so that the productivity can be improved and the assembly process can be simplified.
  • cathode-side p-type diffusion regions 14 to 14 d of respective semiconductor devices of the above-described embodiments are each formed with the same shape (such as width and depth) over the whole periphery in guard-ring opposed region 15 located opposite to guard ring 6 . Further, since concentration of the current on the outer peripheral end portion of the anode is suppressed, the lifetime of the semiconductor device can be prolonged and the energy can be saved. Moreover, the prolonged lifetime can lessen the load on the environment.

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  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thyristors (AREA)
US12/188,497 2008-05-23 2008-08-08 Semiconductor device Abandoned US20090289276A1 (en)

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US14/705,647 US9704946B2 (en) 2008-05-23 2015-05-06 Semiconductor device including a diode and guard ring

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JP2008-135851 2008-05-23
JP2008135851A JP4743447B2 (ja) 2008-05-23 2008-05-23 半導体装置

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DE102008051166B4 (de) 2012-11-29
CN101587912A (zh) 2009-11-25
DE102008051166A1 (de) 2009-12-17
KR20090122106A (ko) 2009-11-26
JP2009283781A (ja) 2009-12-03
US9704946B2 (en) 2017-07-11
KR101030696B1 (ko) 2011-04-26
CN101587912B (zh) 2013-01-02

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