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US20080073321A1 - Method of patterning an anti-reflective coating by partial etching - Google Patents

Method of patterning an anti-reflective coating by partial etching Download PDF

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Publication number
US20080073321A1
US20080073321A1 US11/534,420 US53442006A US2008073321A1 US 20080073321 A1 US20080073321 A1 US 20080073321A1 US 53442006 A US53442006 A US 53442006A US 2008073321 A1 US2008073321 A1 US 2008073321A1
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United States
Prior art keywords
pattern
layer
arc
arc layer
transferring
Prior art date
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Abandoned
Application number
US11/534,420
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English (en)
Inventor
Sandra L. Hyland
Shannon W. Dunn
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to US11/534,420 priority Critical patent/US20080073321A1/en
Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DUNN, SHANNON W., HYLAND, SANDRA L.
Priority to TW096133830A priority patent/TW200818261A/zh
Priority to JP2007238098A priority patent/JP2008078649A/ja
Priority to KR1020070096502A priority patent/KR20080027200A/ko
Priority to CNA2007101513029A priority patent/CN101150052A/zh
Publication of US20080073321A1 publication Critical patent/US20080073321A1/en
Abandoned legal-status Critical Current

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    • H10P50/73—
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
    • H10P76/2043—

Definitions

  • the present invention relates to a method for patterning a thin film on a substrate, and more particularly to a method for patterning a thin film on a substrate using a partially etched anti-reflective coating (ARC) layer.
  • ARC anti-reflective coating
  • the present invention relates to a method for patterning a thin film on a substrate.
  • a method of patterning a thin film on a substrate, and a computer readable medium for patterning comprising: preparing a film stack on the substrate, the film stack comprising the thin film formed on the substrate, an anti-reflective coating (ARC) layer formed on the thin film, and a mask layer formed on the ARC layer; forming a pattern in the mask layer; partially transferring the pattern to the ARC layer by transferring the pattern to a depth less than the thickness of the ARC layer; removing a remainder of the mask layer following the partial transfer of the pattern to the ARC layer; completing the transferring of the pattern to the ARC layer by etching the ARC layer; and transferring the pattern to the thin film while substantially consuming the ARC layer.
  • ARC anti-reflective coating
  • FIGS. 2A through 2K illustrate schematically a method for patterning a thin film on a substrate according to an embodiment of the invention.
  • FIG. 3 illustrates a flow chart of a method for patterning a thin film on a substrate according to an embodiment of the invention.
  • a lithographic structure 100 comprises a film stack formed on substrate 110 .
  • the film stack comprises a thin film 120 , such as a dielectric layer, formed on substrate 110 , an organic planarization layer (OPL) 130 formed on the thin film 120 , an anti-reflective coating (ARC) layer 140 formed on the OPL 130 , and a layer of photo-resist 150 formed on the ARC layer 140 .
  • OPL organic planarization layer
  • ARC anti-reflective coating
  • the photo-resist layer 150 is exposed to a first image pattern 152 using a photo-lithography system, and thereafter in FIG. 1C , the first image pattern 152 is developed in a developing solvent to form a first pattern 154 in the photo-resist layer 150 .
  • the first pattern 154 in the photo-resist layer 150 is transferred to the underlying ARC layer 140 using a dry etching process to form a first ARC pattern 142 as shown in FIG. 1D .
  • photo-resist layer 150 is removed, and a second photo-resist layer 160 is applied to the ARC layer 140 .
  • the second photo-resist layer 160 is exposed to a second image pattern 162 , as shown in FIG. 1F , using a photo-lithography system, and thereafter in FIG. 1G , the second image pattern 162 is developed in a developing solvent to form a second pattern 164 in the second photo-resist layer 160 .
  • the second pattern 164 in the second photo-resist layer 160 is transferred to the underlying ARC layer 140 using an etching process to form a second ARC pattern 144 as shown in FIG. 1H .
  • the second layer of photo-resist 160 is removed, and the first and second ARC patterns 142 and 144 are transferred to the underlying OPL 1 30 and the thin film 120 to form a first feature pattern 122 and a second feature pattern 124 using one or more etching processes.
  • the ARC layer 140 is only partially consumed, thus, leaving material, in addition to the remaining OPL, to be removed.
  • the inventors have observed that the process, such as a flash etch, required to remove the remaining ARC layer is detrimental to the material properties of the underlying thin film 120 .
  • the thin film 120 may comprise a low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices.
  • low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices.
  • BEOL back-end-of-line
  • Such materials which may include non-porous low-k dielectrics as well as porous low-k dielectrics, are susceptible to damage, e.g., degradation of dielectric constant, water absorption, residue formation, etc., when exposed to the chemistries necessary for removal of the ARC layer 140 .
  • the thickness of the ARC layer 140 is dictated by the requirements set forth for providing anti-reflective properties during the patterning of the layer of photo-resist.
  • the thickness ( ⁇ ) of the ARC layer 140 should be chosen to be a quarter wavelength (i.e., ⁇ ⁇ /4, 3 ⁇ /4, 5 ⁇ /4, etc.) of the incident EM radiation during the imaging of the layer of photo-resist.
  • the thickness ( ⁇ ) of the ARC layer 140 should be chosen to be sufficiently thick to permit absorption of the incident EM radiation.
  • the inventors have observed for current geometries that the minimum thickness required to provide anti-reflective properties still leads to an only partially consumed ARC layer following the transfer of the pattern to the underlying thin film.
  • a method of patterning a substrate is illustrated in FIGS. 2A through 2K , and FIG. 3 .
  • the method is illustrated in a flow chart 500 , and begins in 510 with forming a lithographic structure 200 comprising a film stack formed on substrate 210 .
  • the film stack comprises a thin film 220 formed on substrate 210 , an optional organic planarization layer (OPL) 230 formed on the thin film 220 , an anti-reflective coating (ARC) layer 240 formed on the optional OPL 230 (or on the thin film 220 if there is no OPL 230 ), and a layer of photo-resist 250 formed on the ARC layer 240 .
  • OPL organic planarization layer
  • ARC anti-reflective coating
  • the film stack is shown to be formed directly upon substrate 210 , there may exist additional layers between the film stack and the substrate 210 .
  • the film stack may facilitate the formation of one interconnect level, and this interconnect level may be formed upon another interconnect level on substrate 210 .
  • the thin film 220 may include a single material layer, or a plurality of material layers.
  • the thin film 220 may comprise a bulk material layer having a capping layer.
  • the thin film 220 may comprise a conductive layer, a non-conductive layer, or a semi-conductive layer.
  • the thin film 220 may include a material layer comprising a metal, metal oxide, metal nitride, metal oxynitride, metal silicate, metal silicide, silicon, poly-crystalline silicon (poly-silicon), doped silicon, silicon dioxide, silicon nitride, silicon carbide, silicon oxynitride, etc.
  • the thin film 220 may comprise a low dielectric constant (i.e., low-k) or ultra-low dielectric constant (i.e., ultra-low-k) dielectric layer having a nominal dielectric constant value less than the dielectric constant of SiO 2 , which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the thin film 220 may have a dielectric constant of 3.7 or less, such as a dielectric constant ranging from 1.6 to 3.7.
  • These dielectric layers may include at least one of an organic, inorganic, or inorganic-organic hybrid material. Additionally, these dielectric layers may be porous or non-porous. For example, these dielectric layers may include an inorganic, silicate-based material, such as carbon doped silicon oxide (or organo siloxane), deposited using CVD techniques. Examples of such films include Black Diamonds CVD organosilicate glass (OSG) films commercially available from Applied Materials, Inc., or Corals CVD films commercially available from Novellus Systems, Inc.
  • OSG Black Diamonds CVD organosilicate glass
  • these dielectric layers may include porous inorganic-organic hybrid films comprised of a single-phase, such as a silicon oxide-based matrix having CH 3 bonds that hinder full densification of the film during a curing or deposition process to create small voids (or pores).
  • these dielectric layers may include porous inorganic-organic hybrid films comprised of at least two phases, such as a carbon-doped silicon oxide-based matrix having pores of organic material (e.g., porogen) that is decomposed and evaporated during a curing process.
  • these dielectric layers may include an inorganic, silicate-based material, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD (spin-on dielectric) techniques.
  • examples of such films include FOx® HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics.
  • these dielectric layers can comprise an organic material deposited using SOD techniques.
  • Such films include SiLK-I, SiLK-J, SiLK-H, SiLK-D, and porous SiLK® semiconductor dielectric resins commercially available from Dow Chemical, and GX-3TM, and GX- 3 PTM semiconductor dielectric resins commercially available from Honeywell.
  • the thin film 220 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or a spin-on technique, such as those offered in the Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD, and Lithius coating systems commercially available from Tokyo Electron Limited (TEL).
  • the Clean Track ACT 8 (200 mm), ACT 12 (300 mm), and Lithius (300 mm) coating systems provide coat, bake, and cure tools for SOD materials.
  • the track system can be configured for processing substrate sizes of 100 mm, 200 mm, 300 mm, and greater. Other systems and methods for forming a thin film on a substrate are well known to those skilled in the art of both spin-on technology and vapor deposition technology.
  • the optional OPL 230 can include a photo-sensitive organic polymer or an etch type organic compound.
  • the photo-sensitive organic polymer may be polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylenether resin, polyphenylenesulfide resin, or benzocyclobutene (BCB). These materials may be formed using spin-on techniques.
  • the ARC layer 240 possesses material properties suitable for use as an anti-reflective coating.
  • the ARC layer 240 may include an organic material or an inorganic material.
  • the ARC layer 240 may include amorphous carbon (a-C), a-FC, or a material having a structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti, and combinations thereof, and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F.
  • the ARC layer 240 can be fabricated to demonstrate an optical range for index of refraction of approximately 1.40 ⁇ n ⁇ 2.60, and for extinction coefficient of approximately 0.01 ⁇ k ⁇ 0.78.
  • At least one of the index of refraction and the extinction can be graded (or varied) along a thickness of the ARC layer 240 . Additional details are provided in U.S. Pat. No. 6,316,167, entitled “TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATION THEREOF,” assigned to International Business Machines Corporation, and the entire content of which is incorporated by reference herein in its entirety.
  • the ARC layer 240 can be formed using vapor deposition techniques including chemical vapor deposition (CVD) and plasma enhanced CVD (PECVD).
  • CVD chemical vapor deposition
  • PECVD plasma enhanced CVD
  • the ARC layer 240 can be formed using PECVD, as described in greater detail in pending U.S. patent application Ser. No. 10/644,958, entitled “METHOD AND APPARATUS FOR DEPOSITING MATERIALS WITH TUNABLE OPTICAL PROPERTIES AND ETCHING CHARACTERISTICS,” filed on Aug. 21, 2003, the entire content of which is incorporated herein in its entirety.
  • the optical properties of the ARC layer 240 such as the index of refraction, can be selected so as to substantially match the optical properties of the underlying layer, or layers.
  • underlying layers such as non-porous dielectric films can require achieving an index of refraction in the range of 1.4 ⁇ n ⁇ 2.6; and underlying layers such as porous dielectric films can require achieving an index of refraction in the range of 1.2 ⁇ n ⁇ 2.6.
  • the photo-resist layer 250 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists.
  • the photo-resist layer 250 can be formed using a track system.
  • the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
  • TEL Tokyo Electron Limited
  • Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology.
  • the photo-resist layer 250 is patterned and developed. As shown in FIG. 2B , the photo-resist layer 250 is imaged with an image pattern 252 using a photo-lithography system. The exposure to EM radiation through a reticle is performed in a dry or wet photo-lithography system.
  • the image pattern can be formed using any suitable conventional stepping lithographic system, or scanning lithographic system.
  • the photo-lithographic system may be commercially available from ASML Netherlands B.V. (De Run 6501, 5504 DR Veldhoven, The Netherlands), or Canon USA, Inc., Semiconductor Equipment Division (3300 North First Street, San Jose, Calif. 95134).
  • the exposed photo-resist layer 250 is subjected to a developing process to remove the image pattern 252 , and form a mask pattern 254 in the photo-resist layer 250 .
  • the developing process can include exposing the substrate to a developing solvent in a developing system, such as a track system.
  • the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
  • the mask pattern 254 is partially transferred to the underlying ARC layer 240 to form an ARC pattern 242 .
  • the ARC pattern 242 extends to a depth less than the thickness of the ARC layer 240 .
  • the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using an etching process, such as a dry etching process or a wet etching process.
  • the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using a dry plasma etching process or a dry non-plasma etching process.
  • the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using an anisotropic dry etching process, a reactive ion etching process, a laser-assisted etching process, an ion milling process, or an imprinting process, or a combination of two or more thereof.
  • the layer of photo-resist 250 is removed.
  • the photo-resist layer 250 may be removed using a wet stripping process, a dry plasma ashing process, or a dry non-plasma ashing process.
  • an optional second photo-resist layer 260 is formed on the ARC layer 240 .
  • the optional second photo-resist layer 260 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists.
  • the optional second photo-resist layer 260 can be formed using a track system.
  • the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
  • TEL Tokyo Electron Limited
  • Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology.
  • the optional second photo-resist layer 260 is imaged with an optional second image pattern 262 , and the exposed optional second photo-resist layer 260 is subjected to a developing process to remove the optional second image pattern region and form an optional second mask pattern 264 in the optional second photo-resist layer 260 .
  • the optional second mask pattern 264 is partially transferred to the underlying ARC layer 240 to form an optional second ARC pattern 244 .
  • the optional second ARC pattern 244 extends to a depth less than the thickness of the ARC layer 240 .
  • the optional second layer of photo-resist 260 is removed.
  • ARC layer 240 may be double pattern, or multi-pattern, ARC layer 240 using a single layer of photo-resist.
  • the single layer of photo-resist may be double imaged, and then removed following the partial transfer of the double pattern to the underlying ARC layer.
  • the single layer of photo-resist may be imaged and developed, and these two steps may be repeated with the same layer of photo-resist. Thereafter, the layer of photo-resist may be removed following the partial transfer of the double pattern to the underlying ARC layer.
  • the ARC pattern 242 and the optional second ARC pattern 244 are transferred to the underlying OPL 230 , if present, and to the thin film 220 to form a feature pattern 222 and an optional second feature pattern 224 using one or more etching processes.
  • the ARC layer 240 is substantially consumed as illustrated in FIG. 2K .
  • the one or more etching processes may include any combination of wet or dry etching processes.
  • the dry etching processes may include dry plasma etching processes or dry non-plasma etching processes.
  • the OPL 230 if present, may be removed.

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  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
US11/534,420 2006-09-22 2006-09-22 Method of patterning an anti-reflective coating by partial etching Abandoned US20080073321A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US11/534,420 US20080073321A1 (en) 2006-09-22 2006-09-22 Method of patterning an anti-reflective coating by partial etching
TW096133830A TW200818261A (en) 2006-09-22 2007-09-11 Method of patterning an anti-reflective coating by partial etching
JP2007238098A JP2008078649A (ja) 2006-09-22 2007-09-13 部分エッチングによる反射防止コーティングのパターニング法
KR1020070096502A KR20080027200A (ko) 2006-09-22 2007-09-21 부분 에칭에 의한 반-반사성 코팅의 패터닝 방법
CNA2007101513029A CN101150052A (zh) 2006-09-22 2007-09-24 通过部分刻蚀图案化抗反射涂层层的方法

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US11/534,420 US20080073321A1 (en) 2006-09-22 2006-09-22 Method of patterning an anti-reflective coating by partial etching

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JP (1) JP2008078649A (zh)
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080206999A1 (en) * 2007-02-22 2008-08-28 Fujitsu Limited Method for wet etching while forming interconnect trench in insulating film
US20130186389A1 (en) * 2009-12-01 2013-07-25 Menashe Barkai Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector
US20160033856A1 (en) * 2013-04-17 2016-02-04 Fujifilm Corporation Resist removing liquid, resist removal method using same and method for producing photomask

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* Cited by examiner, † Cited by third party
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US8153351B2 (en) * 2008-10-21 2012-04-10 Advanced Micro Devices, Inc. Methods for performing photolithography using BARCs having graded optical properties
CN102054684B (zh) * 2009-11-10 2012-10-03 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
CN111727490B (zh) * 2018-03-02 2024-07-09 东京毅力科创株式会社 用于将图案转移到层的方法
CA3099013A1 (en) * 2018-05-04 2019-11-07 Asml Netherlands B.V. Pellicle for euv lithography
CN112951721B (zh) * 2019-12-11 2025-03-14 台积电(南京)有限公司 用于光致抗蚀剂线粗糙度改善的沟槽蚀刻工艺
CN114815493A (zh) * 2022-05-27 2022-07-29 上海传芯半导体有限公司 Euv光掩模基版、euv光掩模版及其制造方法、衬底回收方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080206999A1 (en) * 2007-02-22 2008-08-28 Fujitsu Limited Method for wet etching while forming interconnect trench in insulating film
US8449787B2 (en) * 2007-02-22 2013-05-28 Fujitsu Limited Method for wet etching while forming interconnect trench in insulating film
US20130186389A1 (en) * 2009-12-01 2013-07-25 Menashe Barkai Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector
US9857098B2 (en) * 2009-12-01 2018-01-02 Siemens Concentrated Solar Power Ltd. Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector
US20160033856A1 (en) * 2013-04-17 2016-02-04 Fujifilm Corporation Resist removing liquid, resist removal method using same and method for producing photomask
US9588428B2 (en) * 2013-04-17 2017-03-07 Fujifilm Corporation Resist removing liquid, resist removal method using same and method for producing photomask

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TW200818261A (en) 2008-04-16
KR20080027200A (ko) 2008-03-26
JP2008078649A (ja) 2008-04-03
CN101150052A (zh) 2008-03-26

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