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US20080067502A1 - Electronic packages with fine particle wetting and non-wetting zones - Google Patents

Electronic packages with fine particle wetting and non-wetting zones Download PDF

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Publication number
US20080067502A1
US20080067502A1 US11/521,147 US52114706A US2008067502A1 US 20080067502 A1 US20080067502 A1 US 20080067502A1 US 52114706 A US52114706 A US 52114706A US 2008067502 A1 US2008067502 A1 US 2008067502A1
Authority
US
United States
Prior art keywords
package
particles
die
substrate
hydrophobic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/521,147
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English (en)
Inventor
Nirupama Chakrapani
Vijay S. Wakharkar
Chris Matayabas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US11/521,147 priority Critical patent/US20080067502A1/en
Priority to TW096134453A priority patent/TWI371805B/zh
Priority to CN2007101701297A priority patent/CN101145530B/zh
Priority to DE102007043832A priority patent/DE102007043832B4/de
Assigned to INTEL CORPORATION reassignment INTEL CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: WAKHARKAR, VIJAY S., MATAYABAS, CHRIS, CHAKRAPANI, NIRUPAMA
Publication of US20080067502A1 publication Critical patent/US20080067502A1/en
Priority to US12/756,380 priority patent/US7927925B2/en
Priority to US13/050,034 priority patent/US8018073B2/en
Abandoned legal-status Critical Current

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Classifications

    • H10W74/012
    • H10W74/117
    • H10W74/15
    • H10W72/01308
    • H10W72/07311
    • H10W72/07353
    • H10W72/334
    • H10W72/536
    • H10W72/856
    • H10W72/884
    • H10W72/931
    • H10W74/00
    • H10W90/722
    • H10W90/732
    • H10W90/734
    • H10W90/754

Definitions

  • This relates to the fabrication of integrated circuit packages for holding integrated circuit chips.
  • a substrate may mount one or more integrated circuit chips. Between the chip and the substrate may be an underfill material.
  • this material fills up the region between the chip and the substrate, but does not extend outwardly by an excessive amount therefrom. Doing so may adversely affect the operation of the packaged part. For example, when the underfill material is injected between the integrated circuit and the substrate, it may tend to flow outwardly, creating what is called a tongue of material that extends out from under the integrated circuit die.
  • Underfilling may be done by capillary flow.
  • the underfill may be made with a very low viscosity and good wettability to the substrate solder resist.
  • the underfill may be dispensed at elevated temperatures. The result of all these factors is that a tongue of underfill is left on the underfill dispense side of the package. The tongue effectively increases the footprint of the package.
  • FIG. 1 is an enlarged, cross-sectional view of a package in accordance with one embodiment of the present invention
  • FIG. 3 is an enlarged, cross-sectional view of another embodiment.
  • the substrate In some applications in semiconductor integrated circuit packaging, it is desirable to have a substrate that has regions which are both wetting and non-wetting. It would be even more desirable that the substrate have regions that are super wettable and super unwettable. In other words, the same substrates may have surface regions that are hemi-wicking and hydrophobic and hemi-wicking and hydrophilic. As a result, underfill and other fluxes may be closely controlled to spread out in limited regions on the substrate.
  • fine particle coatings may be applied across a substrate surface.
  • the coatings may, for example, be silicon nanorods which are grown on the substrate and extend to a height of up to 500 nanometers. If the substrate upper surface is relatively hydrophilic, then the presence of the surface roughening nanoparticles serves to greatly increase the hydrophilic nature of the surface in what may be called hemi-wicking. Conversely, if the same surface is hydrophobic, hemi-wicking occurs, nonetheless, making the surface extremely hydrophobic.
  • a hydrophilic surface has a surface energy greater than or equal to 70 mN/m.
  • a hydrophobic surface has a surface energy less than or equal to 20 mN/m.
  • a substrate 12 has an integrated circuit die 14 mounted thereon in a flip chip arrangement using solder balls 16 to electrically and mechanically connect the die 14 to the substrate 12 .
  • the substrate 12 may have interconnections which provide signals to the die 14 and transfer signals from the die 14 to external devices.
  • the upper surface of the substrate 12 may have peripheral regions 22 (e.g. 22 a and 22 b ) which may be highly hydrophobic or hemi-wicking.
  • the regions 24 underneath the die and to a slight degree up from under the die may be very hydrophilic and hemi-wicking.
  • the underfill material 20 once injected in the direction A, for example, using capillary forces, moves away from the hydrophobic surfaces 22 a and 22 b and spreads on the hydrophilic surfaces 24 . Because the surfaces 22 and 24 are hemi-wicking, the normal wetting and non-wetting effects are enhanced. As a result, the tendency of the underfill 20 to form a tongue by extending outwardly in a direction opposite to the arrow A is reduced. This may achieve a smaller package footprint, in some cases, since substrate surface is not consumed by an underfill tongue.
  • the package 30 may include a substrate 36 which includes interconnects 44 , such as solder balls, as shown in FIG. 3 .
  • Electrical vertical vias 38 may be found within the substrate 36 which connect to horizontal metallizations 41 to distribute signals between the external world coupled by the interconnects 44 and the integrated circuit dice 32 a , 32 b , and 32 c within the package 30 .
  • An encapsulant 52 may encapsulate the dice 32 a , 32 b , and 32 c.
  • the die 32 a may be coupled by a wire bond 56 to a pad 46 on the substrate 36 .
  • the pad 46 may be coupled by the horizontal metallization 41 to the vertical via 38 and, ultimately, down to a pad 43 that is coupled to an interconnect 44 . In this way, communications may be had between external components and the die 32 a .
  • the wire bond 48 may connect to the die 32 b via contact 50 .
  • Connections to the die 32 c may be provided in a variety of different ways.
  • the die 32 c may be coupled to the die 32 b by a die attach adhesive layer 34 .
  • the die 32 b may be coupled by a die attach adhesive layer 34 to the die 32 a .
  • other techniques for securing the dice together may also be utilized.
  • the surfaces 54 may be treated to be highly hydrophobic and hemi-wicking. These surfaces may be provided on both the die 32 b upper surface and the die 32 c upper surface.
  • the fine particles 40 may be grown on the substrate 12 .
  • the particles 40 may, for example, be nanorods, spherical particles, or tetrapods, etc. However, other components and shapes may be utilized. They may be made of materials including, but not limited to, silica, alumina, zirconia, silicon, or carbon, etc. Generally, it is desirable that these particles 40 have a height above the surface of the substrate 12 of from 5 to 500 nanometers. This is effective to enhance the hydrophobic or hydrophilic nature of the resulting surface.
  • the same fine elements may be formed. That is, particles 40 of comparable composition and size may be formed across the surfaces that are supposed to be ultimately hemi-wicking and hydrophobic or hemi-wicking and hydrophilic. Then, the surfaces that are to be hydrophobic may be exposed to a hydrofluoric acid treatment. The surfaces that will remain hydrophilic may be masked with a suitable, removable mask 42 .
  • fluorinated silanes are hydrophobic. They can easily be functionalized to surfaces via alcohol groups or with plasma treatment prior to functionalization.
  • a constituent R 3 —Si—OH together with HO-substrate solder resist yields R 3 —Si—O-substrate solder resist.
  • the constituent R may be, but need not be limited to, an alkane, vinyl, or fluorine.
  • different treatments may be used to create a hydrophilic surface.
  • amine terminated silanes are hydrophilic.
  • alkane silanes are hydrophobic.
  • long chain alkanes self-assemble into monolayers, rendering very high density silanes on the surface.
  • Such monolayers may be deposited by a solvent route or by vapor deposition.
  • hydroxyl groups on a solder resist surface can link silanols with appropriate moieties to render them non-wetting to underfills.
  • Specific regions of a surface may be patterned with a silane treatment to obtain regions that are non-wetting to underfill.
  • the structure may be dipped to apply the hydrofluoric acid.
  • the hydrofluoric acid may be 48 to 51 percent and the exposure may be for one minute in some embodiments of the present invention.
  • the growth of the particles 40 in the form of nanorods may be done using glancing angle deposition techniques.
  • Glancing angle deposition involves physical vapor deposition on a substrate that is rotated in two different directions. A glancing angle is formed between the input vapor source and the surface on which the nanorods are intended to be grown. In some cases, the angle may be from 70 to 90 degrees. A deposition rate of 0.2 nMs ⁇ 1 and a rotation speed of 0.05 revs ⁇ 1 may be used. An electron beam evaporator with a quartz crystal thickness monitor may be used to detect the film thickness.
  • surfaces can be selectively made highly hydrophilic or highly hydrophobic. Hydrophobic regions may be effective keep out zones to prevent incursion of fluxes, underfills, or encapsulants, to mention a few examples. Conversely, the spreading of underfills and molding compounds through narrow channels over ever-shrinking packages may be improved by creating a hemi-wicking surface.
  • Nanoparticles generally have at least one of their dimensions less than 100 nanometers. However, as used herein, a fine particle is a particle with a size up to 500 nanometers. Suitable shapes include, but are not limited, spheres, tetrapods, rods, tubes, and platelets, to mention a few examples. Suitable materials include, but are not limited to, silica, alumina, titania, zirconia, and carbon.
  • deposited particles may be utilized.
  • particles such as microspheres, of at least two different sizes are mixed and then deposited.
  • the particles may be secured by an adhesive coating, but other techniques may be used as well.
  • references throughout this specification to “one embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation encompassed within the present invention. Thus, appearances of the phrase “one embodiment” or “in an embodiment” are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be instituted in other suitable forms other than the particular embodiment illustrated and all such forms may be encompassed within the claims of the present application.

Landscapes

  • Micromachines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
US11/521,147 2006-09-14 2006-09-14 Electronic packages with fine particle wetting and non-wetting zones Abandoned US20080067502A1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
US11/521,147 US20080067502A1 (en) 2006-09-14 2006-09-14 Electronic packages with fine particle wetting and non-wetting zones
TW096134453A TWI371805B (en) 2006-09-14 2007-09-14 Electronic packages with fine particle wetting and non-wetting zones
CN2007101701297A CN101145530B (zh) 2006-09-14 2007-09-14 具有微粒润湿和非润湿区域的电子封装
DE102007043832A DE102007043832B4 (de) 2006-09-14 2007-09-14 Elektronische Packages mit benetzbaren und nichtbenetzbaren Feinpartikelbereichen und Verfahren zur Herstellung desselben
US12/756,380 US7927925B2 (en) 2006-09-14 2010-04-08 Electronic packages with fine particle wetting and non-wetting zones
US13/050,034 US8018073B2 (en) 2006-09-14 2011-03-17 Electronic packages with fine particle wetting and non-wetting zones

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/521,147 US20080067502A1 (en) 2006-09-14 2006-09-14 Electronic packages with fine particle wetting and non-wetting zones

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/756,380 Division US7927925B2 (en) 2006-09-14 2010-04-08 Electronic packages with fine particle wetting and non-wetting zones

Publications (1)

Publication Number Publication Date
US20080067502A1 true US20080067502A1 (en) 2008-03-20

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US11/521,147 Abandoned US20080067502A1 (en) 2006-09-14 2006-09-14 Electronic packages with fine particle wetting and non-wetting zones
US12/756,380 Expired - Fee Related US7927925B2 (en) 2006-09-14 2010-04-08 Electronic packages with fine particle wetting and non-wetting zones
US13/050,034 Expired - Fee Related US8018073B2 (en) 2006-09-14 2011-03-17 Electronic packages with fine particle wetting and non-wetting zones

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Application Number Title Priority Date Filing Date
US12/756,380 Expired - Fee Related US7927925B2 (en) 2006-09-14 2010-04-08 Electronic packages with fine particle wetting and non-wetting zones
US13/050,034 Expired - Fee Related US8018073B2 (en) 2006-09-14 2011-03-17 Electronic packages with fine particle wetting and non-wetting zones

Country Status (4)

Country Link
US (3) US20080067502A1 (zh)
CN (1) CN101145530B (zh)
DE (1) DE102007043832B4 (zh)
TW (1) TWI371805B (zh)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080026505A1 (en) * 2006-07-28 2008-01-31 Nirupama Chakrapani Electronic packages with roughened wetting and non-wetting zones
US20080142996A1 (en) * 2006-12-19 2008-06-19 Gopalakrishnan Subramanian Controlling flow of underfill using polymer coating and resulting devices
US20080157352A1 (en) * 2006-12-28 2008-07-03 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US20100176417A1 (en) * 2009-01-15 2010-07-15 Everlight Electronics Co., Ltd. Light emitting diode package structure and method for fabricating the same
WO2010135719A1 (en) * 2009-05-22 2010-11-25 Lam Research Corporation Modifications to surface topography of proximity head
KR101038762B1 (ko) 2009-11-16 2011-06-03 엠케이전자 주식회사 대기압 플라즈마를 이용한 솔더볼의 플라즈마 표면처리 방법
US8970034B2 (en) 2012-05-09 2015-03-03 Micron Technology, Inc. Semiconductor assemblies and structures
US9909814B2 (en) * 2009-03-06 2018-03-06 Kelvin Thermal Technologies, Inc. Flexible thermal ground plane and manufacturing the same
US11598594B2 (en) 2014-09-17 2023-03-07 The Regents Of The University Of Colorado Micropillar-enabled thermal ground plane
EP4117025A3 (en) * 2021-07-09 2023-05-24 InnoLux Corporation Underfilled electronic device and manufacturing method thereof
DE102016110640B4 (de) 2015-06-09 2024-01-11 Infineon Technologies Ag Halbleiterbauelement mit einer Struktur zum Steuern eines Unterfüllmaterialflusses und Verfahren zu seiner Herstellung
US11930621B2 (en) 2020-06-19 2024-03-12 Kelvin Thermal Technologies, Inc. Folding thermal ground plane
US11988453B2 (en) 2014-09-17 2024-05-21 Kelvin Thermal Technologies, Inc. Thermal management planes
US12104856B2 (en) 2016-10-19 2024-10-01 Kelvin Thermal Technologies, Inc. Method and device for optimization of vapor transport in a thermal ground plane using void space in mobile systems
US12385697B2 (en) 2014-09-17 2025-08-12 Kelvin Thermal Technologies, Inc. Micropillar-enabled thermal ground plane
US12480716B2 (en) 2017-05-08 2025-11-25 Kelvin Thermal Technologies, Inc. Thermal management planes
US12498181B2 (en) 2018-12-11 2025-12-16 Kelvin Thermal Technologies, Inc. Vapor chamber
US12523431B2 (en) 2014-09-15 2026-01-13 Kelvin Thermal Technologies, Inc. Polymer-based microfabricated thermal ground plane

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US8803001B2 (en) * 2011-06-21 2014-08-12 Toyota Motor Engineering & Manufacturing North America, Inc. Bonding area design for transient liquid phase bonding process
US9044822B2 (en) 2012-04-17 2015-06-02 Toyota Motor Engineering & Manufacturing North America, Inc. Transient liquid phase bonding process for double sided power modules
US10058951B2 (en) 2012-04-17 2018-08-28 Toyota Motor Engineering & Manufacturing North America, Inc. Alloy formation control of transient liquid phase bonding
US8920919B2 (en) 2012-09-24 2014-12-30 Intel Corporation Thermal interface material composition including polymeric matrix and carbon filler
DE102014018277A1 (de) * 2014-12-12 2016-06-16 Tesat-Spacecom Gmbh & Co. Kg Verfahren zum Hestellen einer Hochspannungsisolierung von elektrischen Komponenten
US9330946B1 (en) 2015-11-20 2016-05-03 International Business Machines Corporation Method and structure of die stacking using pre-applied underfill
US10217649B2 (en) * 2017-06-09 2019-02-26 Advanced Semiconductor Engineering, Inc. Semiconductor device package having an underfill barrier
CN113088876B (zh) * 2021-04-07 2022-11-22 京东方科技集团股份有限公司 掩膜版及其制备方法和蒸镀装置

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US20020060368A1 (en) * 2000-04-06 2002-05-23 Tongbi Jiang Underfile process
US6869831B2 (en) * 2001-09-14 2005-03-22 Texas Instruments Incorporated Adhesion by plasma conditioning of semiconductor chip surfaces
US6794225B2 (en) * 2002-12-20 2004-09-21 Intel Corporation Surface treatment for microelectronic device substrate
US7112617B2 (en) * 2003-04-22 2006-09-26 International Business Machines Corporation Patterned substrate with hydrophilic/hydrophobic contrast, and method of use
US20070025518A1 (en) * 2003-06-01 2007-02-01 Simha Levene Anti-scattering x-ray collimator for ct scanners
US20080026505A1 (en) * 2006-07-28 2008-01-31 Nirupama Chakrapani Electronic packages with roughened wetting and non-wetting zones

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080026505A1 (en) * 2006-07-28 2008-01-31 Nirupama Chakrapani Electronic packages with roughened wetting and non-wetting zones
US20080142996A1 (en) * 2006-12-19 2008-06-19 Gopalakrishnan Subramanian Controlling flow of underfill using polymer coating and resulting devices
US7875503B2 (en) * 2006-12-28 2011-01-25 Intel Corporation Reducing underfill keep out zone on substrate used in electronic device processing
US20080157352A1 (en) * 2006-12-28 2008-07-03 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US8362627B2 (en) * 2006-12-28 2013-01-29 Intel Corporation Reducing underfill keep out zone on substrate used in electronic device processing
US20110084388A1 (en) * 2006-12-28 2011-04-14 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US20100176417A1 (en) * 2009-01-15 2010-07-15 Everlight Electronics Co., Ltd. Light emitting diode package structure and method for fabricating the same
US8154044B2 (en) 2009-01-15 2012-04-10 Everlight Electronics Co., Ltd. Light emitting diode package structure and method for fabricating the same
US9909814B2 (en) * 2009-03-06 2018-03-06 Kelvin Thermal Technologies, Inc. Flexible thermal ground plane and manufacturing the same
US11353269B2 (en) 2009-03-06 2022-06-07 Kelvin Thermal Technologies, Inc. Thermal ground plane
US20100294742A1 (en) * 2009-05-22 2010-11-25 Enrico Magni Modifications to Surface Topography of Proximity Head
CN102427891A (zh) * 2009-05-22 2012-04-25 朗姆研究公司 邻近头的表面形貌改变
WO2010135719A1 (en) * 2009-05-22 2010-11-25 Lam Research Corporation Modifications to surface topography of proximity head
KR101038762B1 (ko) 2009-11-16 2011-06-03 엠케이전자 주식회사 대기압 플라즈마를 이용한 솔더볼의 플라즈마 표면처리 방법
US8970034B2 (en) 2012-05-09 2015-03-03 Micron Technology, Inc. Semiconductor assemblies and structures
US9224715B2 (en) 2012-05-09 2015-12-29 Micron Technology, Inc. Methods of forming semiconductor die assemblies
US12523431B2 (en) 2014-09-15 2026-01-13 Kelvin Thermal Technologies, Inc. Polymer-based microfabricated thermal ground plane
US11598594B2 (en) 2014-09-17 2023-03-07 The Regents Of The University Of Colorado Micropillar-enabled thermal ground plane
US11988453B2 (en) 2014-09-17 2024-05-21 Kelvin Thermal Technologies, Inc. Thermal management planes
US12385697B2 (en) 2014-09-17 2025-08-12 Kelvin Thermal Technologies, Inc. Micropillar-enabled thermal ground plane
DE102016110640B4 (de) 2015-06-09 2024-01-11 Infineon Technologies Ag Halbleiterbauelement mit einer Struktur zum Steuern eines Unterfüllmaterialflusses und Verfahren zu seiner Herstellung
US12104856B2 (en) 2016-10-19 2024-10-01 Kelvin Thermal Technologies, Inc. Method and device for optimization of vapor transport in a thermal ground plane using void space in mobile systems
US12480716B2 (en) 2017-05-08 2025-11-25 Kelvin Thermal Technologies, Inc. Thermal management planes
US12498181B2 (en) 2018-12-11 2025-12-16 Kelvin Thermal Technologies, Inc. Vapor chamber
US11930621B2 (en) 2020-06-19 2024-03-12 Kelvin Thermal Technologies, Inc. Folding thermal ground plane
US12464679B2 (en) 2020-06-19 2025-11-04 Kelvin Thermal Technologies, Inc. Folding thermal ground plane
EP4117025A3 (en) * 2021-07-09 2023-05-24 InnoLux Corporation Underfilled electronic device and manufacturing method thereof

Also Published As

Publication number Publication date
US8018073B2 (en) 2011-09-13
DE102007043832A1 (de) 2008-05-08
CN101145530B (zh) 2011-06-29
CN101145530A (zh) 2008-03-19
DE102007043832B4 (de) 2010-09-16
US20110163445A1 (en) 2011-07-07
US20100190302A1 (en) 2010-07-29
US7927925B2 (en) 2011-04-19
TW200822246A (en) 2008-05-16
TWI371805B (en) 2012-09-01

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