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US20060180344A1 - Multilayer printed wiring board and process for producing the same - Google Patents

Multilayer printed wiring board and process for producing the same Download PDF

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Publication number
US20060180344A1
US20060180344A1 US10/542,649 US54264905A US2006180344A1 US 20060180344 A1 US20060180344 A1 US 20060180344A1 US 54264905 A US54264905 A US 54264905A US 2006180344 A1 US2006180344 A1 US 2006180344A1
Authority
US
United States
Prior art keywords
layer
base material
wiring board
wiring
motherboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/542,649
Other languages
English (en)
Inventor
Shoji Ito
Ryoichi Kishihara
Osamu Nakao
Hiroki Hashiba
Masahiro Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
Original Assignee
Fujikura Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2003011635A external-priority patent/JP4195619B2/ja
Priority claimed from JP2003294994A external-priority patent/JP2005064357A/ja
Priority claimed from JP2003309254A external-priority patent/JP2005079402A/ja
Priority claimed from JP2003342907A external-priority patent/JP2005109299A/ja
Application filed by Fujikura Ltd filed Critical Fujikura Ltd
Assigned to FUJIKURA LTD. reassignment FUJIKURA LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HASHIBA, HIROKI, ITO, SHOJI, KISHIHARA, RYOICHI, NAKAO, OSAMU, OKAMOTO, MASAHIRO
Publication of US20060180344A1 publication Critical patent/US20060180344A1/en
Priority to US12/463,708 priority Critical patent/US7886438B2/en
Abandoned legal-status Critical Current

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Classifications

    • H10W70/611—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
    • H10W90/401—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09972—Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4694—Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density
    • H10W72/07251—
    • H10W72/20—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
    • Y10T29/4916—Simultaneous circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Definitions

  • the present invention relates to a multi-layer wiring board and a method for manufacturing the same.
  • Recent electronic apparatuses have been made smaller and light weight in addition to developments in the applicability to high-frequency signals and digitized devices, and along with these developments, there have been demands for small-size devices, a high-density packaging property and the like in printed circuit boards being installed in the electronic apparatuses.
  • FIGS. 1A to 1 D are flow charts that show manufacturing processes of the rigid flex printed circuit board.
  • FIG. 2A is a perspective view that shows the substrate and the like shown in FIGS. 1A and 1B and
  • FIG. 2B is a perspective view of a rigid flex wiring board shown in FIG. 1D .
  • wiring circuits 104 are formed by a subtractive method on both of the surfaces of a flex substrate 101 made of a polyimide film, both of the surfaces of an inner-layer rigid substrate 102 made from a prepreg and the like, and one surface of an outer layer rigid substrate 103 .
  • flex-portion exposing holes 109 are formed through a bonding sheet 105 , the inner-layer rigid substrate 102 and the outer-layer rigid substrate 103 , by using a press-punching process and the like.
  • a flex-substrate-use cover layer 106 , the inner-layer rigid substrate 102 , the bonding sheet 105 and the outer-layer rigid substrate 103 are superposed and placed on the surface and rear surface of the flex substrate 101 , and subjected to a laminating process to prepare a laminated member 100 shown in FIG. 1B .
  • FIG. 1B As shown in FIG.
  • a peripheral portion of a portion (for example, indicated by 103 a ) that forms a circuit board upon completion of the processes is punched out so that the portion (for example, 103 a ) to form the circuit board is joined to a frame member (for example, 103 b ) by using a micro-joint (for example, 103 c ).
  • the laminated member 100 is subjected to a drilling process, a plating process and etching so that a through hole 107 , an outer-layer wiring circuit 108 and the like are formed therein.
  • the micro-joints (for example, 103 c ), which have joined a rigid portion B and a flex portion A to the frame member (for example, 103 b ), are simultaneously punched out by using a die so that a rigid flex printed circuit board 110 , shown in FIGS. 1D and 2B , is obtained.
  • the frame member for example, 103 b
  • portions that have been punched out so as to form the substrates 101 are disposed.
  • the outer shapes of the rigid portion and the flex portion need to be simultaneously cut out (a cutting process). Therefore, it is necessary to use substrates having sufficient margin portions required for positioning processes for the respective substrates. Moreover, in most of cases, after the cutting process, these margin portions are disposed as the frame members.
  • the present invention has been devised to solve the above-mentioned problems, and the first objective thereof is to provide a multi-layer wiring board which provides higher design freedom for wiring, and makes it possible to cut material costs, and also to reduce the substrate capacity, and a manufacturing method for such a wiring board.
  • a multi-layer wiring board wherein at least one base material with wiring circuit being preliminarily formed into a predetermined outer shape is bonded to a motherboard, and the base material on the motherboards are electrically connected to each other through at least an inner via hole.
  • a second object of the present invention is to provide a multi-layer wiring board which has higher anti-bending strength (peel strength) as compared with the conventional substrate, and a manufacturing method for such a wiring board
  • a multi-layer wiring board wherein two or more substrates, each of which has been preliminarily formed into a predetermined outer shape with single-sided wiring circuit formed thereon, are laminated and bonded to a motherboard, and at least one inter-layer portion thereof is electrically connected through an inner via hole, and in this arrangement, the two or more laminated substrates, each with single-sided wiring circuit formed thereon, are positioned in a manner so as to place the outer shape of a second substrate bonded to the first substrate inside the outer shape of the first substrate being bonded to the motherboard side
  • a third object of the present invention is to provide a circuit substrate that allows double-sided packaging processes so that electronic parts can be assembled on double sides by using a single-sided circuit substrate as a core substrate (main circuit substrate), that is, as a motherboard
  • a multi-layer wiring board wherein at least one portion of an insulating base material of a main single-sided circuit substrate having a conductive pattern on one surface of the insulating substrate is partially removed so that the rear face of the conductive pattern is exposed at the removed portion, and from the other side of the insulating base material of the main single-sided circuit substrate, an electronic part is laminated with the main single-sided circuit substrate with the rear-face exposed portion of the conductive pattern of the main single-sided circuit substrate is electrically connect with the electrical part, and/or a single-sided circuit board for multi-layer wiring board having an interlayer conductive portion and a conductive pattern formed on one face of an insulating base material is laminated with the main single-sided circuit substrate with the rear-face exposed-portion of the conductive pattern is electrically connect with the single-sided circuit board for multi-layer wiring board.
  • the conventional printed wiring board that allows double-sided packaging processes uses a double-sided copper coat laminated plate (double-sided CCL) as a starting member for a relay board.
  • double-sided CCL double-sided copper coat laminated plate
  • plated through holes are used, time-consuming complex metal plating processes are required, and the thickness of a copper foil of the double-sided CCL tends to increase, causing the problem that it is difficult to form a fine pattern through chemical etching.
  • a fourth object of the present invention is to provide a multi-layer wiring board that allows double-sided packaging processes so that electronic parts can be assembled on double sides by using a base material with single-sided circuit substrate formed thereon as a starting member for a relay board, and a manufacturing method for such a multi-layer wiring board
  • a multi-layer wiring board having wiring board for partial multi-layers formed on a specific area in a relay board formed by a base material with single-sided wiring circuit, and the relay board has a conductive layer on one face of an insulating substrate, an interlayer connecting portion comprising a via hole formed on the insulating substrate and filled with a conductive substance, and an interlayer connecting portion comprising a via hole formed on the insulating resin layer, and wherein the multi-layer-use substrates are laminated on respective specific areas on the face on the side opposite to the conductive layer face of the insulating base material and the surface of the insulating resin layer with, in conductive-association with the relay board.
  • FIGS. 1A to 1 D are flow charts that show manufacturing processes of a conventional rigid flex printed wiring board.
  • FIG. 2A is a perspective view of FIGS. 1A and 1B .
  • FIG. 2B is a perspective view of the rigid flex printed wiring board shown in FIG. 1D .
  • FIG. 3 is a cross-sectional view that shows a first embodiment of a multi-layer wiring board in accordance with the present invention.
  • FIG. 4 is a plan view that shows the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 5 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 6 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 7 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 8 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 9 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIG. 10 is a cross-sectional view that shows a modified example of the first embodiment of the multi-layer wiring board in accordance with the present invention.
  • FIGS. 11A to 11 F are flow charts that show a manufacturing method for a resin base material with single-sided wiring circuit, which is used for a multi-layer wiring board in accordance with the first embodiment of the present invention.
  • FIGS. 12A to 12 C are flow charts that show a manufacturing method for the multi-layer wiring board in accordance with the first embodiment of the present invention.
  • FIGS. 13A and 13B are flow charts that show a manufacturing method for a multi-layer wiring board in accordance with a modified example of the first embodiment.
  • FIGS. 14A to 14 E are flow charts that show a manufacturing method for a multi-layer wiring board in accordance with another modified example of the first embodiment.
  • FIG. 15 is a cross-sectional view that shows a multi-layer wiring board in accordance with a second embodiment of the present invention.
  • FIG. 16 is a plan view that shows the multi-layer wiring board in accordance with the second embodiment of the present invention.
  • FIG. 17 is an explanatory drawing that schematically shows a bent state of the multi-layer wiring board in accordance with the second embodiment of the present invention.
  • FIGS. 18A to 18 F are flow charts that show a manufacturing method for a resin base material with single-sided wiring circuit, which is used for the multi-layer wiring board in accordance with the second embodiment of the present invention.
  • FIGS. 19A to 19 C are flow charts that show a manufacturing method for the multi-layer wiring board in accordance with the second embodiment of the present invention.
  • FIG. 20 is a cross-sectional view that shows a multi-layer wiring board in accordance with a third embodiment of the present invention.
  • FIG. 21 is a plan view that shows the multi-layer wiring board in accordance with the third embodiment of the present invention.
  • FIGS. 22A to 22 E are flow charts that show manufacturing processes of a motherboard that is used for the multi-layer wiring board in accordance with the third embodiment of the present invention.
  • FIG. 23 is a plan view that schematically shows the motherboard that is used for the multi-layer wiring board in accordance with the third embodiment of the present invention.
  • FIGS. 24A to 24 F are flow charts that show manufacturing processes for a single-sided circuit board for multi-layer wiring board to be used in the multi-layer wiring board in accordance with the third embodiment.
  • FIGS. 25A to 25 C are flow charts that show laminating processes of the single-sided circuit board for multi-layer wiring board in accordance with the third embodiment of the present invention.
  • FIG. 26 is a cross-sectional view that shows a modified example of the multi-layer wiring board d in accordance with the third embodiment of the present invention.
  • FIG. 27 is a cross-sectional view that shows a multi-layer wiring board in accordance with a fourth embodiment of the present invention.
  • FIG. 28 is a plan view that schematically shows the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIGS. 29A to 29 E are flow charts that show manufacturing processes for a relay board to be used in the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIG. 30 is a cross-sectional view that shows a wiring board for partial multi-layer to be used in the multi-layer wiring board in accordance with the fourth embodiment of present invention.
  • FIGS. 31A to 31 C are flow charts that show laminating processes of the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIG. 32 is a cross-sectional view that shows one embodiment of a circuit-forming transfer tape to be used in the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIGS. 33A to 33 C are flow charts that show laminating processes of the multi-layer wiring board in which the circuit-forming transfer tape for use in the multi-layer wiring board is used, in accordance with the fourth embodiment of the present invention.
  • FIG. 34 is a cross-sectional view that shows a partial multi-layer substrate for use in an outer layer, which is used for the fourth embodiment of the present invention.
  • FIGS. 35A to 35 C are flow charts that show laminating processes of the multi-layer writing substrate in which the partial multi-layer-forming substrate for use in an outer layer is used, in accordance with the fourth embodiment of the present invention.
  • FIG. 36 is a cross-sectional view that shows a modified example of the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIGS. 37A to 37 E are flow charts that show manufacturing processes of a relay board to be used in the modified example of the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIG. 38 is a cross-sectional view that shows a partial multi-layer-forming substrate to be used in the modified example of the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIGS. 39A to 39 C are flow charts that show laminating processes of a modified example of the multi-layer wiring board in accordance with the fourth embodiment of the present invention.
  • FIGS. 3 and 4 show a basic mode of a multi-layer wiring board in accordance with a first embodiment of the present invention.
  • the multi-layer wiring board of the present embodiment at a plurality of portions on the surface and rear surface of a motherboard (base material) 10 , partial wiring boards (multi-layer portions) 20 , which have outer shapes that have been preliminarily formed into predetermined shapes, and will be described later, are bonded so as to form an island shape.
  • the island shape is defined as a state in which the peripheral sides of the partial wiring boards 20 are not coincident with the peripheral sides of the motherboard 10 so that the partial wiring boards 20 are placed inside the area which is defined by the peripheral sides of the motherboard 10 .
  • the predetermined shapes are determined on the request of designing the motherboard.
  • the partial wiring boards 20 are formed as follows: a plurality of resin base materials 21 with single-sided wiring circuits accordingly, which have outer shapes that have been formed into predetermined shapes that are smaller than the outer shape of the motherboard 10 , are positioned on the surface and rear surface of the motherboard 10 , and then colaminated.
  • the partial wiring boards 20 may include resin base materials with double-sided wiring circuits
  • the motherboard 10 is provided with an insulating base material 11 and conductor layers (wiring circuits) 12 formed on the surface and rear surface of the insulating base material 11 .
  • the insulating base material 11 of the motherboard 10 is made from a flexible resin such as polyimide. Additionally, with respect to the flexible resin, other materials, such as liquid crystal polymer (LCP), polyether imide (PEI), polyether ether ketone (PEEK), polyethylene naphthalate (PEN), polyethylene terephthalate (PET) and polyether sulfone (PES), may be used.
  • LCP liquid crystal polymer
  • PEI polyether imide
  • PEEK polyether ether ketone
  • PEN polyethylene naphthalate
  • PET polyethylene terephthalate
  • PES polyether sulfone
  • the resin base material 21 with single-sided wiring circuit is provided with an insulating base material 22 , and a conductor layer (wiring circuit) 23 formed on one surface of the insulating base material 22 .
  • the insulating base material 22 of the resin base material 21 with single-sided wiring circuit may be made from a flexible resin such as polyimide.
  • the multi-layer wiring board is manufactured by layering the resin base materials 21 with single-sided wiring circuits that have outer shapes that have been formed into predetermined shapes to one portion of the surface and/or the rear surface of the motherboard 10 . More specifically, a build-up method in which the resin base materials 21 with single-sided wiring circuits are bonded to one after another sheet by sheet may be used, however, a colamination method in which a plurality of resin base materials 21 with single-sided wiring circuits, each of which has a wiring circuit and a via hole formed thereon, and has an outer shape that has been formed into a predetermined shape, are superposed on the surface or one portion of the rear surface of the motherboard 10 , and bonded to one after another by heating and pressing these through a batch process is more preferably used since it is a simpler method and can be achieved at low costs.
  • the mutual layering process between the resin base materials 21 with single-sided wiring circuits, the layering process between the resin base materials 21 with single-sided wiring circuits and the motherboard 10 can be carried out by a layering layer (not shown) being formed on an overside opposite to the conductor layer 23 of the insulating base material 22 of each of the resin base materials 21 with single-sided wiring circuits.
  • a layering layer (not shown) being formed on an overside opposite to the conductor layer 23 of the insulating base material 22 of each of the resin base materials 21 with single-sided wiring circuits.
  • the insulating base material 22 of each of the resin base materials 21 with single-sided wiring circuits is made from a material having an adhesive property, such as thermoplastic polyimide, thermoplastic polyimide to which a thermosetting property is imparted or liquid crystal polymer, the above-mentioned layering layer can be omitted.
  • electronic-component-packaging-use multi-layer-forming portions (partial wiring boards 20 ) can be freely placed on desired positions on the surface of the motherboard 10 , and it becomes possible to reduce excessive multi-layer-forming portions, and consequently to greatly cut the material costs.
  • the insulating layer (insulating base material 22 ) of the partial wiring board 20 performing as an electronic part packaging portion and the insulating layer (insulating base material 11 ) of a flex portion (motherboard 10 ) are preferably made from the same material so that the thermal and mechanical properties of the two layers are made coincident with each other, and therefore, it becomes possible to provide high reliability in thermal and mechanical properties.
  • the motherboard 10 is coated with a cover layer or a solder resist to protect the conductor layer.
  • an opening portion is preliminarily formed at a portion on which multiple layers are formed by the resin base materials 21 with single-sided wiring circuits, and the resin base materials 21 with single-sided wiring circuits may be bonded onto this opening portion.
  • a gap g is formed between the multi-layer portion (installed portion of partial wiring boards 20 ) and the covering layer 13 . And in this gap g portion, the conductor layer 12 is exposed (externally exposed state).
  • the exposed portion is coated with noble metal 15 such as gold as shown in FIG. 6 to prevent oxidation, or as shown in FIG. 7 , this portion is preferably coated with a covering layer 16 made from solder resist or the like.
  • the covering layer 16 coats one portion of the motherboard 10 and the multi-layer portions, thus, for example, in the case when the motherboard wiring board is flexible, even at the time of bending, it is possible to prevent separation occurring on the interface between the multi-layer portions and the bending portion.
  • this is achieved by integrally molding the cover layer of the motherboard 10 and the insulating layer of each resin base material 21 with single-sided wiring circuit that is made in contact with the motherboard 10 and bonded thereto from above. More specifically, the insulating layer of the resin base material 21 with single-sided wiring circuit and the cover layer of the motherboard 20 are made of the same insulating layer 17 , and these are bonded to the motherboard 10 .
  • the inner via hole 24 having a structure as shown in FIG. 10 is used as a conductive paste inner hole and an air-releasing pore 27 having a diameter smaller than that of the resin substrate portion is formed through the conductor layer 23 portion of the resin base material 21 with single-sided wiring circuit so that it is possible to prevent residual void at the time of injecting conductive paste.
  • the conductive paste is also injected into the pore 27 to prevent the pore 27 from forming a void.
  • reference numeral 26 indicates an adhesive layer.
  • the resin base material with single-sided wiring circuit of the present embodiment is not limited by the outer shape (formation position of the partial multi-layer substrates) of the motherboard, and therefore, the resin base plates with single-sided wiring circuits that have the same shape or different shapes can be formed onto the original base plate over a maximum area.
  • a polyimide base material 50 with single-sided copper foil 52 placed on one surface of a polyimide base material 51 as shown in FIG. 11A as a starting material the copper foil 52 is etched through a subtractive method so that a base material 53 on which a circuit has been formed as shown in FIG. 11B is prepared.
  • This base material may of course be obtained by using a polyimide base material without copper foil as a starting material, through an additive method or a semi-additive method.
  • an adhesive layer 54 is formed on a surface of the base material 53 with the circuit formed thereon on the overside to the copper foil 52
  • Adhesive layer 54 may of course be made of a thermosetting resin typically represented by epoxy or a thermoplastic resin such as thermoplastic polyimide.
  • the three-layer structure of the copper foil 52 , the polyimide base material 51 and the adhesive layer 54 has an asymmetrical structure with respect to the surface and the rear surface thereof so that it is preferable to prevent undesired warping from occurring in the succeeding processes after the formation of the layering layer.
  • the adhesive layer 54 is preferably set to have a glass transition temperature of not more than 110° C. and a normal-temperature elastic modulus of not more than 1300 MPa.
  • a desmear process is carried out by soft etching through plasma irradiation so that the hole 55 is filled with hole-filling-use silver paste 56 to form an IVH.
  • various metal pastes such as copper paste, carbon paste and nickel paste, may be used.
  • a press working is applied along a dot line L using a die so that an outer-shape machining process is carried to form a predetermined shape.
  • a resin base material 57 with single-sided wiring circuit as shown in FIG. 11F is formed through the outer-shape machining process.
  • the conductive paste 56 is preferably cured to have a hardness of not less than 2B on the basis of pencil hardness. Since the resin base material 57 with single-sided wiring circuit of this type can be formed without being limited by the outer shape of the motherboard 20 , it becomes possible to reduce members to be eliminated.
  • a motherboard FPC 60 has a wiring circuit 61 formed thereon and is provided with a cover layer 62 with an opening (opening portion 62 A) formed at a portion to receive laminated layers being formed on the surface thereof.
  • Two resin base materials 57 with single-sided wiring circuit having conductive paste 56 and being formed into a predetermined shape are positioned to electrically conduct the conductor layer of the motherboard or the conductor layer of the resin base material 57 with single-sided wiring circuit one another, and then superposed one another.
  • these members are subjected to heating and pressing processes with a vacuum heat pressing machine under a degree of vacuum of not more than 1 kPa so that a substrate 63 containing a Iti-1a er portion 64 as shown in FIG. 12B is formed.
  • the resin base materials 57 with single-sided wiring circuits have an outer shape that has been formed into a predetermined shape may be laminated on the motherboard sheet by sheet, or after a plurality of the resin base materials 57 with single-sided wiring circuits have been preliminarily laminated, the laminated substrates may be placed on the motherboard through the batch process.
  • the positioning process may be carried out through a pin alignment method or an image recognition method.
  • the pin alignment method requires a space used for forming a pin hole
  • the positioning process using the image recognition is preferably adopted.
  • solder resist 65 is applied onto the substrate 63 so as to cover a gap between the cover layer 62 and the multi-layer portion 64 of the motherboard FPC 60 as well as one portion of the surface of the multi-layer portion 64 and one portion of the surface of the cover layer 62 , by using a print method, and then cured to form a multi-layer wiring board 66 First Embodiment-First Modified Embodiment.
  • FIGS. 13A and 13B a manufacturing method for a multi-layer wiring board in accordance with a first modified embodiment of the first embodiment will be described below.
  • those parts corresponding to those shown in FIG. 12 are indicated by the same reference numerals as those of FIG. 12 , and the description thereof is omitted.
  • a motherboard FPC 60 has a wiring circuit 61 formed thereon, two resin base materials 57 and 70 with single-sided wiring circuits having conductive paste 56 that have been manufactured by the same method as shown in FIG. 11 are positioned to electrically connect the conductor layer of the motherboard or the conductor layer of the resin base material 57 with single-sided wiring circuit one another, and then superposed thereon.
  • the resin base material 70 with a single-sided wiring circuit which is made in contact with the circuit face of the motherboard FPC 60 , has such an outer shape that its insulating layer (polyimide base material 51 ) is allowed to cover a portion to be covered with the cover layer, such as the copper foil portion of the motherboard FPC 60 .
  • the insulating layer of the resin base material 70 is also performed as the cover layer.
  • the positioning process using the image recognition is preferably adopted.
  • these members are subjected to heating and pressing processes by a vacuum heat pressing machine under a degree of vacuum of not more than 1 kPa so that a substrate 71 as shown in FIG. 13B is formed.
  • a step difference is formed between the resin base materials 57 and 70 with single-sided wiring circuits so that it is preferable to prepare a cushioning structure for compensating for the step difference.
  • FIGS. 14A to 14 E a manufacturing method for a multi-layer wiring board in accordance with a second modified embodiment of the first embodiment will be described below.
  • FIG. 14 also, those parts corresponding to those shown in FIG. 12 are indicated by the same reference numerals as those of FIG. 12 and the description thereof is omitted.
  • a motherboard FPC 60 has a wiring circuit 61 formed thereon and is provided with a cover layer 62 with openings (opening sections 62 A and 62 B) formed at portions to receive laminated layers that is formed on the surface thereof.
  • Two layers of resin base materials 57 with single-sided wiring circuits that have an outer shape that has been formed into a predetermined shape, as shown in FIG. 9 are positioned, and then superposed thereon. Thereafter, these members are subjected to heating and pressing processes by a vacuum heat pressing machine under a degree of vacuum of not more than 1 kPa so that a first multi-layer portion 64 as shown in FIG. 14B is formed.
  • solder resist 65 is applied thereto so as to cover gaps between the cover layer 62 and the multi-layer portions 64 , 67 of the motherboard FPC 60 as well as one portion of the surface of each of the multi-layer portions 64 , 67 and one portion of the surface of the cover layer 62 , by using a print method, and then cured to form a multi-layer wiring board 68 .
  • FIGS. 15 and 16 show a second embodiment of a multi-layer wiring board in accordance with the present invention.
  • the multi-layer wiring board of the present embodiment at a plurality of portions on the surface and rear surface of a motherboard (base material) 210 , partial wiring boards (multi-layer portions) 220 , which have outer shapes that have been preliminarily formed into predetermined shapes, are bonded so as to form an island shape.
  • the island shape is defined as a state in which the peripheral sides of the partial wiring boards 220 are not coincident with the peripheral sides of the motherboard 210 so that the partial wiring boards 220 are placed inside the area determined by the peripheral sides of the motherboard 210 .
  • the predetermined shapes are determined by requirements in designing the motherboard.
  • the partial wiring boards 220 are formed as follows: a plurality of resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits accordingly, which have outer shapes that have been formed into predetermined shapes that are smaller than the outer shape of the motherboard 210 , are laminated on the surface and rear surface of the motherboard 210 in succession through a batch process.
  • the resin base materials 221 A, 221 B and 221 C have been formed into predetermined shapes so as to have decreasing its areas in succession, and therefore, when superposed one after another, the laminated resin substrates 221 A, 221 B and 221 C virtually have a pyramid shape in the cross-section thereof.
  • those shapes are formed in such a manner that, when the centers of gravity of the respective resin base materials 221 A, 221 B and 221 C are made coincident with one another, the outer sides 229 of the resin base material 221 A are not coincident with each other.
  • the outer sides 229 of the resin substrate 221 A are not made coincident with the outer sides 219 of the motherboard 10 .
  • the motherboard 210 is provided with conductor layers (wiring circuits) 212 formed on the surface and rear surface of an insulating base material 211 .
  • the insulating base material 211 of the motherboard 210 is made from a flexible resin such as polyimide. Additionally, with respect to the flexible resin, other materials, such as liquid crystal polymer (LCP), polyether imide (PEI), polyether ether ketone (PEEK), polyethylene naphthalate (PEN), polyethylene terephthalate (PET) and polyether sulfone (PES), may be used.
  • LCP liquid crystal polymer
  • PEI polyether imide
  • PEEK polyether ether ketone
  • PEN polyethylene naphthalate
  • PET polyethylene terephthalate
  • PES polyether sulfone
  • Each of the resin base materials 221 A, 221 B and 221 C with respective single-sided wiring circuits is provided with a conductor layer (wiring circuit) 223 formed on one surface of an insulating base material 222 .
  • the insulating base material 222 of each of the resin base materials 221 with single-sided wiring circuits may also be made from a flexible resin such as polyimide.
  • the insulating base material 211 of the motherboard 210 and the insulating base material 223 of each of the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits are preferably made from the same material such as polyimide from the viewpoints of thermal and mechanical influences.
  • the conductor layers 223 of the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits, as well as the conductor layers 223 of the resin base materials 221 with single-sided wiring circuits and the conductor layer 212 of the motherboard 210 , are electrically connected to each other by conductive paste 225 being filled in inner via holes (via holes) 224 respectively formed in the resin base materials 221 with respective single-sided wiring circuits.
  • This multi-layer wiring board in accordance with the second embodiment is manufactured by layering the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits that have outer shapes that have been formed into predetermined shapes to one portion of the surface and/or the rear surface of the motherboard 210 . More specifically, a build-up method in which the resin base materials 221 with single-sided wiring circuits are bonded to one after another sheet by sheet or a colamination method may be used.
  • the colamination method which has an arrangement in which the resin base materials 221 A, 221 B and 221 C with respective single-sided wiring circuits, each of which has a wiring circuit and a via hole formed thereon, and has an outer shape that has been formed into a predetermined shape, are superposed on one portion of the surface and/or the rear surface of the motherboard 210 , and bonded to one after another by heating and pressing these through a batch process, is more preferably used since it is a simpler method and can be achieved at low costs.
  • the batch laminating process can be executed, after resin base materials with single-sided wiring circuits having an outer shape that has been formed into a predetermined shape have been laminated on the motherboard sheet by sheet, or it can be executed after a plurality of the resin base materials with single-sided wiring circuits have been preliminarily laminated, and placed on the motherboard.
  • the mutual layering processes between the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits and the layering processes between the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits and the motherboard 210 can be carried out by forming a layering layer (not shown) on a surface on the side opposite to the conductor layer 223 of the insulating base material 222 of each of the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits and by using this layering layer.
  • the insulating base material 222 of each of the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits is made from a material having an adhesive property, such as thermoplastic polyimide, thermoplastic polyimide to which a thermosetting property is imparted or liquid crystal polymer, the above-mentioned layering layer can be omitted.
  • electronic-component-packaging-use multi-layer-forming portions (partial wiring boards 220 ) can be freely placed on desired positions on the surface of the motherboard 210 , and it becomes possible to reduce excessive multi-layer-forming portions, and consequently to greatly cut the material costs.
  • the insulating layer (insulating base material 222 ) of the partial wiring board 220 performing as an electronic part packaging portion and the insulating layer (insulating base material 211 ) of a flex portion (motherboard 210 ) are preferably made from the same material so that the thermal and mechanical properties of the two layers are made coincident with each other, and therefore, it becomes possible to provide high reliability in thermal and mechanical properties.
  • the resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits that have been laminated on the motherboard 10 have a pyramid shape, and therefore, when the motherboard 210 is bent as schematically shown in FIG. 17 , portions S, which are subject to stress, and located between the motherboard 210 and the resin base material 221 A with single-sided wiring circuit as well as between the laminated resin base materials 221 A, 221 B and 221 C with single-sided wiring circuits, are dispersed.
  • the resin base material with single-sided wiring circuit in accordance with the present embodiment which is not limited by the outer shape (formation position of the partial Iti-1a er substrates) of the motherboard, and makes it possible to assemble the resin base plates with single-sided wiring circuits that have the same shape or different shapes onto the base original plate over a maximum area.
  • the copper foil 252 is etched through a subtractive method so that a base material 260 having a circuit portion 253 formed thereon as shown in FIG. 18B is prepared.
  • This base material may also be obtained by using a polyimide base material without copper foil as a starting material, through an additive method or a semi-additive method.
  • an adhesive layer 254 is formed on a surface of the base material 260 with the circuit formed thereon on the overside of the circuit portion 253 .
  • a material prepared by imparting a thermosetting property to a thermoplastic polyimide a thermosetting resin typically represented by epoxy or a thermoplastic resin, such as thermoplastic polyimide, may be used.
  • the three-layer structure of the circuit portion (copper foil) 253 , the polyimide base material 251 and the adhesive layer 254 has an asymmetrical structure with respect to the surface and the rear surface thereof so that it is preferable to prevent undesired warping from occurring in the succeeding processes after the formation of the layering layer.
  • the adhesive layer 254 is preferably set to have a glass transition temperature of not more than 110° C. and a normal-temperature elastic modulus of not more than 1300 MPa.
  • a desmear process is carried out by soft etching through plasma irradiation so that the hole (via hole) 55 is filled with hole-filling-use silver paste 56 to form an NH.
  • the conductive paste 256 is provisionally cured at 60° C. to 140° C. for 0.5 to 2 hours.
  • the conductive paste 256 is cured to have a hardness of not less than 2B on the basis of pencil hardness, thereby making it possible to prevent coming off or deformation of the paste during a die-releasing process or a packaging process, which will be described later.
  • a die pressing process is applied along a dot line L so that an outer-shape machining process is carried to form a predetermined shape, thus, three resin base materials 261 A, 261 B and 261 C with single-sided wiring circuits, which have respectively different sizes (areas) that vary step by step as shown in FIG. 18 F, are formed. More specifically, the respective resin base materials 261 A, 261 B and 261 C are designed so that the outer shape of the second base material 261 B (or 261 C) bonded to the first base material is located inside the outer shape of the first base material 261 A (or 261 B) on the motherboard side.
  • a motherboard FPC 270 has wiring circuits 272 formed on both of the surfaces of a flexible insulating base material 271 and is provided with a cover layer 273 with an opening (opening section 273 A) formed at a portion to receive laminated layers that is formed on the surface thereof, resin base materials 261 A, 261 B and 261 C with single-sided wiring circuits, which have outer shapes that have been formed into predetermined shapes, are positioned in succession, and superposed into a pyramid shape.
  • a batch pressing process is carried out on the motherboard FPC 270 , the resin base materials 261 A, 261 B and 261 C by a vacuum heat pressing machine under a degree of vacuum of not more than 1 kPa so that a substrate containing a multi-layer portion 280 as shown in FIG. 19B is formed.
  • the motherboard FPC 270 the resin base materials 261 A, 261 B and 261 C are heated in the range of 150° C. to 190° C. for about one hour to carry out a main curing process on the conductive paste.
  • a positioning process using image recognition is more preferably adopted.
  • solder resist 274 is applied by using a print method in a manner so as to cover a gap between the cover layer 273 of the motherboard FPC 270 and the multi-layer portion 280 as well as one portion of the surface of the multi-layer portion 280 and one portion of the surface of the cover layer 273 , and cured thereon to form a multi-layer wiring board 290 .
  • the multi-layer wiring board is provided with a motherboard 210 having a first surface, a first base material 221 A with single-sided wiring circuit, which is bonded to the first surface, and has an outer shape that has been formed into a predetermined shape and a second base material 221 B with single-sided wiring circuit, which is bonded to the surface of the first base material, and has an outer shape that has been formed into a predetermined shape, and in this arrangement, the first base material is provided with a first inner via hole 225 that electrically connects a wiring on the motherboard to a wiring on the first base material, and the second base material is provided with a second inner via hole 225 that electrically connects a wiring on the first base material to a wiring on the second base material, and when viewed from the direction of the normal line of the motherboard, the outer shape 229 of the second base material 221 B bonded to the surface of the first base material is located inside the outer shape 229 of the first base material 221 A bonded to the first surface of the wiring board.
  • the outer shape 229 of the third base material 221 C bonded to the surface of the second base material is located inside the outer shape 229 of the second base material 221 B.
  • a first base material peripheral edge line 229 that determines the peripheral edge of the rear surface of the first base material bonded to the first surface of the motherboard is located inside a motherboard print peripheral edge line 229 that determines the peripheral edge of the motherboard, without contacting the corresponding line.
  • FIGS. 20 and 21 show a multi-layer wiring board in accordance with a third embodiment.
  • This multi-layer wiring board is characterized by having a motherboard 310 and partial multi-layer wiring boards (multi-layer portions) 320 A, 320 B, 320 C and 320 D that have island shapes and respectively laminated at a plurality of portions on the surface and rear surface of the motherboard printed substrate 310 .
  • the island shape is defined as a state in which the peripheral sides of the partial wiring boards 320 A to 320 D are not coincident with the peripheral sides of the motherboard 310 so that the partial wiring boards 320 A to 320 B are placed inside the area determined by the peripheral sides of the motherboard 310 .
  • the predetermined shapes are determined by requirements in designing the motherboard.
  • the partial multi-layer wiring boards 320 A, 320 B, 320 C and 320 D are formed as follows: a plurality of single-sided circuit board for multi-layer wiring boards 330 , which have outer shapes that have been formed into predetermined shapes that are smaller than the outer shape of the motherboard 310 , are laminated on the surface and rear surface of the motherboard 310 by a batch process.
  • each of the partial multi-layer wiring boards 320 A, 320 B, 320 C and 320 D has a two-layer structure.
  • Each of the single-sided circuit board for multi-layer wiring boards 330 has an insulating base material 331 , a conductive pattern 332 formed on one surface of the insulating base material 331 , a layering layer 333 bonded to the other surface of the insulating base material 331 and an interlayer conductive portion 334 prepared as an inner via hole formed in a manner so as to penetrate the insulating base material 331 and the layering layer 333 .
  • the single-sided circuit board for multi-layer wiring board 330 may be prepared as either a rigid printed wiring board made from a material such as a phenol-based resin and an epoxy-based resin, or a flexible printed wiring board made from a material such as a polyester-based resin and a polyimide-based resin.
  • the layering layer 333 may be omitted.
  • the surface of the single-sided circuit board for multi-layer wiring board 330 performing as the outermost layer is coated with solder resist 335 .
  • the single-sided circuit board for multi-layer wiring board 330 performing as the outermost layer of each of the partial multi-layer wiring boards 320 A, 320 B, 320 C and 320 D is provided with an electronic part 350 packaged thereon through a bump 351 .
  • a bump 351 it is possible to provide a double-sided multi-layer/double-sided packaging circuit substrate.
  • the motherboard 310 is prepared as a main single-sided circuit substrate having a conductive pattern 312 formed on one surface of an insulating base material 311 .
  • a conductive pattern 312 formed on one surface of an insulating base material 311 .
  • at least one portion (two portions in this embodiment) of the insulating base material 311 is partially removed with the rear surface of the conductive pattern 312 being exposed at the removed portion 319 of the insulating base material 311 .
  • the single-sided circuit board for multi-layer wiring boards 330 of partial multi-layer wiring boards 320 C and 320 D are laminated in a manner so as to be conduction-connected to a rear-surface exposure portion 312 B of the conductive pattern 312 to form the partial multi-layer wiring boards 320 C and 320 D.
  • the single-sided circuit board for multi layer wiring boards 330 of the partial multi-layer wiring boards 320 A and 320 B are laminated on one surface (surface) of the insulating base material 311 in a manner so as to be electrically connected to a surface exposure portion 312 A of the conductive pattern 312 to form the partial multi-layer wiring boards 320 A and 320 B.
  • the motherboard 310 may also be prepared as either a rigid printed wiring board made from a material such as phenol-based resin and an epoxy-based resin, or a flexible printed wiring board made from a material such as a polyester-based resin and a polyimide-based resin.
  • the surface of the motherboard 310 is coated with a cover layer 318 . Moreover, a gap portion between the cover layer 318 and the partial multi-layer wiring boards 320 A and 320 B is filled with solder resist 317 applied thereto.
  • FIGS. 22A to 22 E show manufacturing processes of the motherboard 310 .
  • a general-use single-sided copper coat polyimide base material (single-sided conductor coat lamination plate) 360 is used as a starting material.
  • the single-sided copper coat polyimide base material 360 is a single-sided copper coat lamination plate (CCL) having copper foil 3 16 placed as a conductor layer on only one of the surfaces of the insulating base material 311 made of a polyimide film.
  • CTL copper coat lamination plate
  • polyimide is selected as the insulating base material from the viewpoints of heat resistance and dielectric properties of the substrate, and other substrates such as a steel coat phenol substrate, a copper coat paper epoxy substrate, a steel coat paper polyester substrate, a copper coat glass epoxy substrate and a copper coat glass polyimide substrate, composed of a base material made from base material, such as glass cloth, glass mat and synthetic fibers, and a thermosetting resin, may be used.
  • a copper coat polyester substrate, a copper coat polyether imide substrate and a copper coat liquid crystal polymer substrate may be used.
  • etching resist is laminated on a copper foil 316 of the single-sided copper coat polyimide base material 360 , and this is subjected to exposure to form a wiring pattern thereon, and then developed. Thereafter, the exposed copper is etched through a cupric chloride bath to form a conductive pattern 312 . Subsequently, the etching resist is removed so that a single-sided circuit substrate 361 , shown in FIG. 22B , is formed.
  • a cover layer 318 which has a portion (surface-side multi-layer portion) 314 for receiving laminated single-sided circuit board for multi-layer wiring boards 330 preliminarily formed therein as an opening, is placed in order to protect the conductive pattern 312 .
  • solder resist and the like may be used.
  • etching resist 362 is laminated on both of the surfaces of the single-sided circuit substrate 361 , and the copper foil side (surface side) is entirely subjected to exposure, and the polyimide side (rear surface side) is subjected to exposure to form an opening pattern, and then developed.
  • the insulating base material 311 made from polyimide is etched by using oxygen plasma or a strong alkali aqueous solution.
  • the etching resist 362 is removed.
  • the insulating base material 311 of the single-sided circuit substrate 361 is partially removed over a predetermined area so that a motherboard 310 in which the rear surface 3 12 B of the conductive pattern 312 is exposed to the removed portion (rear-surface-side multi-layer portion) 319 of the insulating substrate 311 is formed.
  • the insulating base material removing process for forming the removed portion 319 in the insulating base material 311 may also be carried out by a laser process which applies a laser beam from the rear surface side of the insulating base material 311 .
  • FIG. 23 is a schematic plan view that shows the motherboard 310
  • FIG. 22E is a cross-sectional view taken along line XXII-XXII in FIG. 23 .
  • a general-use single-sided copper coat polyimide base material (single-sided conductor coat lamination plate) 370 is prepared as a starting material.
  • the single-sided copper coat polyimide base material 370 which is the same as the single-sided copper coat polyimide base material 360 for use in the motherboard 310 , is a single-sided copper coat lamination plate (CCL) having copper foil 336 placed as a conductor layer on only one of the surfaces of the insulating base material 331 made of a polyimide film.
  • CCL copper coat lamination plate
  • the insulating base material 311 of the motherboard 310 and the insulating base material 331 of the single-sided circuit board for multi-layer wiring board 330 are preferably made from the same material from the viewpoints of thermal and mechanical properties.
  • the copper foil 336 of the single-sided copper coat polyimide base material 370 is etched in the same manner as the forming process of the motherboard to form a conductive pattern 332 .
  • thermoplastic polyimide is joined to the surface of the insulating base material 331 on the side opposite to the conductive pattern 332 by using a heat pressing machine to form a layering layer 333 .
  • a layering layer 333 other materials, such as phenolic resin, phenoxy resin, polyimide resin and xylene resin, or mixed resin of two of more kinds of these, polyether imide resin, liquid crystal polymer and polyamide resin, may be used.
  • a laser beam is applied from the layering layer 333 side to a desired position to be used for interlayer connection, to penetrate the insulating base material 331 and the layering layer 333 , thereby forming a hole (via hole) 337 that contacts the copper foil (conductive pattern 332 ).
  • thermosetting silver paste is embedded and injected into the hole 337 through a print method or the like to form an interlayer conductive portion 334 .
  • materials such as gold, copper, nickel or carbon powder, or a conductive composition prepared by mixing alloy powder or mixed powder of these and a binder component such as phenolic resin, polyester resin, epoxy resin and polyimide resin, can be used.
  • a print method using a metal mask a print method using a masking film and an injecting method using a dispenser can be used.
  • the lamination base material 371 on which the silver paste has been printed is heated in an oven so that the silver paste is dried.
  • the lamination base material 371 is pressed by using a die to form an outer shape thereof that is smaller than the outer shape of the motherboard 310 as indicated by dot line C.
  • a single-sided circuit board for multi-layer wiring boards 330 having a desired size is prepared.
  • the size thereof is set to virtually the same size of these openings or a size slightly smaller than these openings.
  • a plurality of the single-sided circuit board for multi-layer wiring boards 330 , manufactured through the above-mentioned processes, are prepared.
  • a predetermined number of the single-sided circuit board for multi-layer wiring boards 330 are respectively positioned on the surface-side multi-layer portions 314 on the conductive pattern 3 12 side (surface side) of the motherboard 310 and the respective removed portions 3 19 on the rear-surface side of the insulating base material 3 11 .
  • the respective members are superposed, and heated and pressed by a vacuum pressing machine so that a double-sided lamination circuit substrate 380 , as shown in FIG. 25B , is formed.
  • a positioning process using image recognition is more preferably adopted.
  • pieces of solder resist 317 and 335 are applied by using a print method in a manner so as to cover a gap between the cover layer 318 of the motherboard 3 10 and the multi-layer portion as well as one portion of the surface of the multi-layer portion, and cured thereon.
  • the conductive pattern 332 exposed so as to package an electronic part, is coated with noble metal 338 such as gold to form a multi-layer wiring board that allows double-sided packaging processes.
  • the above-mentioned circuit substrate has the following features and effects.
  • the single-sided wiring board can be used as the motherboard 310 , that is, the main single-sided circuit substrate. Therefore, different from the case using the double-sided circuit substrate, it is not necessary to remove most of the conductor layer on one surface upon formation of the conductive pattern, thereby making it possible to reduce wasteful use of materials and resources. Moreover, it is not necessary to provide complex manufacturing processes for forming through holes and the like.
  • the single-sided wiring board is used as the motherboard 310 . Therefore, in the case when the motherboard 310 is a flexible substrate, portions having no multi-layer structure are allowed to have a high bending property so that it is possible to provide a high-density double-sided partial multi-layer wiring board having a superior bending property.
  • the partial multi-layer wiring board that is, the in single-sided circuit board for multi-layer wiring board 330
  • those substrates that are formed to have outer shapes corresponding to the sizes of the partial multi-layer wiring portions are used. Therefore, in comparison with a case in which: those substrates corresponding to the partial multi-layer wiring portions are also prepared to have the same size as that of the motherboard 310 , and upon forming the outer shape of the motherboard 310 , each substrate is punched out to have the same outer shape as the motherboard 310 , it is possible to reduce the quantity of materials for the multi-layer wiring board-use one-side circuit substrate 330 , and consequently to cut wasteful use of materials.
  • the circuit substrate of the present invention may have an arrangement in which as shown in FIG. 26 , a flip-chip-type electronic part 350 may be directly packaged onto the conductive pattern 312 of the motherboard 310 and the removed portion 3 19 of the insulating base material 311 .
  • the packaging process of the electronic part 350 onto the removed portion 319 of the insulating base material 311 is carried out while being conduction-connected to the rear-face exposed portion 312 B of the conductive pattern 312 .
  • FIGS. 27 and 28 show the fourth embodiment of a multi-layer wiring board in accordance with the present invention.
  • This multi-layer wiring board is provided with a relay board 410 such as a motherboard wiring board and partial multi-layer portions 420 A and 420 B formed by respectively laminating partial multi-layer substrates 430 at specific portions on the surface and rear surface of the relay board 410 .
  • the relay board 410 is constituted by a base material with single-sided wiring circuit that is provided with a conductor layer (including a conductor land portion) 412 forming a wiring pattern, which is formed on one surface (upper surface 410 A) of an insulating base material 411 that is compatibly used as an adhesive layer.
  • a conductor layer including a conductor land portion
  • an insulating base material 411 that is compatibly used as an adhesive layer.
  • thermosetting polyimide, thermoplastic polyimide, thermoplastic polyimide to which a thermosetting property is imparted, liquid crystal polymer, epoxy resin and the like can be used.
  • an insulating resin layer 413 which also performs as an adhesive layer, is formed on the conductor layer surface (upper surface 410 A) forming the wiring pattern of the insulating board 411 .
  • the insulating resin layer 413 and the insulating board 411 may be made of the same material.
  • interlayer conductive portions 415 and 417 formed by via holes 414 and 416 are respectively formed in the insulating base material 411 and the insulating resin layer 413 .
  • the interlayer conductive portions 415 and 417 are constituted by the via holes 414 and 416 in which conductive paste is embedded and injected.
  • wiring board for partial multi-layers 430 having outer shapes that have been preliminarily formed into a predetermined shape are laminated in conductive-association with the conductor layer 412 forming the wiring pattern of the relay board 410 through the interlayer conductive portion 415 or 417 .
  • the wiring board for partial multi-layer 430 is also constituted by a base material with single-sided wiring circuit that is provided with a conductor layer (including a conductor land portion) 432 forming a wiring pattern, which is formed on one surface of an insulating base material 431 that is compatibly used as an adhesive layer.
  • an interlayer conductive portion 434 is formed in the insulating base material 431 through a via hole 433 .
  • the interlayer conductive portion 434 is also constituted by the via hole 433 in which conductive paste is embedded and injected.
  • the wiring board for partial multi-layer 430 With respect to the wiring board for partial multi-layer 430 , on the upper surface 410 A side of the relay board 410 , that is, on the partial multi-layer portion 420 A, a plurality of them are laminated with the conductor layer 432 forming a wiring pattern facing down, and on the rear-surface 410 B side of the relay board 410 , that is, on the partial multi-layer portion 420 B, a plurality of them are laminated with the conductor layer 432 forming a wiring pattern facing up, thus, these layers are bonded by the insulating base material 411 , the insulating resin layer 413 or the insulating base material 431 , which serve as adhesive layers between layers.
  • the wiring board for partial multi-layers 430 are laminated on the upper side and the lower side of the relay board 410 with the conductor layer 432 side thereof forming a wiring pattern facing the relay board 410 side.
  • a conductor layer 435 forming a wiring pattern and a component-packaging-use conductor land portion 436 are formed.
  • a partial multi-layer structure is prepared at desired portions on both of the surface and rear surface of the relay board 410 , thereby allowing double-sided packaging processes.
  • the wiring board for partial multi-layer 430 having an outer shape that has been preliminarily formed into a predetermined shape, it becomes possible to eliminate the necessity of preparing excessive multi-layer portions, and consequently to cut the number of processes and the material costs.
  • FIGS. 29A to 3 1 a manufacturing method for a substrate with a circuit that is used for a multi-layer wiring board in accordance with the present embodiment will be described below.
  • FIGS. 29A to 29 E show manufacturing processes of a relay board 410 .
  • a general-use single-sided copper coat polyimide base material (single-sided conductor coat lamination plate) 450 is used as a starting material.
  • the single-sided copper coat polyimide base material 450 is a single-sided copper coat lamination plate (CCL) having copper foil 451 placed as a conductor layer on only one of the surfaces of the insulating base material 411 made of a polyimide film that exerts a layering property when heated.
  • a lamination plate in which a polyimide base material without copper foil is used as a starting material and a conductor layer is formed through an additive method or a semi-additive method may also be used.
  • etching resist is laminated on the copper foil 451 of the single-sided copper coat polyimide base material 450 , and this is subjected to exposure to form a wiring pattern thereon, and then developed. Thereafter, the exposed copper is etched through a cupric chloride bath to form a conductor layer (conductive pattern) 412 . Subsequently, the etching resist is removed so that a substrate with single-sided circuit 452 , shown in FIG. 29B , is formed.
  • an insulating resin layer 413 which also performs as an adhesive layer, is formed on the conductor layer surface (upper surface 410 A) being formed as a wiring pattern of the insulating base material 411 .
  • the insulating resin layer 413 may be formed by a polyimide film that is the same material as the insulating base material 411 , thus, by using the film-shaped material, a layering process can be carried out on the upper surface 410 A of the insulating base material 411 by using a contact-layering process, a laminating process or a vacuum laminating process through heat pressing or vacuum heat pressing.
  • the insulating resin layer 413 may also be formed through a coating process such as a curtain coating process and a spin coating process by using a precursor varnish of a resin material.
  • a UV-YAG laser beam, a carbon dioxide laser beam or the like is applied to a desired position to be used for interlayer connection from the insulating base material 411 side to form a via hole 414 that penetrates the insulating base material 11 to contact the rear surface of copper foil (conductor layer 412 forming a wiring pattern).
  • a UV-YAG laser beam, a carbon dioxide laser beam or the like is applied to a desired position to be used for interlayer connection from the insulating resin layer 413 side to form a via hole 416 that penetrates the insulating resin layer 413 to contact the upper surface of copper foil (conductor layer 412 forming a wiring pattern).
  • the via holes 414 and 416 may be formed by forming etching resist having a pattern on the insulating base material 411 and the insulating resin layer 413 and by etching the insulating base material 411 and the insulating resin layer 413 .
  • thermosetting silver paste 418 and 419 are embedded and injected into the via holes 414 , 416 as conductive paste through a print method or the like to form interlayer conductive portions 415 , 417 .
  • a relay board 410 is formed.
  • the conductive paste to be embedded and injected in the via holes 414 and 416 besides silver paste, conductive paste and the like including copper paste and conductive filler having copper powder coated with silver may be used.
  • the conductive layer 412 forming the wiring pattern except for the interlayer conductive portions 415 and 417 , is coated with the insulating resin layer 413 , and therefore it is possible to omit the process for placing the cover layer for protecting the conductor layer 412 forming the wiring pattern.
  • FIG. 30 shows a wiring board for partial multi-layer 430 .
  • the wiring board for partial multi-layer 430 is formed by the following processes: A general-use single-sided copper coat polyimide base material that is the same as the starting material of the relay board 410 is used as a starting material, a conductor layer 432 forming a wiring pattern is formed through etching, a via hole 433 is formed through a laser process or the like, and an interlayer conductive portion 434 is formed by embedding and injecting silver paste 437 in the via hole 433 .
  • the wiring board for partial multi-layer 430 is subjected to an outer-shape forming process (press punching process) and allowed to have a predetermined shape corresponding to the plane shape of the partial multi-layer portions 420 A and 420 B.
  • FIG. 31 show lamination processes of the wiring board for partial multi-layer 430 manufactured through the above-mentioned processes.
  • predetermined numbers of wiring board for partial multi-layers 430 having outer shapes that have been formed into predetermined shapes are respectively positioned at specific areas on the upper surface 413 A of the insulating resin layer 413 and the rear surface 410 B of the insulating base material 411 of the relay board 410 by using alignment marks, reference holes, circuit patterns or the like (not shown), and then superposed, and upper-surface and rear-surface outer-most-layer-use copper foils 437 are respectively placed on the surfaces 430 A of the insulating base materials 431 on the upper side (surface side) and the lower side (rear-surface side).
  • the wiring board for partial multi-layers 430 are laminated with the conductive layer 432 side forming a wiring pattern facing the relay board 410 side.
  • above members are heated and contact-bonded under a high temperature and a high pressure by using a vacuum cure pressing machine or a cure pressing machine so that a batch multi-layer-forming process is carried out.
  • the conductor layer 435 forming the wiring pattern on the outermost layer and the component-packaging-use conductor land portions 436 may also be formed by using a circuit-forming transfer tape 460 as shown in FIG. 32 .
  • the circuit-forming transfer tape 460 is formed on one surface of a carrier film 461 in a manner so as to allow the conductor layer 435 forming the wiring pattern and the component-packaging-use conductor land portions 436 to be separated therefrom through etching or the like.
  • the circuit-forming transfer tape 460 is placed and positioned on the surfaces 430 A of the respective insulating base materials 431 on the upper side (surface side) and lower side (rear-surface side), with the conductor layer 435 forming the wiring pattern and the component-packaging-use conductor land portions 436 being located on the surface 430 A side of the insulating base material 431 .
  • the carrier film 461 is removed as shown in FIG. 33C .
  • a multi-layer wiring board having the same properties as those of the aforementioned embodiments is provided.
  • the conductor layer 435 forming the wiring pattern on the outermost layer and the component-packaging-use conductor land portions 436 are pushed into the insulating base material 431 of the wiring board for partial multi-layer 430 through curing as shown in FIG. 33C . Therefore, it is possible to obtain smooth surface layers of the partial multi-layer portions 420 A and 420 B.
  • FIGS. 34 and 35 show the other multi-layer forming processes in accordance with the present embodiment.
  • a conductor layer forming a wiring pattern of the outermost layer, placed on one surface of the insulating base material 471 , and an outermost-layer-use wiring board for partial multi-layer 470 formed by etching the component-packaging-use conductor land portions 472 are used.
  • the outermost-layer-use wiring board for partial multi-layer 470 has an outer shape that has been formed into a predetermined shape in the same manner as the multi-layer-use substrate 430 , however, this has no interlayer conductor portions.
  • the outer-layer-use wiring board for partial multi-layer 470 is placed and positioned on the surfaces 430 A of the respective insulating base materials 43 1 on the upper side (surface side) and lower side (rear-surface side), with the conductor layer forming the wiring pattern and the component-packaging-use conductor land portions 472 being located on the surface 430 A side of the insulating base material 431 , and subjected to a colamination process as shown in FIG. 35B .
  • component-packaging-use contact holes 473 which penetrate the insulating base material 471 to be opened to communicate with the conductor land portion 472 , are formed at predetermined positions of the surface and rear-surface respective outer-layer-use wiring board for partial multi-layers 470 .
  • a multi-layer wiring board having partial multi-layer portions 420 A and 420 B is completed.
  • the formation of the contact hole 473 is carried out by using an etching process in which only the insulating base material 471 is fused by etchant, with predetermined portions other than the contact-hole opening portions being protected by chemical resistant resist.
  • the contact holes 473 may be formed through a laser process using UV-YAG laser, carbon dioxide laser or the like.
  • the conductor layer forming a wiring pattern on the surfaces of the partial multi-layer portions 420 A and 420 B is coated with the insulating base material 471 , and therefore it is not necessary to separately prepare a cover layer for protecting the conductor layer forming the wiring pattern on the surfaces of the partial multi-layer portions 420 A and 420 B.
  • the component-packaging-use conductor land portions 472 are pushed into the insulating base material 431 of the wiring board for partial multi-layer 430 as shown in FIG. 33C . It is, therefore, possible to provide smooth surface layers of the partial multi-layer portions 420 A and 420 B.
  • FIG. 36 shows another embodiment of a multi-layer wiring board in accordance with the present invention.
  • This multi-layer wiring board is provided with a relay board 4110 such as a motherboard wiring board, and partial multi-layer portions 4120 A and 4120 B formed by respectively laminating partial multi-layer substrates 4130 at specific portions on both of the surface and rear-surface of the relay board 4110 .
  • the relay board 4110 is comprised of a base material with single-sided wiring circuit that is provided with a conductor layer (including a conductor land portion) 4112 performing as a wiring pattern, which is formed on one surface (upper surface 4110 A) of an insulating base material 4111 that is made from polyimide or the like.
  • An interlayer bonding layer 4141 is formed on the other surface of the insulating base material 4111 so that the insulating layer is allowed to have a two-layer structure with the insulating base material 4111 and the interlayer bonding layer 4141 .
  • thermosetting polyimide, thermoplastic polyimide, thermoplastic polyimide to which a thermosetting property is imparted, liquid crystal polymer, epoxy resin and the like can be used.
  • an insulating resin layer 4113 which also performs as an interlayer bonding layer, is formed.
  • the insulating resin layer 4113 may be formed the same material as the material of the interlayer bonding layer 4141 .
  • interlayer conductive portions 4115 and 4117 formed by via holes 4114 and 4116 are respectively formed in the insulating base material 4111 , the interlayer bonding layer 4141 and the insulating resin layer 4113 .
  • the interlayer conductive portions 4115 and 4117 are constituted by the via holes 4114 and 4116 in which conductive paste is embedded and injected.
  • wiring board for partial multi-layers 4130 having outer shapes that have been preliminarily formed into predetermined shapes are laminated in conductive-association with the conductor layer 4112 forming the wiring pattern of the relay board 4110 through the interlayer conductive portion 4115 or 4117 .
  • the wiring board for partial multi-layer 4130 is also comprised of a base material with single-sided wiring circuit that is provided with a conductor layer (including a conductor land portion) 4132 forming a wiring pattern, which is formed on one surface of an insulating base material 4131 .
  • An adhesive layer 4142 is formed on the other surface of the insulating base material 4131 .
  • an interlayer conductor portion 4134 is formed in the insulating base material 4131 and the adhesive layer 4142 through a via hole 4133 .
  • the interlayer conductive portion 4134 is also constituted by the via hole 4133 in which conductive paste is embedded and injected.
  • the wiring board for partial multi-layer 4130 With respect to the wiring board for partial multi-layer 4130 , on the upper surface 4113 A side of the relay board 4110 , that is, on the partial multi-layer portion 4120 A, a plurality of them are laminated with the conductor layer 4132 forming a wiring pattern facing down, and on the rear-surface 4110 B side of the relay board 4110 , that is, on the partial Iti-1a er portion 4120 B, a plurality of them are laminated with the conductor layer 4132 forming a wiring pattern facing up, thus, these layers are bonded by the adhesive layers 4141 and 4142 or the insulating resin layer 4113 , which are located between layers.
  • the wiring board for partial multi-layers 4130 are laminated on the upper side and the lower side of the relay board 4110 with the conductor layer 4132 side thereof forming a wiring pattern facing the relay board 4110 side.
  • a conductor layer 4135 forming a wiring pattern and a component-packaging-use conductor land portion 4136 are formed.
  • a partial multi-layer structure is prepared at desired portions on both of the surface and rear surface of the relay board 4110 , thereby allowing double-sided packaging processes.
  • the wiring board for partial multi-layer 4130 having an outer shape that has been preliminarily formed into a predetermined shape. It becomes possible to eliminate the necessity of preparing excessive multi-layer portions, and consequently to cut the number of processes and the material costs.
  • FIGS. 37A to 37 E show manufacturing processes of a relay board 4110 .
  • a general-use single-sided copper coat polyimide base material (single-sided conductor coat lamination plate) 4150 is used as a starting material.
  • the single-sided copper coat polyimide base material 4150 is a single-sided copper coat lamination plate (CCL) having copper foil 4151 placed as a conductor layer on only one of the surfaces of the insulating base material 4111 made of a polyimide film.
  • CTL single-sided copper coat lamination plate
  • etching resist is laminated on the copper foil 4151 of the single-sided copper coat polyimide base material 4150 , and this is subjected to exposure to form a wiring pattern thereon, and then developed. Thereafter, the exposed copper is etched through a cupric chloride bath to form a conductor layer (conductive pattern) 4112 . Subsequently, the etching resist is removed so that a substrate with single-sided circuit 4152 , shown in FIG. 37B , is formed.
  • an interlayer bonding layer 4141 is formed, and on the conductor layer surface (upper surface 4110 A) forming a wiring pattern of the insulating base material 4111 , an insulating resin layer 4113 which also performs as an adhesive layer, is formed.
  • the insulating resin layer 4113 may be formed by a thermoplastic polyimide or the like, thus, by using the film-shaped material, a layering process can be carried out on the upper surface 4110 A of the insulating base material 4111 by using a contact-layering process, a laminating process or a vacuum laminating process through heat pressing or vacuum heat pressing. Moreover, the insulating resin layer 4113 may also be formed through a coating process such as a curtain coating process and a spin coating process by using a precursor varnish of a resin material.
  • a UV YAG laser beam a carbon dioxide laser beam or the like is applied to a desired position to be used for interlayer connection from the interlayer bonding layer 4141 side to form a via hole 4114 that penetrates the interlayer bonding layer 4141 and the insulating base material 4111 to contact the rear surface of copper foil (conductor layer 4112 forming a wiring pattern).
  • a UV-YAG laser beam, a carbon dioxide laser beam or the like is applied to a desired position to be used for interlayer connection from the insulating resin layer 4113 side to form a via hole 4116 that penetrates the insulating resin layer 4113 to contact the upper surface of copper foil (conductor layer 4112 forming a wiring pattern).
  • thermosetting silver paste 4118 and 4119 are embedded and injected into the via holes 4114 and 4116 through a print method or the like to form interlayer conductive portions 4115 and 4117 .
  • a relay board 4110 is formed.
  • FIG. 38 shows a wiring board for partial multi-layer 4130 .
  • the wiring board for partial multi-layer 4130 is formed by the following processes: A general-use single-sided copper coat polyimide base material that is the same as the starting material of the relay board 4110 is used as a starting material, a conductor layer 4132 forming a wiring pattern is formed through etching, a via hole 4133 is formed through a laser process or the like, and an interlayer conductive portion 4134 is formed by embedding and injecting silver paste 4137 in the via hole 4133 .
  • the wiring board for partial multi-layer 4130 is subjected to an outer-shape forming process (press punching process) and allowed to have a predetermined shape corresponding to the plane shape of the partial multi-layer portions 4120 A and 4120 B.
  • FIG. 39 shows lamination processes of the wiring board for partial multi-layer 4130 manufactured through the above-mentioned processes.
  • predetermined numbers of wiring board for partial multi-layers 4130 having outer shapes that have been formed into predetermined shapes are respectively positioned at specific areas on the upper surface 4113 A of the insulating resin layer 4113 and the rear surface 4110 B of the insulating base material 4111 of the relay board 4110 by using alignment marks, reference holes, circuit patterns or the like (not shown), and then superposed one another.
  • upper-surface and rear-surface outer-most-layer-use copper foils 4137 are respectively placed on the surfaces 4130 A of the adhesive layer 4142 on the upper side (surface side) and the lower side (rear-surface side).
  • the wiring board for partial multi-layers 4130 are laminated with the conductive layer 4132 side forming a wiring pattern facing the relay board 4110 side.
  • this is heated and contact-bonded under a high temperature and a high pressure by using a vacuum cure pressing machine or a cure pressing machine so that a batch multi-layer-forming process is carried out.
  • the conductor layer 4135 forming the wiring pattern on the outermost layer and the component-packaging-use conductor land portions 4136 may be formed by using a circuit-forming transfer tape that is the same as the circuit-forming transfer tape 460 shown in FIGS. 32 and 33 .
  • a structure in which component-packaging-use contact holes are formed in the outer-layer-use wiring board for partial multi-layer may be prepared.
  • At least one base material having a wiring circuit that has been preliminarily formed into a predetermined outer shape is bonded to a motherboard, and these are electrically connected to each other through at least an inner via hole.
  • the outer shape of the base material having a wiring circuit is made smaller than the outer shape of the motherboard with the base material, having a wiring circuit having an island shape on the motherboard. Therefore, it becomes possible to provide a higher design freedom for wiring, and consequently to cut material costs and achieve a reduction in the substrate capacitance.
  • At least one base material with single-sided wiring circuit that has been preliminarily formed into a predetermined outer shape is bonded to a motherboard, and these are electrically connected to each other at least one portion through an inner via hole.
  • the outer shape of the base material with single-sided wiring circuit is made smaller than the outer shape of the motherboard with the base material, having a wiring circuit having an island shape on the motherboard. Therefore, it becomes possible to provide a higher design freedom for wiring, and consequently to cut material costs and achieve a reduction in the substrate capacitance.
  • the base material with single-sided wiring circuit laminated on the motherboard is positioned so that an outer shape of a second base material bonded to the first base material is located inside the outer shape of the first base material on the motherboard side, and is allowed to have a pyramid shape, and therefore, upon bending the motherboard, stress imposed between the motherboard and the substrate with single-sided wiring circuit as well as between the laminated substrates with single-sided wiring circuit can be dispersed and alleviated. Therefore, it becomes possible to provide high anti-bending strength (peel strength), and consequently to achieve a good bending property that is a feature of the multi-layer flexible printed wiring board (FPC).
  • peel strength anti-bending strength
  • At least one portion of the insulating base material of the main single-sided circuit substrate is partially removed, and the rear surface of a conductive pattern is exposed at the removed portion, and from the other side of the insulating base material of the main single-sided circuit substrate, an electronic part is assembled in a state in which it is conduction-connected to the rear-face exposed portion of the conductive pattern, and/or a single-sided circuit board for multi-layer wiring board having an interlayer conductive portion and a conductive pattern formed on one face of an insulating base material is laminated in a state in which it is conduction-connected to the rear-face exposed-portion of the conductive pattern.
  • an electronic part is assembled and/or a single-sided circuit board for multi-layer wiring board is laminated so that it is possible to provide a circuit substrate that allows double-sided packaging processes.
  • an insulating resin layer which also serves as an adhesive layer, is formed on the conductor layer surface side of a relay board, and an interlayer conductive portion derived from a conductive substance injected into a via hole formed in an insulating base material and an interlayer conductive portion derived from a conductive substance injected into a via hole formed in the insulating resin layer are prepared; therefore, even when a lamination material having a conductive layer such as copper foil only on one surface of the insulating base material is used as a starting material, it is possible to partially prepare a multi-layer structure at a desired portion on both of the surface and rear surface of the relay board, and consequently to allow double-sided packaging processes.

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US10/542,649 2003-01-20 2003-12-19 Multilayer printed wiring board and process for producing the same Abandoned US20060180344A1 (en)

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JP2003-11635 2003-01-20
JP2003011635A JP4195619B2 (ja) 2003-01-20 2003-01-20 多層配線板およびその製造方法
JP2003-294994 2003-08-19
JP2003294994A JP2005064357A (ja) 2003-08-19 2003-08-19 多層配線板およびその製造方法
JP2003309254A JP2005079402A (ja) 2003-09-01 2003-09-01 回路基板およびその製造方法
JP2003-309254 2003-09-01
JP2003-342907 2003-10-01
JP2003342907A JP2005109299A (ja) 2003-10-01 2003-10-01 多層配線板およびその製造方法
PCT/JP2003/016377 WO2004066697A1 (ja) 2003-01-20 2003-12-19 多層配線板およびその製造方法

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Cited By (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060225914A1 (en) * 2005-04-12 2006-10-12 Au Optronics Corp. Double sided flexible printed circuit board
US20070074903A1 (en) * 2005-08-24 2007-04-05 Citizens Electronic Co., Ltd. Key sheet module
US20070081309A1 (en) * 2005-08-31 2007-04-12 Sony Corporation Circuit substrate
US7246434B1 (en) * 2004-10-11 2007-07-24 Pericom Semiconductor Corp. Method of making a surface mountable PCB module
US20080047737A1 (en) * 2006-07-28 2008-02-28 Dai Nippon Printing Co., Ltd. Multilayered printed wiring board and method for manufacturing the same
US20080289859A1 (en) * 2004-06-10 2008-11-27 Ibiden Co., Ltd. Flex-Rigid Wiring Board and Manufacturing Method Thereof
US20090020317A1 (en) * 2007-07-17 2009-01-22 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US20090038836A1 (en) * 2007-07-17 2009-02-12 Ibiden, Co., Ltd. Wiring board and method of manufacturing wiring board
US20090038838A1 (en) * 2007-08-08 2009-02-12 Phoenix Precision Technology Corporation Circuit board and method for fabricating the same
US20090130393A1 (en) * 2007-11-21 2009-05-21 Fujitsu Limited Electronic apparatus and method of manufacturing the same
US20090126974A1 (en) * 2005-09-30 2009-05-21 Maroshi Yuasa Manufacturing Process for a Prepreg with a Carrier, Prepreg with a Carrier, Manufacturing Process for a Thin Double-Sided Plate, Thin Double-Sided Plate and Manufacturing Process for a Multilayer-Printed Circuit Board
US20090135574A1 (en) * 2007-11-22 2009-05-28 Shinko Electric Industries Co., Ltd. Wiring board, semiconductor device having wiring board, and method of manufacturing wiring board
US20090175017A1 (en) * 2007-05-29 2009-07-09 Panasonic Corporation Circuit board and manufacturing method thereof
US20100014265A1 (en) * 2008-07-16 2010-01-21 Ibiden Co., Ltd Flex-rigid wiring board and electronic device
US20100122838A1 (en) * 2008-11-19 2010-05-20 Sony Corporation Mount board and semiconductor module
US20100193223A1 (en) * 2009-01-30 2010-08-05 Continental Automotive Gmbh Solder resist coating for rigid-flex circuit boards and method of producing the solder resist coating
US20100208436A1 (en) * 2007-09-19 2010-08-19 Dieter Cremer Multilayer Circuit Board and Use of a Multilayer Circuit Board
US20110132654A1 (en) * 2009-12-07 2011-06-09 Fujitsu Limited Multilayer printed circuit board, method for manufacturing the same, and electronic apparatus
US20110194262A1 (en) * 2010-02-05 2011-08-11 Ibiden, Co., Ltd. Flex-rigid wiring board and method for manufacturing the same
US20120012371A1 (en) * 2009-04-02 2012-01-19 Panasonic Corporation Manufacturing method for circuit board, and circuit board
US20120168221A1 (en) * 2011-01-05 2012-07-05 Fujitsu Component Limited Relay board for transmission connector use
US20120186856A1 (en) * 2011-01-21 2012-07-26 Samsung Electronics Co., Ltd. Multi-layer flexible printed circuit board for electronic device
US20140008107A1 (en) * 2009-10-28 2014-01-09 Samsung Electro-Mechanics Co., Ltd. Multilayer rigid flexible printed circuit board and method for manufacturing the same
US20140144675A1 (en) * 2012-11-28 2014-05-29 Zhen Ding Technology Co., Ltd. Multi-layer printed circuit board and method for manufacturing same
US20150319844A1 (en) * 2014-04-30 2015-11-05 Samsung Electro-Mechanics Co., Ltd. Rigid flexible printed circuit board and method of manufacturing the same
US20160014893A1 (en) * 2013-07-30 2016-01-14 Murata Manufacturing Co., Ltd. Multilayer board
US20160270227A1 (en) * 2010-12-24 2016-09-15 Rayben Technologies (HK) Limited Manufacturing method of printing circuit board with micro-radiators
US20160351545A1 (en) * 2015-06-01 2016-12-01 Samsung Electro-Mechanics Co., Ltd. Printed circuit board, method, and semiconductor package
US20180063961A1 (en) * 2016-08-25 2018-03-01 Samsung Electro-Mechanics Co., Ltd. Board having electronic element, method for manufacturing the same, and electronic element module including the same
US20180301439A1 (en) * 2015-03-20 2018-10-18 Rohinni, LLC Substrate with Array of LEDs for Backlighting a Display Device
US10285269B2 (en) * 2013-09-06 2019-05-07 Murata Manufacturing Co., Ltd. Multilayer substrate and manufacturing method for the multilayer substrate
US20190150276A1 (en) * 2017-11-16 2019-05-16 Yazaki Corporation Electronic circuit board
US10354895B2 (en) 2017-01-18 2019-07-16 Rohinni, LLC Support substrate for transfer of semiconductor devices
US10410905B1 (en) 2018-05-12 2019-09-10 Rohinni, LLC Method and apparatus for direct transfer of multiple semiconductor devices
US20190289725A1 (en) * 2018-03-16 2019-09-19 HongQiSheng Precision Electronics (QinHuangDao) Co ., Ltd. Multilayer circuit board and method of manufacturing the same
CN110337177A (zh) * 2019-06-21 2019-10-15 广州金鹏源康精密电路股份有限公司 一种具有可承受高推力的焊盘的电路板及其制作方法
US10471545B2 (en) 2016-11-23 2019-11-12 Rohinni, LLC Top-side laser for direct transfer of semiconductor devices
US10504767B2 (en) 2016-11-23 2019-12-10 Rohinni, LLC Direct transfer apparatus for a pattern array of semiconductor device die
US11069551B2 (en) 2016-11-03 2021-07-20 Rohinni, LLC Method of dampening a force applied to an electrically-actuatable element
US11094571B2 (en) 2018-09-28 2021-08-17 Rohinni, LLC Apparatus to increase transferspeed of semiconductor devices with micro-adjustment
US11191168B2 (en) * 2020-03-05 2021-11-30 Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd. Method of manufacturing composite circuit board and composite circuit board
US11284503B2 (en) * 2018-05-31 2022-03-22 Nitto Denko Corporation Wiring circuit board, producing method thereof, and wiring circuit sheet
US11483923B2 (en) 2016-03-30 2022-10-25 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Laminated component carrier with a thermoplastic structure
US20230160764A1 (en) * 2021-06-21 2023-05-25 Avary Holding (Shenzhen) Co., Limited. Pressure sensing circuit board and method for manufacturing the same
US11688553B2 (en) * 2016-08-18 2023-06-27 Murata Manufacturing Co., Ltd. Multilayer coil and method for manufacturing the same

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101356641B (zh) * 2006-01-06 2011-05-18 日本电气株式会社 半导体搭载用布线基板、其制造方法及布线基板组件
WO2009141927A1 (ja) * 2008-05-23 2009-11-26 イビデン株式会社 プリント配線板及びその製造方法
JP5408754B1 (ja) * 2012-12-10 2014-02-05 株式会社フジクラ 多層配線基板及びその製造方法
KR102173615B1 (ko) 2018-07-19 2020-11-03 스템코 주식회사 다층 회로 기판 및 그 제조 방법
CN213662046U (zh) * 2020-09-30 2021-07-09 华为技术有限公司 电路板组件和电子设备
CN113692118B (zh) * 2021-08-30 2023-06-06 大连亚太电子有限公司 一种多层印刷电路板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5081563A (en) * 1990-04-27 1992-01-14 International Business Machines Corporation Multi-layer package incorporating a recessed cavity for a semiconductor chip
US6281446B1 (en) * 1998-02-16 2001-08-28 Matsushita Electric Industrial Co., Ltd. Multi-layered circuit board and method of manufacturing the same

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2034127B (en) 1978-10-13 1983-05-18 Matsushita Electric Industrial Co Ltd Printed circuits and methods their manufacture
JPS55160452A (en) * 1979-06-01 1980-12-13 Nec Corp Hybrid integrated circuit
JPH0435092A (ja) * 1990-05-31 1992-02-05 Toshiba Corp 多層配線基板およびその製造方法
JP2857237B2 (ja) * 1990-08-10 1999-02-17 古河電気工業株式会社 多層回路基板の製造方法
JPH06283836A (ja) 1993-03-29 1994-10-07 Canon Inc プリント基板の接続構造および接続方法
JPH07106728A (ja) * 1993-10-04 1995-04-21 Mitsui Toatsu Chem Inc リジッドフレックスプリント配線板およびその製造方法
JPH07135375A (ja) * 1993-11-10 1995-05-23 Mitsui Toatsu Chem Inc リジッドフレックス配線板およびその製造方法
JP3540396B2 (ja) * 1994-11-11 2004-07-07 株式会社東芝 プリント配線板の製造方法
JP3445678B2 (ja) 1995-02-27 2003-09-08 シャープ株式会社 多層フレキシブルプリント配線板及びその製造方法
JPH1041635A (ja) 1996-07-23 1998-02-13 Ibiden Co Ltd 多層プリント配線板用片面回路基板とその製造方法、および多層プリント配線板
JPH10135595A (ja) * 1996-10-31 1998-05-22 Kyocera Corp 回路基板及びその製造方法
US6163957A (en) * 1998-11-13 2000-12-26 Fujitsu Limited Multilayer laminated substrates with high density interconnects and methods of making the same
JP2000156564A (ja) * 1998-11-20 2000-06-06 Nec Corp プリント配線板及びその製造方法
JP2000183526A (ja) * 1998-12-11 2000-06-30 Matsushita Electric Ind Co Ltd 多層配線基板およびその製造方法
JP2000208667A (ja) 1999-01-14 2000-07-28 Toshiba Corp 積層基板製造方法、積層基板製造装置及び半導体装置の製造方法
JP2001024292A (ja) * 1999-07-05 2001-01-26 Nippon Mektron Ltd 可撓性回路基板の支持構造
US6583364B1 (en) * 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
JP4486196B2 (ja) 1999-12-08 2010-06-23 イビデン株式会社 多層プリント配線板用片面回路基板およびその製造方法
JP3744383B2 (ja) 2000-06-09 2006-02-08 松下電器産業株式会社 複合配線基板及びその製造方法
JP3653452B2 (ja) 2000-07-31 2005-05-25 株式会社ノース 配線回路基板とその製造方法と半導体集積回路装置とその製造方法
JP3951091B2 (ja) * 2000-08-04 2007-08-01 セイコーエプソン株式会社 半導体装置の製造方法
JP2002158445A (ja) 2000-11-22 2002-05-31 Cmk Corp リジッドフレックスプリント配線板及びその製造方法
JP2002171063A (ja) 2000-12-01 2002-06-14 Sony Chem Corp 多層フレキシブル配線板
JP2001298274A (ja) 2001-03-13 2001-10-26 Matsushita Electric Ind Co Ltd 電子回路構成体
JP2003092473A (ja) 2001-07-10 2003-03-28 Fujikura Ltd 多層配線板、多層配線用基材及びその製造方法
JP2003229665A (ja) * 2002-01-31 2003-08-15 Sumitomo Bakelite Co Ltd 多層フレキシブル配線板及びその製造方法
JP2003294994A (ja) 2002-04-03 2003-10-15 Hitachi Hybrid Network Co Ltd 双方向通信光モジュール
JP4195619B2 (ja) 2003-01-20 2008-12-10 株式会社フジクラ 多層配線板およびその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5081563A (en) * 1990-04-27 1992-01-14 International Business Machines Corporation Multi-layer package incorporating a recessed cavity for a semiconductor chip
US6281446B1 (en) * 1998-02-16 2001-08-28 Matsushita Electric Industrial Co., Ltd. Multi-layered circuit board and method of manufacturing the same

Cited By (102)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080289859A1 (en) * 2004-06-10 2008-11-27 Ibiden Co., Ltd. Flex-Rigid Wiring Board and Manufacturing Method Thereof
US8093502B2 (en) * 2004-06-10 2012-01-10 Ibiden Co., Ltd. Flex-rigid wiring board and manufacturing method thereof
US7246434B1 (en) * 2004-10-11 2007-07-24 Pericom Semiconductor Corp. Method of making a surface mountable PCB module
US7545649B2 (en) * 2005-04-12 2009-06-09 Au Optronics Corp. Double sided flexible printed circuit board
US20060225914A1 (en) * 2005-04-12 2006-10-12 Au Optronics Corp. Double sided flexible printed circuit board
US7528325B2 (en) * 2005-08-24 2009-05-05 Citizen Electronics Co., Ltd. Key sheet module
US20070074903A1 (en) * 2005-08-24 2007-04-05 Citizens Electronic Co., Ltd. Key sheet module
US7292448B2 (en) * 2005-08-31 2007-11-06 Sony Corporation Circuit substrate
US20070081309A1 (en) * 2005-08-31 2007-04-12 Sony Corporation Circuit substrate
US20090126974A1 (en) * 2005-09-30 2009-05-21 Maroshi Yuasa Manufacturing Process for a Prepreg with a Carrier, Prepreg with a Carrier, Manufacturing Process for a Thin Double-Sided Plate, Thin Double-Sided Plate and Manufacturing Process for a Multilayer-Printed Circuit Board
US20080047737A1 (en) * 2006-07-28 2008-02-28 Dai Nippon Printing Co., Ltd. Multilayered printed wiring board and method for manufacturing the same
US8476535B2 (en) 2006-07-28 2013-07-02 Dai Nippon Printing Co., Ltd. Multilayered printed wiring board and method for manufacturing the same
US20110061903A1 (en) * 2006-07-28 2011-03-17 Dai Nippon Printing Co., Ltd. Multilayered printed wiring board and method for manufacturing the same
US8446736B2 (en) * 2007-05-29 2013-05-21 Panasonic Corporation Circuit board and manufacturing method thereof
US20090175017A1 (en) * 2007-05-29 2009-07-09 Panasonic Corporation Circuit board and manufacturing method thereof
US8359738B2 (en) 2007-07-17 2013-01-29 Ibiden Co., Ltd. Method of manufacturing wiring board
US20090038836A1 (en) * 2007-07-17 2009-02-12 Ibiden, Co., Ltd. Wiring board and method of manufacturing wiring board
US20090020317A1 (en) * 2007-07-17 2009-01-22 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8178789B2 (en) 2007-07-17 2012-05-15 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US20110209344A1 (en) * 2007-07-17 2011-09-01 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8035983B2 (en) 2007-07-17 2011-10-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8058568B2 (en) * 2007-08-08 2011-11-15 Unimicron Technology Corp. Circuit board and method for fabricating the same
US20090038838A1 (en) * 2007-08-08 2009-02-12 Phoenix Precision Technology Corporation Circuit board and method for fabricating the same
US20100208436A1 (en) * 2007-09-19 2010-08-19 Dieter Cremer Multilayer Circuit Board and Use of a Multilayer Circuit Board
US8179682B2 (en) * 2007-09-19 2012-05-15 Continental Automotive Gmbh Multilayer circuit board and use of a multilayer circuit board
US20090130393A1 (en) * 2007-11-21 2009-05-21 Fujitsu Limited Electronic apparatus and method of manufacturing the same
US8081081B2 (en) 2007-11-21 2011-12-20 Fujitsu Limited Electronic apparatus and method of manufacturing the same
EP2065841A1 (en) * 2007-11-21 2009-06-03 Fujitsu Limited Electronic apparatus and method of manufacturing the same
US20090135574A1 (en) * 2007-11-22 2009-05-28 Shinko Electric Industries Co., Ltd. Wiring board, semiconductor device having wiring board, and method of manufacturing wiring board
US20110010932A1 (en) * 2007-11-22 2011-01-20 Shinko Electric Industries Co., Ltd. Wiring board, semiconductor device having wiring board, and method of manufacturing wiring board
US8238109B2 (en) * 2008-07-16 2012-08-07 Ibiden Co., Ltd. Flex-rigid wiring board and electronic device
US20100014265A1 (en) * 2008-07-16 2010-01-21 Ibiden Co., Ltd Flex-rigid wiring board and electronic device
US20100122838A1 (en) * 2008-11-19 2010-05-20 Sony Corporation Mount board and semiconductor module
US8263871B2 (en) * 2008-11-19 2012-09-11 Sony Corporation Mount board and semiconductor module
US8294031B2 (en) * 2009-01-30 2012-10-23 Continental Automotive Gmbh Solder resist coating for rigid-flex circuit boards and method of producing the solder resist coating
US20100193223A1 (en) * 2009-01-30 2010-08-05 Continental Automotive Gmbh Solder resist coating for rigid-flex circuit boards and method of producing the solder resist coating
CN101820718A (zh) * 2009-01-30 2010-09-01 欧陆汽车有限责任公司 用于刚柔结合电路板的阻焊漆层
US20120012371A1 (en) * 2009-04-02 2012-01-19 Panasonic Corporation Manufacturing method for circuit board, and circuit board
US10602616B2 (en) 2009-10-28 2020-03-24 Samsung Electro-Mechanics Co., Ltd. Multilayer rigid flexible printed circuit board and method for manufacturing the same
US9743529B2 (en) * 2009-10-28 2017-08-22 Samsung Electro-Mechanics Co., Ltd. Multilayer rigid flexible printed circuit board and method for manufacturing the same
US20140021164A1 (en) * 2009-10-28 2014-01-23 Samsung Electro-Mechanics Co., Ltd. Method for manufacturing a multilayer rigid flexible printed circuit board
US10674610B1 (en) 2009-10-28 2020-06-02 Samsung Electro-Mechanics Co., Ltd. Multilayer rigid flexible printed circuit board and method for manufacturing the same
US20140008107A1 (en) * 2009-10-28 2014-01-09 Samsung Electro-Mechanics Co., Ltd. Multilayer rigid flexible printed circuit board and method for manufacturing the same
US20110132654A1 (en) * 2009-12-07 2011-06-09 Fujitsu Limited Multilayer printed circuit board, method for manufacturing the same, and electronic apparatus
US20110194262A1 (en) * 2010-02-05 2011-08-11 Ibiden, Co., Ltd. Flex-rigid wiring board and method for manufacturing the same
US8493747B2 (en) * 2010-02-05 2013-07-23 Ibiden Co., Ltd. Flex-rigid wiring board and method for manufacturing the same
US20160270227A1 (en) * 2010-12-24 2016-09-15 Rayben Technologies (HK) Limited Manufacturing method of printing circuit board with micro-radiators
US10433414B2 (en) * 2010-12-24 2019-10-01 Rayben Technologies (HK) Limited Manufacturing method of printing circuit board with micro-radiators
US20120168221A1 (en) * 2011-01-05 2012-07-05 Fujitsu Component Limited Relay board for transmission connector use
US8680402B2 (en) * 2011-01-21 2014-03-25 Samsung Electronics Co., Ltd Multi-layer flexible printed circuit board for electronic device
US20120186856A1 (en) * 2011-01-21 2012-07-26 Samsung Electronics Co., Ltd. Multi-layer flexible printed circuit board for electronic device
US20140144675A1 (en) * 2012-11-28 2014-05-29 Zhen Ding Technology Co., Ltd. Multi-layer printed circuit board and method for manufacturing same
US9485860B2 (en) * 2013-07-30 2016-11-01 Murata Manufacturing Co., Ltd. Multilayer board
US20160014893A1 (en) * 2013-07-30 2016-01-14 Murata Manufacturing Co., Ltd. Multilayer board
US10285269B2 (en) * 2013-09-06 2019-05-07 Murata Manufacturing Co., Ltd. Multilayer substrate and manufacturing method for the multilayer substrate
US20150319844A1 (en) * 2014-04-30 2015-11-05 Samsung Electro-Mechanics Co., Ltd. Rigid flexible printed circuit board and method of manufacturing the same
US9674968B2 (en) * 2014-04-30 2017-06-06 Samsung Electro-Mechanics Co., Ltd. Rigid flexible printed circuit board and method of manufacturing the same
US10566319B2 (en) 2015-03-20 2020-02-18 Rohinni, LLC Apparatus for direct transfer of semiconductor device die
US10242971B2 (en) 2015-03-20 2019-03-26 Rohinni, LLC Apparatus for direct transfer of semiconductor devices with needle retraction support
US10290615B2 (en) 2015-03-20 2019-05-14 Rohinni, LLC Method and apparatus for improved direct transfer of semiconductor die
US11515293B2 (en) 2015-03-20 2022-11-29 Rohinni, LLC Direct transfer of semiconductor devices from a substrate
US10325885B2 (en) 2015-03-20 2019-06-18 Rohinni, LLC Semiconductor device on string circuit and method of making the same
US11562990B2 (en) 2015-03-20 2023-01-24 Rohinni, Inc. Systems for direct transfer of semiconductor device die
US10361176B2 (en) 2015-03-20 2019-07-23 Rohinni, LLC Substrate with array of LEDs for backlighting a display device
US10373937B2 (en) 2015-03-20 2019-08-06 Rohinni, LLC Apparatus for multi-direct transfer of semiconductors
US20180301439A1 (en) * 2015-03-20 2018-10-18 Rohinni, LLC Substrate with Array of LEDs for Backlighting a Display Device
US11152339B2 (en) 2015-03-20 2021-10-19 Rohinni, LLC Method for improved transfer of semiconductor die
US10910354B2 (en) 2015-03-20 2021-02-02 Rohinni, LLC Apparatus for direct transfer of semiconductor device die
US11488940B2 (en) 2015-03-20 2022-11-01 Rohinni, Inc. Method for transfer of semiconductor devices onto glass substrates
US10636770B2 (en) 2015-03-20 2020-04-28 Rohinni, LLC Apparatus and method for direct transfer of semiconductor devices from a substrate and stacking semiconductor devices on each other
US10490532B2 (en) 2015-03-20 2019-11-26 Rohinni, LLC Apparatus and method for direct transfer of semiconductor devices
US10622337B2 (en) 2015-03-20 2020-04-14 Rohinni, LLC Method and apparatus for transfer of semiconductor devices
US10615153B2 (en) 2015-03-20 2020-04-07 Rohinni, LLC Apparatus for direct transfer of semiconductor device die
US10615152B2 (en) 2015-03-20 2020-04-07 Rohinni, LLC Semiconductor device on glass substrate
KR20160141516A (ko) * 2015-06-01 2016-12-09 삼성전기주식회사 인쇄회로기판, 인쇄회로기판의 제조 방법 및 이를 포함하는 반도체 패키지
US20160351545A1 (en) * 2015-06-01 2016-12-01 Samsung Electro-Mechanics Co., Ltd. Printed circuit board, method, and semiconductor package
US10553452B2 (en) * 2015-06-01 2020-02-04 Samsung Electro-Mechanics Co., Ltd. Printed circuit board, method, and semiconductor package
KR102425753B1 (ko) 2015-06-01 2022-07-28 삼성전기주식회사 인쇄회로기판, 인쇄회로기판의 제조 방법 및 이를 포함하는 반도체 패키지
US11483923B2 (en) 2016-03-30 2022-10-25 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Laminated component carrier with a thermoplastic structure
US12048089B2 (en) 2016-03-30 2024-07-23 AT&SAustria Technologie & Systemtechnik Laminated component carrier with a thermoplastic structure
US11688553B2 (en) * 2016-08-18 2023-06-27 Murata Manufacturing Co., Ltd. Multilayer coil and method for manufacturing the same
US10595413B2 (en) * 2016-08-25 2020-03-17 Samsung Electro-Mechanics Co., Ltd. Board having electronic element, method for manufacturing the same, and electronic element module including the same
US20180063961A1 (en) * 2016-08-25 2018-03-01 Samsung Electro-Mechanics Co., Ltd. Board having electronic element, method for manufacturing the same, and electronic element module including the same
US11069551B2 (en) 2016-11-03 2021-07-20 Rohinni, LLC Method of dampening a force applied to an electrically-actuatable element
US10504767B2 (en) 2016-11-23 2019-12-10 Rohinni, LLC Direct transfer apparatus for a pattern array of semiconductor device die
US11462433B2 (en) 2016-11-23 2022-10-04 Rohinni, LLC Direct transfer apparatus for a pattern array of semiconductor device die
US10471545B2 (en) 2016-11-23 2019-11-12 Rohinni, LLC Top-side laser for direct transfer of semiconductor devices
US10354895B2 (en) 2017-01-18 2019-07-16 Rohinni, LLC Support substrate for transfer of semiconductor devices
US10764998B2 (en) * 2017-11-16 2020-09-01 Yazaki Corporation Electronic circuit board
US20190150276A1 (en) * 2017-11-16 2019-05-16 Yazaki Corporation Electronic circuit board
US20190289725A1 (en) * 2018-03-16 2019-09-19 HongQiSheng Precision Electronics (QinHuangDao) Co ., Ltd. Multilayer circuit board and method of manufacturing the same
US10660218B2 (en) 2018-03-16 2020-05-19 Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd. Method of manufacturing multilayer circuit board
US10653015B2 (en) * 2018-03-16 2020-05-12 Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd. Multilayer circuit board and method of manufacturing the same
US10410905B1 (en) 2018-05-12 2019-09-10 Rohinni, LLC Method and apparatus for direct transfer of multiple semiconductor devices
US11284503B2 (en) * 2018-05-31 2022-03-22 Nitto Denko Corporation Wiring circuit board, producing method thereof, and wiring circuit sheet
US11094571B2 (en) 2018-09-28 2021-08-17 Rohinni, LLC Apparatus to increase transferspeed of semiconductor devices with micro-adjustment
US11728195B2 (en) 2018-09-28 2023-08-15 Rohinni, Inc. Apparatuses for executing a direct transfer of a semiconductor device die disposed on a first substrate to a second substrate
US12165895B2 (en) 2018-09-28 2024-12-10 Cowles Semi, Llc Apparatuses for executing a direct transfer of a semiconductor device die disposed on a first substrate to a second substrate
CN110337177A (zh) * 2019-06-21 2019-10-15 广州金鹏源康精密电路股份有限公司 一种具有可承受高推力的焊盘的电路板及其制作方法
US11191168B2 (en) * 2020-03-05 2021-11-30 Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd. Method of manufacturing composite circuit board and composite circuit board
US20230160764A1 (en) * 2021-06-21 2023-05-25 Avary Holding (Shenzhen) Co., Limited. Pressure sensing circuit board and method for manufacturing the same
US12320718B2 (en) * 2021-06-21 2025-06-03 Avary Holding (Shenzhen) Co., Limited. Pressure sensing circuit board and method for manufacturing the same

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