[go: up one dir, main page]

US12481617B2 - System on a chip and display system - Google Patents

System on a chip and display system

Info

Publication number
US12481617B2
US12481617B2 US18/137,432 US202318137432A US12481617B2 US 12481617 B2 US12481617 B2 US 12481617B2 US 202318137432 A US202318137432 A US 202318137432A US 12481617 B2 US12481617 B2 US 12481617B2
Authority
US
United States
Prior art keywords
tts
circuit
audio
data
fsm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US18/137,432
Other versions
US20230409516A1 (en
Inventor
Cheng-Hung Wu
Wen-Hsia Kung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Realtek Semiconductor Corp
Original Assignee
Realtek Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Realtek Semiconductor Corp filed Critical Realtek Semiconductor Corp
Publication of US20230409516A1 publication Critical patent/US20230409516A1/en
Application granted granted Critical
Publication of US12481617B2 publication Critical patent/US12481617B2/en
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4498Finite state machines
    • GPHYSICS
    • G10MUSICAL INSTRUMENTS; ACOUSTICS
    • G10LSPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L13/00Speech synthesis; Text to speech systems

Definitions

  • the present invention is related to a display system, and more particularly, to a system on a chip (SoC) applied to a display system, which can integrate a text-to-speech (TTS) circuit having a TTS function and an on-screen display (OSD) circuit arranged to control OSD of a text message into the same chip at a same time.
  • SoC system on a chip
  • TTS text-to-speech
  • OSD on-screen display
  • a display system having an OSD menu that can show a text message
  • an additional SoC having a TTS function must be coupled to the exterior of a scaler SoC in the display system, which may result in increased cost.
  • the display system further needs to control the SoC having a TTS function through a user command interface, which may result in asynchrony between the text message display and the speech playback.
  • SoC SoC that can integrate a TTS circuit having a TTS function and an OSD circuit arranged to control OSD of a text message into the same chip at a same time. It is also an objective of the present invention to provide an associated display system.
  • an SoC may include an OSD circuit, a memory control circuit, and an audio processor.
  • the OSD circuit may be arranged to control OSD of a text message.
  • the memory control circuit may be coupled to a memory, and may be arranged to read a TTS data corresponding to the text message from the memory.
  • the audio processor may be coupled to the memory control circuit, and may include a TTS circuit, wherein the TTS circuit may be arranged to: receive the TTS data from the memory control circuit; and generate an audio output according to at least the TTS data.
  • a display system may include a memory and an SoC, wherein the memory may be arranged to store a TTS data.
  • the SoC may include an OSD circuit, a memory control circuit, and an audio processor.
  • the OSD circuit may be arranged to control OSD of a text message.
  • the memory control circuit may be coupled to the memory, and may be arranged to read the TTS data from the memory, wherein the TTS data corresponds to the text message.
  • the audio processor may be coupled to the memory control circuit, and may include a TTS circuit, wherein the TTS circuit may be arranged to: receive the TTS data from the memory control circuit; and generate an audio output according to at least the TTS data.
  • One of the benefits of the present invention is that, since the SoC of the present invention integrates the TTS circuit having the TTS function and the OSD circuit arranged to control OSD of the text message into the same chip, asynchrony between the text message display and the speech playback can be greatly improved. In addition, since there is no need to couple an additional SoC having a TTS function to the exterior of the scaler SoC in the display system of the present invention, the cost can be greatly reduced.
  • FIG. 1 is a diagram illustrating a display system according to an embodiment of the present invention.
  • FIG. 2 is a diagram illustrating an audio processor according to an embodiment of the present invention.
  • FIG. 3 is a flow chart illustrating controlling a text-to-speech circuit by a finite-state machine shown in FIG. 1 according to an embodiment of the present invention.
  • FIG. 4 is an example of the flow chart shown in FIG. 3 according to an embodiment of the present invention.
  • FIG. 5 is another example of the flow chart shown in FIG. 3 according to an embodiment of the present invention.
  • FIG. 1 is a diagram illustrating a display system 10 according to an embodiment of the present invention.
  • the display system 10 includes a scaler system on a chip (SoC) 100 , a memory 120 , a display 140 , an audio processing circuit 160 , and an audio playback device 180 , wherein the memory 120 may be a random access memory (RAM) or a serial peripheral interface (SPI) flash memory, but the present invention is not limited thereto.
  • SoC scaler system on a chip
  • the memory 120 may be a random access memory (RAM) or a serial peripheral interface (SPI) flash memory, but the present invention is not limited thereto.
  • RAM random access memory
  • SPI serial peripheral interface
  • the scaler SoC 100 includes a receiving circuit 102 , a video processor 104 , an audio processor 106 , an on-screen display (OSD) circuit 108 , a finite-state machine (FSM) 110 , a transmitting circuit 112 , and a memory control circuit 114 .
  • the receiving circuit 102 may be arranged to receive an input signal IN_S, wherein the input signal IN_S may include a video signal VI_S and an audio signal AU_S.
  • the input signal IN_S may be a display port (DP) signal, a high definition multimedia interface (HDMI) signal, a video graphics array (VGA) signal, or an AUX IN signal.
  • the video processor 104 may be coupled to the receiving circuit 102 , and may be arranged to process the video signal VI_S, wherein when a text message TEXT is required to be shown on the display 140 , the video processor 104 may notify the OSD circuit 108 to perform related processing. Since the video processor 104 in the display system 10 is well known to those skilled in the art, and the operation of the video processor 104 is not the focus of the present invention, only the operations of the audio processor 106 , the OSD circuit 108 , and the FSM 110 are described in detail herein.
  • the OSD circuit 108 may be coupled to the video processor 104 and the display 140 , and may be arranged to control OSD of the text message TEXT.
  • the memory 120 may be arranged to store a text-to-speech (TTS) data TTS_DATA corresponding to the text message TEXT. It should be noted that, in order to save memory space, the TTS data TTS_DATA may be a monaural audio signal.
  • the memory control circuit 114 may be coupled to the memory 120 , and may read the TTS data TTS_DATA from the memory 120 .
  • the audio processor 106 may be coupled to the receiving circuit 102 , and may be arranged to receive the audio signal AU_S.
  • the audio processor 106 may be further coupled to the memory control circuit 114 , and may include a TTS circuit 107 , wherein the TTS circuit 107 may be arranged to: receive the TTS data TTS_DATA from the memory control circuit 114 ; and generate an audio output A OUT according to at least the TTS data TTS_DATA.
  • the FSM 110 may be coupled between the audio processor 106 and the OSD circuit 108 , and may receive a TTS command TTS_CMD from the OSD circuit 108 , and transmit a control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 to generate the audio output AU_OUT according to at least the TTS data TTS_DATA.
  • the FSM 110 transmits the control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 (more particularly, the TTS circuit 107 ) to generate the audio output AU_OUT only according to the TTS data TTS_DATA.
  • the FSM 110 transmits the control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 (more particularly, the TTS circuit 107 ) to perform mixing processing according to the audio signal and the TTS data, in order to generate the audio output AU_OUT.
  • the transmitting circuit 112 may be coupled to the audio processor 106 , and may be arranged to transmit the audio output AU_OUT to the audio processing circuit 160 , wherein the transmitting circuit 112 may be an integrated interchip sound (I2P) transmitting circuit, a Sony/Philips Digital Interface Format (S/PDIF) transmitting circuit, or an AUX IN transmitting circuit.
  • the audio processing circuit 160 may be coupled to the transmitting circuit 112 , and may perform audio processing upon the audio output AU_OUT transmitted by the transmitting circuit 112 , to generate a processed audio output P_AU_OUT.
  • the audio processing circuit 160 may include an audio codec and an audio amplifier SoC, but the present invention is not limited thereto.
  • the audio playback device 180 may be coupled to the audio processing circuit 160 , and may be arranged to play the processed audio output P_AU_OUT.
  • the audio playback device 180 may be a speaker or a headphone.
  • FIG. 2 is a diagram illustrating an audio processor 20 according to an embodiment of the present invention, wherein the audio processor 106 shown in FIG. 1 may be implemented by the audio processor 20 shown in FIG. 2 .
  • the audio processor includes a TTS circuit 200 and an audio processing circuit 220 .
  • the TTS circuit 200 includes a first in first out (FIFO) circuit 202 , an upsampling circuit 204 , volume control circuits 206 and 208 , and a mixing circuit 210 .
  • the FIFO circuit 202 may be coupled to the memory control circuit 114 , and may be arranged to receive the TTS data TTS_DATA from the memory control circuit 114 .
  • the upsampling circuit 204 may be coupled to the FIFO circuit 202 , and may be arranged to perform upsampling processing upon the TTS data TTS_DATA. For example, if the audio processor 20 receives the audio signal AU_S, the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make a sampling rate of the TTS data TTS_DATA be the same as a sampling rate of the audio signal AU_S; adjust data size of the TTS data TTS_DATA to make a bit depth of the TTS data TTS_DATA be the same as a bit depth of the audio signal AU_S; and/or map the TTS data TTS_DATA from the monaural audio signal to a binaural audio signal.
  • the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sampling rate of the TTS data TTS_DATA be the same as a predetermined sample rate; adjust data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as a predetermined bit depth; and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
  • the volume control circuit 206 may be coupled to the upsampling circuit 204 , and may be arranged to perform volume control upon the TTS data TTS_DATA to generate an adjusted TTS data AD_TTS_DATA.
  • the volume control circuit 208 may be arranged to receive the audio signal AU_S, and perform volume control upon the audio signal AU_S to generate an adjusted audio signal AD_AU_S.
  • the mixing circuit 210 may be coupled to the volume control circuits 206 and 208 , and may be arranged to mix the adjusted TTS data AD_TTS_DATA and the adjusted audio signal AD_AU_S to generate a mixed audio signal MIX_AU_S.
  • the mixing circuit 210 may mix the adjusted TTS data AD_TTS_DATA and the adjusted audio signal AD_AU_S to generate the mixed audio signal MIX_AU_S (i.e. the audio output AU_OUT is generated according to the mixed audio signal MIX_AU_S).
  • the mixing circuit 210 may directly transmit the adjusted TTS data AD_TTS_DATA to the audio processing circuit 220 (i.e. the audio output AU_OUT is generated according to the adjusted TTS data AD_TTS_DATA) for subsequent processing.
  • the audio processing circuit 220 may be coupled to the mixing circuit 210 , and may perform audio processing upon the mixed audio signal MIX_AU_S (or the adjusted TTS data AD_TTS_DATA) to generate the audio output AU_OUT.
  • the audio processing circuit 220 may include a volume control circuit (not shown), and the volume control circuit may be arranged to perform volume control upon the mixed audio signal MIX_AU_S (or the adjusted TTS data AD_TTS_DATA) to generate the audio output AU_OUT.
  • FIG. 3 is a flowchart illustrating controlling the TTS circuit 107 by the FSM 110 shown in FIG. 1 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor and the TTS circuit 200 shown in FIG. 2 .
  • the FSM 110 may transmit the control command CS to the audio processor 106 according to the TTS command TTS_CMD from the OSD circuit 108 , for controlling the audio processor 106 (more particularly, the TTS circuit 107 ) to generate the audio output AU_OUT according to at least the TTS data TTS_DATA.
  • TTS_CMD the TTS command
  • FIG. 1 the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor and the TTS circuit 200 shown in FIG. 2 .
  • the FSM 110 may transmit the control command CS to the audio processor 106 according to the TTS command TTS_CMD from the OSD circuit 108 , for controlling the audio processor
  • an initial state of the FSM 110 is an audio preparing state 300
  • states of the FSM 110 may further include a TTS playback state 302 and an audio playback state 304 .
  • the FSM 110 waits for the TTS circuit 107 to receive the audio signal AU_S or waits to receive the TTS command TTS_CMD from the OSD circuit 108 .
  • the FSM 110 Under a condition that the FSM 110 is initially in the audio preparing state 300 , when the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108 , the state of the FSM 110 is transferred from the audio preparing state 300 to the TTS playback state 302 , and the FSM 110 controls the TTS circuit 107 to generate the audio output AU_OUT only according to the TTS data TTS_DATA (more particularly, the adjusted TTS data AD_TTS_DATA) by the control command CS. After the TTS circuit 107 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 302 to the audio preparing state 300 .
  • TTS_DATA more particularly, the adjusted TTS data AD_TTS_DATA
  • the state of the FSM 110 is transferred from the audio preparing state 300 to the audio playback state 304 for controlling playback of the audio signal AU_S, and the FSM 100 controls the TTS circuit 107 to generate the audio output AU_OUT only according to the audio signal AU_S (more particularly, the adjusted audio signal AD_AU_S) by the control command CS.
  • the state of the FSM 110 is transferred from the audio playback state 304 to the audio preparing state 300 .
  • the FSM 110 Under a condition that the FSM 110 is initially in the audio playback state 304 , when the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108 , the state of the FSM 110 is transferred from the audio playback state 304 to the TTS playback state 302 , and the FSM 110 controls the TTS circuit 107 to perform mixing processing according to the audio signal AU_S and the TTS data TTS_DATA (i.e. mix the adjusted audio signal AD_AU_S and the adjusted TTS data AD_TTS_DATA to generate the mixed audio signal MIX_AU_S) by the control command CS, to generate the audio output AU_OUT according to the mixed audio signal MIX_AU_S.
  • mixing processing according to the audio signal AU_S and the TTS data TTS_DATA (i.e. mix the adjusted audio signal AD_AU_S and the adjusted TTS data AD_TTS_DATA to generate the mixed audio signal MIX_AU_S) by the control command CS, to generate the audio
  • the state of the FSM 110 is transferred from the TTS playback state 302 to the audio playback state 304 , to keep playing the audio signal AU_S.
  • FIG. 4 is an example of the flow chart shown in FIG. 3 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor 20 and the TTS circuit 200 shown in FIG. 2 .
  • the audio processor 20 does not receive the audio signal AU_S, and the predetermined sample rate and the predetermined bit depth are set as 48 kHz and 24 bits, respectively, by the upsampling circuit 204 .
  • the transfer of the state of the FSM 110 may be illustrated by dashed lines.
  • the OSD circuit 108 may transmit the TTS command TTS_CMD to the audio processor 20 , and the state of the FSM 110 may be transferred from an audio preparing state 400 to a TTS playback state 402 for playing the TTS data TTS_DATA.
  • the memory control circuit 114 may be arranged to read the TTS data TTS_DATA corresponding to the text message TEXT from the memory 120 .
  • the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sample rate of the TTS data TTS_DATA be the same as the predetermined sample rate (i.e. 48 kHz); adjust the data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as the predetermined bit depth (i.e. 24 bits); and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
  • the predetermined sample rate i.e. 48 kHz
  • the data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as the predetermined bit depth (i.e. 24 bits)
  • the predetermined bit depth i.e. 24 bits
  • the volume control circuit 206 may perform volume control upon the TTS data TTS_DATA to generate the adjusted TTS data AD_TTS_DATA.
  • the volume control circuit 206 may be arranged to adjust a volume setting for playing the TTS data TTS_DATA from 0% to 80%.
  • the volume control circuit 208 may still set a volume setting for playing the audio signal AU_S to be maintained at a predetermined volume (e.g. 0%).
  • the mixing circuit 210 may be arranged to directly transmit the adjusted TTS data AD_TTS_DATA to the audio processing circuit 220 for subsequent processing (i.e. the audio output AU_OUT is generated according to the adjusted TTS data AD_TTS_DATA).
  • the audio processing circuit 220 may perform audio processing upon the adjusted TTS data AD_TTS_DATA to generate the audio output AU_OUT.
  • the state of the FSM 110 is transferred from the TTS playback state 402 to the audio preparing state 400 .
  • the audio control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 80% to 0%, and the volume control circuit 208 may be arranged to set the volume setting for playing the audio signal AU_S to be maintained at the predetermined volume (e.g. 0%).
  • the predetermined volume e.g. 0%
  • FIG. 5 is another example of the flow chart shown in FIG. 3 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor 20 and the TTS circuit 200 shown in FIG. 2 .
  • the audio processor 20 receives the audio signal AU_S, wherein the audio signal AU_S is a DP audio signal, and the sample rate and the bit depth of the audio signal AU_S are 96 kHz and 24 bits, respectively.
  • the transfer of the state of the FSM 110 may be illustrated by dashed lines. Initially, the FSM 110 is in an audio playback state 504 .
  • the FSM 110 When the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108 , the state of the FSM 110 is transferred from the audio playback state 504 to a TTS playback state 502 , and the FSM 110 controls the TTS circuit 200 to perform mixing processing according to the audio signal AU_S and the TTS data TTS_DATA by the control command CS.
  • the memory control circuit 114 may be arranged to read the TTS data TTS_DATA corresponding to the text message TEXT from the memory 120 .
  • the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sample rate of the TTS data TTS_DATA be the same as the sample rate of the audio signal AU_S (e.g. the sample rate of the TTS data TTS_DATA is equal to 96 kHz); adjust the data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as the bit depth of the audio signal (i.e. the bit depth of the TTS data TTS_DATA is equal to 24 bits); and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
  • the volume control circuit 206 may then perform volume control upon the TTS data TTS_DATA to generate the adjusted TTS data AD_TTS_DATA.
  • the volume control circuit 208 may perform volume control upon the audio signal AU_S to generate the adjusted audio signal AD_AU_S.
  • the volume control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 0% to 80%, and the volume control circuit 208 may be arranged to adjust the volume setting for playing the audio signal AU_S from a predetermined volume to 20%.
  • the mixing circuit 210 may be arranged to mix the adjusted audio signal AD_AU_S and the adjusted TTS data AD_TTS_DATA to generate the mixed audio signal MIX_AU_S.
  • the audio processing circuit 220 may perform audio processing upon the mixed audio signal MIX_AU_S to generate the audio output AU_OUT.
  • the TTS circuit 200 After the TTS circuit 200 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 502 to the audio playback state 504 , to keep playing the DP audio signal.
  • the audio control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 80% to 0%
  • the volume control circuit 208 may be arranged to adjust the volume setting for playing the audio signal AU_S from 20% to the predetermined volume. For brevity, similar descriptions for this embodiment are not repeated.
  • the SoC of the present invention integrates the TTS circuit having the TTS function and the OSD circuit arranged to control OSD of the text message into the same chip, the asynchrony between the text message display and the speech playback can be greatly improved.
  • the cost can be greatly reduced.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Human Computer Interaction (AREA)
  • Audiology, Speech & Language Pathology (AREA)
  • Health & Medical Sciences (AREA)
  • Computational Linguistics (AREA)
  • Stereophonic System (AREA)
  • Digital Computer Display Output (AREA)
  • Liquid Crystal Substances (AREA)

Abstract

A system on a chip (SoC) includes an on-screen display (OSD) circuit, a memory control circuit, and an audio processor. The OSD circuit is arranged to control OSD of a text message. The memory control circuit is coupled to a memory, and is arranged to read a text-to-speech (TTS) data corresponding to the text message from the memory. The audio processor is coupled to the memory control circuit, and includes a TTS circuit, wherein the TTS circuit is arranged to: receive the TTS data from the memory control circuit, and generate an audio output according to at least the TTS data.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention is related to a display system, and more particularly, to a system on a chip (SoC) applied to a display system, which can integrate a text-to-speech (TTS) circuit having a TTS function and an on-screen display (OSD) circuit arranged to control OSD of a text message into the same chip at a same time.
2. Description of the Prior Art
In a conventional display system, having an OSD menu that can show a text message, if the display system is required to play speech corresponding to the text message through a speaker or a headphone, an additional SoC having a TTS function must be coupled to the exterior of a scaler SoC in the display system, which may result in increased cost. In addition, the display system further needs to control the SoC having a TTS function through a user command interface, which may result in asynchrony between the text message display and the speech playback.
With this in mind, a novel SoC that can integrate a TTS circuit having a TTS function and an OSD circuit arranged to control OSD of a text message into the same chip at a same time is urgently needed.
SUMMARY OF THE INVENTION
It is therefore one of the objectives of the present invention to provide an SoC that can integrate a TTS circuit having a TTS function and an OSD circuit arranged to control OSD of a text message into the same chip at a same time. It is also an objective of the present invention to provide an associated display system.
According to an embodiment of the present invention, an SoC is provided. The SoC may include an OSD circuit, a memory control circuit, and an audio processor. The OSD circuit may be arranged to control OSD of a text message. The memory control circuit may be coupled to a memory, and may be arranged to read a TTS data corresponding to the text message from the memory. The audio processor may be coupled to the memory control circuit, and may include a TTS circuit, wherein the TTS circuit may be arranged to: receive the TTS data from the memory control circuit; and generate an audio output according to at least the TTS data.
According to an embodiment of the present invention, a display system is provided. The display system may include a memory and an SoC, wherein the memory may be arranged to store a TTS data. The SoC may include an OSD circuit, a memory control circuit, and an audio processor. The OSD circuit may be arranged to control OSD of a text message. The memory control circuit may be coupled to the memory, and may be arranged to read the TTS data from the memory, wherein the TTS data corresponds to the text message. The audio processor may be coupled to the memory control circuit, and may include a TTS circuit, wherein the TTS circuit may be arranged to: receive the TTS data from the memory control circuit; and generate an audio output according to at least the TTS data.
One of the benefits of the present invention is that, since the SoC of the present invention integrates the TTS circuit having the TTS function and the OSD circuit arranged to control OSD of the text message into the same chip, asynchrony between the text message display and the speech playback can be greatly improved. In addition, since there is no need to couple an additional SoC having a TTS function to the exterior of the scaler SoC in the display system of the present invention, the cost can be greatly reduced.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram illustrating a display system according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an audio processor according to an embodiment of the present invention.
FIG. 3 is a flow chart illustrating controlling a text-to-speech circuit by a finite-state machine shown in FIG. 1 according to an embodiment of the present invention.
FIG. 4 is an example of the flow chart shown in FIG. 3 according to an embodiment of the present invention.
FIG. 5 is another example of the flow chart shown in FIG. 3 according to an embodiment of the present invention.
DETAILED DESCRIPTION
FIG. 1 is a diagram illustrating a display system 10 according to an embodiment of the present invention. As shown in FIG. 1 , the display system 10 includes a scaler system on a chip (SoC) 100, a memory 120, a display 140, an audio processing circuit 160, and an audio playback device 180, wherein the memory 120 may be a random access memory (RAM) or a serial peripheral interface (SPI) flash memory, but the present invention is not limited thereto. The scaler SoC 100 includes a receiving circuit 102, a video processor 104, an audio processor 106, an on-screen display (OSD) circuit 108, a finite-state machine (FSM) 110, a transmitting circuit 112, and a memory control circuit 114. The receiving circuit 102 may be arranged to receive an input signal IN_S, wherein the input signal IN_S may include a video signal VI_S and an audio signal AU_S. For example, the input signal IN_S may be a display port (DP) signal, a high definition multimedia interface (HDMI) signal, a video graphics array (VGA) signal, or an AUX IN signal.
The video processor 104 may be coupled to the receiving circuit 102, and may be arranged to process the video signal VI_S, wherein when a text message TEXT is required to be shown on the display 140, the video processor 104 may notify the OSD circuit 108 to perform related processing. Since the video processor 104 in the display system 10 is well known to those skilled in the art, and the operation of the video processor 104 is not the focus of the present invention, only the operations of the audio processor 106, the OSD circuit 108, and the FSM 110 are described in detail herein. The OSD circuit 108 may be coupled to the video processor 104 and the display 140, and may be arranged to control OSD of the text message TEXT. The memory 120 may be arranged to store a text-to-speech (TTS) data TTS_DATA corresponding to the text message TEXT. It should be noted that, in order to save memory space, the TTS data TTS_DATA may be a monaural audio signal. The memory control circuit 114 may be coupled to the memory 120, and may read the TTS data TTS_DATA from the memory 120. The audio processor 106 may be coupled to the receiving circuit 102, and may be arranged to receive the audio signal AU_S. In addition, the audio processor 106 may be further coupled to the memory control circuit 114, and may include a TTS circuit 107, wherein the TTS circuit 107 may be arranged to: receive the TTS data TTS_DATA from the memory control circuit 114; and generate an audio output A OUT according to at least the TTS data TTS_DATA. The FSM 110 may be coupled between the audio processor 106 and the OSD circuit 108, and may receive a TTS command TTS_CMD from the OSD circuit 108, and transmit a control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 to generate the audio output AU_OUT according to at least the TTS data TTS_DATA.
Under a condition that the TTS circuit 107 in the audio processor 106 receives the TTS data TTS_DATA from the memory control circuit 114 and the audio processor 106 does not receive the audio signal AU_S from the receiving circuit 120, the FSM 110 transmits the control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 (more particularly, the TTS circuit 107) to generate the audio output AU_OUT only according to the TTS data TTS_DATA. In another example, under a condition that the audio processor 106 receives the audio signal AU_S from the receiving circuit 120 and the TTS circuit 107 receives the TTS data TTS_DATA from the memory control circuit 114, the FSM 110 transmits the control command CS to the audio processor 106 according to the TTS command TTS_CMD, for controlling the audio processor 106 (more particularly, the TTS circuit 107) to perform mixing processing according to the audio signal and the TTS data, in order to generate the audio output AU_OUT.
The transmitting circuit 112 may be coupled to the audio processor 106, and may be arranged to transmit the audio output AU_OUT to the audio processing circuit 160, wherein the transmitting circuit 112 may be an integrated interchip sound (I2P) transmitting circuit, a Sony/Philips Digital Interface Format (S/PDIF) transmitting circuit, or an AUX IN transmitting circuit. The audio processing circuit 160 may be coupled to the transmitting circuit 112, and may perform audio processing upon the audio output AU_OUT transmitted by the transmitting circuit 112, to generate a processed audio output P_AU_OUT. For example, the audio processing circuit 160 may include an audio codec and an audio amplifier SoC, but the present invention is not limited thereto. The audio playback device 180 may be coupled to the audio processing circuit 160, and may be arranged to play the processed audio output P_AU_OUT. For example, the audio playback device 180 may be a speaker or a headphone.
FIG. 2 is a diagram illustrating an audio processor 20 according to an embodiment of the present invention, wherein the audio processor 106 shown in FIG. 1 may be implemented by the audio processor 20 shown in FIG. 2 . As shown in FIG. 2 , the audio processor includes a TTS circuit 200 and an audio processing circuit 220. The TTS circuit 200 includes a first in first out (FIFO) circuit 202, an upsampling circuit 204, volume control circuits 206 and 208, and a mixing circuit 210. The FIFO circuit 202 may be coupled to the memory control circuit 114, and may be arranged to receive the TTS data TTS_DATA from the memory control circuit 114. The upsampling circuit 204 may be coupled to the FIFO circuit 202, and may be arranged to perform upsampling processing upon the TTS data TTS_DATA. For example, if the audio processor 20 receives the audio signal AU_S, the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make a sampling rate of the TTS data TTS_DATA be the same as a sampling rate of the audio signal AU_S; adjust data size of the TTS data TTS_DATA to make a bit depth of the TTS data TTS_DATA be the same as a bit depth of the audio signal AU_S; and/or map the TTS data TTS_DATA from the monaural audio signal to a binaural audio signal. In another example, if the audio processor 20 does not receive audio signal AU_S, the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sampling rate of the TTS data TTS_DATA be the same as a predetermined sample rate; adjust data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as a predetermined bit depth; and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
The volume control circuit 206 may be coupled to the upsampling circuit 204, and may be arranged to perform volume control upon the TTS data TTS_DATA to generate an adjusted TTS data AD_TTS_DATA. The volume control circuit 208 may be arranged to receive the audio signal AU_S, and perform volume control upon the audio signal AU_S to generate an adjusted audio signal AD_AU_S. The mixing circuit 210 may be coupled to the volume control circuits 206 and 208, and may be arranged to mix the adjusted TTS data AD_TTS_DATA and the adjusted audio signal AD_AU_S to generate a mixed audio signal MIX_AU_S. For example, if the audio processor 20 receives the audio signal AU_S, the mixing circuit 210 may mix the adjusted TTS data AD_TTS_DATA and the adjusted audio signal AD_AU_S to generate the mixed audio signal MIX_AU_S (i.e. the audio output AU_OUT is generated according to the mixed audio signal MIX_AU_S). In another example, if the audio processor 20 does not receive the audio signal AU_S, the mixing circuit 210 may directly transmit the adjusted TTS data AD_TTS_DATA to the audio processing circuit 220 (i.e. the audio output AU_OUT is generated according to the adjusted TTS data AD_TTS_DATA) for subsequent processing. The audio processing circuit 220 may be coupled to the mixing circuit 210, and may perform audio processing upon the mixed audio signal MIX_AU_S (or the adjusted TTS data AD_TTS_DATA) to generate the audio output AU_OUT. For example, the audio processing circuit 220 may include a volume control circuit (not shown), and the volume control circuit may be arranged to perform volume control upon the mixed audio signal MIX_AU_S (or the adjusted TTS data AD_TTS_DATA) to generate the audio output AU_OUT.
FIG. 3 is a flowchart illustrating controlling the TTS circuit 107 by the FSM 110 shown in FIG. 1 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor and the TTS circuit 200 shown in FIG. 2 . The FSM 110 may transmit the control command CS to the audio processor 106 according to the TTS command TTS_CMD from the OSD circuit 108, for controlling the audio processor 106 (more particularly, the TTS circuit 107) to generate the audio output AU_OUT according to at least the TTS data TTS_DATA. As shown in FIG. 3 , an initial state of the FSM 110 is an audio preparing state 300, and states of the FSM 110 may further include a TTS playback state 302 and an audio playback state 304. When the FSM 110 is in the audio preparing state 300, the FSM 110 waits for the TTS circuit 107 to receive the audio signal AU_S or waits to receive the TTS command TTS_CMD from the OSD circuit 108.
Under a condition that the FSM 110 is initially in the audio preparing state 300, when the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108, the state of the FSM 110 is transferred from the audio preparing state 300 to the TTS playback state 302, and the FSM 110 controls the TTS circuit 107 to generate the audio output AU_OUT only according to the TTS data TTS_DATA (more particularly, the adjusted TTS data AD_TTS_DATA) by the control command CS. After the TTS circuit 107 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 302 to the audio preparing state 300.
Under a condition that the FSM 110 is initially in the audio preparing state 300, when the TTS circuit 107 receives the audio signal AU_S, the state of the FSM 110 is transferred from the audio preparing state 300 to the audio playback state 304 for controlling playback of the audio signal AU_S, and the FSM 100 controls the TTS circuit 107 to generate the audio output AU_OUT only according to the audio signal AU_S (more particularly, the adjusted audio signal AD_AU_S) by the control command CS. After the TTS circuit 107 does not receive the audio signal AU_S, the state of the FSM 110 is transferred from the audio playback state 304 to the audio preparing state 300.
Under a condition that the FSM 110 is initially in the audio playback state 304, when the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108, the state of the FSM 110 is transferred from the audio playback state 304 to the TTS playback state 302, and the FSM 110 controls the TTS circuit 107 to perform mixing processing according to the audio signal AU_S and the TTS data TTS_DATA (i.e. mix the adjusted audio signal AD_AU_S and the adjusted TTS data AD_TTS_DATA to generate the mixed audio signal MIX_AU_S) by the control command CS, to generate the audio output AU_OUT according to the mixed audio signal MIX_AU_S. After the TTS circuit 107 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 302 to the audio playback state 304, to keep playing the audio signal AU_S.
FIG. 4 is an example of the flow chart shown in FIG. 3 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor 20 and the TTS circuit 200 shown in FIG. 2 . In this embodiment, the audio processor 20 does not receive the audio signal AU_S, and the predetermined sample rate and the predetermined bit depth are set as 48 kHz and 24 bits, respectively, by the upsampling circuit 204. In addition, in this example, the transfer of the state of the FSM 110 may be illustrated by dashed lines. When the OSD of the text message TEXT is required to be controlled, the OSD circuit 108 may transmit the TTS command TTS_CMD to the audio processor 20, and the state of the FSM 110 may be transferred from an audio preparing state 400 to a TTS playback state 402 for playing the TTS data TTS_DATA. The memory control circuit 114 may be arranged to read the TTS data TTS_DATA corresponding to the text message TEXT from the memory 120. After the TTS circuit 200 receives the TTS data TTS_DATA from the memory control circuit 114, the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sample rate of the TTS data TTS_DATA be the same as the predetermined sample rate (i.e. 48 kHz); adjust the data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as the predetermined bit depth (i.e. 24 bits); and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
Afterwards, the volume control circuit 206 may perform volume control upon the TTS data TTS_DATA to generate the adjusted TTS data AD_TTS_DATA. For example, the volume control circuit 206 may be arranged to adjust a volume setting for playing the TTS data TTS_DATA from 0% to 80%. Although the audio processor 20 does not receive the audio signal AU_S, the volume control circuit 208 may still set a volume setting for playing the audio signal AU_S to be maintained at a predetermined volume (e.g. 0%). The mixing circuit 210 may be arranged to directly transmit the adjusted TTS data AD_TTS_DATA to the audio processing circuit 220 for subsequent processing (i.e. the audio output AU_OUT is generated according to the adjusted TTS data AD_TTS_DATA). The audio processing circuit 220 may perform audio processing upon the adjusted TTS data AD_TTS_DATA to generate the audio output AU_OUT. After the TTS circuit 200 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 402 to the audio preparing state 400. In addition, the audio control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 80% to 0%, and the volume control circuit 208 may be arranged to set the volume setting for playing the audio signal AU_S to be maintained at the predetermined volume (e.g. 0%). For brevity, similar descriptions for this embodiment are not repeated in detail here.
FIG. 5 is another example of the flow chart shown in FIG. 3 according to an embodiment of the present invention, wherein the audio processor 106 and the TTS circuit 107 shown in FIG. 1 may be implemented by the audio processor 20 and the TTS circuit 200 shown in FIG. 2 . In this embodiment, the audio processor 20 receives the audio signal AU_S, wherein the audio signal AU_S is a DP audio signal, and the sample rate and the bit depth of the audio signal AU_S are 96 kHz and 24 bits, respectively. In addition, in this example, the transfer of the state of the FSM 110 may be illustrated by dashed lines. Initially, the FSM 110 is in an audio playback state 504. When the FSM 110 receives the TTS command TTS_CMD from the OSD circuit 108, the state of the FSM 110 is transferred from the audio playback state 504 to a TTS playback state 502, and the FSM 110 controls the TTS circuit 200 to perform mixing processing according to the audio signal AU_S and the TTS data TTS_DATA by the control command CS. The memory control circuit 114 may be arranged to read the TTS data TTS_DATA corresponding to the text message TEXT from the memory 120. After the TTS circuit 200 receives the TTS data TTS_DATA from the memory control circuit 114, the upsampling circuit 204 may be arranged to: perform frequency-increasing upon the TTS data TTS_DATA to make the sample rate of the TTS data TTS_DATA be the same as the sample rate of the audio signal AU_S (e.g. the sample rate of the TTS data TTS_DATA is equal to 96 kHz); adjust the data size of the TTS data TTS_DATA to make the bit depth of the TTS data TTS_DATA be the same as the bit depth of the audio signal (i.e. the bit depth of the TTS data TTS_DATA is equal to 24 bits); and/or map the TTS data TTS_DATA from the monaural audio signal to the binaural audio signal.
The volume control circuit 206 may then perform volume control upon the TTS data TTS_DATA to generate the adjusted TTS data AD_TTS_DATA. The volume control circuit 208 may perform volume control upon the audio signal AU_S to generate the adjusted audio signal AD_AU_S. For example, the volume control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 0% to 80%, and the volume control circuit 208 may be arranged to adjust the volume setting for playing the audio signal AU_S from a predetermined volume to 20%. The mixing circuit 210 may be arranged to mix the adjusted audio signal AD_AU_S and the adjusted TTS data AD_TTS_DATA to generate the mixed audio signal MIX_AU_S. The audio processing circuit 220 may perform audio processing upon the mixed audio signal MIX_AU_S to generate the audio output AU_OUT. After the TTS circuit 200 generates the audio output AU_OUT (e.g. after the audio playback device 180 finishes playing the processed audio output P_AU_OUT), the state of the FSM 110 is transferred from the TTS playback state 502 to the audio playback state 504, to keep playing the DP audio signal. In addition, the audio control circuit 206 may be arranged to adjust the volume setting for playing the TTS data TTS_DATA from 80% to 0%, and the volume control circuit 208 may be arranged to adjust the volume setting for playing the audio signal AU_S from 20% to the predetermined volume. For brevity, similar descriptions for this embodiment are not repeated.
In summary, since the SoC of the present invention integrates the TTS circuit having the TTS function and the OSD circuit arranged to control OSD of the text message into the same chip, the asynchrony between the text message display and the speech playback can be greatly improved. In addition, since there is no need to couple an additional SoC with TTS function to the exterior of the scaler SoC in the display system, the cost can be greatly reduced.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims (8)

What is claimed is:
1. A system on a chip (SoC), comprising:
an on-screen display (OSD) circuit, arranged to control OSD of a text message;
a memory control circuit, coupled to a memory, and arranged to read a text-to-speech (TTS) data corresponding to the text message from the memory;
an audio processor, coupled to the memory control circuit, and comprising a TTS circuit, wherein the TTS circuit is arranged to:
receive the TTS data from the memory control circuit; and
generate an audio output according to at least the TTS data; and
a finite-state machine (FSM), coupled to the OSD circuit and the audio processor, and arranged to receive a TTS command from the OSD circuit and, according to the TTS command, control the audio processor to generate the audio output according to at least the TTS data;
wherein an initial state of the FSM is an audio preparing state, and when the FSM is in the audio preparing state, the FSM waits for the TTS circuit to receive an audio signal or waits for receiving the TTS command from the OSD circuit;
wherein when the TTS circuit receives the audio signal, a state of the FSM is transferred from the audio preparing state to an audio playback state for controlling playback of the audio signal; when the FSM is in the audio playback state and the FSM receives the TTS command from the OSD circuit, the state of the FSM is transferred from the audio playback state to a TTS playback state, and the FSM controls the TTS circuit to perform mixing processing according to the audio signal and the TTS data to generate the audio output; and after the TTS circuit generates the audio output, the state of the FSM is transferred from the TTS playback state to the audio playback state.
2. The SoC of claim 1, wherein the TTS circuit is further arranged to perform volume control upon the TTS data to generate an adjusted TTS data, and the audio output is generated according to the adjusted TTS data.
3. The SoC of claim 1, wherein the TTS circuit is further arranged to:
receive an audio signal;
perform volume control upon the audio signal and the TTS data, respectively, to generate an adjusted audio signal and an adjusted TTS data; and
mix the adjusted audio signal and the adjusted TTS data to generate a mixed audio signal;
wherein the audio output is generated according to the mixed audio signal.
4. The SoC of claim 3, wherein the TTS circuit comprises:
an upsampling circuit, arranged to perform frequency-increasing upon the TTS data to make a sampling rate of the TTS data be the same as a sampling rate of the audio signal.
5. The SoC of claim 3, wherein the TTS circuit comprises:
an upsampling circuit, arranged to adjust data size of the TTS data to make a bit depth of the TTS data be the same as a bit depth of the audio signal.
6. The SoC of claim 1, wherein the TTS circuit is a monaural audio signal, and the TTS circuit comprises:
an upsampling circuit, arranged to:
perform frequency-increasing upon the TTS data to make a sampling rate of the TTS data be the same as a predetermined sampling rate;
adjust data size of the TTS data to make a bit depth of the TTS data be the same as a predetermined bit depth; and
map the TTS data from the monaural audio signal to a binaural audio signal.
7. The SoC of claim 1, wherein when the FSM receives the TTS command from the OSD circuit, the state of the FSM is transferred from the audio preparing state to the TTS playback state, and the FSM controls the TTS circuit to generate the audio output according to the TTS data; and after the TTS circuit generates the audio output, the state of the FSM is transferred from the TTS playback state to the audio preparing state.
8. A display system, comprising:
a memory, arranged to store a text-to-speech (TTS) data; and
a system on a chip (SoC), comprising:
an on-screen display (OSD) circuit, arranged to control OSD of a text message;
a memory control circuit, coupled to the memory, and arranged to read the TTS data from the memory, wherein the TTS data corresponds to the text message; and
an audio processor, coupled to the memory control circuit, and comprising a TTS circuit, wherein the TTS circuit is arranged to:
receive the TTS data from the memory control circuit; and
generate an audio output according to at least the TTS data; and
a finite-state machine (FSM), coupled to the OSD circuit and the audio processor, and arranged to receive a TTS command from the OSD circuit and, according to the TTS command, control the audio processor to generate the audio output according to at least the TTS data;
wherein an initial state of the FSM is an audio preparing state, and when the FSM is in the audio preparing state, the FSM waits for the TTS circuit to receive an audio signal or waits for receiving the TTS command from the OSD circuit;
wherein when the TTS circuit receives the audio signal, a state of the FSM is transferred from the audio preparing state to an audio playback state for controlling playback of the audio signal; when the FSM is in the audio playback state and the FSM receives the TTS command from the OSD circuit, the state of the FSM is transferred from the audio playback state to a TTS playback state, and the FSM controls the TTS circuit to perform mixing processing according to the audio signal and the TTS data to generate the audio output; and after the TTS circuit generates the audio output, the state of the FSM is transferred from the TTS playback state to the audio playback state.
US18/137,432 2022-05-25 2023-04-20 System on a chip and display system Active 2044-03-29 US12481617B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW111119478 2022-05-25
TW111119478A TWI799275B (en) 2022-05-25 2022-05-25 System on chip and display system

Publications (2)

Publication Number Publication Date
US20230409516A1 US20230409516A1 (en) 2023-12-21
US12481617B2 true US12481617B2 (en) 2025-11-25

Family

ID=86948713

Family Applications (1)

Application Number Title Priority Date Filing Date
US18/137,432 Active 2044-03-29 US12481617B2 (en) 2022-05-25 2023-04-20 System on a chip and display system

Country Status (2)

Country Link
US (1) US12481617B2 (en)
TW (1) TWI799275B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12468335B2 (en) * 2022-07-19 2025-11-11 Dell Products L.P. Information handling system peripheral text-to- speech solution with automatic volume attenuation

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200707239A (en) 2005-08-01 2007-02-16 Chao-Hsin Lo E-mail assisted and text-to-sound system
US20180279099A1 (en) * 2015-09-18 2018-09-27 Telefonaktiebolaget Lm Ericsson (Publ) Management of Communication Between M2M Device and M2M Server
US20180293046A1 (en) * 2017-04-11 2018-10-11 Funai Electric Co., Ltd. Playback device
CN113689810A (en) 2020-05-18 2021-11-23 Lg电子株式会社 Image display apparatus and method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102364674B1 (en) * 2015-04-27 2022-02-18 엘지전자 주식회사 Display device, and controlling method thereof
US10530879B2 (en) * 2017-09-20 2020-01-07 Microsoft Technology Licensing, Llc Interactive notification panels in a computing system
TWI792024B (en) * 2020-07-22 2023-02-11 瑞昱半導體股份有限公司 Graphics processing device
TWI733535B (en) * 2020-07-24 2021-07-11 技嘉科技股份有限公司 Display system and display apparatus
CN112882678B (en) * 2021-03-15 2024-04-09 百度在线网络技术(北京)有限公司 Image-text processing method, image-text processing display method, image-text processing device, image-text processing equipment and storage medium

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200707239A (en) 2005-08-01 2007-02-16 Chao-Hsin Lo E-mail assisted and text-to-sound system
US20180279099A1 (en) * 2015-09-18 2018-09-27 Telefonaktiebolaget Lm Ericsson (Publ) Management of Communication Between M2M Device and M2M Server
US20180293046A1 (en) * 2017-04-11 2018-10-11 Funai Electric Co., Ltd. Playback device
CN113689810A (en) 2020-05-18 2021-11-23 Lg电子株式会社 Image display apparatus and method thereof

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Chiang, the specification, including the claims, and drawings in the U.S. Appl. No. 17/540,200 , Filing Date: Dec. 1, 2021.
Chiang, the specification, including the claims, and drawings in the U.S. Appl. No. 17/540,200 , Filing Date: Dec. 1, 2021.

Also Published As

Publication number Publication date
US20230409516A1 (en) 2023-12-21
TWI799275B (en) 2023-04-11
TW202347116A (en) 2023-12-01

Similar Documents

Publication Publication Date Title
CN101047774B (en) Audio-visual (AV) apparatus and control method thereof
US8446533B2 (en) Television apparatus and method for controlling the same
US6885900B1 (en) Method and apparatus for providing multiple channel audio in a computing system
KR100517502B1 (en) Apparatus and method for reproducing signal from DVI/HDMI compatible connector
US11887617B2 (en) Electronic device for speech recognition and control method thereof
US12481617B2 (en) System on a chip and display system
US20120069218A1 (en) Virtual video capture device
KR200496852Y1 (en) Display apparatus with automatic noise reduction function
WO2016136257A1 (en) Sink device
US10809967B2 (en) Analog/digital audio converter and a method thereof
JP2006129261A (en) Signal output device and signal output method
EP2328093A2 (en) Terminal device, media processing apparatus connected to terminal device, and controlling method thereof
US8229272B2 (en) Video apparatus capable of changing video output mode of external video apparatus according to video input mode of the video apparatus and control method thereof
JP4784653B2 (en) Audio data transmitting apparatus, audio data transmitting method, audio data receiving apparatus, and audio data receiving method
CN100536348C (en) Audio decoding system, multimedia decoding system, and channel reconfiguration method
JP2004178558A (en) Computer system and control method thereof
US20070003230A1 (en) Image display device and recording medium reproducing apparatus and recording medium reproducing method
CN117238270A (en) SoC and display system
JP6910721B2 (en) Electronic devices and information terminal systems
US11347473B2 (en) Display device
JP2009022059A (en) AV equipment and interface system
US20250175758A1 (en) Electronic apparatus and controlling method thereof
JP2011082717A (en) Amplifier and program for the same
JP2003018690A (en) Audio signal unit
KR20250076899A (en) Electronic apparatus and controlling method thereof

Legal Events

Date Code Title Description
FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

AS Assignment

Owner name: REALTEK SEMICONDUCTOR CORP., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WU, CHENG-HUNG;KUNG, WEN-HSIA;REEL/FRAME:063394/0719

Effective date: 20220801

Owner name: REALTEK SEMICONDUCTOR CORP., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNOR'S INTEREST;ASSIGNORS:WU, CHENG-HUNG;KUNG, WEN-HSIA;REEL/FRAME:063394/0719

Effective date: 20220801

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: ALLOWED -- NOTICE OF ALLOWANCE NOT YET MAILED

Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT RECEIVED

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED

STCF Information on status: patent grant

Free format text: PATENTED CASE