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TWM298227U - Structure of submerged-type chip - Google Patents

Structure of submerged-type chip Download PDF

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Publication number
TWM298227U
TWM298227U TW095201480U TW95201480U TWM298227U TW M298227 U TWM298227 U TW M298227U TW 095201480 U TW095201480 U TW 095201480U TW 95201480 U TW95201480 U TW 95201480U TW M298227 U TWM298227 U TW M298227U
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TW
Taiwan
Prior art keywords
layer
wafer
copper layer
groove
top surface
Prior art date
Application number
TW095201480U
Other languages
Chinese (zh)
Inventor
Cheng-You Huang
Original Assignee
Trison Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trison Technology Corp filed Critical Trison Technology Corp
Priority to TW095201480U priority Critical patent/TWM298227U/en
Publication of TWM298227U publication Critical patent/TWM298227U/en

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    • H10W72/536
    • H10W72/5363
    • H10W72/884

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  • Laminated Bodies (AREA)

Description

、M298227 八、新型說明: 【新型所屬之技術領域】 本創作係有關於一種本創 是其晶片之頂端面裸露於封裳體於:種晶曰片物^ 積,且提昇晶片之散熱效果者\ 。力以大置縮小封裝體之體 【先前技術】 一般晶片需透過封裝, ty 错以保遵該晶片。習知的曰η &壯α 構,係將晶片直接黏社於 白*的曰日片封裝結 腳.奸心η 再將晶片上的金線電氣連接於接 腳,此種封I結合方式用於複> u運接於接 晶片結構的整體厚声 曰曰曰、、于裝結構,產生的缺點為: 居度太大’晶片封褒不穩固,產品的不良率高。 【新型内容】 所欲解決之技術問題: 晶片封裝不穩固、產 解決前述習知複層晶片在整體厚度太大 品不良率高的缺點。 解決問題的技術手段: 銅層本式晶片結構’其包含有下銅層、中間銅層、上 __ :間銅Π:二:下銅層的上方組設第-聚丙 心· 中間銅層认一開口形成第-凹槽,該第1 匕底面以接合膠黏 丙烯;播聶罢^ j -囬於中間銅層上方組設第二聚 ·,5層’該上銅層及第二聚丙稀層設-開口形成第二 “面:凹槽中填設膠體再以接合膠黏接第二晶片,於第二晶 側邊與上銅層頂面鋪設膠體封裝。 M298227 新型之技術手段功效: 本創作的沉入式晶片結構, 形成凹槽及中間銅層開口形成凹 有效減少複層晶片結構的厚度, 不良率。 其目的功效在於,藉由上銅層開口 槽’使晶片固定、後組於凹槽中, 增進晶片封裝的穩固,降低產品的 【貫施方式】 為使貴審查委員瞭解本創作之目的、特徵及功效’兹藉由下述 具體實施例,並配合所附之圖式,對本創作做一詳細說明,說明如后: 作第—圖所示,係為本創作實施例的組合剖視示意圖;本創 層u、第:入曰式晶片結構’其包含有下銅層11、中間銅層12、上銅 曰 弟一晶片21及第二晶片22,其中, 該中層11的上方組設第—聚丙稀層31後疊置中間銅層12, 結第二曰。片曰12設:開口形成第—凹槽41’該第一凹槽^中喪組黏 在本實^ 21 ’將苐—晶片21的金線211電氣連接於中間銅層12; 形成第-凹槽4卜蚀Μ ⑼ ㈣弟1丙烯層31而 該第 吏“-凹槽41的底面為下銅層11的頂面,且 2凹槽41的深度大於第—晶片21的厚度,於第 且 又接合膠51黏接第一曰片 9 氐面 第—晶片21/s “ 21的底面’中間銅層12的上表面高於 之間;於中間銅:〗,即第一晶片21沉後於下銅層11與中間_ u 該上· 13以\2上方組4二聚丙烯層32後疊置上銅層13, 曰 苐—聚丙烯層32對應設一開口形成第-凹;^ 42认 弟二凹槽42中填㈣辦”“ 风弟一凹槽42,於 勒接第-θ H ㈣52至红聚㈣層32頂面,再以接合膠51 第m2’使第二晶片22頂面、側邊與上銅^頂面等高,1 6 M298227 將第二晶片22的金線221電氣連接於上銅層〗3.於第二晶片22頂 面、側邊與上銅層13頂面鋪設膠體53封裝。 .茶考第二圖’係為本創作實施例二的組合剖視示意圖 ,該 :間銅層12開設的第-凹槽41,未穿過第-聚丙烯層3!,該第一凹 ^ 入第一聚丙烯層31,該第一凹槽41,的深度大於第-晶 的底面中第—凹槽a底面塗設接合膝51,黏接第-晶片21 的底二,中間銅層12的上表面高於第一晶片21的頂面,第一晶片 1 /儿肷於中間銅層12與下銅層u之間,將第一晶 電氣連接於中間銅層12 ; 曰日 、…線211 後疊置上銅層Π,該上銅二層二上::設第二聚丙烯層32 成對應設_間口形 Μ頂面且低於上銅層13頂面:填:膠體52至南於第二聚丙烯層 第二心頂面略;於 電氣連接於上銅層",於第二2 、第-:片22的金線221 鋪設膠體53,封裝。 弟—甜片22頂面、側邊與上銅層13頂面 中門^第三圖’料本㈣實_三的組合魏4圖;其中,該 中間銅層12開設的第 /、平这 -聚丙烯層31,节第— 牙過弟一聚丙稀層31且未凹入第 於第 面凹槽41’’的底面為第-聚丙烯層31的頂面, 一晶片Π 接合勝51”來黏接第―晶以的底面,第 曰曰片.21的頂面約與中間鋼声 一 矛 叫電氣連接於'中間銅層12二頂面寺南,將第-晶片21的金線 32後叠置上銅層〗3,該上銅:層12上方組設第二聚丙烯層 形成第二凹桿49”,於笛 曰及苐二及丙烯層32對應設一開口 等高,再以槽=填設膠體52”至上銅層13頂面 禾一日日片22,將第二晶片22的金線221 7 M298227 M298227 側邊與上銅層13頂面 電氣連接於上銅層13,於第二晶片22頂面 鋪設膠體53”封裝。 由上所述,本創作為—前所未見之新型結構,有效減少複層晶 片的厚度’增進晶片封I的穩固,降低產品的不良率,具有創作上 之進步性、實祕及新穎性,合於新型專射請之要件,爰具文提 出專利申請。 ▲以上已將本創作作-詳細說明,惟以上所述者,僅為本創作之 I佳貝施例而已’ S不能限定本創作實施之範圍。即凡依本創作申 明範圍所作之均等i化與料等1應仍屬本創作之專利涵蓋範圍 内。 、M298227 【圖式簡單說明】 第一圖係為本創作實施例的組合剖視示意圖; 第二圖係為本創作實施例二的組合剖視示意圖; 第三圖係為本創作實施例三的組合剖視示意圖。 【主要元件符號說明】 10 下銅層 11 中間銅層 12 上銅層 21 第一晶片 211 金線 22 第二晶片 221金線 31 第一聚丙烯層 32 第二聚丙烯層 41 第一凹槽M298227 VIII. New Description: [New Technology Field] This creation is about the creation of a wafer whose top surface is exposed to the body of the wafer, and the heat dissipation effect of the wafer is improved. \ . The force is used to reduce the size of the package. [Prior Art] Generally, the chip needs to pass through the package, and the ty is wrong to ensure compliance with the chip. The well-known 曰η & αα structure, the wafer directly adhered to the white * 曰 片 package pin. 恋心 η and then the gold wire on the wafer is electrically connected to the pin, this type of sealing I The overall thick sound 曰曰曰, and the mounting structure used for the splicing of the wafer structure are: The residence is too large, the wafer sealing is not stable, and the defective rate of the product is high. [New content] Technical problem to be solved: The chip package is not stable, and the above-mentioned conventional multilayer wafer has a disadvantage that the overall thickness is too large and the defective rate is high. Technical means for solving the problem: copper layer-type wafer structure 'which includes a lower copper layer, an intermediate copper layer, an upper __: a copper plaque: two: a lower copper layer is disposed above the first - poly propylene core · intermediate copper layer An opening forms a first groove, the bottom surface of the first crucible is joined to the adhesive propylene; and the second layer is disposed above the intermediate copper layer, and the fifth layer is formed on the upper copper layer and the second polypropylene layer. The layer-opening forms a second "face: the groove is filled with a colloid and then bonded to the second wafer by a bonding glue, and a colloidal package is placed on the top side of the second crystal side and the upper copper layer. M298227 New technical means: The submerged wafer structure is created, and the recesses and the intermediate copper layer openings are formed to effectively reduce the thickness and the defect rate of the multi-layered wafer structure. The purpose of the method is to fix the wafer by the open copper channel and to form a recess. In the groove, the stability of the chip package is enhanced, and the product is reduced. In order to make the reviewer understand the purpose, features and effects of the present invention, the following specific embodiments are used together with the attached drawings. A detailed explanation of this creation, as explained below: The figure is a schematic cross-sectional view of the present embodiment; the layered layer u, the first type of wafer structure includes a lower copper layer 11, an intermediate copper layer 12, and a copper wafer 21 and the second wafer 22, wherein the middle layer 11 is provided with a first polypropylene layer 31, and then the intermediate copper layer 12 is stacked to form a second layer. The sheet 12 is provided with an opening to form a first groove 41'. A groove ^ 丧 组 黏 黏 ^ ^ 21 21 21 21 21 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 电气 电气 电气 电气 电气 电气 电气吏"-the bottom surface of the groove 41 is the top surface of the lower copper layer 11, and the depth of the 2 groove 41 is greater than the thickness of the first wafer 21, and the bonding paste 51 is bonded to the first cymbal 9 The upper surface of the intermediate copper layer 12 of the wafer 21/s "bottom of the 21" is higher than the middle; in the middle copper: the first wafer 21 is sunk behind the lower copper layer 11 and the middle _u The upper layer 4 of the second polypropylene layer 32 is superposed on the copper layer 13, and the bismuth-polypropylene layer 32 is correspondingly provided with an opening to form a first-concave; ^42 is recognized by the second groove 42 (four) to do "" Slot 42, in the case of the first - θ H (four) 52 to the top surface of the red poly (four) layer 32, and then the top surface of the second wafer 22, the side edge and the upper copper surface are equal by the bonding paste 51 m2', the gold wire of the second wafer 22 of 16 M298227 221 is electrically connected to the upper copper layer. 3. The top surface of the second wafer 22, the side edge and the top surface of the upper copper layer 13 are laid with a gel 53 package. The second picture of the tea test is a combination of the second embodiment of the present invention. In the schematic view, the first groove 41 of the inter-copper layer 12 does not pass through the first-polypropylene layer 3!, the first recess is inserted into the first polypropylene layer 31, and the depth of the first groove 41 is greater than The bottom surface of the first groove of the first crystal is coated with the bonding knee 51, and the bottom surface of the first wafer 21 is bonded. The upper surface of the intermediate copper layer 12 is higher than the top surface of the first wafer 21, and the first wafer 1 / Between the intermediate copper layer 12 and the lower copper layer u, the first crystal is electrically connected to the intermediate copper layer 12; the next day, the line 211 is superposed on the copper layer Π, the upper copper layer 2 is: The second polypropylene layer 32 is disposed correspondingly to the top surface of the top surface of the copper layer 13 and lower than the top surface of the upper copper layer 13: filling: colloid 52 to the second top surface of the second polypropylene layer; Copper layer ", in the second 2, The -: gold wire 221 of the piece 22 is laid with a colloid 53 and is packaged. Brother - the top surface of the sweet sheet 22, the side and the top surface of the upper copper layer 13 in the middle of the door ^ the third picture of the material (four) real _ three combination Wei 4 map; wherein the middle copper layer 12 opened the first / flat - a polypropylene layer 31, a section of the first layer of the polypropylene layer 31 and not recessed into the top surface of the first groove 41'' is the top surface of the first polypropylene layer 31, and a wafer 接合 is bonded to 51" To bond the bottom surface of the first-crystal, the top surface of the second film.21 is electrically connected to the intermediate steel sound. The middle copper layer 12 is the top surface of the temple, and the gold wire 32 of the first wafer 21 is Stacking the upper copper layer 〖3, the upper copper: the second polypropylene layer is formed on the layer 12 to form the second concave rod 49", and the opening is equal to the height of the snapper and the bismuth and the propylene layer 32, and then the groove Filling the colloid 52" to the top surface of the upper copper layer 13 and the day piece 22, electrically connecting the side of the gold wire 221 7 M298227 M298227 of the second wafer 22 and the top surface of the upper copper layer 13 to the upper copper layer 13, A two-chip 22 is coated with a gel 53" package on the top surface. From the above, this creation is a new structure that has never been seen before, effectively reducing the thickness of the multi-layer wafer. It enhances the stability of the wafer seal I, reduces the defect rate of the product, and has creative progress, real and novelty. In the case of a new type of special shot, the patent application is filed. ▲The above has been made--detailed, but the above is only for the purpose of this creation. That is, the equalization and material of the scope of this creation shall remain within the scope of the patent of this creation. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a schematic cross-sectional view of the present embodiment; the second figure is a schematic cross-sectional view of the second embodiment of the present invention; A schematic cross-sectional view. [Main component symbol description] 10 Lower copper layer 11 Intermediate copper layer 12 Upper copper layer 21 First wafer 211 Gold wire 22 Second wafer 221 Gold wire 31 First polypropylene layer 32 Second polypropylene layer 41 First groove

41” 第一凹槽 42 第二凹槽 42, 第二凹槽 42” 第二凹槽 51 接合膠 51’接合膠 51” 接合膠 52 膠體 52, 膠體 9 M298227 52,, 膠體 53 膠體 53, 膠體 53,, 膠體41" first groove 42 second groove 42, second groove 42" second groove 51 bonding glue 51' bonding glue 51" bonding glue 52 colloid 52, colloid 9 M298227 52,, colloid 53 colloid 53, colloid 53, colloid

Claims (1)

M298227 九、申請專利範圍: l一種沉入式晶片結構, 晶片及第二晶片,其中、,包含有下銅層、中間銅層、上銅層、第- 二銅設第-聚丙稀層後疊置中間銅層’該中間旬 第1槽,該第,中嵌組黏接第-晶片^ =層上方組設第二聚丙稀層後疊置上銅層,該上銅層及第 細層對應設,形成第二凹槽,於第 :丙 黏接第二晶片,於第 具叹膠體,再甘欠入 根❹物㈣'層⑽鋪設膠體封裝。 — ㈣弟1項之沉人式晶片結構,其中,該第一曰M 弟一晶片底面以接合膠黏接。 曰曰、 3.根據中請專利範圍第丨項之沉人式晶片結構,其中, 該第一凹槽穿過第—聚 的頂面,且該第-凹槽的、;^大二 ⑸槽的底面為下铜層 面黏接第-晶片底面,中門第一晶片的厚度,於第—凹槽底 -曰曰片沉嵌於下銅層與中間銅層之間。 该第 • 4·根據申請專利範圍第1項之沉入式晶片結構,其 填設的膝體至第二聚丙稀層頂面高度,使第二凹槽令=二Γ槽中 面與上銅層頂面等高。 、第一日日片頂 5·根據申請專利範圍第i項之沉人式晶片結構,其中, 設的第-凹槽局部凹入第—聚丙稀層且未穿過第:中:銅層開 請專利_】項所述之沉人式3 a丙稀層。 槽中填設的膠體高於第二聚丙烯層頂面且低於上料=弟二凹 黏接第二晶片,使第二晶片頂面高於上銅層頂面。曰、面,嵌入 7·根據申請專利範圍第1項所述之沉入式晶月結構,其中,該中門銅 11 .M298227 曰開a的弟1槽未穿過 層’該第1槽的 丙:烯層且未凹入第 8·根據申請專利範圍第】項:广層的頂面。 項所逑之沉入式晶片結構,其中 凹槽中填設膠體至上銅層頂面等高,再黏接第二晶片。 聚丙稀 該第二M298227 IX. Patent application scope: l A submerged wafer structure, a wafer and a second wafer, wherein, comprising a lower copper layer, an intermediate copper layer, an upper copper layer, and a second-copper layer-polypropylene layer The intermediate copper layer is disposed in the first slot of the middle portion, and the second inlaid layer is disposed on the upper layer of the intermediate layer, and the second layer of the polypropylene layer is stacked thereon, and the upper copper layer and the second layer are correspondingly disposed. The second recess is formed, and the second wafer is bonded to the second wafer, and the gel is encapsulated in the layer (10) of the sinus. — (4) The sinker-type wafer structure of the younger brother, wherein the bottom surface of the first wafer is bonded by a bonding glue. 3. The sinker wafer structure according to the third aspect of the patent application, wherein the first groove passes through the top surface of the first gather, and the first groove has a second (5) groove The bottom surface is a lower copper layer bonded to the bottom surface of the first wafer, and the thickness of the first wafer of the middle gate is embedded between the lower copper layer and the intermediate copper layer at the bottom of the first groove. The fourth embodiment of the sunken wafer structure according to the scope of the patent application, the filling of the knee body to the top surface of the second polypropylene layer, so that the second groove order = the middle surface of the second groove and the upper copper The top surface of the layer is the same height. The first day of the film top 5 · According to the scope of the patent application scope i of the sinking wafer structure, wherein the first groove is partially recessed into the first - polypropylene layer and not through the first: in: copper layer Please use the sinking type 3 a propylene layer described in the patent _]. The colloid filled in the groove is higher than the top surface of the second polypropylene layer and lower than the top material = the second surface of the second wafer, so that the top surface of the second wafer is higher than the top surface of the upper copper layer.曰,面, embedded 7· The submerged crystal structure according to item 1 of the patent application scope, wherein the middle door copper 11. M298227 splits a brother 1 slot does not pass through the layer 'the first slot C: olefin layer and not recessed. 8. According to the scope of the patent application: the top surface of the wide layer. The submerged wafer structure of the item, wherein the recess is filled with a colloid to the top surface of the upper copper layer, and then the second wafer is bonded. Polypropylene 1212
TW095201480U 2006-01-23 2006-01-23 Structure of submerged-type chip TWM298227U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI501373B (en) * 2012-06-06 2015-09-21 益芯科技股份有限公司 Pre-filled cavity-type three-dimensional package module with line layout

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI501373B (en) * 2012-06-06 2015-09-21 益芯科技股份有限公司 Pre-filled cavity-type three-dimensional package module with line layout

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