TWI900078B - Pixel circuit - Google Patents

Abstract

A pixel circuit includes a driving transistor, a light-emitting element, and a voltage signal feedback circuit. The light-emitting element is coupled to the driving transistor to emit light according to a driving current provided by the driving transistor. The voltage signal feedback circuit is coupled between a gate terminal of the driving transistor and one of two terminals of the light-emitting element. The voltage signal feedback circuit includes plural transistors. The voltage signal feedback circuit feeds a voltage at the one of two terminals of the light-emitting element back to the gate terminal of the driving transistor during an emission period of the pixel circuit, thereby compensating the driving current.

Description

pixel circuit

The present disclosure relates to a pixel circuit, and more particularly to a pixel circuit with a driving current compensation function.

Micro LEDs can generate their own light, eliminating the need for a backlight module or liquid crystal layer. These devices are not only energy-efficient but also boast high efficiency, high brightness, high resolution, high color saturation, and fast response times. Their low energy consumption, simple structure, small size, and thin profile make them a popular technology for the next generation of mainstream display products.

However, as the lighting time of the micro-LED increases, the temperature of the micro-LED gradually increases, which causes the brightness and luminous efficiency of the micro-LED to decrease. Therefore, how to improve the above problem has become a concern of technical personnel in this field.

At least one embodiment of the present disclosure provides a pixel circuit comprising a drive transistor, a light-emitting element, and a voltage signal feedback circuit. The light-emitting element is coupled to the drive transistor to emit light in response to a drive current provided by the drive transistor. The voltage signal feedback circuit is coupled between a gate terminal of the drive transistor and an anode terminal of the light-emitting element. The voltage signal feedback circuit includes multiple transistors and a capacitor. The capacitor is coupled in series with at least one of the multiple transistors. During the pixel circuit's light-emitting period, the voltage signal feedback circuit is used to feed back the voltage at the anode terminal of the light-emitting element through the capacitor to the gate terminal of the drive transistor to compensate for the drive current.

In at least one embodiment of the present disclosure, the plurality of transistors include a first transistor, a second transistor, and a third transistor. The source terminal of the first transistor is coupled to the source terminal of the third transistor, and the drain terminal of the first transistor is coupled to the drain terminal of the third transistor. The first transistor and the third transistor are coupled between the anode terminal of the light-emitting element and the first terminal of the capacitor. The second terminal of the capacitor is coupled to the gate terminal of the drive transistor. The first terminal of the second transistor is coupled to the anode terminal of the light-emitting element, and the second terminal of the second transistor is coupled to a system low voltage terminal or a starting voltage terminal.

In at least one embodiment of the present disclosure, the pixel circuit further includes a light-emission control transistor coupled in series between the driver transistor and the light-emitting element. The light-emission control transistor and the first transistor are both controlled by a light-emission control signal, which turns them on during the pixel circuit's light-emission period. The second and third transistors are both controlled by a first scanning signal, which turns them on during the pixel circuit's reset and compensation periods.

In at least one embodiment of the present disclosure, the second and third transistors are both controlled by a first scanning signal, which turns on the second and third transistors during the pixel circuit's reset and compensation periods. The first transistor is controlled by a second scanning signal, which turns on the first transistor during at least one portion of the pixel circuit's light-emitting period.

In at least one embodiment of the present disclosure, the pixel circuit further includes a write transistor, a capacitor, and a reset transistor. The first terminal of the write transistor is configured to receive a data signal. The capacitor is coupled between the second terminal of the write transistor and the gate terminal of the drive transistor. The reset transistor is coupled between the second terminal of the write transistor and a reference high voltage terminal. The reset transistor is controlled by a third scanning signal, which is configured to turn on the reset transistor during a reset period of the pixel circuit.

In at least one embodiment of the present disclosure, the light-emitting element is a micro-light-emitting diode (Micro LED), and the driving transistor and the plurality of transistors are all P-type metal oxide semiconductor field effect transistors (MOSFET).

At least one embodiment of the present disclosure further provides a pixel circuit comprising a driver transistor, a light-emitting element, a capacitor, and a voltage signal feedback circuit. The light-emitting element is coupled to the driver transistor to emit light in response to a driving current provided by the driver transistor. The voltage signal feedback circuit is connected in series with the capacitor and coupled between the gate terminal of the driver transistor and the cathode terminal of the light-emitting element. The voltage signal feedback circuit includes a plurality of transistors coupled to each other. During the pixel circuit's light-emitting period, the voltage at the anode of the light-emitting element is fed back to the source of the drive transistor, and the voltage signal feedback circuit is used to feed back the voltage at the cathode of the light-emitting element to the gate of the drive transistor through a capacitor to compensate for the drive current.

In at least one embodiment of the present disclosure, the plurality of transistors include a first transistor and a second transistor. The first transistor is connected in series with a capacitor and coupled between the gate terminal of the drive transistor and the cathode terminal of the light-emitting element. The first terminal of the second transistor is coupled between the first transistor and the capacitor, and the second terminal of the second transistor is coupled to the starting voltage terminal.

In at least one embodiment of the present disclosure, the pixel circuit further includes a first light-emission control transistor coupled in series between the driver transistor and the light-emitting element. Both the first light-emission control transistor and the first transistor are controlled by a first light-emission control signal, which is used to turn on the first light-emission control transistor and the first transistor during the pixel circuit's light-emission period. A second transistor is controlled by a first scanning signal, which is used to turn on the second transistor during the pixel circuit's reset period.

In at least one embodiment of the present disclosure, the pixel circuit further includes a second light-emission control transistor and a first reset transistor. The second light-emission control transistor is coupled in series between the system high voltage terminal and the drive transistor. A first terminal of the first reset transistor is coupled between the second light-emission control transistor and the drive transistor, and a second terminal of the first reset transistor is coupled to the gate terminal of the drive transistor.

In at least one embodiment of the present disclosure, the first reset transistor is an indium gallium zinc oxide (IGZO) transistor.

In at least one embodiment of the present disclosure, the pixel circuit further includes a second reset transistor coupled between the system high voltage terminal and the gate terminal of the drive transistor. The second reset transistor is controlled by a first scanning signal, which is used to turn on the second reset transistor during a reset period of the pixel circuit.

In at least one embodiment of the present disclosure, the second reset transistor is an indium gallium zinc oxide transistor.

In at least one embodiment of the present disclosure, the light-emitting element is a micro-luminescent diode, and the driving transistor and the plurality of transistors are all N-type metal oxide semiconductor field effect transistors.

In order to make the above features and advantages of the present disclosure more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings.

The following discusses embodiments of the present disclosure in detail. However, it should be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific contexts. The embodiments discussed and disclosed are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The terms "first," "second," etc., used herein, do not specifically denote a sequence or order; they are used solely to distinguish between elements or operations described using the same technical terminology.

FIG1 is a schematic diagram of a pixel circuit according to the first to sixth embodiments of the present disclosure. The pixel circuit shown in FIG1 includes a drive transistor T1, an initialization transistor T2, a write transistor T3, compensation transistors T4 and T5, a light-emitting control transistor T6, a reset transistor T7, a capacitor C1, a light-emitting element L1, and a voltage signal feedback circuit 120. The light-emitting element L1 is a current-driven element, such as a micro-LED or an organic light-emitting diode (OLED), but the present disclosure is not limited thereto. Specifically, the pixel circuit shown in FIG1 is suitable for use in a micro-LED display or an organic light-emitting diode, but the present disclosure is not limited thereto.

The driver transistor T1, the emission control transistor T6, and the light-emitting element L1 constitute the light-emitting circuit of the pixel circuit shown in Figure 1. The driver transistor T1 has a gate terminal G for receiving the data signal Data, and the emission control transistor T6 has a gate terminal for receiving the emission control signal EM. The emission control transistor T6 is coupled in series between the driver transistor T1 and the light-emitting element L1. Specifically, the light-emitting element L1, the driver transistor T1, and the emission control transistor T6 are coupled in series between the system high voltage terminal VDD and the system low voltage terminal VSS, forming a current path.

The initialization transistor T2, write transistor T3, compensation transistors T4 and T5, reset transistor T7, and capacitor C1 form the control and compensation circuit of the pixel circuit shown in Figure 1. Reset transistor T7 has a gate terminal for receiving scanning signal S1, initialization transistor T2 has a gate terminal for receiving emission control signal EM, and write transistor T3 and compensation transistors T4 and T5 have gate terminals for receiving scanning signal S2.

The first terminal of the write transistor T3 is used to receive the data signal Data, the capacitor C1 is coupled between the second terminal B of the write transistor T3 and the gate terminal G of the drive transistor T1, and the initialization transistor T2 is coupled between the second terminal B of the write transistor T3 and the reference voltage terminal Vp.

During the reset period of the pixel circuit shown in FIG1 , the scanning signal S1 is controlled to turn on the reset transistor T7 so that one end of the reset transistor T7 is reset by the voltage of the starting voltage terminal Vini to which the other end of the reset transistor T7 is coupled.

During the compensation period of the pixel circuit shown in FIG1 , the scanning signal S1 is controlled to turn off the reset transistor T7. On the other hand, the scanning signal S2 is controlled to turn on the write transistor T3 and the compensation transistors T4 and T5. This causes the capacitor C1 to couple to one end of the write transistor T3 (i.e., the second end B of the write transistor T3) to receive the data signal Data, and the compensation transistors T4 and T5 form a charging circuit. The diameter of the capacitor C1 is such that the terminal coupled to the compensation transistor T4 (i.e., the gate terminal G of the driver transistor T1) is charged to a voltage equal to the difference between the system high voltage terminal VDD (i.e., the source terminal of the driver transistor T1 coupled to the system high voltage terminal VDD) and the critical voltage of the driver transistor T1 (i.e., VDD - |Vth|, which can also be expressed as VDD + Vth, where the critical voltage Vth is a negative value). In this way, capacitor C1 stores the critical voltage of the driver transistor T1. In other words, during the compensation period of the pixel circuit shown in Figure 1, compensation can be provided for the critical voltage of the driver transistor T1.

During the luminescence period of the pixel circuit shown in Figure 1 , the luminescence control signal EM is controlled to turn on the initialization transistor T2 and the luminescence control transistor T6. This causes the voltage at one end of capacitor C1 coupled to the initialization transistor T2 (i.e., the second end B of the write transistor T3) to change from the voltage of the data signal Data to the voltage of the reference voltage terminal Vp. This voltage change is then coupled through capacitor C1 to the other end of capacitor C1 coupled to the drive transistor T1. Furthermore, because both the drive transistor T1 and the luminescence control transistor T6 are turned on, the luminescence circuit of the pixel circuit shown in Figure 1 generates a conduction current flowing through the light-emitting element L1, causing it to emit light. In other words, the light-emitting element L1 is coupled to the drive transistor T1 and emits light in response to the drive current provided by the drive transistor T1.

As shown in Figure 1, the pixel circuit's voltage signal feedback circuit 120 is coupled between the gate terminal G of the drive transistor T1 and the anode terminal A of the light-emitting element L1. The voltage signal feedback circuit 120 is used to feed back the voltage at the anode terminal A of the light-emitting element L1 to the gate terminal G of the drive transistor T1 to compensate for the aforementioned drive current.

Specifically, the purpose of the voltage signal feedback circuit 120 is to detect the voltage at the anode terminal A of the light-emitting element L1 and feed it back to the gate terminal G of the drive transistor T1. In this way, when the voltage at the anode terminal A of the light-emitting element L1 changes due to specific reasons (such as high temperature or aging), the drive transistor T1 can immediately change its drive current to achieve current compensation for the drive current. For example, when the light-emitting element L1 is a micro-luminescent diode and its temperature rises due to thermal effects due to long-term lighting, the forward voltage (Vf) of the light-emitting element L1 will decrease as the temperature rises, causing the voltage at the anode terminal A of the light-emitting element L1 (i.e., VSS+Vf) to decrease. At the same time, the voltage at the anode terminal A of the light-emitting element L1 is fed back to the gate terminal G of the drive transistor T1 through the voltage signal feedback circuit 120. As a result, the drive transistor T1 will also output a larger drive current due to the decrease in the voltage at its gate terminal G. Therefore, the brightness of the light-emitting element L1 will also increase, thereby achieving the effect of current compensation. In general, the voltage signal feedback circuit 120 can instantly detect the electrical changes of the micro-luminescent diode (i.e., the light-emitting element L1) caused by temperature increase and cause the drive transistor T1 to increase the drive current, thereby increasing the brightness of the micro-luminescent diode (i.e., the light-emitting element L1). This can reduce mura (uneven brightness) or color shift caused by brightness differences.

FIG2 is a schematic diagram of a pixel circuit according to the first embodiment of the present disclosure. The voltage signal feedback circuit 120 of the pixel circuit shown in FIG2 includes transistors T8, T9, and T10 and a capacitor C2, wherein capacitor C2 is coupled in series with transistor T8, and capacitor C2 is coupled in series with transistor T10.

As shown in FIG. 2 , in the first embodiment of the present disclosure, the source terminal of transistor T8 is coupled to the source terminal of transistor T10, and the drain terminal of transistor T8 is coupled to the drain terminal of transistor T10. Transistor T8 and transistor T10 are coupled between the anode terminal A of light-emitting element L1 and the first terminal C of capacitor C2. The second terminal of capacitor C2 is coupled to the gate terminal G of drive transistor T1. The first terminal of transistor T9 is coupled to the anode terminal A of light-emitting element L1, and the second terminal of transistor T9 is coupled to the system low voltage terminal VSS.

As shown in FIG. 2 , in the first embodiment of the present disclosure, the drive transistor T1, the initialization transistor T2, the write transistor T3, the compensation transistors T4 and T5, the light control transistor T6, the reset transistor T7, and the transistors T8, T9, and T10 are all P-type metal oxide semiconductor field effect transistors (MOSFETs).

Figure 3 shows signal timing waveforms for the pixel circuit according to the first embodiment of the present disclosure. As shown in Figures 2 and 3, in the first embodiment of the present disclosure, transistors T9 and T10 are both controlled by a scan signal S3, which turns on transistors T9 and T10 during the pixel circuit's reset and compensation periods. As shown in Figures 2 and 3, in the first embodiment of the present disclosure, initialization transistor T2, emission control transistor T6, and transistor T8 are all controlled by an emission control signal EM, which turns on initialization transistor T2, emission control transistor T6, and transistor T8 during the pixel circuit's emission period.

As shown in Figures 2 and 3 , as discussed above, scan signal S2 is used to turn on compensation transistors T4 and T5 during the pixel circuit's compensation period, charging gate G of drive transistor T1 to VDD + Vth. Scan signal S2 is also used to turn on write transistor T3 during the pixel circuit's compensation period, allowing the second terminal B of write transistor T3 to receive data signal Data. Furthermore, scan signal S3 is used to turn on transistors T9 and T10 during the pixel circuit's compensation period, causing the first terminal C of capacitor C2 to have a voltage equal to the system low-voltage terminal VSS.

Next, as shown in Figures 2 and 3 , and as discussed above, the emission control signal EM is used to turn on initialization transistor T2 during the pixel circuit's emission period, causing the second terminal B of write transistor T3 to have a voltage of reference voltage terminal Vp. Furthermore, the emission control signal EM is used to turn on emission control transistors T6 and T8 during the pixel circuit's emission period, causing the first terminal C of capacitor C2 to have a voltage of VSS + Vf (i.e., the voltage of anode terminal A of light-emitting element L1 at this time).

According to the contents of the above two paragraphs, in the first embodiment of the present disclosure, during the luminescence period of the pixel circuit, the voltage level of the gate terminal G of the driving transistor T1 will change accordingly due to the capacitive coupling effect, wherein the capacitive coupling effect includes: (a1) the capacitor C1 couples the voltage change of the second terminal B of the write transistor T3 (from the data signal Data to the voltage of the reference voltage terminal Vp) to the gate terminal G of the driving transistor T1; and (a2) the capacitor C2 couples the voltage of the capacitor C2 to the gate terminal G of the driving transistor T1. The voltage change at the first terminal C (from the voltage of the system low voltage terminal VSS to a voltage of VSS+Vf) is coupled to the gate terminal G of the driving transistor T1. That is, the voltage signal feedback circuit 120 is used to feed back the voltage of the anode terminal A of the light-emitting element L1 (also referred to as the voltage change (from the voltage of the system low voltage terminal VSS to a voltage of VSS+Vf)) to the gate terminal G of the driving transistor T1 through the capacitive coupling effect of the capacitor C2 during the luminescence period of the pixel circuit. Accordingly, during the luminescence period of the pixel circuit, the voltage level of the gate terminal G of the driving transistor T1 becomes as shown in the following formula (1): (1) Where, a1=C1/(C1+C2), a2=C2/(C1+C2).

After obtaining the voltage level of the gate terminal G of the driver transistor T1, it can be substituted into the driver current formula of the driver transistor T1: I _ds = k(V _GS - Vth) ² , where k is the transconductance parameter and V _GS is the gate-to-source bias voltage difference. Thus, in the first embodiment of the present disclosure, during the luminescence period of the pixel circuit, the driver current of the driver transistor T1 can be expressed as shown in the following formula (2): (2)

On the one hand, because equation (2) includes the forward voltage Vf of light-emitting element L1, it can be seen that the driving current provided by driver transistor T1, which is used to make light-emitting element L1 emit light, can compensate for the forward voltage Vf of light-emitting element L1. In other words, current compensation can be performed on the driving current. On the other hand, because equation (2) does not include the voltage of the system low-voltage terminal VSS, it can be seen that the voltage of the system low-voltage terminal VSS has already been compensated.

FIG4 is a schematic diagram of a pixel circuit according to a second embodiment of the present disclosure. The pixel circuit of the second embodiment shown in FIG4 is similar to the pixel circuit of the first embodiment shown in FIG2 . The difference between the two is that, as shown in FIG4 , in the second embodiment of the present disclosure, transistor T8 is controlled by the scanning signal S4 rather than the emission control signal EM.

Figure 5 shows signal timing waveforms for a pixel circuit according to the second embodiment of the present disclosure. As shown in Figures 4 and 5, in the second embodiment of the present disclosure, transistor T8 is controlled by a scan signal S4. Scan signal S4 is used to turn on transistor T8 during at least one time period during the pixel circuit's light-emitting period. It is worth noting that in the second embodiment of the present disclosure, the duration and timing of the at least one time period can be adjusted based on actual user needs. For example, as shown in Figure 5, scan signal S4 is used to turn on transistor T8 during a time period T _ON after the pixel circuit's light-emitting period begins, and scan signal S4 turns off transistor T8 after this time period T _ON .

On the one hand, in the second embodiment of the present disclosure, during the luminescence period of the pixel circuit, when transistor T8 is turned on, the driving current of the driving transistor T1 will be as shown in the above formula (2). On the other hand, in the second embodiment of the present disclosure, during the luminescence period of the pixel circuit, when transistor T8 is turned off, since transistor T10 is also turned off, the capacitive coupling effect on the gate terminal G of the driving transistor T1 no longer includes the capacitive coupling effect of capacitor C2 but only includes the capacitive coupling effect of capacitor C1. Therefore, the driving current of the driving transistor T1 can be expressed as shown in the following formula (3): (3) Since formula (3) does not include the forward voltage Vf of the light-emitting element L1, it can be seen that during the light-emitting period of the pixel circuit, when the transistor T8 is turned off, no current compensation is performed on the driving current, that is, the pixel circuit turns off the current compensation function.

Figure 6 is a schematic diagram of a pixel circuit according to a third embodiment of the present disclosure. The pixel circuit of the third embodiment shown in Figure 6 is similar to the pixel circuit of the first embodiment of the present disclosure shown in Figure 2 . The difference between the two is that, as shown in Figure 6 , the second terminal of transistor T9 is coupled to the starting voltage terminal Vini rather than the system low voltage terminal VSS. It should be noted that the signal timing waveforms of the pixel circuit of the third embodiment of the present disclosure are the same as those in Figure 3 .

As shown in Figures 6 and 3 , the scan signal S2 is used to turn on the write transistor T3 during the pixel circuit's compensation period, causing the second terminal B of the write transistor T3 to receive the data signal Data. The scan signal S3 is also used to turn on transistors T9 and T10 during the pixel circuit's compensation period, causing the first terminal C of the capacitor C2 to have the voltage of the starting voltage terminal Vini.

Next, as shown in Figures 6 and 3 , the emission control signal EM is used to turn on the initialization transistor T2 during the pixel circuit's emission period, causing the second terminal B of the write transistor T3 to have a voltage of the reference voltage terminal Vp. The emission control signal EM is used to turn on the transistor T8 during the pixel circuit's emission period, causing the first terminal C of the capacitor C2 to have a voltage of VSS + Vf (i.e., the voltage of the anode terminal A of the light-emitting element L1 at this time).

According to the above two paragraphs, in the third embodiment of the present disclosure, during the pixel circuit's light-emitting period, the voltage level of the gate terminal G of the drive transistor T1 changes accordingly due to a capacitive coupling effect. The capacitive coupling effect includes: (a1) capacitor C1 couples the voltage change at the second terminal B of the write transistor T3 (from the data signal Data to the voltage of the reference voltage terminal Vp) to the gate terminal G of the drive transistor T1; and (a2) capacitor C2 couples the voltage change at the first terminal C of capacitor C2 (from the voltage of the starting voltage terminal Vini to a voltage of VSS+Vf) to the gate terminal G of the drive transistor T1. Therefore, during the luminescence period of the pixel circuit, the voltage level of the gate terminal G of the driving transistor T1 becomes as shown in the following formula (4): (4)

After obtaining the voltage level of the gate terminal G of the driver transistor T1, it can be substituted into the driver current formula of the driver transistor T1: I _ds = k(V _GS - Vth) ² , where k is the transconductance parameter and V _GS is the gate-to-source bias voltage difference. Thus, in the third embodiment of the present disclosure, during the luminescence period of the pixel circuit, the driver current of the driver transistor T1 can be expressed as shown in the following formula (5): (5)

Since equation (5) includes the forward voltage Vf of the light-emitting element L1, it can be seen that the driving current provided by the driving transistor T1 for causing the light-emitting element L1 to emit light can be current compensated for the forward voltage Vf of the light-emitting element L1, that is, current compensation can be performed on the driving current.

FIG7 is a schematic diagram of a pixel circuit according to a fourth embodiment of the present disclosure. The pixel circuit of the fourth embodiment of the present disclosure shown in FIG7 is similar to the pixel circuit of the first embodiment of the present disclosure shown in FIG2 . The difference between the two is that, as shown in FIG7 , in the fourth embodiment of the present disclosure, the pixel circuit further includes a reset transistor T11. In addition, the drain terminal of the reset transistor T7 is coupled to the gate terminal G of the drive transistor T1. During the reset period of the pixel circuit, the scanning signal S1 is controlled to turn on the reset transistor T7, so that the gate terminal G of the drive transistor T1 is connected to the starting voltage coupled to the source terminal of the reset transistor T7. The reset transistor T11 is reset by the voltage at terminal Vini. The reset transistor T11 has a gate terminal for receiving the scan signal S1. During the reset period of the pixel circuit, the scan signal S1 is controlled to turn on the reset transistor T11, causing the second terminal B of the write transistor T3 to be reset by the voltage at the reference high voltage terminal Vref coupled to one terminal of the reset transistor T11. This ensures that the voltage at the reference high voltage terminal Vref is reliably applied to the second terminal B of the write transistor T3 during the reset period of the pixel circuit, rather than being in a floating state. It should be noted that the signal timing waveform diagram of the pixel circuit of the fourth embodiment of the present disclosure is the same as that in FIG3 .

FIG8 is a schematic diagram of a pixel circuit according to a fifth embodiment of the present disclosure. The pixel circuit of the fifth embodiment of the present disclosure shown in FIG8 is similar to the pixel circuit of the second embodiment of the present disclosure shown in FIG4. The difference between the two is that, as shown in FIG8, in the fifth embodiment of the present disclosure, the pixel circuit further includes a reset transistor T11. In addition, the drain terminal of the reset transistor T7 is coupled to the gate terminal G of the drive transistor T1. During the reset period of the pixel circuit, the scanning signal S1 is controlled to turn on the reset transistor T7, so that the gate terminal G of the drive transistor T1 is coupled to the source terminal of the reset transistor T7. The reset transistor T11 is reset by the voltage of the initial voltage terminal Vini. The reset transistor T11 has a gate terminal for receiving the scan signal S1. During the reset period of the pixel circuit, the scan signal S1 is controlled to turn on the reset transistor T11, so that the second terminal B of the write transistor T3 is reset by the voltage of the reference high voltage terminal Vref coupled to one end of the reset transistor T11. This ensures that the voltage of the reference high voltage terminal Vref is reliably applied to the second terminal B of the write transistor T3 during the reset period of the pixel circuit, rather than being in a floating state. It should be noted that the signal timing waveform diagram of the pixel circuit of the fifth embodiment of the present disclosure is the same as that in FIG5 .

FIG9 is a schematic diagram of a pixel circuit according to a sixth embodiment of the present disclosure. The pixel circuit of the sixth embodiment of the present disclosure shown in FIG9 is similar to the pixel circuit of the third embodiment of the present disclosure shown in FIG6 . The difference between the two is that, as shown in FIG9 , in the sixth embodiment of the present disclosure, the pixel circuit further includes a reset transistor T11. In addition, the drain terminal of the reset transistor T7 is coupled to the gate terminal G of the drive transistor T1. During the reset period of the pixel circuit, the scanning signal S1 is controlled to turn on the reset transistor T7, so that the gate terminal G of the drive transistor T1 is coupled to the source terminal of the reset transistor T7. The reset transistor T11 is reset by the voltage of the initial voltage terminal Vini. The reset transistor T11 has a gate terminal for receiving the scan signal S1. During the reset period of the pixel circuit, the scan signal S1 is controlled to turn on the reset transistor T11, so that the second terminal B of the write transistor T3 is reset by the voltage of the reference high voltage terminal Vref coupled to one end of the reset transistor T11. This ensures that the voltage of the reference high voltage terminal Vref is reliably applied to the second terminal B of the write transistor T3 during the reset period of the pixel circuit, rather than being in a floating state. It should be noted that the signal timing waveform diagram of the pixel circuit of the sixth embodiment of the present disclosure is the same as that in FIG3 .

Figure 10 is a schematic diagram of a pixel circuit according to the seventh and eighth embodiments of the present disclosure. The pixel circuit shown in Figure 10 includes a drive transistor T21, emission control transistors T22 and T26, reset transistors T23 and T25, a write transistor T24, an emission control transistor T26, a capacitor C21, a light-emitting element L21, and a voltage signal feedback circuit 220. The light-emitting element L21 is a current-driven element, such as a micro-LED. Specifically, the pixel circuit shown in Figure 10 is suitable for use in a micro-LED display, but the present disclosure is not limited thereto.

The driver transistor T21, emission control transistors T22 and T26, and the light-emitting element L21 form the light-emitting circuit of the pixel circuit shown in Figure 10. The driver transistor T21 has a gate terminal G for receiving the sum of the data signal Data and its threshold voltage Vth. The emission control transistors T22 and T26 have gate terminals for receiving emission control signals EM1 and EM2, respectively. The emission control transistors T22 and T26 are coupled in series between the driver transistor T21 and the light-emitting element L21. The emission control transistor T22 is coupled in series between the system high voltage terminal VDD and the driver transistor T21, while the emission control transistor T26 is coupled in series between the driver transistor T21 and the light-emitting element L21. Specifically, the light-emitting element L21, the driving transistor T21, and the light-emitting control transistors T22 and T26 are connected in series and coupled between the system high voltage terminal VDD and the system low voltage terminal VSS to form a current path.

Reset transistors T23 and T25, write transistor T24, and capacitor C21 form the control and compensation circuit of the pixel circuit shown in Figure 10. Reset transistors T23 and T25 have gate terminals for receiving scan signal S1, and write transistor T24 has a gate terminal for receiving scan signal S2.

Among them, one end of the write transistor T24 is used to receive the data signal Data, and the other end of the write transistor T24 is coupled to the first end of the drive transistor T21. The capacitor C21 and the voltage signal feedback circuit 220 are connected in series and coupled between the cathode end of the light-emitting element L21 and the gate end G of the drive transistor T21. The reset transistor T23 is coupled to the drive transistor The first end of the reset transistor T23 is coupled between the light-emitting control transistor T22 and the drive transistor T21. The second end of the reset transistor T23 is coupled to the gate terminal G of the drive transistor T21. The reset transistor T25 is coupled between the starting voltage terminal Vini and the anode terminal ANO of the light-emitting element L21.

During the reset period of the pixel circuit shown in Figure 10 , the scanning signal S1 and the emission control signal EM1 are controlled to respectively turn on the reset transistor T23 and the emission control transistor T22, thereby resetting the voltage at the gate terminal G of the drive transistor T21 to the voltage of the system high voltage terminal VDD. During the reset period of the pixel circuit shown in Figure 10 , the scanning signal S1 is controlled to turn on the reset transistor T25, thereby resetting the voltage at the anode terminal ANO of the light-emitting element L21 to the voltage of the starting voltage terminal Vini.

During the compensation period of the pixel circuit shown in FIG10 , the scan signal S1 is controlled to turn off the reset transistors T23 and T25. Meanwhile, the scan signal S2 is controlled to turn on the write transistor T24, causing the first terminal of the drive transistor T21 to receive the data signal Data. Furthermore, the voltage at one terminal of the capacitor C21, which is coupled to the gate terminal G of the drive transistor T21, becomes the sum of the data signal Data and the critical voltage Vth of the drive transistor T21 (i.e., Data + Vth). Thus, capacitor C21 stores the critical voltage of the driving transistor T21. In other words, during the compensation period of the pixel circuit shown in FIG10 , compensation can be performed for the critical voltage of the driving transistor T21.

During the luminescence period of the pixel circuit shown in FIG10 , luminescence control signals EM1 and EM2 are controlled to turn on luminescence control transistors T22 and T26, respectively. The luminescence circuit of the pixel circuit shown in FIG10 generates a conduction current flowing through the luminescence element L21, causing it to emit light. In other words, the luminescence element L21 is coupled to the drive transistor T21 and emits light based on the drive current provided by the drive transistor T21.

As shown in Figure 10 , the pixel circuit's voltage signal feedback circuit 220 is connected in series with capacitor C21 and coupled between the gate terminal G of the drive transistor T21 and the cathode terminal of the light-emitting element L21. The voltage signal feedback circuit 220 is used to feed back the voltage at the cathode terminal of the light-emitting element L21 to the gate terminal G of the drive transistor T21, so that the voltage across the gate terminal G and the source terminal of the drive transistor T21 includes the forward voltage (Vf) of the light-emitting element L21. In this way, the pixel circuit including the voltage signal feedback circuit 220 can compensate for the aforementioned drive current.

Specifically, when the forward voltage (Vf) of the light-emitting element L21 changes due to certain reasons (such as high temperature or aging), the driving transistor T21 can instantly change its driving current to achieve current compensation for the driving current. For example, when the light-emitting element L21 is a micro-luminescent diode and its temperature rises due to thermal effects due to being lit for a long time, the forward voltage (Vf) of the light-emitting element L21 will decrease as the temperature rises, causing the voltage at the anode terminal ANO of the light-emitting element L21 (i.e., VSS+Vf) to decrease. At the same time, the driving transistor T21 will output a larger driving current due to the decrease in the voltage at the anode terminal ANO of the light-emitting element L21. Therefore, the brightness of the light-emitting element L21 will also increase, thereby achieving the effect of current compensation. In general, the pixel circuit including the voltage signal feedback circuit 220 can instantly detect the electrical changes of the micro-luminescent diode (i.e., the light-emitting element L21) caused by temperature increase and cause the drive transistor T21 to increase the drive current, thereby increasing the brightness of the micro-luminescent diode (i.e., the light-emitting element L21). This can reduce mura (uneven brightness) or color shift caused by brightness differences.

Figure 11 is a schematic diagram of a pixel circuit according to a seventh embodiment of the present disclosure. The voltage signal feedback circuit 220 of the pixel circuit shown in Figure 11 includes transistors T27 and T28. Transistor T27 and capacitor C21 are connected in series and coupled between the gate terminal G of the drive transistor T21 and the cathode terminal of the light-emitting element L21. A first terminal of transistor T28 is coupled between transistor T27 and capacitor C21, and a second terminal of transistor T28 is coupled to the starting voltage terminal Vini.

As shown in FIG11 , in the seventh embodiment of the present disclosure, the drive transistor T21, the light-emitting control transistors T22 and T26, the reset transistors T23 and T25, the write transistor T24, and the transistors T27 and T28 are all N-type MOSFETs.

Figure 12 shows signal timing waveforms for a pixel circuit according to the seventh embodiment of the present disclosure. As shown in Figures 11 and 12, in the seventh embodiment of the present disclosure, transistor T27 is controlled by the emission control signal EM2, which turns on transistor T27 during the pixel circuit's emission period. As shown in Figures 11 and 12, in the seventh embodiment of the present disclosure, transistor T28 is controlled by the scan signal S1, which turns on transistor T28 during the pixel circuit's reset period.

As shown in Figures 11 and 12 , in the seventh embodiment of the present disclosure, the scanning signal S1 is used to turn on the transistor T28 during the reset period of the pixel circuit, causing the second terminal B of the capacitor C21 to have the voltage of the starting voltage terminal Vini. The scanning signal S1 is used to turn on the reset transistor T25 during the reset period of the pixel circuit, causing the anode terminal ANO of the light-emitting element L21 to have the voltage of the starting voltage terminal Vini. The emission control signal EM1 and the scanning signal S1 are used to turn on the emission control transistor T22 and the reset transistor T23, respectively, during the reset period of the pixel circuit, causing the gate terminal G of the drive transistor T21 to have the voltage of the system high voltage terminal VDD.

As shown in FIG. 11 and FIG. 12 , in the seventh embodiment of the present disclosure, the scan signal S2 is used to turn on the write transistor T24 during the compensation period of the pixel circuit, so that the voltage of the gate terminal G of the drive transistor T21 becomes Data+Vth.

Next, as shown in Figures 11 and 12 , in the seventh embodiment of the present disclosure, emission control signals EM1 and EM2 are used to turn on emission control transistors T22 and T26, respectively, during the pixel circuit's emission period. This causes the voltage at anode terminal ANO of light-emitting element L21 to reach VSS + Vf. Since emission control transistor T26 is turned on during this period, the voltage at anode terminal ANO of light-emitting element L21 is fed back to the source terminal of driver transistor T21. Furthermore, emission control signal EM2 is used to turn on transistor T27 during the pixel circuit's emission period, causing the second terminal B of capacitor C21 to have a voltage equal to the system low-voltage terminal VSS.

According to the contents of the above two paragraphs, in the seventh embodiment of the present disclosure, during the luminescence period of the pixel circuit, the voltage level of the gate terminal G of the driving transistor T21 will change accordingly due to the capacitive coupling effect, wherein the above-mentioned capacitive coupling effect includes: the capacitor C21 changes the voltage of the second terminal B of the capacitor C21 (from the voltage of the starting voltage terminal Vini to The voltage signal feedback circuit 220 is coupled to the gate terminal G of the driving transistor T21 (the voltage of the system low voltage terminal VSS). That is, the voltage signal feedback circuit 220 is used to feed back the voltage of the cathode terminal of the light-emitting element L21 (the voltage of the system low voltage terminal VSS) to the gate terminal G of the driving transistor T21 through the capacitive coupling effect of the capacitor C21 during the luminescence period of the pixel circuit. Accordingly, during the luminescence period of the pixel circuit, the voltage level of the gate terminal G of the driving transistor T21 becomes as shown in the following formula (6): (6)

After obtaining the voltage level of the gate terminal G of the drive transistor T21, it can be substituted into the drive current formula of the drive transistor T21: I _ds = k(V _GS - Vth) ² . Thus, in the seventh embodiment of the present disclosure, during the luminescence period of the pixel circuit, the drive current of the drive transistor T21 can be expressed as shown in the following formula (7): (7)

On the one hand, because equation (7) includes the forward voltage Vf of light-emitting element L21, it can be seen that the driving current provided by driver transistor T21, which is used to make light-emitting element L21 emit light, can compensate for the forward voltage Vf of light-emitting element L21. In other words, current compensation can be performed on the driving current. On the other hand, because equation (7) does not include the voltage of the system low-voltage terminal VSS, it can be seen that the voltage of the system low-voltage terminal VSS has already been compensated.

It is worth mentioning that in the seventh embodiment of the present disclosure, the reset transistor T23 may use an indium gallium zinc oxide (IGZO) transistor, thereby making the pixel circuit of the seventh embodiment of the present disclosure suitable for low-frequency operation, but the present disclosure is not limited thereto.

Figure 13 is a schematic diagram of a pixel circuit according to an eighth embodiment of the present disclosure. The pixel circuit of the eighth embodiment shown in Figure 13 is similar to the pixel circuit of the seventh embodiment of the present disclosure shown in Figure 11 . The difference between the two is that, as shown in Figure 13 , in the eighth embodiment of the present disclosure, transistor T27 and emission control transistors T22 and T26 are all controlled by the emission control signal EM. This allows the pixel circuit of the eighth embodiment of the present disclosure to have only three sets of gate control signals (i.e., scanning signals S1, S2, and emission control signal EM). In addition, the gate of the reset transistor T23 is controlled by the scanning signal S2 rather than the scanning signal S1. Furthermore, the pixel circuit of the eighth embodiment of the present disclosure also includes a reset transistor T29. Reset transistor T29 is coupled between the system high voltage terminal VDD and the gate terminal G of the drive transistor T21. Reset transistor T29 has a gate terminal for receiving the scan signal S1. During the reset period of the pixel circuit, the scan signal S1 is controlled to turn on reset transistor T29, so that the gate terminal G of the drive transistor T21 is reset by the voltage of the system high voltage terminal VDD, to which one terminal of reset transistor T29 is coupled.

Figure 14 shows signal timing waveforms for a pixel circuit according to the eighth embodiment of the present disclosure. As shown in Figures 13 and 14 , in the eighth embodiment of the present disclosure, transistor T27 and emission control transistors T22 and T26 are all controlled by an emission control signal EM. This emission control signal EM turns on transistors T27, T22, and T26 during the pixel circuit's emission period.

It is worth mentioning that in the eighth embodiment of the present disclosure, the reset transistors T23 and T29 may use indium gallium zinc oxide (IGZO) transistors, thereby making the pixel circuit of the eighth embodiment of the present disclosure suitable for low-frequency operation, but the present disclosure is not limited thereto.

In summary, the pixel circuit proposed in this disclosure uses a voltage signal feedback circuit to feed back the voltage at one end of the light-emitting element to the gate terminal of the drive transistor to compensate for the drive current. This can reduce mura (uneven brightness) or color shift caused by brightness differences in the micro-LED due to thermal effects.

The above summarizes the features of several embodiments so that those skilled in the art can better understand the scope of the present disclosure. Those skilled in the art should understand that they can easily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same goals and/or achieve the same advantages as the embodiments described herein. Those skilled in the art should also understand that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and modifications without departing from the spirit and scope of the present disclosure.

120, 220: Voltage signal feedback circuit A, ANO: Anode B: Second terminal C: First terminal C1, C2, C21: Capacitor Data: Data signal EM, EM1, EM2: Lighting control signal G: Gate terminal L1, L21: Light-emitting element S1, S2, S3, S4: Scan signal T1, T21: Drive transistor T2: Initialization transistor T3, T24: Write transistor T4, T5: Compensation transistor T6, T22, T261: Lighting control transistor T7, T11, T23, T25, T29: Reset transistor T8, T9, T10, T27, T28: Transistor T _ON : Time period VDD: system high voltage terminal Vini: starting voltage terminal Vp: reference voltage terminal Vref: reference high voltage terminal VSS: system low voltage terminal

A better understanding of the present disclosure can be gained from the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. [Figure 1] is a schematic diagram of pixel circuits according to the first through sixth embodiments of the present disclosure. [Figure 2] is a schematic diagram of a pixel circuit according to the first embodiment of the present disclosure. [Figure 3] is a signal timing waveform diagram of the pixel circuit according to the first embodiment of the present disclosure. [Figure 4] is a schematic diagram of a pixel circuit according to the second embodiment of the present disclosure. [Figure 5] is a signal timing waveform diagram of the pixel circuit according to the second embodiment of the present disclosure. [Figure 6] is a schematic diagram of a pixel circuit according to the third embodiment of the present disclosure. [Figure 7] is a schematic diagram of a pixel circuit according to the fourth embodiment of the present disclosure. [Figure 8] is a schematic diagram of a pixel circuit according to the fifth embodiment of the present disclosure. [Figure 9] is a schematic diagram of a pixel circuit according to the sixth embodiment of the present disclosure. [Figure 10] is a schematic diagram of pixel circuits according to the seventh and eighth embodiments of the present disclosure. [Figure 11] is a schematic diagram of a pixel circuit according to the seventh embodiment of the present disclosure. [Figure 12] is a signal timing waveform diagram of the pixel circuit according to the seventh embodiment of the present disclosure. [Figure 13] is a schematic diagram of the pixel circuit according to the eighth embodiment of the present disclosure. [Figure 14] is a signal timing waveform diagram of the pixel circuit according to the eighth embodiment of the present disclosure.

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120: Voltage signal feedback circuit

A: Anode

B: Second end

C1: Capacitor

Data: Data signal

EM: Luminescence control signal

G: Gate terminal

L1: Light-emitting element

S1, S2: Scanning signal

T1: driving transistor

T2: Initialize transistors

T3: Write transistor

T4, T5: Compensation transistors

T6: Luminescence control transistor

T7: Reset transistor

VDD: System high voltage terminal

Vini: Starting voltage terminal

Vp: Reference voltage terminal

VSS: System low voltage terminal

Claims (12)

A pixel circuit includes: a drive transistor; a light-emitting element coupled to the drive transistor to emit light according to a drive current provided by the drive transistor; and a voltage signal feedback circuit coupled between a gate terminal of the drive transistor and an anode terminal of the light-emitting element; The voltage signal feedback circuit includes a plurality of transistors and a first capacitor, wherein the first capacitor is coupled in series with at least one of the transistors. The voltage signal feedback circuit is configured to feed back the voltage at the anode terminal of the light-emitting element to the gate terminal of the drive transistor via the first capacitor during a light-emitting period of the pixel circuit to compensate for the drive current. The light-emitting element is a micro-light-emitting diode (Micro LED), and the drive transistor and the transistors are both P-type metal oxide semiconductor field-effect transistors (MOSFETs). The pixel circuit as described in claim 1, wherein the transistors include a first transistor, a second transistor, and a third transistor, wherein a source terminal of the first transistor is coupled to a source terminal of the third transistor, and a drain terminal of the first transistor is coupled to a drain terminal of the third transistor, wherein the first transistor and the third transistor are coupled between the anode terminal of the light-emitting element and a first terminal of the first capacitor, wherein a second terminal of the first capacitor is coupled to the gate terminal of the drive transistor, wherein a first terminal of the second transistor is coupled to the anode terminal of the light-emitting element, and wherein a second terminal of the second transistor is coupled to a system low voltage terminal or a starting voltage terminal. The pixel circuit as described in claim 2 further includes: a light-emitting control transistor coupled in series between the drive transistor and the light-emitting element; wherein the light-emitting control transistor and the first transistor are both controlled by a light-emitting control signal, wherein the light-emitting control signal is used to turn on the light-emitting control transistor and the first transistor during the light-emitting period of the pixel circuit; wherein the second transistor and the third transistor are both controlled by a first scanning signal, wherein the first scanning signal is used to turn on the second transistor and the third transistor during a reset period and a compensation period of the pixel circuit. The pixel circuit of claim 2, wherein the second transistor and the third transistor are both controlled by a first scanning signal, wherein the first scanning signal is used to turn on the second transistor and the third transistor during a reset period and a compensation period of the pixel circuit; wherein the first transistor is controlled by a second scanning signal, wherein the second scanning signal is used to turn on the first transistor during at least one time period of the light emission period of the pixel circuit. The pixel circuit as described in claim 2 further includes: a write transistor, wherein a first terminal of the write transistor is used to receive a data signal; a second capacitor coupled between a second terminal of the write transistor and the gate terminal of the drive transistor; and a reset transistor coupled between the second terminal of the write transistor and a reference high voltage terminal; wherein the reset transistor is controlled by a third scan signal, wherein the third scan signal is used to turn on the reset transistor during a reset period of the pixel circuit. A pixel circuit includes: a drive transistor; a light-emitting element coupled to the drive transistor to emit light according to a drive current provided by the drive transistor; a capacitor; and a voltage signal feedback circuit connected in series with the capacitor and coupled between a gate terminal of the drive transistor and a cathode terminal of the light-emitting element, wherein the voltage signal feedback circuit includes a plurality of transistors coupled to each other. During a light-emitting period of the pixel circuit, the voltage at an anode terminal of the light-emitting element is fed back to a source terminal of the drive transistor, and the voltage signal feedback circuit is used to feed back the voltage at the cathode terminal of the light-emitting element to the gate terminal of the drive transistor through the capacitor to compensate the drive current; the light-emitting element is a micro-luminescent diode, and the drive transistor and the transistors are all N-type metal oxide semiconductor field-effect transistors. The pixel circuit as described in claim 6, wherein the transistors include a first transistor and a second transistor, wherein the first transistor is connected in series with the capacitor and coupled between the gate terminal of the drive transistor and the cathode terminal of the light-emitting element, wherein a first terminal of the second transistor is coupled between the first transistor and the capacitor, and wherein a second terminal of the second transistor is coupled to a starting voltage terminal. The pixel circuit as described in claim 7 further includes: a first light-emitting control transistor coupled in series between the drive transistor and the light-emitting element; wherein the first light-emitting control transistor and the first transistor are both controlled by a first light-emitting control signal, wherein the first light-emitting control signal is used to turn on the first light-emitting control transistor and the first transistor during the light-emitting period of the pixel circuit; wherein the second transistor is controlled by a first scanning signal, wherein the first scanning signal is used to turn on the second transistor during a reset period of the pixel circuit. The pixel circuit as described in claim 8 further includes: a second light-emitting control transistor coupled in series between a system high voltage terminal and the drive transistor; and a first reset transistor, wherein a first terminal of the first reset transistor is coupled between the second light-emitting control transistor and the drive transistor, wherein a second terminal of the first reset transistor is coupled to the gate terminal of the drive transistor. The pixel circuit of claim 9, wherein the first reset transistor is an indium gallium zinc oxide (IGZO) transistor. The pixel circuit as described in claim 9 further includes: a second reset transistor coupled between the system high voltage terminal and the gate terminal of the drive transistor; wherein the second reset transistor is controlled by the first scan signal, wherein the first scan signal is used to turn on the second reset transistor during the reset period of the pixel circuit. The pixel circuit of claim 11, wherein the second reset transistor is an indium gallium zinc oxide transistor.