Disclosure of Invention
In view of the above, the present invention provides a pixel circuit, a driving method thereof, a display panel, and a display device, which eliminate the influence of a threshold voltage by compensating the threshold voltage of a transistor driving a light emitting element, thereby eliminating the phenomenon of non-uniform light emission of a display device.
The technical scheme provided by the invention is as follows:
a pixel circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a first capacitor, a second capacitor, and a light-emitting element; wherein,
the driving transistor is used for determining the magnitude of driving current, and the magnitude of the driving current is determined by the voltage difference of the grid electrode and the source electrode of the driving transistor;
the first transistor is controlled by a first driving signal and is used for transmitting a power supply signal to the drain electrode of the driving transistor;
the second transistor is controlled by a second driving signal and is used for transmitting a reference voltage signal to the grid electrode of the driving transistor;
the third transistor is controlled by a third driving signal and is used for transmitting the reference voltage signal to the drain electrode of the driving transistor;
the fourth transistor is controlled by a fourth driving signal and is used for transmitting a data signal to the first polar plate of the second capacitor, and the second polar plate of the second capacitor is connected to the source electrode of the driving transistor;
the fifth transistor is controlled by a fifth driving signal for transmitting a driving current from the driving transistor to the light emitting element;
the first capacitor is used for keeping the voltage difference between the gate and the source of the driving transistor unchanged;
the cathode of the light emitting element is connected to a cathode low potential and emits light in response to the driving current.
Preferably, a first electrode of the first transistor is connected to the power supply signal, a first electrode of the second transistor and a first electrode of a third transistor are both connected to the reference voltage signal, a first electrode of the fourth transistor is connected to the data signal, a second electrode of the fifth transistor is connected to an anode of the light emitting element, and a cathode of the light emitting element is connected to the cathode low potential;
the second electrode of the second transistor, the grid electrode of the driving transistor and the second polar plate of the first capacitor are connected at a first node; the first electrode plate of the first capacitor, the source electrode of the driving transistor, the second electrode plate of the second capacitor and the first electrode of the fifth transistor are connected at a second node; the first electrode plate of the second capacitor is connected with the second electrode of the fourth transistor at a third node; the second electrode of the first transistor, the second electrode of the third transistor and the drain of the driving transistor are connected at a fourth node.
Preferably, the driving transistor is an N-type transistor.
Preferably, the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors; or,
the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all P-type transistors.
Preferably, the first drive signal is the same as the fifth drive signal.
Preferably, the second drive signal is the same as the fourth drive signal.
Preferably, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all thin film transistors or metal-oxide-semiconductor field effect transistors.
Preferably, the reference voltage signal provides the same reference voltage as the power supply voltage provided by the power supply signal.
A driving method for driving the pixel circuit includes a node resetting step, a threshold value capturing step, a data writing step, and a light emitting step,
in the node resetting step, transmitting the cathode low potential to the source electrode of the driving transistor, and transmitting the data signal to the first polar plate of the second capacitor;
in the threshold grabbing step, transmitting the reference voltage signal to a grid electrode and a drain electrode of the driving transistor;
in the data writing step, the data signal is transmitted to the first plate of the second capacitor, and the data signal is transmitted to the source electrode of the driving transistor through the coupling of the second capacitor;
in the light emitting step, the driving transistor generates a driving current to drive the light emitting element to emit light.
Preferably, a first electrode of the first transistor is connected to the power supply signal, a first electrode of the second transistor and a first electrode of a third transistor are both connected to the reference voltage signal, a first electrode of the fourth transistor is connected to the data signal, a second electrode of the fifth transistor is connected to an anode of the light emitting element, and a cathode of the light emitting element is connected to the cathode low potential;
the second electrode of the second transistor, the grid electrode of the driving transistor and the second polar plate of the first capacitor are connected at a first node; the first electrode plate of the first capacitor, the source electrode of the driving transistor, the second electrode plate of the second capacitor and the first electrode of the fifth transistor are connected at a second node; the first electrode plate of the second capacitor is connected with the second electrode of the fourth transistor at a third node; the second electrode of the first transistor, the second electrode of the third transistor and the drain electrode of the driving transistor are connected at a fourth node; wherein,
in the node resetting step, the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are driven to be turned on, and the voltage of the second node is controlled to be the sum of the cathode voltage provided by the cathode low potential and the cross voltage between the anode and the cathode of the light-emitting element, so that the source of the driving transistor is controlled to be an initial low potential;
in the threshold value grabbing step, keeping the on states of the second transistor, the third transistor and the fourth transistor, and driving the first transistor and the fifth transistor to be turned off, wherein the voltages of the first node and the fourth node are the reference voltage, the driving transistor is turned on until the second node is turned off when the voltage of the second node is the reference voltage minus the threshold voltage of the driving transistor, so that the threshold voltage is stored in both the first capacitor and the second capacitor;
in the data writing step, keeping the off states of the first transistor and the fifth transistor, keeping the on states of the second transistor and the fourth transistor, and driving the third transistor to be off, wherein the first node voltage is the reference voltage, and the third node voltage is a data voltage provided by the data signal and coupled to the second node through the second capacitor;
in the light emitting step, the third transistor is kept in an off state, the second transistor and the fourth transistor are driven to be off, the first transistor and the fifth transistor are driven to be on at the same time, the first capacitor keeps a voltage difference between the gate and the source of the driving transistor in the data writing step, and the driving current is determined so as to drive the light emitting element to emit light.
Preferably, in the node resetting step and the threshold grasping step, the data voltage provided by the data signal is the same as the reference voltage provided by the reference voltage signal.
Preferably, the reference voltage signal provides the same reference voltage as the power supply voltage provided by the power supply signal.
Correspondingly, the invention also provides a display panel comprising the pixel circuit.
Correspondingly, the invention also provides a display device which comprises the display panel.
Compared with the prior art, the technical scheme provided by the invention has at least one of the following advantages:
the invention provides a pixel circuit, a driving method, a display panel and a display device, wherein the pixel circuit comprises: the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the driving transistor, the first capacitor and the second capacitor are matched with each other through the transistors and the capacitors, so that the driving current is unrelated to the threshold voltage of the driving transistor, the voltage drop of a power supply signal and the cross voltage of two ends of the light-emitting element, the influence of the factors is eliminated, the problem of uneven light emission of the display device is effectively solved, and the light-emitting uniformity and the display effect of the display device are improved.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background art, in practical use, it is found that the organic light emitting diode display has a phenomenon of non-uniform light emission. Specifically, referring to fig. 1, a circuit diagram of a conventional pixel circuit in an organic light emitting diode display is shown, and the conventional pixel circuit mostly adopts a 2T1C structure, that is, includes two transistors and a capacitor. The transistor M20 serves as a current driving transistor for supplying a current for light emission to the organic light emitting diode OLED. The transistor M10 is controlled to be turned on by a signal supplied through the scan line Sn, and a data voltage is stored in the capacitor C by a data voltage supplied through the data line Dm connected to the transistor M10 to control the amount of current of the transistor M20.
However, due to the influence of the manufacturing process, threshold voltages of transistors for driving the organic light emitting diodes in the pixel circuits of the same display device are different, so that when the same data voltage is applied to the pixel circuits, currents flowing through the organic light emitting diodes in the pixel circuits are different, and the display device emits light unevenly.
Based on this, an embodiment of the present application provides a pixel circuit, which is shown in fig. 2 and is a schematic structural diagram of the pixel circuit provided in the embodiment of the present application, wherein the pixel circuit includes:
a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a driving transistor M0, a first capacitor C1, a second capacitor C2, and a light emitting element D; wherein,
the driving transistor M0 is used for determining the magnitude of the driving current, which is determined by the voltage difference between the gate and the source of the driving transistor M0;
the first transistor M1 is controlled by a first driving signal for transmitting a power supply signal Pvdd to the drain of the driving transistor M0;
the second transistor M2 is controlled by the second driving signal for transmitting the reference voltage signal Ref to the gate of the driving transistor M0;
the third transistor M3 is controlled by the third driving signal for transmitting the reference voltage signal Ref to the drain of the driving transistor M0;
the fourth transistor M4 is controlled by a fourth driving signal for transmitting the Data signal Data to the first plate of the second capacitor C2, and the second plate of the second capacitor C2 is connected to the source of the driving transistor M0;
the fifth transistor M5 is controlled by a fifth driving signal for transmitting the driving current from the driving transistor M0 to the light emitting element D;
the first capacitor C1 is used for keeping the voltage difference between the gate and the source of the driving transistor M0 unchanged;
the cathode of the light emitting element D is connected to a cathode low potential Pvee and emits light in response to the driving current.
More specifically, referring to fig. 2, in the pixel circuit, the gate of the first transistor M1 is connected to the first driving signal, the gate of the second transistor M2 is connected to the second driving signal, the gate of the third transistor M3 is connected to the third driving signal, the gate of the fourth transistor M4 is connected to the fourth driving signal, and the gate of the fifth transistor M5 is connected to the fifth driving signal;
a first electrode of the first transistor M1 is connected to the power supply signal Pvdd, a first electrode of the second transistor M2 and a first electrode of the third transistor M3 are both connected to the reference voltage signal Ref, a first electrode of the fourth transistor M4 is connected to the Data signal Data, a second electrode of the fifth transistor M5 is connected to an anode of the light emitting element D, and a cathode of the light emitting element D is connected to a cathode low potential Pvee;
and the second electrode of the second transistor M2, the gate of the driving transistor M0 and the second plate of the first capacitor C1 are connected at a first node N1; the first plate of the first capacitor C1, the source of the driving transistor M0, the second plate of the second capacitor C2 and the first electrode of the fifth transistor M5 are connected to N2 at a second node; the first plate of the second capacitor C2 and the second electrode of the fourth transistor M4 are connected at a third node N3; the second electrode of the first transistor M1, the second electrode of the third transistor M3, and the drain of the driving transistor M0 are connected at a fourth node N4.
In the pixel circuit described above with reference to fig. 2, the reference voltage provided by the reference voltage signal is the same as the power supply voltage provided by the power supply signal. The first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5 and the driving transistor M0 provided in the embodiments of the present application are all thin film transistors or metal-oxide-semiconductor field effect transistors. The driving transistor M0 provided in the embodiment of the present application is an N-type transistor; the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 provided by the embodiment of the present application are all N-type transistors; or,
the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are all P-type transistors. In addition, since the types of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor provided in the embodiments of the present application may be the same, further, in combination with the driving process, the first driving signal and the fifth driving signal provided in the embodiments of the present application are the same, and the second driving signal and the fourth driving signal are the same.
In addition, it should be noted that any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 provided in the embodiment of the present application may be an N-type transistor or a P-type transistor, that is, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 may be five transistors in which an N-type transistor and a P-type transistor are mixed.
Therefore, based on the pixel circuits provided by the above embodiments, the present embodiments provide a driving method, wherein the driving method includes a node resetting step, a threshold capturing step, a data writing step, and a light emitting step, wherein,
in the node resetting step, transmitting a cathode low potential to a source electrode of the driving transistor, and transmitting a data signal to a first polar plate of the second capacitor;
in the threshold value grabbing step, transmitting a reference voltage signal to a grid electrode and a drain electrode of the driving transistor;
in the data writing step, transmitting a data signal to a first electrode plate of a second capacitor, and coupling the data signal to a source electrode of the driving transistor through the second capacitor;
in the light emitting step, the driving transistor generates a driving current to drive the light emitting element to emit light.
More specifically, the pixel circuit and the driving method of the pixel circuit provided in the embodiments of the present application are described in more detail with reference to fig. 2 to 4 d. Referring to fig. 2, in the pixel circuit, the gate of the first transistor M1 is connected to the first driving signal, the gate of the second transistor M2 is connected to the second driving signal, the gate of the third transistor M3 is connected to the third driving signal, the gate of the fourth transistor M4 is connected to the fourth driving signal, and the gate of the fifth transistor M5 is connected to the fifth driving signal;
a first electrode of the first transistor M1 is connected to the power supply signal Pvdd, a first electrode of the second transistor M2 and a first electrode of the third transistor M3 are both connected to the reference voltage signal Ref, a first electrode of the fourth transistor M4 is connected to the Data signal Data, a second electrode of the fifth transistor M5 is connected to an anode of the light emitting element D, and a cathode of the light emitting element D is connected to a cathode low potential Pvee;
and the second electrode of the second transistor M2, the gate of the driving transistor M0 and the second plate of the first capacitor C1 are connected at a first node N1; the first plate of the first capacitor C1, the source of the driving transistor M0, the second plate of the second capacitor C2 and the first electrode of the fifth transistor M5 are connected to N2 at a second node; the first plate of the second capacitor C2 and the second electrode of the fourth transistor M4 are connected at a third node N3; the second electrode of the first transistor M1, the second electrode of the third transistor M3, and the drain of the driving transistor M0 are connected at a fourth node N4.
The driving transistor M0 provided in the embodiment of the present application is an N-type transistor, and it should be noted that the driving method provided in the embodiment of the present application is described in detail below by taking the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 as all N-type transistors as examples. Therefore, referring to fig. 3, a timing diagram of driving signals of the pixel circuit shown in fig. 2 is provided for an embodiment of the present application, in the embodiment of the present application, the first driving signal and the fifth driving signal are the same and are both the driving signal S30; the second drive signal and the fourth drive signal are the same and are both drive signals S20; and the third drive signal is the drive signal S10; it should be noted that the reference voltage Vref provided by the reference voltage signal Ref provided in the embodiment of the present application is the same as the power supply voltage Vpvdd provided by the power supply signal Pvdd. And, in the node reset step T1 and the threshold grasping step T2, the Data voltage Vdata supplied by the Data signal Data is the same as the reference voltage Vref supplied by the reference voltage signal Ref.
Wherein the driving method includes a node resetting step T1, a threshold grabbing step T2, a data writing step T3, and a light emitting step T4, wherein,
in the node resetting step T1, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are driven to be turned on, and the voltage of the second node N2 is controlled to be the sum of the cathode voltage Vpvee provided by the cathode low potential Pvee and the cross voltage Vd between the anode and the cathode of the light emitting element D, so as to control the source of the driving transistor M0 to be an initial low potential.
Specifically, referring to fig. 4a, which is a current path diagram at stage T1 in fig. 3, in the node resetting step T1, the driving signal S10, the driving signal S20 and the driving signal S30 are all at high level, so as to drive the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 to be turned on; the potential of the first node N1 is a reference voltage Vref provided by a reference voltage signal Ref; and the potential of the third node N3 is the reference voltage Vref, wherein the potential of the third node N3 is provided by the Data signal Data, and in the T1 phase, the Data voltage provided by the Data signal is the same as the reference voltage provided by the reference voltage signal. Therefore, in the node resetting step T1, the potential of the second node N2 (i.e., the source potential of the driving transistor M0) is initialized to an initial low potential, which is the sum of the cathode voltage Vpvee provided by the very low potential Pvee and the cross voltage Vd between the anode and the cathode of the light emitting element D.
In the threshold grabbing step T2, the on states of the second transistor M2, the third transistor M3 and the fourth transistor M4 are maintained, the first transistor M1 and the fifth transistor M5 are driven to be turned off, the voltages of the first node N1 and the fourth node N4 are both the reference voltage Vref, the driving transistor M0 is turned on until the voltage of the second node N2 is the reference voltage Vref minus the threshold voltage Vth of the driving transistor M0, and the first capacitor C1 and the second capacitor C2 both store the threshold voltage Vth.
Specifically, referring to fig. 4b, which is a current path diagram of stage T2 in fig. 3, in the threshold grabbing step T2, the driving signal S10 and the driving signal S20 are both at high level, i.e., keeping the second transistor M2, the third transistor M3 and the fourth transistor M4 in a conducting state; and the driving signal S30 goes low, thereby driving the first transistor M1 and the fifth transistor M5 to be turned off. Since the data voltage provided by the data signal is the same as the reference voltage provided by the reference voltage signal in the stage T2, the potentials of the first node N1, the third node N2 and the fourth node N4 are all the reference voltage Vref, so that the driving transistor M0 is turned on until the voltage of the second node N2 is the reference voltage Vref minus the threshold voltage Vth of the driving transistor M0, and the first capacitor C1 and the second capacitor C2 are both turned off to store the threshold voltage Vth.
In the data writing step T3, the turn-off state of the first transistor M1 and the fifth transistor M5 is maintained, and the turn-on state of the second transistor M2 and the fourth transistor M4 is maintained, the third transistor M3 is driven to turn off, the first node voltage is a reference voltage, and the third node voltage is a data voltage provided by the data signal and coupled to the second node through the second capacitor.
Specifically, referring to fig. 4c, which is a current path diagram of the stage T3 in fig. 3, in the data writing step T3, the driving signal S10 changes to a low level, so that the third transistor M3 is driven to be turned off; the driving signal S20 is kept at the high level, so that the second transistor M2 and the fourth transistor M4 are kept in a turned-on state; and the driving signal S30 is kept at a low level so that the first transistor M1 and the fifth transistor M5 are kept in an off state. At this time, the potential of the first node N1 is the reference voltage Vref; the potential of the third node N3 is a Data voltage Vdata provided by the Data signal Data, and the Data voltage Vdata is transmitted to the second node N2 due to the coupling effect of the second capacitor C2, so that the potential of the second node N2 is: Vref-Vth + (Vdata-Vref) (C2/(C1+ C2)). Moreover, since the potential of the first node N1 is the reference voltage Vref, the first capacitor C1 stores the voltage: vth- (Vdata-Vref) (C2/(C1+ C2)).
In the light emitting step T4, the third transistor M3 is kept in an off state, the second transistor M2 and the fourth transistor M4 are driven to be off, the first transistor M1 and the fifth transistor M5 are driven to be on, the first capacitor holds a voltage difference between the gate and the source of the driving transistor M0 in the data writing step, and a driving current is determined to drive the light emitting element to emit light.
Specifically, referring to fig. 4d, which is a flow chart of a point flow at the stage T4 in fig. 3, in the light emitting step T4, the driving signal S10 is kept at a low level, so that the third transistor M3 is kept in an off state; the driving signal S20 changes to low level, thereby driving the second transistor M2 and the fourth transistor M4 to be turned off; and the driving signal S30 goes high to drive the first transistor M1 and the fifth transistor M5 to be turned on. At this time, the potential of the second node N2 is the sum of the cathode low voltage Vpvee and the cross voltage Vd between the anode and the cathode of the light emitting element D, i.e., Vpvee + Vd; further, since the first capacitor C1 keeps the storage voltage at the stage T3 constant, the potential of the first node N1 becomes: vpvee + Vd + Vth- (Vdata-Vref) (C2/(C1+ C2)),
thus, the gate-source voltage of the driving transistor M0 is the difference Vgs between the potential of the first node N1 and the potential of the second node N2:
Vgs=Vpvee+Vd+Vth-(Vdata-Vref)(C2/(C1+C2))-(Vpvee+Vd)
vth- (Vdata-Vref) (C2/(C1+ C2)) formula one
Since the driving transistor M0 operates in the saturation region at the stage T4, the driving current Id for driving the light emitting element D to emit light is determined by the voltage difference between the gate and the source of the driving transistor M0, and thus the driving current Id is:
Id=k(Vgs-Vth)2
=k[Vth-(Vdata-Vref)(C2/(C1+C2))Vth)]2formula two
=k[(Vref-Vdata)(C2/(C1+C2)]2
In the second formula, Id is represented as a driving current generated by the driving transistor M0, i.e., a current for driving the light emitting element to emit light; k is a constant; vgs is the voltage difference between the gate and source of the drive transistor M0; vth is the threshold voltage of the driving transistor M0; vdata is a Data voltage supplied by the Data signal Data.
To this end, the driving current Id, which is independent of the threshold voltage Vth of the driving transistor M0, the power supply voltage Vpvdd supplied by the power supply signal Pvdd, and the voltage Vd across the light emitting element D, is transmitted to the light emitting element D through the fifth transistor M5 to drive the light emitting element D to emit light.
As can be seen from the above, the pixel circuit and the driving method provided in the embodiments of the present application have the driving current Id independent of the threshold voltage Vth of the driving transistor M0, the power voltage Vpvdd, and the voltage Vd across the light emitting element D, and the driving current Id is not affected by the above factors, so that the display device using the pixel circuit provided in the embodiments of the present application emits light uniformly, and the display effect is improved.
In addition, an embodiment of the present application further provides a display panel, which includes a pixel circuit, where the pixel circuit adopts the pixel circuit described in any of the above embodiments.
It should be noted that the display panel provided in the present application is not particularly limited to the number of pixel circuits, and needs to be designed according to practical applications.
Finally, the present application further provides a display device, which includes a display panel, wherein the display panel adopts the display panel described in any of the above embodiments.
The embodiment of the application provides a pixel circuit, a driving method, a display panel and a display device, wherein the pixel circuit comprises: the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the driving transistor, the first capacitor and the second capacitor are matched with each other through the transistors and the capacitors, so that the driving current is unrelated to the threshold voltage of the driving transistor, the voltage drop of a power supply signal and the cross voltage of two ends of the light-emitting element, the influence of the factors is eliminated, the problem of uneven light emission of the display device is effectively solved, and the light-emitting uniformity and the display effect of the display device are improved.