TWI839946B - Manufacturing method of heat-conductive circuit board - Google Patents

Abstract

The present invention provides a manufacturing method of a heat-conductive circuit board, which includes: forming a receiving slot by recessing a circuit board from a top conductive layer on one side thereof, in which the receiving slot does not arrive at a bottom conductive layer on the other side of the circuit board; using an electro-plating process to form a first inner plated layer onto lateral walls and a bottom wall of the receiving slot and to form two first plated layers onto the top and bottom conductive layers; forming a dry film to seal the receiving slot, and using a chemical etching process to remove the two first plated layers uncovered by the dry film; removing the dry film, and grinding the circuit board to enable a distal end of the first inner plated layer to be coplanar with the top conductive layer; forming a plurality of heat-conductive pillars from the bottom conductive layer to the first inner plated layer, and forming a second inner plated layer onto the first inner plated layer and two second plated layers onto the top and bottom conductive layers; and removing portions of the first and second inner plated layers located on the lateral walls of the receiving slot.

Description

Manufacturing method of thermal conductive circuit substrate

The present invention relates to a method for manufacturing a circuit board, and in particular to a method for manufacturing a heat-conducting circuit board.

Based on the development of semiconductor technology, the requirements for heat dissipation efficiency of electronic components installed on circuit boards are gradually increasing. Therefore, the industry often needs to embed the corresponding electronic components in the existing circuit boards according to the needs of downstream, and dissipate the heat of the electronic components through the corresponding heat-conducting structure. However, the embedding and corresponding processing of electronic components on existing circuit boards not only require technology and equipment, but also the existing circuit boards are equivalent to customized products and are difficult to be widely used. This has formed a certain threshold for manufacturers who want to enter this field, thereby invisibly reducing the development and promotion of the industry.

Therefore, the inventor believes that the above defects can be improved, so he conducted intensive research and applied scientific principles, and finally proposed an invention with a reasonable design and effective improvement of the above defects.

The present invention provides a method for manufacturing a heat-conducting circuit substrate, which can effectively improve the defects that may occur in existing circuit substrates.

The present invention discloses a method for manufacturing a heat-conducting circuit carrier, which includes: A pre-step: providing a circuit board, which includes an insulating layer, at least one circuit layer buried in the insulating layer, a top conductive layer formed on one side of the insulating layer, and a bottom conductive layer formed on the other side of the insulating layer; a first blind step: forming a component placement groove from the top conductive layer toward the insulating layer; wherein the component placement groove has a The bottom of the slot is spaced from the bottom conductive layer by a preset distance; a first electroplating step: electroplating is performed on the circuit board to form a first inner plating layer attached to the side wall of the component slot and the bottom of the slot, a first top electroplating layer attached to the top conductive layer, and a first bottom electroplating layer attached to the bottom conductive layer; a thinning step: forming a dry film on the first top electroplating layer to close the component slot, and removing the first bottom conductive layer by chemical etching; The first top electroplating layer and the first top electroplating layer not covered by the dry film are subjected to a planarization step, wherein the dry film is removed and the end of the first inner electroplating layer is coplanar with the top conductive layer by grinding; a drilling step, wherein a plurality of through holes connected to the first inner electroplating layer are formed from the bottom conductive layer; a second electroplating step, wherein electroplating is performed on the circuit board to form a plurality of heat-conducting pillars respectively filled in the plurality of through holes and attached to the first inner conductive layer. A second inner plating layer of the coating, a second top electroplating layer attached to the top conductive layer, and a second bottom electroplating layer attached to the bottom conductive layer and connected to a plurality of the thermally conductive pillars; and a second blind step: removing the first inner plating layer portion and the second inner plating layer portion located on the side wall of the component placement slot, so that the first inner plating layer and the second inner plating layer are only left with a portion stacked on the bottom of the slot and they are jointly defined as a thermal pad.

In summary, the manufacturing method of the thermally conductive circuit carrier disclosed in the embodiment of the present invention can form the thermally conductive circuit carrier with the mounting slot for the electronic component to be mounted therein and connected to the thermally conductive pad, thereby transferring the heat energy generated by the electronic component to the outside through the thermally conductive pad, the plurality of thermally conductive pillars, and the second bottom electroplating layer.

Furthermore, the component placement slot does not limit the type of electronic components that can be accommodated, and the top conductive layer, the second top electroplated layer, and the bottom conductive layer can form a corresponding circuit layout according to the type of the electronic components. In other words, the thermal conductive circuit carrier has a wider range of applications, which is conducive to improving its commonality or circulation, thereby effectively reducing the overall production cost.

To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, such description and drawings are only used to illustrate the present invention and do not limit the scope of protection of the present invention.

100: Thermally conductive circuit substrate

1: Circuit board

11: Insulating layer

12: Circuit layer

13: Top conductive layer

14: Bottom conductive layer

2: First inner coating layer

21: First level

3: First top electroplating layer

4: First bottom electroplating layer

5: Thermal conductivity column

6: Second inner coating layer

61: Second level

7: Second top electroplating layer

8: Second bottom electroplating layer

81:Metal pad

82: Lamellar structure

P: Thermal pad

F: Dry film

S: Parts slot

S1: Tank bottom

S2: Side wall

S3: Annular explosion-proof groove

DS1: Default distance

WS3: Width

H: Perforation

R: Ring-shaped protrusion

S110: Preliminary steps

S120: First blind pick step

S130: First electroplating step

S140: Thinning step

S150: Flattening step

S160: Drilling step

S170: Second electroplating step

S180, S280: The second blind pick step

T: thickness direction

T13: Initial thickness

T14: Initial thickness

T13’:Thickness

T14’:Thickness

Figure 1 is a schematic diagram of the pre-steps of the manufacturing method of the thermal conductive circuit substrate of the first embodiment of the present invention.

Figure 2 is a schematic diagram of the first blind step of the manufacturing method of the thermal conductive circuit carrier of the first embodiment of the present invention.

FIG3 is a schematic diagram of the first electroplating step of the manufacturing method of the thermal conductive circuit substrate of the first embodiment of the present invention.

FIG4 is a schematic diagram of the thinning step of the manufacturing method of the thermal conductive circuit substrate of the first embodiment of the present invention.

FIG5 is a schematic diagram of the planarization step of the manufacturing method of the thermal conductive circuit substrate of the first embodiment of the present invention.

FIG6 is a schematic diagram of the drilling step of the manufacturing method of the thermal conductive circuit carrier of the first embodiment of the present invention.

FIG7 is a schematic diagram of the second electroplating step of the manufacturing method of the thermal conductive circuit substrate of the first embodiment of the present invention.

FIG8 is a schematic diagram of the second blind step of the manufacturing method of the thermal conductive circuit carrier of the first embodiment of the present invention.

Figure 9 is a top view of Figure 8.

FIG10 is a schematic diagram of the second blind step of the manufacturing method of the thermal conductive circuit carrier of the second embodiment of the present invention.

The following is a specific embodiment to illustrate the implementation method of the "method for manufacturing a thermal conductive circuit substrate" disclosed in the present invention. Technical personnel in this field can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed based on different viewpoints and applications without deviating from the concept of the present invention. In addition, the attached drawings of the present invention are only for simple schematic illustrations and are not depicted according to actual sizes. Please note in advance. The following implementation method will further explain the relevant technical content of the present invention in detail, but the disclosed content is not used to limit the scope of protection of the present invention.

It should be understood that although the terms "first", "second", "third" and so on may be used in this article to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used in this article may include any one or more combinations of the related listed items depending on the actual situation.

[Implementation Example 1]

Please refer to Figures 1 to 9, which are the first embodiment of the present invention. This embodiment discloses a method for manufacturing a thermally conductive circuit carrier, which sequentially includes (or implements) the following steps: a pre-step S110, a first blind-cutting step S120, a first electroplating step S130, a thinning step S140, a flattening step S150, a drilling step S160, a second electroplating step S170, and a second blind-cutting step S180, but the present invention is not limited thereto.

For example, in other embodiments not shown in the present invention, the manufacturing method of the thermal conductive circuit carrier can also adjust any of the above steps S110~S180 according to design requirements, or add other steps. It should be noted that the manufacturing method of the thermal conductive circuit carrier in this embodiment excludes the existing manufacturing method of embedding electronic components in the circuit board. The following is an introduction to each step S110~S180 of the manufacturing method of the thermal conductive circuit carrier in this embodiment.

The pre-step S110: As shown in FIG1 , a circuit board 1 is provided, which includes an insulating layer 11, at least one circuit layer 12 buried in the insulating layer 11, a top conductive layer 13 formed on one side (e.g., the top side) of the insulating layer 11, and a bottom conductive layer 14 formed on the other side (e.g., the bottom side) of the insulating layer 11.

In this embodiment, the number of at least one circuit layer 12 is preferably multiple and spaced apart from each other along the thickness direction T. The initial thickness T13 of the top conductive layer 13 is, for example, 0.2 mil to 0.3 mil, which is equal to the initial thickness T14 of the bottom conductive layer 14 and less than the thickness of the insulating layer 11, but the present invention is not limited thereto.

The first blind step S120: As shown in FIG2 , a component placement slot S is formed from the top conductive layer 13 toward the insulating layer 11, and the slot bottom S1 of the component placement slot S is separated from the bottom conductive layer 14 by a preset distance DS1, thereby preventing the component placement slot S from penetrating or exposing the bottom conductive layer 14. In other words, any groove that is penetrating or has a conductive layer at the bottom is different from the component placement slot S referred to in this embodiment.

In this embodiment, the slot S does not touch at least one of the circuit layers 12 (that is, the side wall S2 of the slot S preferably does not expose any circuit layer 12; or in other words, the formation of the slot S does not damage any circuit layer 12), and the preset distance DS1 is preferably at least greater than 2 mils. The shape and actual depth of the slot S can be adjusted according to design requirements (e.g., the slot S can be a square slot or a round slot and the depth can be 20 mils), and are not limited to the figure. Furthermore, in other embodiments not shown in the present invention, the circuit board 1 can also be formed with multiple slots S with different depths to meet a wider range of needs.

The first electroplating step S130: As shown in FIG3 , electroplating is performed on the circuit board 1 to form a first inner plating layer 2 attached to the side wall S2 of the component slot S and the slot bottom S1, a first top electroplating layer 3 attached to the top conductive layer 13, and a first bottom electroplating layer 4 attached to the bottom conductive layer 14.

It should be further explained that the first inner plating layer 2 in this embodiment covers the entire side wall S2 and the entire bottom S1 of the component placement slot S, and the first top electroplating layer 3 covers the entire top conductive layer 13, and the first bottom electroplating layer 4 covers the entire bottom conductive layer 14.

The thinning step S140: As shown in FIG. 4 , a dry film F is formed on the first top electroplated layer 3 to close the device slot S (that is, the device slot S and the dry film F surround a closed space), and the first bottom electroplated layer 4 and the first top electroplated layer 3 not covered by the dry film F are removed by chemical etching. The dry film F is formed by a material that will not be removed by the chemical etching, such as polyethylene terephthalate (PET), but not limited thereto.

Furthermore, in the thinning step S140 of this embodiment, the chemical etching is used to further remove a portion of the bottom conductive layer 14 and a portion of the top conductive layer 13 not covered by the dry film F, so that the portion of the first top electroplated layer 3 covered by the dry film F and the portion of the top conductive layer 13 form a ring-shaped protrusion R together.

That is, in the thinning step S140 of this embodiment, the thickness T14' of the bottom conductive layer 14 is less than its initial thickness T14, and the thickness T13' of the top conductive layer 13 not covered by the dry film F is less than its initial thickness T13, but the specific values of the thicknesses T13' and T14' can be adjusted and varied according to actual needs, and the present invention is not limited here.

Accordingly, the manufacturing method of the thermal conductive circuit carrier disclosed in this embodiment uses the dry film F and the component placement slot S in the thinning step S140 to achieve an isotropic thinning effect by chemical etching without affecting (or damaging) the first inner coating layer 2.

The planarization step S150: As shown in FIG5 , the dry film F is removed, and the end of the first inner coating layer 2 is made coplanar with the top conductive layer 13 by grinding. In this embodiment, the annular protrusion R is also removed by the above grinding.

The drilling step S160: As shown in FIG6 , a plurality of through holes H connected to the first inner coating layer 2 are formed from the bottom conductive layer 14. In this embodiment, the plurality of through holes H are arranged in a matrix by laser processing, but the specific shape, actual number, and configuration layout of the plurality of through holes H can be adjusted and changed according to design requirements, and the present invention is not limited here.

Furthermore, in the drilling step S160 of this embodiment, before forming the plurality of through holes H, a blackening and browning process is performed on the circuit board 1 to effectively improve the alignment of the laser processing; and after forming the plurality of through holes H, a de-blackening and browning process is performed on the circuit board 1, but the present invention is not limited thereto. That is to say, in other embodiments not shown in the present invention, the blackening and browning process in the drilling step S160 can be replaced by other processes according to design requirements.

The second electroplating step S170: As shown in FIG. 7 , electroplating is performed on the circuit board 1 to form a plurality of heat-conducting pillars 5 respectively filling the plurality of through holes H, a second inner plating layer 6 attached to the first inner plating layer 2, a second top electroplating layer 7 attached to the top conductive layer 13, and a second bottom electroplating layer 8 attached to the bottom conductive layer 14 and connecting the plurality of heat-conducting pillars 5.

It should be further explained that each of the heat-conducting pillars 5 fills the corresponding through hole H, the second inner plating layer 6 in this embodiment covers the entire second inner plating layer 6, and the second top electroplating layer 7 covers the entire top conductive layer 13, and the second bottom electroplating layer 8 covers the entire bottom conductive layer 14.

The second blind removal step S180: as shown in FIG8 and FIG9, the first inner plating layer 2 and the second inner plating layer 6 located on the side wall S2 of the component placement slot S are removed (along the thickness direction T), so that the first inner plating layer 2 and the second inner plating layer 6 are only left with the portion stacked on the slot bottom S1 and they are jointly defined as a heat conductive pad P.

According to the manufacturing method of the thermally conductive circuit carrier disclosed in this embodiment, the formed thermally conductive circuit carrier 100 can use the mounting slot S to provide an electronic component (not shown) to be placed therein and connected to the thermally conductive pad P, thereby transferring the heat energy generated by the electronic component to the outside through the thermally conductive pad P, the plurality of thermally conductive pillars 5, and the second bottom electroplating layer 8.

Furthermore, the component placement slot S in this embodiment does not limit the type of electronic components that can be accommodated, and the top conductive layer 13, the second top electroplated layer 7, and the bottom conductive layer 14 can form a corresponding circuit layout according to the type of the electronic components. In other words, the thermal conductive circuit carrier 100 has a wider range of applications, which is conducive to improving its commonality or circulation, thereby effectively reducing the overall production cost.

Furthermore, in the second blind-cutting step S180 of the present embodiment, the second bottom electroplating layer 8 forms a plurality of metal pads 81, each of which is connected to one of the heat-conducting pillars 5, and each of the metal pads 81 is described as a circular structure with a diameter of 6 mils, but the present invention is not limited thereto. Furthermore, the heat-conducting pad P in the present embodiment is a double-layer structure, which includes a first layer 21 located at the bottom of the groove S1, and a second layer 61 stacked on the first layer 21, and the circumferential edge of the first layer 21 is aligned with the circumferential edge of the second layer 61.

The heat conductive pad P does not contact the side wall S2 of the component slot S to form an annular explosion-proof groove S3 between them, and the width WS3 of the annular explosion-proof groove S3 is preferably at least 0.5 mm, and the specific value of the width WS3 can be adjusted according to actual needs and is not limited here. Accordingly, the manufacturing method of the heat conductive circuit carrier disclosed in this embodiment separates the heat conductive pad P from the side wall S2 of the component slot S by forming the annular explosion-proof groove S3 to prevent heat energy from being quickly transferred from the heat conductive pad P to the insulating layer 11, thereby effectively reducing the probability of the heat conductive circuit carrier 100 exploding or delaminating.

It should be further explained that at least one of the circuit layers 12, the top conductive layer 13, the bottom conductive layer 14, the first inner plating layer 2, the first top electroplating layer 3, the first bottom electroplating layer 4, the plurality of thermal conductive pillars 5, the second inner plating layer 6, the second top electroplating layer 7, and the second bottom electroplating layer 8 in this embodiment may be made of the same material (e.g., copper) or different materials according to design requirements.

[Implementation Example 2]

Please refer to Figure 10, which is the second embodiment of the present invention. Since this embodiment is similar to the above-mentioned first embodiment, the similarities between the two embodiments will not be described in detail, and the differences between this embodiment and the above-mentioned first embodiment are roughly described as follows:

In the second blind-cutting step S280 of this embodiment, the second bottom electroplating layer 8 is formed into a sheet structure 82, which connects a plurality of the heat-conducting pillars 5 and has a size (or profile) substantially equal to that of the slot bottom S1. Accordingly, the heat-conducting circuit carrier 100 can further be provided with a heat sink fin (not shown) on the sheet structure 82 to improve the overall heat dissipation efficiency.

[Technical effects of the embodiments of the present invention]

In summary, the manufacturing method of the thermally conductive circuit carrier disclosed in the embodiment of the present invention can form the thermally conductive circuit carrier with the mounting slot for the electronic component to be mounted therein and connected to the thermally conductive pad, thereby transferring the heat energy generated by the electronic component to the outside through the thermally conductive pad, the plurality of thermally conductive pillars, and the second bottom electroplating layer.

Furthermore, the component placement slot does not limit the type of electronic components that can be accommodated, and the top conductive layer, the second top electroplated layer, and the bottom conductive layer can form a corresponding circuit layout according to the type of the electronic component. In other words, the thermal conductive circuit carrier has a wider range of applications, which is conducive to improving its commonality or circulation, thereby effectively reducing the overall production cost.

In addition, the manufacturing method of the thermal conductive circuit carrier disclosed in this embodiment, in the thinning step, the dry film and the component placement groove are used in combination, so that the chemical etching can achieve the isotropic thinning effect without affecting (or damaging) the first inner plating layer.

In addition, the manufacturing method of the thermally conductive circuit carrier disclosed in this embodiment forms the annular explosion-proof groove to separate the thermally conductive pad and the side wall of the mounting groove to prevent heat energy from being quickly transferred from the thermally conductive pad to the insulating layer, thereby effectively reducing the probability of the thermally conductive circuit carrier exploding or delaminating.

The above disclosed contents are only the preferred feasible embodiments of the present invention, and do not limit the patent scope of the present invention. Therefore, all equivalent technical changes made by using the contents of the specification and drawings of the present invention are included in the patent scope of the present invention.

100: Thermally conductive circuit substrate

1: Circuit board

11: Insulating layer

12: Circuit layer

13: Top conductive layer

14: Bottom conductive layer

21: First level

5: Thermal conductivity column

61: Second level

7: Second top electroplating layer

81:Metal pad

P: Thermal pad

S: Parts slot

S1: Tank bottom

S2: Side wall

S3: Annular explosion-proof groove

WS3: Width

H: Perforation

S180: Second blind pick step

T: thickness direction

Claims (10)

A method for manufacturing a heat-conducting circuit carrier, comprising: A pre-step: providing a circuit board, which includes an insulating layer, at least one circuit layer buried in the insulating layer, a top conductive layer formed on one side of the insulating layer, and a bottom conductive layer formed on the other side of the insulating layer; A first blind step: forming a component placement groove from the top conductive layer toward the insulating layer; wherein the bottom of the component placement groove is spaced a preset distance from the bottom conductive layer; A first electroplating step: electroplating is performed on the circuit board to form a first inner plating layer attached to the side wall of the component placement groove and the bottom of the groove, a first top electroplating layer attached to the top conductive layer, and a first bottom electroplating layer attached to the bottom conductive layer; A thinning step: forming a dry film to close the component placement groove on the first top electroplating layer, and removing the first bottom electroplating layer and the first top electroplating layer not covered by the dry film by chemical etching; A flattening step: removing the dry film, and grinding the end of the first inner plating layer to be coplanar with the top conductive layer; A drilling step: forming a plurality of through holes connected to the first inner plating layer from the bottom conductive layer; A second electroplating step: electroplating the circuit board to form a plurality of thermally conductive pillars respectively filling the plurality of through holes, a second inner plating layer attached to the first inner plating layer, a second top electroplating layer attached to the top conductive layer, and a second bottom electroplating layer attached to the bottom conductive layer and connecting the plurality of thermally conductive pillars; and A second blind removal step: removing the first inner plating layer portion and the second inner plating layer portion located on the side wall of the component placement groove, so that the first inner plating layer and the second inner plating layer are only left with the portion stacked on the bottom of the groove and they are jointly defined as a heat conductive pad. A method for manufacturing a thermally conductive circuit carrier as described in claim 1, wherein, in the first blind picking step, the component placement slot does not touch at least one of the circuit layers, and the preset distance is at least greater than 2 mils. The method for manufacturing a thermally conductive circuit carrier as described in claim 1, wherein, in the thinning step, the chemical etching is used to remove a portion of the bottom conductive layer and a portion of the top conductive layer not covered by the dry film. The method for manufacturing a thermally conductive circuit carrier as described in claim 3, wherein, in the thinning step, the first top electroplated layer portion and the top conductive layer portion covered by the dry film jointly form an annular protrusion; in the planarizing step, the annular protrusion is polished and removed. A method for manufacturing a thermally conductive circuit carrier as described in claim 1, wherein, in the drilling step, before forming the plurality of through-holes, a blackening and browning process is performed on the circuit board, and after forming the plurality of through-holes, a de-blackening and browning process is performed on the circuit board. The manufacturing method of the thermally conductive circuit carrier as described in claim 1, wherein, in the second blind cutting step, the thermally conductive pad does not contact the side wall of the mounting groove to form an annular explosion-proof groove therebetween. A method for manufacturing a thermally conductive circuit carrier as described in claim 6, wherein, in the second blind cutting step, the width of the annular explosion-proof groove is at least 0.5 millimeters (mm). The manufacturing method of the thermally conductive circuit carrier as described in claim 1, wherein, in the second blind cutting step, the second bottom electroplating layer is a sheet-like structure and is connected to a plurality of the thermally conductive pillars. The method for manufacturing a thermally conductive circuit carrier as described in claim 1, wherein, in the second blind cutting step, the second bottom electroplating layer includes a plurality of metal pads and each of the metal pads is connected to one of the thermally conductive pillars. A method for manufacturing a thermally conductive circuit carrier as described in claim 1, wherein, in the second blind cutting step, the thermally conductive pad includes a first layer located at the bottom of the groove and a second layer stacked on the first layer, and the circumferential edge of the first layer is aligned with the circumferential edge of the second layer.

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