JP2013106015A - Semiconductor device and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of voids in a semiconductor device with TSV by inhibiting deposition of a barrier and seed layer on an entire lateral face of a through hole.SOLUTION: A semiconductor device comprises: a semiconductor substrate on which a different-surface-level groove including a first groove and a second groove having a horizontal cross-sectional area smaller than that of the first groove is defined, and on which a through via hole opened on both sides by the first and second grooves is formed; a barrier and seed layer covering the different-surface-level groove from an inner surface of the first groove to a part of a lateral face of the second groove and projecting from a lateral face of the through via hole; and an electrode formed on a surface of the seed layer and inside the second groove which is not covered with the seed layer, and exposed from both surfaces of the semiconductor substrate.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a through silicon via (TSV) and a manufacturing method thereof.

  In accordance with the downsizing and high performance of electronic equipment, there is a demand for a semiconductor device that is thin, has a small occupied area, and can operate at high speed. In an electronic device, when several silicon semiconductor chips are stacked and housed in one package, it is difficult to satisfy this requirement if the chips are connected by wire bonding. Therefore, a TSV that connects the upper and lower chips vertically through the inside of the chip is used.

  In the TSV manufacturing method, first, a trench (also referred to as a “blind via hole”) is formed in a silicon substrate. Thereafter, a barrier metal layer and a seed layer are formed in this order on the silicon substrate including the inside of the trench, and portions other than the region in the trench of the seed layer are selectively removed by etching, and then plated on the seed layer. A wiring layer L1 is formed by selectively growing a metal (for example, copper (Cu)). Thereafter, there is a method of removing the bottom of the trench by CMP (Chemical Mechanical Polishing) (Patent Document 1, FIG. 8). The metal is buried in the seed layer trench by embedding a metal such as Cu by electroplating.

  Thus, TSV is 1. 1. trench production, 2. Barrier / seed layer deposition; 3. Cu plating, It is fabricated by a process of exposing wiring on the bottom surface by CMP or the like.

  However, when Cu is embedded in the trench by electroplating, if the aspect ratio (wiring layer thickness / wiring width) becomes large, coverage of the sidewall seed layer is insufficient, and seams, voids, etc. It causes voids and cracks or cracks occur in the electrodes.

  As a countermeasure against the generation of voids, a countermeasure is taken in which the trench is formed in a forward tapered shape with respect to the bottom direction, the amount of ion concentration is adjusted, and a seed layer is selectively formed on the side wall by sputtering (non-native). Patent Document 1). Moreover, by forming an electrode from the bottom surface of the trench by forming an electrode from the bottom of the trench after forming a nickel layer on the seed layer by performing electroless nickel plating before Cu plating, There are measures to suppress the generation of seams and voids (Non-patent Document 2).

JP 2006-080295 A

NOVELLUS DEVELOPS ADVANCED COPPERSEED TECHNOLOGY FOR THROUGH-SILICON-Bia Hall (TSV) PACKAGING [online]. Novellus Systems, Inc., 2010. [retrieved on 2011.7.24] Retrieved from the Internet: <URL: http: //ir.novellus. com / releasedetail.cfm? ReleaseID = 450123> TSV plating technology [online]. Kiyokawa Plating Industry Co., Ltd., 2011, JUL 8. [retrieved on2011.7.24] Retrieved from the Internet: <URL: http://www.kiyokawa.co.jp/technology/technology.asp? hed = 71>

  However, if the trench has a forward taper shape, the width of the upper surface of the trench becomes large, so that miniaturization becomes difficult. Furthermore, there is a method of selectively depositing a seed layer on the side wall by adjusting the sputtering film forming conditions, but a sputter apparatus with special specifications is required, and the manufacturing cost increases due to an increase in the number of processes.

  Further, in the method of forming the Cu electrode from the bottom of the trench, an electroless nickel plating process is required, and the manufacturing cost increases due to an increase in the number of processes.

  In view of the above problems, in the semiconductor device and the manufacturing method thereof according to the embodiment of the present invention, the through electrode is formed in the through via hole having openings on both sides, and the barrier and the seed layer are not formed on all the side surfaces of the through hole. Thus, an object is to prevent an increase in the number of manufacturing steps for preventing voids.

The form which solves the said subject is a thing as described in following (1)-(8).
(1) A first groove and a convex groove formed by a second groove having a horizontal cross-sectional area smaller than that of the first groove, and the first and second grooves open at both ends. A semiconductor substrate in which via holes are formed;
A barrier layer and a seed layer covering from the inner surface of the first groove part to a part of the side surface of the second groove part and protruding on the side surface of the through via hole;
An electrode formed on the surface of the seed layer and in the second groove not covered with the seed layer and exposed from both surfaces of the semiconductor substrate.
(2) The axial length ratio between the portion covered with a part of the side surface of the second groove and the portion not covered with the seed layer on the side surface of the second groove is 1: 2. ˜1: 10 The semiconductor device according to (1).
(3) The barrier layer and the seed layer applied to the inner surface of the first groove portion are applied to the side surface and the bottom surface of the first groove portion,
The semiconductor device according to (1) or (2), wherein the through electrode is further formed between a bottom surface of the first groove and a surface of the semiconductor substrate.
(4) The semiconductor device according to any one of (1) to (3), wherein the electrode is formed by electroplating.
(5) A method of manufacturing a semiconductor device,
A through-groove that defines a first groove and a convex groove composed of a second groove having a smaller horizontal cross-sectional area than the first groove, and has both ends opened by the first and second grooves, Forming on a semiconductor substrate;
Forming a barrier layer and a seed layer that are covered from the inner surface of the first groove portion to a part of the side surface of the second groove portion and are raised on the side surface of the through via hole;
Placing a metal foil on top of the first groove;
Forming an electrode formed on the surface of the seed layer and in the second groove not covered with the seed layer and exposed from both surfaces of the semiconductor substrate. A method for manufacturing a semiconductor device.
(6) The axial length ratio between the portion covered with a part of the side surface of the second groove and the portion not covered with the seed layer on the side surface of the second groove is 1: 2. The manufacturing method of the semiconductor device according to (5), which is ˜1: 10.
(7) The barrier layer and the seed layer applied to the inner surface of the first groove portion are applied to the side surface and the bottom surface of the first groove portion,
The method of manufacturing a semiconductor device according to (5) or (6), wherein the electrode is further formed between a bottom surface of the first groove and a surface of the semiconductor substrate.
(8) The semiconductor device according to any one of (5) to (7), wherein the electrode forming step is formed by electroplating.

  In a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention, voids are generated by forming a through electrode in a through via hole having openings on both sides, and not forming a barrier and a seed layer on all sides of the through hole. And the increase in the number of manufacturing processes for preventing the generation of voids can be prevented.

  In addition, since all of the conventionally proposed TSV manufacturing methods are in the form of embedding the electrodes of the trenches, a semiconductor substrate at the bottom of the trenches needs to be removed by CMP after the electrodes are formed. The method eliminates the need to remove the semiconductor substrate at the bottom.

It is a figure which shows an example of the semiconductor device which concerns on embodiment of this invention. It is a figure which shows the silicon substrate shape of the semiconductor device shown to FIG. 1A. It is a figure which shows another example of the semiconductor device which concerns on embodiment of this invention. It is a flowchart which shows an example of the manufacturing process of the semiconductor device which has TSV. It is a figure which shows the semiconductor device in the manufacturing process of 100 A of semiconductor devices shown in FIG. It is sectional drawing of the semiconductor device in the manufacturing process of 100 A of semiconductor devices. It is sectional drawing of the semiconductor device in the manufacturing process of 100 A of semiconductor devices. It is sectional drawing of the semiconductor device in the manufacturing process of 100 A of semiconductor devices. It is sectional drawing of the semiconductor device in the manufacturing process of 100 A of semiconductor devices. It is sectional drawing of the semiconductor device in the manufacturing process of 100 A of semiconductor devices. 4 is a cross-sectional view of a semiconductor device in a manufacturing process of the semiconductor device 100. FIG. 4 is a cross-sectional view of a semiconductor device in a manufacturing process of the semiconductor device 100. FIG.

  Hereinafter, (1) a semiconductor device and (2) a method for manufacturing the semiconductor device will be described in order with reference to the drawings.

(1) Semiconductor Device FIG. 1A is a diagram illustrating an example of a semiconductor device according to an embodiment of the present invention. 1B is a diagram showing a silicon substrate shape of the semiconductor device shown in FIG. 1A. A semiconductor device 100 illustrated in FIG. 1A includes a semiconductor substrate 10 such as a silicon substrate, a barrier / seed layer 40, and an electrode 70. A through via hole for embedding an electrode is formed in the semiconductor substrate 10. As shown by an arrow 101 in FIG. 1B, the through via hole is composed of two grooves, an upper groove shown in the upper part of FIG. 1B and a lower groove shown in the lower part of FIG. 1B as shown by an arrow 102 in FIG. 1B. A downward convex shape is defined (a boundary is defined), and both ends are opened by two grooves.

  The barrier / seed layer 40 includes a barrier layer (adhesion layer) and a seed layer. For example, the barrier layer has a thickness of Ti 10 nm, and the seed layer has a thickness of Cu 100 nm. The barrier / seed layer 40 has a shape that covers from the inner surface of the upper groove portion to a part of the side surface of the lower groove portion and protrudes from the side surface of the through via hole. The electrode 70 is formed on the surface of the barrier / seed layer 40 and inside the lower groove not covered with the barrier / seed layer 40, is formed in the through via hole, and is exposed from both surfaces of the semiconductor substrate 10. .

  In this way, the barrier / seed layer 40 is formed only halfway along the side surface of the through via hole having openings on both sides, the electrode 70 is formed in the through via hole, and the barrier and seed layer are formed on all the side surfaces of the through hole. By not forming the film, generation of voids can be prevented. Further, since there is no need for a special specification sputtering apparatus or electroless nickel plating treatment, it is possible to prevent an increase in the number of manufacturing steps for preventing voids.

  In addition, since the barrier / seed layer 40 has a shape protruding on the side surface of the through via hole, the electrode 70 hinders the electrode 70 from moving in the axial direction from the semiconductor substrate 10, and the electrode is seeded due to temperature shrinkage or the like. Breaking from the layer 40 and the semiconductor substrate 10 can be prevented.

  The axial length ratio between the part that protrudes from the lower groove part and is covered with the barrier / seed layer and the side part of the via hole that is not covered with the barrier / seed layer becomes smaller when the aspect ratio is improved. On the other hand, when the adhesion of the barrier / seed layer to the semiconductor substrate is increased, it becomes larger. Therefore, the length ratio is preferably 1: 2 to 1:10.

  Furthermore, since the through via hole does not have a tapered shape that narrows toward the bottom, the width of the upper surface of the trench does not increase even when the aspect ratio becomes high. Therefore, miniaturization becomes possible.

  FIG. 2 is a diagram showing another example of the semiconductor device according to the embodiment of the present invention. The semiconductor device 100A shown in FIG. 2 is different from the semiconductor device 100 described in FIG. 1 in that an electrode 70A is formed on the upper surface of the barrier / seed layer 40A, and the other configurations are the same. The electrode 70A can be formed on the upper surface of the barrier / seed layer 40 by making the depth of the upper layer portion larger than that of the semiconductor device 100 shown in FIG. 1A.

  When the electrode 70A is formed in this way, the electrode 70A is prevented from moving in the axial direction from the semiconductor substrate 10, and the electrode is more effectively prevented from breaking from the seed layer 40 and the semiconductor substrate 10 due to temperature shrinkage or the like. Can be prevented.

  In FIG. 1A and FIG. 2, for the sake of illustration, the inner diameter length of the upper groove portion is shown longer, but the inner diameter of the upper groove portion is, for example, 1.1 times or more the inner diameter of the lower groove portion. There is.

(2) Manufacturing Method of Semiconductor Device FIG. 3 is a flowchart showing an example of a manufacturing process of a semiconductor device having a TSV. 4A to 4F are views showing cross sections of the semiconductor device in each step of the manufacturing process shown in FIG. 3 and 4A to 4F show the semiconductor device in the manufacturing process of the semiconductor device 100A shown in FIG.

  First, a through via hole is formed in a semiconductor substrate (FIG. 3, S101). FIG. 4A shows a semiconductor device having an upper groove. A photoresist 12 is applied on the semiconductor substrate 10. Furthermore, the pattern which masked the upper groove part is exposed with a stepper, ultraviolet rays are applied to the unmasked photoresist, and the photoresist exposed with the developer is removed. Next, deep reactive ion etching (DRIE) is performed, and the remaining portion of the resist is not removed by etching, so that the upper groove portion 20 is formed in the semiconductor substrate 10.

  FIG. 4B shows a semiconductor device having a lower groove portion in addition to the upper groove portion. A photoresist 13 is applied on the semiconductor substrate 10. Furthermore, the pattern which masked the upper groove part and the lower groove part is exposed with a stepper, ultraviolet rays are applied to the unmasked photoresist, and the photoresist exposed with the developer is removed. Next, DRIE is performed to form the lower groove portion 30 in the semiconductor substrate 10. FIG. 4C shows the semiconductor device after the resist is completely removed with a solvent with respect to the semiconductor device shown in FIG. 4B.

  A silicon oxide film is generated on the surface of the semiconductor device by thermal oxidation (FIG. 3, S102). The silicon oxide film has a thickness of 1 μm, for example.

  Next, a barrier layer and a seed layer are formed on the barrier layer by sputtering or the like on the surface of the upper groove portion and a part of the side surface of the lower groove portion (FIG. 3, S103). FIG. 4D shows the semiconductor device in which the barrier / seed layer 40 is formed. The barrier / seed layer 40 is not formed on the entire side wall of the through via hole, but is formed on a part of the side surface of the through via hole. As shown in FIG. 4D, the barrier / seed layer 40 covers a part of the side surface of the lower groove and forms a shape that protrudes inside the through via hole. With this raised shape, the copper electrode can be adhered to the inner surface of the through via hole, and the copper electrode can be prevented from being broken due to repeated temperature shrinkage or the like.

  In FIGS. 4A to 4F, in order to clearly show the shape, the inner diameter of the upper groove portion is shown larger than the inner diameter of the lower groove portion, but the aspect ratio is increased in accordance with the demand for miniaturization of the semiconductor manufacturing process. In that case, the inner diameter of the upper groove portion may be smaller than shown.

  Next, a Cu electrode is generated in the through via hole by electroplating (FIG. 3, S104). FIG. 4E is a diagram illustrating a semiconductor device to which a Cu electrode forming apparatus is attached. A copper foil 52 is applied to the upper surface of the semiconductor substrate 10, a support plate 54 is placed on the copper foil 52, and the electrode 60 is connected to a power feeding portion of the copper foil 52. The copper foil 52 is covered with an insulating part 56 (for example, Kapton tape). The semiconductor device shown in FIG. 4E is immersed in a Cu electrolytic plating solution (not shown), and the copper plate 51 and the copper foil 52 are energized by the electrode 60 to perform Cu electroplating. Cu is deposited, and Cu is buried in the through via hole. For example, when the current value is adjusted to 20 mA / cm 2, Cu is plated in the through via hole at a rate of 0.3 to 0.4 μm / min. . In this way, the Cu electrode is selectively embedded in the through via hole. When the Cu electrode is selectively embedded, the insulating portion 56 and the copper foil 52 are removed.

  Remove the copper foil and the like (FIG. 3, S105). When the copper foil 52 is removed, a part of the electrode embedded in the via hole may be removed. However, since the barrier / seed layer 40 and the copper foil 52 are not bonded, and the Cu electrode has high adhesion to the inside of the through via hole due to the shape protruding on the side surface of the through via hole, the copper foil 52 Can be easily removed from the electrode 70.

  Finally, the Cu deposited in the through via hole shown in FIG. 4F, the seed layer on the upper surface of the semiconductor substrate 10 is removed, then the barrier layer is removed by chemical treatment, and the Cu deposited on the bottom is removed. The semiconductor device 100A shown in FIG. 2 is manufactured (FIG. 3, S106).

  As described above, the semiconductor device manufacturing method according to the embodiment of the present invention can manufacture a semiconductor device with a TSV without performing a semiconductor substrate removal process.

  The manufacturing process of the semiconductor device 100 shown in FIG. 1A can be performed in the same manner as the manufacturing process shown in the flowchart of FIG. 5A and 5B are views showing a cross section of the semiconductor device in the manufacturing process of the semiconductor device 100. FIG.

  In the case of manufacturing the semiconductor device 100, in the through via hole forming step (FIG. 3, S101) to the barrier / seed layer forming step (FIG. 3, S103), as shown in FIG. 5A, a semiconductor substrate having a shallow upper groove is generated. Then, the barrier / seed layer 40 is formed thereon. Then, in the Cu electrode electroplating step (FIG. 3, S104), a Cu electrode is formed in the through via hole as shown in FIG. 5B. Then, after removing the copper foil or the like (FIG. 3, S105), Cu deposited in the through via hole, the seed layer on the upper surface of the semiconductor substrate 10 is removed, and then the barrier layer is removed by chemical treatment, Then, the Cu deposited on the semiconductor device 100 is removed to manufacture the semiconductor device 100 shown in FIG. 1A (FIG. 3, S106).

  The embodiments described above are merely given as typical examples, and combinations, modifications, and variations of the components of each embodiment will be apparent to those skilled in the art, and those skilled in the art will understand the principles and claims of the present invention. Obviously, various modifications may be made to the embodiments described above without departing from the scope of the described invention.

DESCRIPTION OF SYMBOLS 10 Semiconductor substrate 12, 13 Photoresist 20 Upper groove part 30 Lower groove part 40 Barrier / seed layer 51, 52 Copper foil 60 Electrode 70, 70A Cu electrode 100, 100A Semiconductor device

Claims (8)

A first groove and a convex groove composed of a second groove having a smaller horizontal cross-sectional area than the first groove are defined, and a through via hole having both ends opened by the first and second grooves is formed. A semiconductor substrate,
A barrier layer and a seed layer covering from the inner surface of the first groove part to a part of the side surface of the second groove part and protruding on the side surface of the through via hole;
An electrode formed on the surface of the seed layer and in the second groove not covered with the seed layer and exposed from both surfaces of the semiconductor substrate.   The length ratio in the axial direction between the portion covered with a part of the side surface of the second groove and the portion not covered with the seed layer on the side surface of the second groove is 1: 2 to 1: 10. The semiconductor device according to claim 1, wherein there are ten. The barrier layer and seed layer applied to the inner surface of the first groove are applied to the side and bottom surfaces of the first groove,
The semiconductor device according to claim 1, wherein the through electrode is further formed between a bottom surface of the first groove and a surface of the semiconductor substrate.   The semiconductor device according to claim 1, wherein the electrode is formed by electroplating. A method for manufacturing a semiconductor device, comprising:
A through-groove that defines a first groove and a convex groove composed of a second groove having a smaller horizontal cross-sectional area than the first groove, and has both ends opened by the first and second grooves, Forming on a semiconductor substrate;
Forming a barrier layer and a seed layer that are covered from the inner surface of the first groove portion to a part of the side surface of the second groove portion and are raised on the side surface of the through via hole;
Placing a metal foil on top of the first groove;
Forming an electrode formed on the surface of the seed layer and in the second groove not covered with the seed layer and exposed from both surfaces of the semiconductor substrate. A method for manufacturing a semiconductor device.   The length ratio in the axial direction between the portion covered with a part of the side surface of the second groove and the portion not covered with the seed layer on the side surface of the second groove is 1: 2 to 1: 10. The method for manufacturing a semiconductor device according to claim 5, wherein: The barrier layer and seed layer applied to the inner surface of the first groove are applied to the side and bottom surfaces of the first groove,
The method for manufacturing a semiconductor device according to claim 5, wherein the electrode is further formed between a bottom surface of the first groove and a surface of the semiconductor substrate.   The semiconductor device according to claim 5, wherein the electrode forming step is formed by electroplating.

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