TWI823461B - Package structure and manufacturing method thereof, and display assembly - Google Patents
Package structure and manufacturing method thereof, and display assembly Download PDFInfo
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- TWI823461B TWI823461B TW111125435A TW111125435A TWI823461B TW I823461 B TWI823461 B TW I823461B TW 111125435 A TW111125435 A TW 111125435A TW 111125435 A TW111125435 A TW 111125435A TW I823461 B TWI823461 B TW I823461B
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Abstract
Description
本申請涉及一種封裝結構及其製作方法、顯示組件。 The present application relates to a packaging structure, a manufacturing method thereof, and a display component.
Micro-LED顯示幕由於其高對比、節能等性能方面的優勢,被視為下一代顯示幕的主流技術。目前柔性顯示幕可以通過柔性線路板與螢幕模組垂直封裝工藝製作。該封裝過程主要包括步驟:首先,將驅動晶片通過壓接的方式設置在柔性封裝結構一側的細線路上;然後,將顯示幕通過壓接的方式設置在該柔性封裝結構的另一側的輸入輸出端。 Micro-LED displays are regarded as the mainstream technology for next-generation displays due to their performance advantages such as high contrast and energy saving. Currently, flexible displays can be produced through the vertical packaging process of flexible circuit boards and screen modules. The packaging process mainly includes steps: first, the driver chip is placed on the thin line on one side of the flexible packaging structure through crimping; then, the display screen is placed on the input on the other side of the flexible packaging structure through crimping output terminal.
一般情況下,為了避免顯示幕與柔性封裝結構對接後產生的不平整或波紋對顯示產生影響,所述柔性封裝結構需壓接顯示幕的一表面應具有良好的平整度(<2.0μm),現有技術無法在保證平整度的技術上實現雙面顯示幕壓接,進而所述柔性顯示幕不能實現雙面顯示與觸控。 In general, in order to avoid unevenness or ripples produced after the display screen is connected to the flexible packaging structure, which may affect the display, the surface of the flexible packaging structure that needs to be pressed against the display screen should have good flatness (<2.0 μm). The existing technology cannot realize the pressure bonding of a double-sided display screen while ensuring flatness, and the flexible display screen cannot realize double-sided display and touch control.
有鑑於此,本申請提供一種能夠能解決上述問題的封裝結構的製作方法。 In view of this, the present application provides a method for manufacturing a packaging structure that can solve the above problems.
另外,還有必要提供一種封裝結構。 In addition, it is necessary to provide a packaging structure.
另外,還有必要提供一種顯示組件。 In addition, it is necessary to provide a display component.
本申請提供一種封裝結構的製作方法,包括以下步驟:提供一線路基板,所述線路基板包括第一基材層和設置於所述第一基材層相對兩側的二內側線路層,每一所述內側線路層包括細線路;於所述細線路上設置電子元件;於所述內側線路層上設置粘接結構,所述粘接結構包括一第二基材層、第一粘接層和第二粘接層,所述第一粘接層和第二粘接層分別設置於所述第二基材層的相對兩側,所述第一粘接層朝向所述內側線路層設置;所述粘接結構中貫穿設置有多個外側導通體,所述外側導通體連接於所述內側線路層;於所述第二粘接層上設置線路載板,所述線路載板包括載板和設置於所述載板一側的外部線路層,所述外部線路層包括多個導電連接墊,所述導電連接墊內嵌於所述第二粘接層,所述導電連接墊通過所述外側導通體電性連接於所述內側線路層;移除所述載板,獲得所述封裝結構。 The present application provides a method for manufacturing a packaging structure, which includes the following steps: providing a circuit substrate, which includes a first base material layer and two inner circuit layers disposed on opposite sides of the first base material layer, each The inner circuit layer includes thin circuits; electronic components are provided on the thin circuits; an adhesive structure is provided on the inner circuit layer, and the adhesive structure includes a second base material layer, a first adhesive layer and a third adhesive layer. Two adhesive layers, the first adhesive layer and the second adhesive layer are respectively disposed on opposite sides of the second base material layer, and the first adhesive layer is disposed toward the inner circuit layer; A plurality of outer conductive bodies are provided through the adhesive structure, and the outer conductive bodies are connected to the inner circuit layer; a circuit carrier board is provided on the second adhesive layer, and the circuit carrier board includes a carrier board and a device On the external circuit layer on one side of the carrier board, the external circuit layer includes a plurality of conductive connection pads, the conductive connection pads are embedded in the second adhesive layer, and the conductive connection pads are conductive through the outside The body is electrically connected to the inner circuit layer; the carrier board is removed to obtain the packaging structure.
在一些實施方式中,所述導電連接墊背離所述第二粘接層的表面與所述第二粘接層背離所述第二基材層的表面大致平齊。 In some embodiments, a surface of the conductive connection pad facing away from the second adhesive layer is substantially flush with a surface of the second adhesive layer facing away from the second base material layer.
在一些實施方式中,所述外側導通體的材質為添加磁性粒子的錫膏。 In some embodiments, the outer conductive body is made of solder paste with magnetic particles added thereto.
在一些實施方式中,步驟“於所述細線路上設置電子元件”前還包括:於所述細線路上設置導電膏體,所述導電膏體的材質為添加磁性粒子的錫膏。 In some embodiments, before the step of "arranging electronic components on the thin lines", the step further includes: placing a conductive paste on the thin lines. The conductive paste is made of solder paste with magnetic particles added.
在一些實施方式中,步驟“於所述內側線路層上壓合粘接結構”包括:於所述第一粘接層上貫穿開設一開口,所述開口對應所述電子元件設置; 於所述粘接結構中貫穿開設多個通孔,部分所述內側線路層由所述通孔的底部露出,於所述通孔中填充導電膏以形成所述外側導通體,所述外側導通體連接於所述內側線路層和所述導電連接墊。 In some embodiments, the step of "pressing and bonding the adhesive structure on the inner circuit layer" includes: opening an opening through the first adhesive layer, the opening corresponding to the electronic component; A plurality of through holes are opened in the bonding structure, and part of the inner circuit layer is exposed from the bottom of the through holes. Conductive paste is filled in the through holes to form the outer conductive body, and the outer conductive body is The body is connected to the inner circuit layer and the conductive connection pad.
在一些實施方式中,所述線路基板的製作方法包括以下步驟:提供一雙面覆銅板,所述雙面覆銅板包括一第一基材層和設置於所述第一基材層相對兩側的二第一銅箔層;於每一所述第一銅箔層上設置一第一乾膜;對所述第一乾膜進行曝光、顯影,然後蝕刻所述第一銅箔層形成所述內側線路層,所述內側線路層包括多個細線路、多個第一線路和多個第二線路,去除所述第一乾膜;於所述第一基材層和其中一內側線路層上開設一貫穿的開孔,於所述開孔中填銅形成內側導通體,所述內側導通體電性連接於所述第一基材層相對兩側的所述第二線路,即獲得所述線路基板。 In some embodiments, the manufacturing method of the circuit substrate includes the following steps: providing a double-sided copper clad laminate, the double-sided copper clad laminate including a first base material layer and a first base material layer disposed on opposite sides of the first base material layer. two first copper foil layers; disposing a first dry film on each first copper foil layer; exposing and developing the first dry film, and then etching the first copper foil layer to form the Inner circuit layer, the inner circuit layer includes a plurality of thin circuits, a plurality of first circuits and a plurality of second circuits, remove the first dry film; on the first base material layer and one of the inner circuit layers A through opening is opened, and copper is filled in the opening to form an inner conductive body. The inner conductive body is electrically connected to the second lines on opposite sides of the first base material layer, that is, the above-mentioned Circuit substrate.
在一些實施方式中,所述線路載板的製作方法包括:提供一單面覆銅板,所述單面覆銅板包括一載板和設置於所述載板一表面的第二銅箔層;於所述第二銅箔層上設置一第二乾膜;對所述第二乾膜進行曝光顯影,並蝕刻所述第二銅箔層形成所述外側線路層,所述外側線路層包括多個導電連接墊,移除所述第二乾膜獲得所述線路載板。 In some embodiments, the manufacturing method of the circuit carrier board includes: providing a single-sided copper clad board, the single-sided copper clad board includes a carrier board and a second copper foil layer disposed on a surface of the carrier board; A second dry film is disposed on the second copper foil layer; the second dry film is exposed and developed, and the second copper foil layer is etched to form the outer circuit layer. The outer circuit layer includes a plurality of The conductive connection pad is removed, and the second dry film is removed to obtain the circuit carrier board.
本申請還提供一種封裝結構,包括:線路基板,所述線路基板包括一第一基材層和二內側線路層,所述二內側線路層分別設置於所述第一基材層的相對兩側,每一所述內側線路層包括多個細線路、多個第一線路和多個第二線路;電子元件,所述電子元件設於所述細線路上; 粘接結構,所述粘接結構包括一第二基材層、第一粘接層和第二粘接層,所述第一粘接層和第二粘接層分別設置於所述第二基材層的相對兩側,所述第一粘接層連接於所述內側線路層,所述第一粘接層上開設有一貫穿的開口,所述開口對應於所述電子元件設置;貫穿所述粘接結構設有多個外側導通體,所述導通體連接於所述第一線路和所述第二線路;外側線路層,所述外側線路層包括多個導電連接墊,所述導電連接墊背離所述第二粘接層的表面與所述第二粘接層背離所述第二基材層的表面大致平齊,所述導電連接墊通過所述外側導通體電性連接於所述內側線路層。 The application also provides a packaging structure, including: a circuit substrate. The circuit substrate includes a first base material layer and two inner circuit layers. The two inner circuit layers are respectively provided on opposite sides of the first base material layer. , each inner circuit layer includes a plurality of thin circuits, a plurality of first circuits and a plurality of second circuits; electronic components, the electronic components are provided on the thin circuits; Adhesive structure, the adhesive structure includes a second base material layer, a first adhesive layer and a second adhesive layer, the first adhesive layer and the second adhesive layer are respectively arranged on the second base material On opposite sides of the material layer, the first adhesive layer is connected to the inner circuit layer, and a through opening is provided on the first adhesive layer, and the opening is provided corresponding to the electronic component; through the The bonding structure is provided with a plurality of outer conductive bodies, the conductive bodies are connected to the first line and the second line; an outer line layer, the outer line layer includes a plurality of conductive connection pads, the conductive connection pads The surface of the second adhesive layer facing away from the second base material layer is substantially flush with the surface of the second adhesive layer facing away from the second base material layer. The conductive connection pad is electrically connected to the inner side through the outer conductive body. line layer.
在一些實施方式中,所述封裝結構還包括導電膏體,所述導電膏體設置於所述細線路與所述電子元件之間,所述導電膏體和所述外側導通體的材質均為添加磁性粒子的錫膏。 In some embodiments, the packaging structure further includes a conductive paste, the conductive paste is disposed between the thin circuit and the electronic component, and the conductive paste and the outer conductive body are both made of Solder paste with added magnetic particles.
本申請還提供一種顯示組件,包括顯示幕模組及所述封裝結構,所述顯示幕模組設置於所述外側線路層上,所述顯示幕模組電性連接所述導電連接墊;所述電子元件為驅動晶片。 This application also provides a display component, including a display screen module and the packaging structure. The display screen module is disposed on the outer circuit layer, and the display screen module is electrically connected to the conductive connection pad; The electronic component is a driver chip.
相比於現有技術,本申請提供的封裝結構的製作方法通過雙面壓合所述粘接結構,將所述外側線路層內嵌於所述第二粘接層中,可使得所述導電連接墊具有較佳的平整度,多個導電連接墊的高度差能夠控制在1微米以內,使得後續與顯示幕模組連接時具有超高的整平性,有利於防止對接時產生水波紋,從而提高產品品質。通過將所述電子元件直接貼裝於所述線路基板的細線路上,雙面內埋電子元件,對應於雙面設置所述導電連接墊,可實現後續顯示幕的雙面顯示與觸控。 Compared with the existing technology, the manufacturing method of the packaging structure provided by this application can make the conductive connection by pressing the adhesive structure on both sides and embedding the outer circuit layer in the second adhesive layer. The pads have better flatness, and the height difference of multiple conductive connection pads can be controlled within 1 micron, which makes the subsequent connection with the display module extremely flat and helps prevent water ripples from being generated during docking. Improve product quality. By directly mounting the electronic components on the thin lines of the circuit substrate, embedding the electronic components on both sides, and arranging the conductive connection pads on both sides, double-sided display and touch control of the subsequent display screen can be achieved.
另外,通過局部內埋所述電子元件,不會使得所述封裝結構喪失自由度,且不會佔用所述封裝結構的佈線面積。通過設置所述導電膏體和所述外側導通體,並將所述導電膏體和所述外側導通體的材質設置為添加磁性粒子的錫膏,有利於提升所述封裝結構的整體尺寸安定性,提高產品良率。並且, 可通過簡單的蝕刻方式實現多個所述細線路和所述導電連接墊之間的細間距,有利於提高集成度和小型化。 In addition, by partially embedding the electronic components, the packaging structure will not lose its degree of freedom, and the wiring area of the packaging structure will not be occupied. By arranging the conductive paste and the outer conductive body, and setting the materials of the conductive paste and the outer conductive body to solder paste with added magnetic particles, it is beneficial to improve the overall dimensional stability of the packaging structure. , improve product yield. and, The fine spacing between the plurality of thin lines and the conductive connection pads can be achieved through simple etching, which is beneficial to improving integration and miniaturization.
100:封裝結構 100:Package structure
10:線路基板 10: Circuit substrate
10a:雙面覆銅板 10a: Double-sided copper clad laminate
101:第一銅箔層 101: First copper foil layer
102:第一乾膜 102: First dry film
103:開孔 103:Opening
11:第一基材層 11: First base material layer
12:內側線路層 12:Inside circuit layer
121:細線路 121: thin line
122:第一線路 122:First line
123:第二線路 123:Second line
13:內側導通體 13:Inner conductor
20:導電膏體 20: Conductive paste
21:電子元件 21:Electronic components
30:粘接結構 30: Bonding structure
31:第二基材層 31: Second base material layer
32:第一粘接層 32: First adhesive layer
33:第二粘接層 33: Second adhesive layer
34:開口 34:Open your mouth
35:通孔 35:Through hole
36:外側導通體 36:Outer conductor
40:第一中間體 40:First intermediate
50:線路載板 50: Line carrier board
50a:單面覆銅板 50a:Single side copper clad laminate
502:第二銅箔層 502: Second copper foil layer
503:第二乾膜 503: Second dry film
51:載板 51: Carrier board
52:外側線路層 52:Outside line layer
53:導電連接墊 53: Conductive connection pad
60:第二中間體 60:Second intermediate
200:顯示組件 200:Display component
70:導電膠層 70: Conductive adhesive layer
80:顯示幕模組 80:Display module
圖1是本申請一實施例提供的線路基板的截面示意圖。 FIG. 1 is a schematic cross-sectional view of a circuit substrate provided by an embodiment of the present application.
圖2a至圖2c為圖1所示之線路基板的製作過程示意圖。 Figures 2a to 2c are schematic diagrams of the manufacturing process of the circuit substrate shown in Figure 1.
圖3為於圖1所示之線路基板上設置電子元件並壓合粘接結構形成第一中間體的製作過程示意圖。 FIG. 3 is a schematic diagram of the manufacturing process of arranging electronic components on the circuit substrate shown in FIG. 1 and pressing and bonding the structure to form a first intermediate body.
圖4為由圖3所示製作過程得到的第一中間體的截面示意圖。 Figure 4 is a schematic cross-sectional view of the first intermediate obtained by the manufacturing process shown in Figure 3.
圖5為於圖4所示之第一中間體兩側壓合線路載板形成第二中間體的製作過程示意圖。 FIG. 5 is a schematic diagram of the manufacturing process of laminating circuit carrier boards on both sides of the first intermediate body shown in FIG. 4 to form a second intermediate body.
圖6由圖5所示製作過程得到的第二中間體的截面示意圖。 Figure 6 is a schematic cross-sectional view of the second intermediate obtained by the manufacturing process shown in Figure 5.
圖7a至圖7c為圖6所示之線路載板的製作過程示意圖。 Figures 7a to 7c are schematic diagrams of the manufacturing process of the circuit carrier board shown in Figure 6.
圖8為移除圖6所示之載板後得到的封裝結構的截面示意圖。 FIG. 8 is a schematic cross-sectional view of the package structure obtained after removing the carrier board shown in FIG. 6 .
圖9為圖8所示之封裝結構的俯視圖。 FIG. 9 is a top view of the packaging structure shown in FIG. 8 .
圖10為於圖8所示之封裝結構上壓合導電膠層和顯示幕模組形成顯示組件的製作過程示意圖。 FIG. 10 is a schematic diagram of the manufacturing process of laminating the conductive adhesive layer and the display screen module on the packaging structure shown in FIG. 8 to form a display component.
圖11為由圖10所示製作過程得到的顯示組件的截面示意圖。 FIG. 11 is a schematic cross-sectional view of the display component obtained through the manufacturing process shown in FIG. 10 .
下面將結合本申請實施例中的附圖,對本申請實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅是本申請一部分實施例, 而不是全部的實施例。基於本申請中的實施例,本領域普通技術人員在沒有做出創造性勞動前提下所獲得的所有其他實施例,都屬於本申請保護的範圍。 The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application. Not all examples. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.
除非另有定義,本文所使用的所有的技術和科學術語與屬於本申請的技術領域的技術人員通常理解的含義相同。本文中在本申請的說明書中所使用的術語只是為了描述具體的實施例的目的,不是旨在於限制本申請。 Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing specific embodiments only and is not intended to limit the application.
下面結合附圖,對本申請的一些實施方式作詳細說明。在不衝突的情況下,下述的實施例及實施例中的特徵可以相互組合。 Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The following embodiments and features in the embodiments may be combined with each other without conflict.
請參閱圖1至圖6,本申請一實施例提供一種封裝結構100(參圖8)的製作方法,包括步驟: Referring to Figures 1 to 6, one embodiment of the present application provides a method for manufacturing a packaging structure 100 (see Figure 8), which includes the steps:
步驟S11:請參見圖1,提供一線路基板10,所述線路基板10包括一第一基材層11和二內側線路層12,所述二內側線路層12分別設置於所述第一基材層11的相對兩側。
Step S11: Referring to Figure 1, a
具體地,每一所述內側線路層12包括多個細線路121、多個第一線路122和多個第二線路123。所述第一基材層11上貫穿設置有多個內側導通體13,所述內側導通體13電性連接於所述第一基材層11相對兩側的所述第二線路123。
Specifically, each
其中,所述第一基材層11的材質可以為聚醯亞胺(Polyimide,PI)、滌綸樹脂(Polyethylene terephthalate,PET)、聚萘二甲酸乙二醇酯(poly(ethylene 2,6-naphthalenedi-carboxylate),PEN)、液晶高分子聚合物(liquid crystal polymer,LCP)以及改性聚醯亞胺(modified polyimide,MPI)中的至少一種。在本實施例中,所述第一基材層11的材質為聚醯亞胺。
The material of the first
其中,可以採用壓感光膜、曝光顯影、蝕刻的方式於所述第一基材層11上製作所述二內側線路層12,具體包括以下步驟:
Among them, the two inner circuit layers 12 can be produced on the first
步驟S111:請參見圖2a,提供一雙面覆銅板10a,所述雙面覆銅板10a包括一第一基材層11和設置於所述第一基材層11相對兩側的二第一銅箔層101。
Step S111: Referring to Figure 2a, a double-sided copper clad
步驟S112:請參見圖2b,於每一所述第一銅箔層101上壓合一第一乾膜102。
Step S112: Referring to FIG. 2b, a first
步驟S113:請參見圖2c,對所述第一乾膜102進行曝光、顯影,然後蝕刻所述第一銅箔層101形成所述內側線路層12,所述內側線路層12包括多個細線路121、多個第一線路122和多個第二線路123,去除所述第一乾膜102,即獲得所述線路基板10。
Step S113: Referring to FIG. 2c, the first
其中,步驟S113後還包括:於所述第一基材層11和其中一內側線路層12上開設一貫穿的開孔103,於所述開孔103中填銅形成所述內側導通體13,所述內側導通體13電性連接於所述第一基材層11相對兩側的所述第二線路123。
Among them, after step S113, it also includes: opening a through
在本實施例中,通過簡單的蝕刻製程,可以實現所述細線路121之間的細間距(fine pitch),有利於後續貼裝器件的高集成度。
In this embodiment, through a simple etching process, fine pitch between the
步驟S12:請參見圖3和圖4,於所述細線路121上貼裝電子元件21,然後於所述內側線路層12上壓合一粘接結構30,得到一第一中間體40。
Step S12: Referring to Figures 3 and 4,
具體地,所述步驟S12包括以下步驟: Specifically, the step S12 includes the following steps:
步驟S121:於所述細線路121上設置一導電膏體20,於所述導電膏體20上貼裝所述電子元件21。
Step S121: Set a
在本實施例中,所述導電膏體20的材質為添加有磁性粒子的錫膏,有利於貼裝特殊電子元件,例如無法承受高溫的特殊電子元件。所述電子元件21可為驅動晶片、電容、電感等。
In this embodiment, the
步驟S122:於每一所述內側線路層12上壓合一粘接結構30。
Step S122: Press an
其中,所述粘接結構30包括一第二基材層31、第一粘接層32和第二粘接層33,所述第一粘接層32和第二粘接層33分別設置於所述第二基材層31的相對兩側。所述第一粘接層32朝向所述內側線路層12設置。所述第一粘接層32上開設有一貫穿的開口34,所述開口34對應於所述電子元件21設置。
Wherein, the
所述粘接結構30上貫穿開設有多個通孔35,部分所述第一線路
122和所述第二線路123由所述通孔35的底部露出。
A plurality of through
在本實施例中,所述開口34和所述通孔35可以通過鐳射切割或者機械鑽孔的方式形成。
In this embodiment, the
步驟S123:於所述通孔35中填塞導電膏,以形成多個外側導通體36,所述外側導通體36連接於所述第一線路122和所述第二線路123,獲得所述第一中間體40。
Step S123: Fill the through
其中,所述導電膏的材質可以為添加磁性粒子的錫膏、銅膏等。在本實施例中,所述導電膏的材質為添加磁性粒子的錫膏,有利於提升柔性線路板的尺寸穩定性。 The material of the conductive paste may be solder paste, copper paste, etc. with magnetic particles added. In this embodiment, the conductive paste is made of solder paste with added magnetic particles, which is beneficial to improving the dimensional stability of the flexible circuit board.
步驟S13:請參見圖5和圖6,於所述第一中間體40的兩側分別壓合一線路載板50,獲得一第二中間體60。
Step S13: Referring to Figures 5 and 6, a
其中,所述線路載板50包括一載板51和一設置於所述載板51一表面上的外側線路層52,所述外側線路層52包括多個導電連接墊53,多個所述導電連接墊53朝向所述第一中間體40設置,且所述導電連接墊53朝向所述第一中間體40的一側平齊。
The
壓合後,所述導電連接墊53內嵌於所述第二粘接層33中,所述導電連接墊53連接所述載板51的表面與所述第二粘接層33背離所述第二基材層31的表面大致平齊,所述導電連接墊53連接於所述外側導通體36,即所述導電連接墊53通過所述外側導通體36電性連接於所述內側線路層12。
After pressing, the
其中,所述載板51承托或者負載所述外側線路層52,使得所述外側線路層52具有較佳的平整度,進而使得多個所述導電連接墊53具有較佳的平整度。經常規的表面處理後,內嵌於所述第二粘接層33的所述導電連接墊53仍能保持較佳的平整度。具體地,多個所述導電連接墊53朝向所述載板51的一側的高度差(未標示)在1微米以內。
Wherein, the
在本實施例中,可以採用壓感光膜、曝光顯影、蝕刻的方式於所述載板51上製作所述外側線路層52,具體包括以下步驟:
In this embodiment, the
步驟S131:請參見圖7a,提供一單面覆銅板50a,所述單面覆銅板50a包括一載板51和設置於所述載板51一表面的第二銅箔層502。
Step S131: Refer to FIG. 7a to provide a single-sided copper-clad
步驟S132:請參見圖7b,於所述第二銅箔層502上壓合一層第二乾膜503。 Step S132: Referring to FIG. 7b, a second dry film 503 is pressed on the second copper foil layer 502.
步驟S133:請參見圖7c,對所述第二乾膜503進行曝光顯影,並蝕刻所述第二銅箔層502形成所述外側線路層52,所述外側線路層52包括多個導電連接墊53,移除所述第二乾膜503獲得所述線路載板50。
Step S133: Referring to Figure 7c, the second dry film 503 is exposed and developed, and the second copper foil layer 502 is etched to form the
在本實施例中,通過簡單的蝕刻製程,可以實現所述導電連接墊53之間的細間距(fine pitch)。
In this embodiment, a fine pitch between the
在本實施例中,所述第二基材層31和所述載板51均具有可撓性,其材質包括聚醯亞胺(Polyimide,PI)、滌綸樹脂(Polyethylene terephthalate,PET)、聚萘二甲酸乙二醇酯(poly(ethylene 2,6-naphthalenedi-carboxylate),PEN)、液晶高分子聚合物(liquid crystal polymer,LCP)以及改性聚醯亞胺(modified polyimide,MPI)中的至少一種。
In this embodiment, the second
在本實施例中,所述第二基材層31和所述載板51的材質均為聚醯亞胺,所述第一粘接層32和第二粘接層33為純膠。
In this embodiment, the second
步驟S14:請參見圖8,移除所述載板51,獲得封裝結構100。
Step S14: Referring to FIG. 8 , remove the
具體地,可採用蝕刻的方式去除所述載板51,獲得雙面具有導電連接墊53的封裝結構100。
Specifically, the
本申請中,通過將所述電子元件21直接貼裝於所述線路基板10的細線路121上,可實現雙面內埋電子元件21。然後通過雙面壓合所述粘接結構30,將所述外側線路層52內嵌於所述第二粘接層33中,可使得所述導電連接墊53具有較佳的平整度,多個導電連接墊53的高度差能夠控制在1微米以內,使得後續與顯示幕模組連接時具有超高的整平性,有利於防止對接時產生水波紋,從而提高產品品質。通過雙面內埋電子元件21和導電連接墊53,可實現後續顯示幕的雙面顯示與觸控。
In this application, by directly mounting the
另外,通過局部內埋所述電子元件21,不會使得所述封裝結構100喪失自由度,且不會佔用所述封裝結構100的佈線面積。
In addition, by partially embedding the
另外,通過設置所述導電膏體20和所述外側導通體36,並將所述導電膏體20和所述外側導通體36的材質設置為添加磁性粒子的錫膏,有利於提升所述封裝結構100的整體尺寸安定性,提高產品良率。
In addition, by arranging the
另外,可通過簡單的蝕刻方式實現多個所述細線路121和所述導電連接墊53之間的細間距,有利於提高集成度和小型化。
In addition, the fine spacing between the plurality of
請參閱圖8和圖9,本申請還提供一種採用上述製作方法製備得到的封裝結構100,所述封裝結構100包括線路基板10、二電子元件21、二粘接結構30及二外側線路層52。所述二電子元件21分別貼裝於所述線路基板10的兩側,所述二粘接結構30分別壓合於所述線路基板10的相對兩側,每一所述外側線路層52內嵌於一所述粘接結構30中。
Referring to Figures 8 and 9, the present application also provides a
所述線路基板10包括一第一基材層11和二內側線路層12,所述二內側線路層12分別設置於所述第一基材層11的相對兩側。每一所述內側線路層12包括多個細線路121、多個第一線路122和多個第二線路123。所述第一基材層11上貫穿設置有多個內側導通體13,所述內側導通體13電性連接於所述第一基材層11相對兩側的所述第二線路123。
The
所述細線路121上設有一導電膏體20,每一所述電子元件21通過所述導電膏體20貼裝於一所述內側線路層12的多個細線路121上。在本實施例中,兩個所述電子元件21均為驅動晶片,所述導電膏體20的材質為添加有磁性粒子的錫膏。
A
所述粘接結構30包括一第二基材層31、第一粘接層32和第二粘接層33,所述第一粘接層32和第二粘接層33分別設置於所述第二基材層31的相對兩側,所述第一粘接層32連接於所述內側線路層12。所述第一粘接層32上開設有一貫穿的開口34,所述開口34對應於所述電子元件21設置。貫穿所述粘接結構30設有多個外側導通體36,所述外側導通體36連接於所述第一線
路122和所述第二線路123。每一所述外側線路層52包括多個導電連接墊53,所述導電連接墊53背離所述外側導通體36的表面與所述第二粘接層33背離所述第二基材層31的表面大致平齊,所述導電連接墊53連接於所述外側導通體36,即所述導電連接墊53通過所述外側導通體36電性連接於所述內側線路層12。
The
其中,所述外側導通體36中填充的材料為添加磁性粒子的錫膏。內嵌於所述第二粘接層33的所述多個導電連接墊53具有較佳的平整度,具體地,多個導電連接墊53背離所述外側導通體36一側的高度差在1微米以內。
The material filled in the outer
請參閱圖10和圖11,本申請還提供一種顯示組件的製作方法,包括以下步驟:於所述封裝結構100的兩側分別依次壓合一導電膠層70和顯示幕模組80,所述顯示幕模組80通過所述導電膠層70電性連接於所述導電連接墊53,獲得顯示組件200。
Referring to Figures 10 and 11, the present application also provides a method for manufacturing a display component, which includes the following steps: sequentially pressing a conductive
其中,所述導電膠層70為異方性導電膠膜(Anisotropic Conductive Film,ACF),所述顯示幕模組80為Micro-LED模組。
Wherein, the conductive
請參閱圖11,本申請還提供一種顯示組件200,所述顯示組件200包括所述封裝結構100、二導電膠層70和二顯示幕模組80,每一所述導電膠層70和所述顯示幕模組80依次壓合於所述封裝結構100的相對兩側,每一所述顯示幕模組80通過所述導電膠層70電性連接於所述導電連接墊53。
Please refer to Figure 11. This application also provides a
以上所述,僅是本申請的較佳實施方式而已,並非對本申請任何形式上的限制,雖然本申請已是較佳實施方式揭露如上,並非用以限定本申請,任何熟悉本專業的技術人員,在不脫離本申請技術方案範圍內,當可利用上述揭示的技術內容做出些許更動或修飾為等同變化的等效實施方式,但凡是未脫離本申請技術方案內容,依據本申請的技術實質對以上實施方式所做的任何簡單修改、等同變化與修飾,均仍屬於本申請技術方案的範圍內。 The above are only the preferred embodiments of the present application and are not intended to limit the present application in any form. Although the preferred embodiments of the present application are disclosed above, they are not intended to limit the present application. Any skilled person familiar with this field will , without departing from the scope of the technical solution of this application, when the technical content disclosed above can be used to make some changes or modifications to equivalent implementations with equivalent changes, but without departing from the content of the technical solution of this application, according to the technical essence of this application Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present application.
100:封裝結構 100:Package structure
10:線路基板 10: Circuit substrate
11:第一基材層 11: First base material layer
12:內側線路層 12:Inside circuit layer
121:細線路 121: thin line
122:第一線路 122:First line
123:第二線路 123:Second line
13:內側導通體 13:Inner conductor
20:導電膏體 20: Conductive paste
21:電子元件 21:Electronic components
30:粘接結構 30: Bonding structure
31:第二基材層 31: Second base material layer
32:第一粘接層 32: First adhesive layer
33:第二粘接層 33: Second adhesive layer
36:外側導通體 36:Outer conductor
53:導電連接墊 53: Conductive connection pad
Claims (10)
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| CN202210699084.7A CN117316774A (en) | 2022-06-20 | 2022-06-20 | Packaging structure and manufacturing method, display component |
| CN202210699084.7 | 2022-06-20 |
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| TWI895865B (en) * | 2023-11-30 | 2025-09-01 | 大陸商宏啟勝精密電子(秦皇島)有限公司 | Method for packaging chip, chip packaging structure, and terminal device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090041994A1 (en) * | 2005-07-04 | 2009-02-12 | Ulrich Ockenfuss | Multilayer Printed Circuit Board Structure Comprising an Integrated Electrical Component, and Production Method Therefor |
| US20100230145A1 (en) * | 2007-01-02 | 2010-09-16 | Ormet Circuits, Inc. | Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias |
| US20120153493A1 (en) * | 2010-12-17 | 2012-06-21 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090041994A1 (en) * | 2005-07-04 | 2009-02-12 | Ulrich Ockenfuss | Multilayer Printed Circuit Board Structure Comprising an Integrated Electrical Component, and Production Method Therefor |
| US20100230145A1 (en) * | 2007-01-02 | 2010-09-16 | Ormet Circuits, Inc. | Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias |
| US20120153493A1 (en) * | 2010-12-17 | 2012-06-21 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI895865B (en) * | 2023-11-30 | 2025-09-01 | 大陸商宏啟勝精密電子(秦皇島)有限公司 | Method for packaging chip, chip packaging structure, and terminal device |
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