TWI893815B - Display panel - Google Patents

Abstract

A display panel including a first substrate, a second substrate, a liquid crystal layer, a plurality of data lines, a plurality of scan lines, a plurality of touch signal lines, a plurality of pixel structures, a plurality of bridge pads, a plurality of electrode patterns and a plurality of first spacers is provided. The liquid crystal layer is disposed between the first substrate and the second substrate. The bridge pads are disposed on the first substrate, and are respectively and electrically connected to the touch signal lines. The electrode patterns are arranged on the second substrate at intervals along the first direction and the second direction, and overlap a plurality of pixel electrodes of the pixel structures. The first spacers are disposed on the second substrate, and respectively abut on the bridge pads along a stacking direction of the first substrate and the second substrate. Each of the electrode patterns covers one of the first spacers to electrically connect one of the bridge pads.

Description

Display Panel

The present invention relates to a display panel, and in particular to a display panel with a touch function.

In current touch-enabled LCD panels, the liquid crystal layer is typically driven using in-plane switching (IPS) mode. When a user touches the display, the capacitance change between each pixel electrode and the common electrode on the same substrate is detected for positioning. However, this touch sensing architecture is not applicable to display panels that use twisted nematic (TN) mode for liquid crystal drive, as the capacitance change caused by touch is blocked by the liquid crystal capacitance generated by the display.

The present invention provides a display panel that utilizes electrodes disposed on opposite sides of a liquid crystal layer to drive the liquid crystal, and also has a structural design sufficient to achieve a reliable touch function.

The display panel of the present invention includes a first substrate, a second substrate, a liquid crystal layer, a plurality of data lines, a plurality of scan lines, a plurality of touch signal lines, a plurality of pixel structures, a plurality of bridge pads, a plurality of electrode patterns, and a plurality of first spacers. The first substrate and the second substrate are overlapped along a stacking direction. The liquid crystal layer is disposed between the first substrate and the second substrate. A plurality of data lines are arranged along a first direction on the first substrate. A plurality of scan lines are arranged along a second direction on the first substrate. The first direction intersects with the second direction. A plurality of touch signal lines are disposed on the first substrate. A plurality of pixel structures are disposed on the first substrate, and each has an active element and a pixel electrode. The active element is electrically connected to the pixel electrode, one of the plurality of data lines, and one of the plurality of scan lines. A plurality of bridge pads are disposed on the first substrate and electrically connected to the touch signal lines. A plurality of electrode patterns are arranged on the second substrate at intervals along the first and second directions, overlapping the plurality of pixel electrodes of the plurality of pixel structures. A plurality of first spacers are disposed on the second substrate and located between the electrode patterns and the second substrate. The first spacers abut the bridge pads along the stacking direction, with each electrode pattern covering one of the first spacers to electrically connect to one of the bridge pads.

In one embodiment of the present invention, the display panel further includes a plurality of second spacers disposed on the second substrate. A first height of each first spacer along the stacking direction is greater than a second height of each second spacer along the stacking direction.

In one embodiment of the present invention, the plurality of first spacers and the plurality of second spacers of the display panel are formed from the same film layer.

In one embodiment of the present invention, the plurality of electrode patterns of the display panel cover the plurality of first spacers, and the plurality of second spacers are disposed on a side of the electrode patterns facing away from the second substrate.

In one embodiment of the present invention, the plurality of second spacers of the display panel overlap with the plurality of pixel electrodes of the plurality of pixel structures.

In one embodiment of the present invention, the plurality of bridge pads and the plurality of pixel electrodes of the display panel are formed from the same film layer.

In one embodiment of the present invention, each pixel structure of the display panel further comprises a first transfer pattern disposed between the pixel electrode and the active element, electrically connecting the pixel electrode to the active element via the first transfer pattern. A second transfer pattern is disposed between each bridge pad and one of the plurality of touch signal lines. Each bridge pad is electrically connected to one of the touch signal lines via the second transfer pattern, and the first and second transfer patterns are formed from the same film layer.

In one embodiment of the present invention, each pixel structure of the display panel further comprises a reflective layer. The reflective layer has an opening that overlaps the pixel electrode and defines a reflective region for each pixel structure. The opening in the reflective layer defines a light-transmitting region for each pixel structure, and the orthographic projection of the opening on the substrate surface of the first substrate lies within the orthographic projection of the pixel electrode on the substrate surface.

In one embodiment of the present invention, the plurality of bridge pads of the display panel and the reflective layer of each pixel structure are formed from the same film layer.

In one embodiment of the present invention, a transfer pattern is provided between each bridge pad of the display panel and one of the touch signal lines. Each bridge pad is electrically connected to the touch signal line via the transfer pattern, and the transfer pattern and the pixel electrode are formed from the same film layer.

Based on the above, in one embodiment of the display panel of the present invention, in addition to the pixel structure, data lines, and scan lines, the first substrate also includes electrically connected touch signal lines and bridge pads. In addition to the electrode pattern, the second substrate also includes a first spacer adapted to abut the bridge pad. When the pixel electrodes on the first substrate and the electrode pattern on the second substrate are enabled, the electric field generated is used to drive the liquid crystal layer for display. Furthermore, the electrode pattern can cover the first spacer and electrically connect to the touch signal lines on the first substrate via the bridge pad, thereby achieving the touch function of the display panel.

The aforementioned technical contents, features, and functions of the present invention are clearly presented in the following detailed description of a preferred embodiment with reference to the accompanying drawings. Directional terms such as up, down, left, right, front, and back, etc., mentioned in the following embodiments are merely references to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes only and are not intended to limit the present invention.

Figure 1 is a schematic front view of a display panel according to a first embodiment of the present invention. Figures 2 and 3 are partially enlarged schematic views of portions of the film layers of the display panel of Figure 1. Figures 4 and 5 are schematic cross-sectional views of the display panel of Figures 2 and 3. Figure 6 is a schematic cross-sectional view of another variant embodiment of the display panel of Figure 5. Figures 2 and 3 correspond to area Z1 of Figure 1. Figure 4 corresponds to section line A-A' of Figures 2 and 3. Figure 5 corresponds to section line B-B' of Figures 2 and 3.

Referring to Figures 1 to 4 , the display panel 10 includes a first substrate 101, a second substrate 102, a liquid crystal layer (LCL), a plurality of data lines DL, a plurality of scan lines SL, and a plurality of pixel structures PX. The first substrate 101 and the second substrate 102 are stacked along a stacking direction (e.g., direction D3). The liquid crystal layer (LCL) is disposed between the first and second substrates 101, 102. Unless otherwise specified, the stacking direction defines the stacking relationship between the two components, and the stacking direction will not be further discussed.

In this embodiment, a plurality of data lines DL are arranged on the first substrate 101 along direction D1 and extend in direction D2. A plurality of scan lines SL are arranged on the first substrate 101 along direction D2 and extend in direction D1. More specifically, the data lines DL intersect at the scan lines SL and define a plurality of pixel regions of the display panel 10. A plurality of pixel structures PX are disposed on the first substrate 101, corresponding to each of these pixel regions, and are each electrically connected to a scan line SL and a data line DL. For example, the plurality of pixel structures PX can be arranged in a plurality of columns and rows along direction D1 and direction D2, respectively, that is, the pixel structures PX are arranged in an array on the first substrate 101.

Specifically, each of these pixel structures PX includes an active element T and a pixel electrode PE that are electrically connected to each other. In this embodiment, the method for forming the active element T may include the following steps: sequentially forming a gate electrode GE, a gate insulation layer 110, a semiconductor pattern SC, a source electrode SE, and a drain electrode DE on a first substrate 101. The semiconductor pattern SC is disposed overlapping the gate electrode GE. The source electrode SE and the drain electrode DE overlap the semiconductor pattern SC and are electrically connected to two different regions of the semiconductor pattern SC. In this embodiment, the gate electrode GE of the active element T may be optionally disposed below the semiconductor pattern SC to form a bottom-gate thin-film transistor (TFT), but this is not limiting. In other embodiments, the gate of the active device may also be selectively disposed above the semiconductor pattern to form a top-gate thin film transistor (TFT).

Furthermore, the active device T may be sequentially covered with an insulating layer 120 and an insulating layer 130. In this embodiment, the insulating layer 120 is, for example, a passivation layer, and the insulating layer 130 is, for example, a planarization layer. For example, in this embodiment, the pixel structure PX may also include an overlapping common electrode CE, a capacitor electrode CPE, and a transfer pattern TP1. The common electrode CE is disposed between the first substrate 101 and the gate insulating layer 110. The capacitor electrode CPE is disposed between the gate insulating layer 110 and the insulating layer 120. Transfer pattern TP1 is disposed between insulating layer 120 and insulating layer 130. Therefore, capacitor electrode CPE, common electrode CE, and gate insulating layer 110 sandwiched therebetween form a storage capacitor. In other embodiments, pixel structure PX may not include overlapping common electrode CE and capacitor electrode CPE.

In this embodiment, the insulating layer 130 has an opening 130op1 that partially exposes the surface of the transfer pattern TP1. The pixel electrode PE of the pixel structure PX is disposed on the surface of the insulating layer 130 and is electrically connected to the transfer pattern TP1 via the opening 130op1 in the insulating layer 130. The transfer pattern TP1 is electrically connected to the capacitor electrode CPE via the contact hole TH1 in the insulating layer 120. The capacitor electrode CPE may extend from the drain DE of the active device T, but this is not limited to this embodiment.

It should be noted that the gate GE, source SE, drain DE, semiconductor pattern SC, gate insulating layer 110, passivation layer (i.e. insulating layer 120) and planar layer (i.e. insulating layer 130) can be any gate, source, drain, or other material known to those skilled in the art for use in a reflective display panel. Any semiconductor pattern, any gate insulating layer, any passivation layer and any planarization layer can be implemented, and the gate GE, source SE, drain DE, semiconductor pattern SC, gate insulating layer 110, passivation layer and planarization layer can be formed by any method known to technicians in any technical field, so they will not be detailed here.

In this embodiment, the pixel electrode PE is, for example, a reflective electrode. The reflective electrode material includes metal, alloy, metal nitride, metal oxide, metal oxynitride, or other suitable materials, or a stack of metal and other conductive materials. In other words, the display panel 10 of this embodiment may be a reflective liquid crystal display panel, but is not limited thereto. In some embodiments, the display panel 10 may be a fully reflective or transflective display panel.

Referring to Figures 1, 2, and 5, the display panel 10 further includes a plurality of touch signal lines TL and a plurality of bridge pads BP. In this embodiment, the touch signal lines TL may be arranged at intervals along direction D1 on the first substrate 101 and extend in direction D2. For example, the touch signal lines TL and the data lines DL may be formed from the same film layer, but this is not limited to the embodiment.

A plurality of bridge pads BP are disposed on the first substrate 101 and electrically connect these touch signal lines TL. Specifically, in this embodiment, a transfer pattern TP2 may be disposed between each bridge pad BP and a corresponding touch signal line TL, and each bridge pad BP is electrically connected to the corresponding touch signal line TL via the transfer pattern TP2. For example, the transfer pattern TP2 may be electrically connected to the touch signal line TL via the contact hole TH2 in the insulating layer 120, and the bridge pad BP may be electrically connected to the transfer pattern TP2 via the opening 130op2 in the insulating layer 130. To avoid adding extra process steps, these bridge pads BP and the plurality of pixel electrodes PE may be formed from the same film layer, and the transfer pattern TP2 and the transfer pattern TP1 of the pixel structure PX may be formed from the same film layer, but the present invention is not limited thereto.

Referring to Figures 1 to 5 , the display panel 10 further includes a plurality of electrode patterns EP and a plurality of spacers SP. These electrode patterns EP are arranged on the second substrate 102 at intervals along directions D1 and D2, respectively, and overlap the plurality of pixel electrodes PE of the plurality of pixel structures PX. The plurality of spacers SP are disposed on the second substrate 102 and define a cavity between the first and second substrates 101, 102 for accommodating the liquid crystal layer (LCL).

In this embodiment, the spacers SP include, for example, a plurality of first spacers SP1 and a plurality of second spacers SP2. The first spacers SP1 are arranged to overlap a plurality of bridge pads BP, while the second spacers SP2 may overlap a plurality of pixel electrodes PE of a plurality of pixel structures PX. Of particular note, in the stacking direction (e.g., direction D3) of the first substrate 101 and the second substrate 102, the first height H1 of the first spacers SP1 is greater than the second height H2 of the second spacers SP2. The first spacers SP1 abut against the bridge pads BP, and each electrode pattern EP covers one of the first spacers SP1 to electrically connect to a corresponding one of the bridge pads BP. That is, the electrical connection between the electrode pattern EP on the second substrate 102 and the touch signal line TL on the first substrate 101 can be achieved through the abutting relationship between the first spacer SP1 and the bridge pad BP (as shown in FIG. 5 ).

Specifically, in this embodiment, the operating cycle of the display panel 10 can be divided into a display period and a touch period. During the display period, the electric field generated between the electrode patterns EP and the plurality of pixel electrodes PE drives the liquid crystal molecules (not shown) in the liquid crystal layer LCL to rotate, forming an arrangement corresponding to the direction and intensity of the electric field. By changing the arrangement of these liquid crystal molecules, the polarization state of light passing through the liquid crystal layer LCL is altered, resulting in an output brightness corresponding to the arrangement.

During the touch operation, these electrode patterns EP serve as sensing electrodes for the touch action. The contact between the plurality of first spacers SP1 and the plurality of bridge pads BP prevents capacitance changes sensed by the electrode patterns EP on the second substrate 102 from being blocked by the liquid crystal capacitance during display. This ensures that the display panel 10, which uses both the electrode patterns EP and the pixel electrodes PE to drive the display pixels, also has reliable touch functionality.

In this embodiment, the plurality of first spacers SP1 and the plurality of second spacers SP2 may be formed from the same film layer and positioned between the plurality of electrode patterns EP and the second substrate 102. For example, the first spacers SP1 and the second spacers SP2 may be fabricated using the same photomask, such as a half-tone mask. However, the present invention is not limited thereto. In another alternative embodiment, the plurality of second spacers SP2-A of the display panel 10A may be positioned on the side of the plurality of electrode patterns EP facing away from the second substrate 102 (as shown in FIG. 6 ). In other words, the second spacers SP2-A and the first spacers SP1 may be formed from different film layers. For example, the first spacers SP1 and the second spacers SP2-A may be fabricated using two separate photomasks. With this design, the second spacer SP2-A of the display panel 10A can be prevented from contacting the pixel electrode PE due to external pressure, thereby causing electrical conduction between the electrode pattern EP and the pixel electrode PE.

4 and 5 , in this embodiment, a color filter layer CFL and an overcoat layer OC may be optionally provided on the second substrate 102. The color filter layer CFL is disposed between the overcoat layer OC and the second substrate 102. A plurality of electrode patterns EP are disposed on the overcoat layer OC. For example, the color filter layer CFL may have a plurality of filter patterns (not shown). These filter patterns are respectively overlapped with a plurality of pixel electrodes PE and are suitable for allowing a plurality of color lights (for example, red light, green light, and blue light, but not limited thereto) to pass therethrough. However, the present invention is not limited thereto. In other embodiments, the color filter layer CFL may not be provided on the second substrate 102.

Other embodiments will be listed below to illustrate the present disclosure in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted. For the omitted parts, please refer to the above embodiments and will not be repeated below.

Figures 7 and 8 are schematic front views of portions of film layers of a display panel according to a second embodiment of the present invention. Figure 9 is a schematic cross-sectional view of the display panel of Figures 7 and 8. Figure 9 corresponds to section lines C-C' and D-D' in Figures 7 and 8.

Referring to Figures 7 to 9 , the main difference between the display panel 20 of this embodiment and the display panel 10 of Figures 2 to 5 is the different design of the pixel structure. Specifically, in the display panel 20 of this embodiment, the pixel structure PX-A also has a reflective layer RFL. The reflective layer RFL is disposed on the pixel electrode PE-A and has an opening RFLop that overlaps the pixel electrode PE-A. For example, the orthographic projection of the opening RFLop of the reflective layer RFL on the substrate surface 101s of the first substrate 101 is located within the orthographic projection of the pixel electrode PE-A on the substrate surface 101s. In other words, the opening RFLop of the reflective layer RFL completely overlaps the pixel electrode PE-A.

In this embodiment, the reflective layer RFL defines the reflective area RA of the pixel structure PX, while its opening RFLop defines the light-transmitting area TA of the pixel structure PX. More specifically, the display panel 20 of this embodiment can be a transflective liquid crystal display panel or a micro-transflective liquid crystal display panel.

Furthermore, in this embodiment, insulating layers 140 and 150 are disposed between the pixel electrode PE-A and the insulating layer 130. Insulating layers 140 and 150 are, for example, but not limited to, passivation layers. Of particular note, in this embodiment, the common electrode CE-A of the pixel structure PX-A is disposed between insulating layers 140 and 150. Therefore, compared to the pixel structure PX in FIG4 having only one storage capacitor, the pixel structure PX-A of this embodiment may have two storage capacitors connected in parallel, one of which is composed of the capacitor electrode CPE-A, the common electrode CE-A, and the insulating layer 130 sandwiched therebetween, and the other is composed of the pixel electrode PE-A, the common electrode CE-A, and the insulating layer 150 sandwiched therebetween.

On the other hand, in this embodiment, both the bridge pad BP-A and the transfer pattern TP-A are disposed on the insulating layer 150, with no other layers interposed between them. More specifically, the bridge pad BP-A and the reflective layer RFL of the pixel structure PX-A are formed from the same layer, and the transfer pattern TP-A and the pixel electrode PE-A of the pixel structure PX-A are formed from the same layer. This simplifies the manufacturing process of the display panel 20.

In this embodiment, a dummy pattern DP may be disposed between the capacitor electrode CPE-A and the first substrate 101. The dummy pattern DP and the gate electrode GE may be formed from the same film layer. For example, the dummy pattern DP may have a floating potential and is configured to improve the surface flatness of the pixel structure PX-A within the reflective area RA, thereby enhancing the process yield and reflectivity of the reflective layer RFL.

Since the arrangement of the first spacer SP1, electrode pattern EP, bridge pad BP-A, and touch signal line TL in this embodiment, as well as the resulting technical effects, are similar to those of the display panel 10 in FIG5 , please refer to the relevant sections of the aforementioned embodiment for detailed description and will not be repeated here. Furthermore, since the pixel structure PX-A in this embodiment includes a light-transmitting area TA, the common electrode CE-A, capacitor electrode CPE-A, and dummy pattern DP respectively include openings CEop, CPEop, and DPop that overlap the light-transmitting area TA.

In summary, in a display panel according to one embodiment of the present invention, the first substrate, in addition to the pixel structure, data lines, and scan lines, also includes electrically connected touch signal lines and bridge pads. The second substrate, in addition to the electrode pattern, also includes a first spacer adapted to abut the bridge pad. When the pixel electrodes on the first substrate and the electrode pattern on the second substrate are enabled, the electric field generated is used to drive the liquid crystal layer for display. Furthermore, the electrode pattern can cover the first spacer and electrically connect to the touch signal lines on the first substrate via the bridge pad, thereby achieving the touch function of the display panel.

10, 10A, 20: Display panel 101: First substrate 101s: Substrate surface 102: Second substrate 110: Gate insulation layer 120, 130, 140, 150: Insulation layer 130op1, 130op2, CEop, CPEop, DPop, RFLop: Openings BP, BP-A: Bridge pads CE, CE-A: Common electrode CFL: Color filter layer CPE, CPE-A: Capacitor electrode DE: Drain DL: Data line DP: Dummy pattern D1, D2, D3: Direction EP: Electrode pattern GE: Gate H1: First height H2: Second height LCL: Liquid crystal layer OC: Overcoat PE, PE-A: Pixel electrodes PX, PX-A: Pixel structure RA: Reflective area RFL: Reflective layer SC: Semiconductor pattern SE: Source electrode SL: Scan line SP, SP1, SP2, SP2-A: Spacers T: Active element TA: Transparent area TH1, TH2: Contact holes TL: Touch signal lines TP1, TP2, TP-A: Transfer pattern Z1: Area A-A’, B-B’, C-C’, D-D’: Section lines

Figure 1 is a schematic front view of a display panel according to a first embodiment of the present invention. Figures 2 and 3 are partially enlarged schematic views of portions of the film layers of the display panel of Figure 1. Figures 4 and 5 are schematic cross-sectional views of the display panels of Figures 2 and 3. Figure 6 is a schematic cross-sectional view of another variant embodiment of the display panel of Figure 5. Figures 7 and 8 are schematic front views of portions of the film layers of a display panel according to a second embodiment of the present invention. Figure 9 is a schematic cross-sectional view of the display panel of Figures 7 and 8.

10: Display Panel

101: First substrate

102: Second substrate

110: Gate insulation layer

120, 130: Insulating layer

130op2: Opening

BP: Bridge Pad

CE: Common Electrode

CFL: Color Filter Layer

CPE: Capacitor Electrode

DL: Data Line

EP: Electrode pattern

H1: First Height

H2: Second Height

LCL: Liquid Crystal Layer

OC: Covering layer

PE: Pixel electrode

SP, SP1, SP2: interstitial

TH2: Contact hole

TL: Touch signal cable

TP2: Transfer pattern

D3: direction

B-B’: Section line

Claims (10)

A display panel comprises: A first substrate and a second substrate, stacked in a stacking direction; A liquid crystal layer disposed between the first and second substrates; A plurality of data lines arranged along a first direction on the first substrate; A plurality of scan lines arranged along a second direction on the first substrate, the first direction intersecting the second direction; A plurality of touch signal lines disposed on the first substrate; A plurality of pixel structures disposed on the first substrate, each having an active element and a pixel electrode, the active element electrically connected to the pixel electrode, one of the data lines, and one of the scan lines; A plurality of bridge pads disposed on the first substrate, each electrically connected to the touch signal lines; A plurality of electrode patterns are arranged on the second substrate at intervals along the first and second directions and overlap the plurality of pixel electrodes of the pixel structures; and a plurality of first spacers are disposed on the second substrate and located between the electrode patterns and the second substrate. The first spacers abut the bridge pads along the stacking direction, and each electrode pattern covers one of the first spacers to electrically connect to one of the bridge pads. The display panel of claim 1 further comprises: A plurality of second spacers disposed on the second substrate, wherein a first height of each of the first spacers along the stacking direction is greater than a second height of each of the second spacers along the stacking direction. The display panel as described in claim 2, wherein the first spacers and the second spacers are a same film layer. The display panel as described in claim 2, wherein the electrode patterns cover the first spacers, and the second spacers are arranged on a side of the electrode patterns facing away from the second substrate. The display panel as described in claim 4, wherein the second spacers overlap the pixel electrodes of the pixel structures. In the display panel of claim 1, the bridge pads and the pixel electrodes are formed in the same film layer. The display panel as described in claim 1, wherein each of the pixel structures further has a first transfer pattern disposed between the pixel electrode and the active element, and the pixel electrode is electrically connected to the active element via the first transfer pattern; a second transfer pattern is disposed between each of the bridge pads and one of the touch signal lines, and each of the bridge pads is electrically connected to the one of the touch signal lines via the second transfer pattern; and the first transfer pattern and the second transfer pattern are formed from the same film layer. The display panel as described in claim 1, wherein each of the pixel structures further has a reflective layer, the reflective layer having an opening overlapping the pixel electrode, and the reflective layer defines a reflective region of each of the pixel structures. The opening of the reflective layer defines a light-transmitting region of each of the pixel structures, and the orthographic projection of the opening on the substrate surface of the first substrate is located within the orthographic projection of the pixel electrode on the substrate surface. In the display panel of claim 8, the bridge pads and the reflective layer of each of the pixel structures are formed from the same film layer. In the display panel of claim 8, a transfer pattern is provided between each of the bridge pads and one of the touch signal lines, each of the bridge pads is electrically connected to the one of the touch signal lines via the transfer pattern, and the transfer pattern and the pixel electrode are formed in the same film layer.