TWI893695B - Light-emitting diode device - Google Patents

Abstract

A light-emitting diode device is provided. The light-emitting diode device includes a pixel structure including a semiconductor epitaxial stack structure, a first light-emitting diode chip, a second light-emitting diode chip, a passivation layer, a first circuit layer, a second circuit layer, a third circuit layer and a fourth circuit layer. The first light-emitting diode chip and the second light-emitting diode chip are positioned on the semiconductor epitaxial stack structure. The passivation layer covers the semiconductor epitaxial stack structure, the first light-emitting diode chip, and the second light-emitting diode chip. The passivation layer has a plurality of openings corresponding to a first bonding surface of the first circuit layer, a second first bonding surface of the second circuit layer, a third bonding surface of the third circuit layer and a fourth bonding surface of the fourth circuit layer. The first bonding surface, the second first bonding surface, the third bonding surface, and the fourth bonding surface are coplanar with each other.

Description

LED device

The present disclosure relates to a light emitting diode device, and more particularly to a pixel structure of a light emitting diode device.

Due to their low power consumption, light-emitting diode (LED) displays have become the mainstream in display technology. However, during the LED display manufacturing process, the pixel structure composed of red, green, and blue primary color LEDs cannot be further reduced in thickness and size, resulting in a high aspect ratio. This increases the complexity of the LED bonding and wiring processes, making it difficult for existing LED pixel structures to achieve the goals of small pitch, large light-emitting area, high process yield, and low cost.

Therefore, there is still a need to further improve the pixel structure of the light-emitting diode to manufacture a display device that meets product requirements.

Some embodiments of the present disclosure provide a light-emitting diode device including a pixel structure, wherein the pixel structure includes a semiconductor epitaxial stack structure, a first light-emitting diode die, a second light-emitting diode die, a protective layer, a first circuit layer, a second circuit layer, a third circuit layer, and a fourth circuit layer. A first light-emitting diode die and a second light-emitting diode die are arranged side by side on a semiconductor epitaxial stack structure; a protective layer covers the semiconductor epitaxial stack structure, the first light-emitting diode die, and the second light-emitting diode die; a first circuit layer, a second circuit layer, a third circuit layer, and a fourth circuit layer separated from each other are located on the semiconductor epitaxial stack structure; the protective layer has a plurality of openings, the openings corresponding to the first bonding surface of the first circuit layer, the second bonding surface of the second circuit layer, the third bonding surface of the third circuit layer, and the fourth bonding surface of the fourth circuit layer; the first bonding surface, the second bonding surface, the third bonding surface, and the fourth bonding surface are coplanar.

The present disclosure is more fully described below with reference to the drawings illustrating exemplary embodiments of the present invention. However, the present disclosure may be implemented in a variety of different ways and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings may be exaggerated for clarity, and the same or similar reference numbers in the various drawings represent the same or similar elements.

The disclosed embodiments provide a light emitting diode device. The LED device is constructed by stacking two small or micro LED dies side by side on the top surface of a small or micro LED die to form a single pixel structure. The circuit layer and four junction surfaces (including the anode junction surface and the common cathode junction surface of each of the three LED dies) are arranged so that two of the anode junction surfaces are located above one of the stacked LED dies, another of the anode junction surfaces and the common cathode junction surface are located above another of the stacked LED dies, and the light-emitting surface of the LED device is located on the opposite side of the top surface of the lower LED die. The LED device of the disclosed embodiment can further reduce the size of the pixel structure, simplify the manufacturing process, increase the light-emitting area, and reduce costs. Among them, the small LED die has a native substrate, while the micro LED die does not have a native substrate.

FIG1 is a schematic perspective view of a light-emitting diode device 500 according to some embodiments of the present disclosure. FIG2 is a schematic top view of the light-emitting diode device 500 according to some embodiments of the present disclosure. FIG3A is a schematic cross-sectional view taken along line X-X' of a pixel structure 550a of the light-emitting diode device 500 shown in FIG2 according to some embodiments of the present disclosure. The light-emitting diode device 500 includes a pixel structure 550 (including pixel structures 550a and 550b shown in FIG3A and FIG3B ). The pixel structure 550 includes a first light-emitting diode die 200, a second light-emitting diode die 300, a third light-emitting diode die 400, and a protective layer 424. For ease of explanation, FIG. 1 only shows the first light-emitting diode die 200 , the second light-emitting diode die 300 , and the third light-emitting diode die 400 . The protective layer 424 and other components can be seen in the cross-sectional schematic diagram of FIG. 3A .

As shown in FIG3A , the third LED die 400 has a light-emitting surface 401 and a top surface 403 that face each other. The first LED die 200 and the second LED die 300 are arranged side by side on the top surface 403 of the third LED die 400. As shown in FIG2 , the first LED die 200 has a first perpendicular projection 200A on the top surface 403 of the third LED die 400, and the second LED die 300 has a second perpendicular projection 300A on the top surface 403 of the third LED die 400. The first perpendicular projection 200A and the second perpendicular projection 300A do not overlap.

As shown in FIG3A , the first LED die 200 includes a first electrode 210 and a second electrode 212 remote from the top surface 403 of the third LED die 400. The second LED die 300 includes a first electrode 310 and a second electrode 312 remote from the top surface 403 of the third LED die 400. The third LED die 400 includes a first electrode 410 and a second electrode 412 remote from the light-emitting surface 401. In some embodiments, the first electrodes 210, 310, and 410 have the same polarity and are opposite to the polarity of the second electrodes 212, 312, and 412. In some embodiments, the first electrodes 210, 310, 410 and the second electrodes 212, 312, 412 include a conductive material such as chromium (Cr), aluminum (Al), nickel (Ni), gold (Au), platinum (Pt), tin (Sn), copper (Cu), or a combination thereof, and can be formed using a coating process such as evaporation or electroplating followed by a patterning process.

In addition, the first LED die 200 includes an insulating layer 206 covering its sidewalls 205 and a portion of its top surface 203 , the second LED die 300 includes an insulating layer 306 covering its sidewalls 305 and a portion of its top surface 303 , and the third LED die 400 includes an insulating layer 406 covering its sidewalls 405 and a portion of its top surface 403 . In some embodiments, the insulating layers 206, 306, 406 include insulating materials with good step coverage, such as silicon dioxide ( _SiO2 ), _aluminum oxide ( _Al2O3 ), and titanium dioxide ( _TiO2 ), and can be formed using deposition processes such as chemical vapor deposition (CVD) and atomic layer deposition (ALD). In some embodiments, the insulating layers 206, 306, and 406 include insulating materials having low dielectric constants and good step coverage, such as polyimide (PI), epoxy, and benzocyclobutene (BCB), and can be formed by spin coating, spray coating, or other suitable coating processes.

As shown in FIG. 2 , the first LED die 200 has a first top-view area (the same shape and size as the first perpendicular projection 200A), the second LED die 300 has a second top-view area (the same shape and size as the second perpendicular projection 300A), and the third LED die has a third top-view area 400A. In some embodiments, the first top-view area of the first LED die 200 is the same as or different from the second top-view area of the second LED die 300. In some embodiments, the sum of the first and second top-view areas is smaller than the third top-view area 400A.

As shown in FIG3A , the light-emitting surfaces (not shown) of the first LED die 200 and the second LED die 300 are both oriented toward the light-emitting surface 401 of the third LED die 400, so that the colored light emitted by the first LED die 200 and the second LED die 300 is mixed with the colored light emitted by the third LED die 400. In some embodiments, the first LED die 200, the second LED die 300, and the third LED die 400 can emit different colored light (e.g., red light R, green light G, blue light B). For example, the first LED die 200 can emit a first color of light, the second LED die 300 can emit a second color of light, and the third LED die 400 can emit a third color of light. The first, second, and third colors of light have different wavelength ranges. For example, as shown in FIG3A , when the first color of light is red (R), the second color of light is blue (B), and the third color of light is green (G), the wavelength range of the third color of light is between the wavelength range of the first color of light and the wavelength range of the second color of light. For example, when the first color of light is red (R), the second color of light is green (G), and the third color of light is blue (B), the wavelength range of the second color of light is between the wavelength range of the first color of light and the wavelength range of the third color of light.

In some embodiments, the first LED die 200, the second LED die 300, and the third LED die 400 include small LED dies, micro LED dies, or other suitable LED dies. For example, the first LED die 200 and the second LED die 300 may be micro LED dies, and the third LED die 400 may be a small LED die. As in the embodiment shown in FIG. 3A , the first LED die 200 and the second LED die 300 do not include a native substrate, while the third LED die 400 includes a native substrate 402 proximate to the light-emitting surface 401. For another example, the first LED die 200 , the second LED die 300 , and the third LED die 400 may all be micro LED die. Thus, in other embodiments, the first LED die 200 , the second LED die 300 , and the third LED die 400 do not include a native substrate.

As shown in FIG. 3A , the pixel structure 550 a of the LED device 500 further includes a transparent bonding layer 414. The transparent bonding layer 414 is sandwiched between the first LED die 200, the second LED die 300, and the third LED die 400, and covers the insulating layer 406. In some embodiments, the transparent bonding layer 414 includes benzocyclobutene (BCB), SU-8 epoxy, silicone, epoxy, spin-on glass (SOG), or a combination thereof, and can be formed using, for example, spin coating or other suitable coating processes followed by a patterning process.

As shown in Figures 3A and 3B, the pixel structure 550 of the LED device 500 further includes a protective layer 424 covering the first LED die 200, the second LED die 300, and the third LED die 400. In some embodiments, the protective layer 424 includes polyimide (PI), benzocyclobutene (BCB), parylene, polynaphthalenes, fluorocarbons, acrylates, or a combination thereof, and can be formed by coating or other suitable processes followed by a patterning process.

As shown in Figures 2 and 3A, the pixel structure 550a of the LED device 500 further includes a first wiring layer 502, a second wiring layer 504, a third wiring layer 506, and a fourth wiring layer 508, which are separated from each other and located between the third LED die 400 and the protective layer 424. In some embodiments, the first wiring layer 502 and the second wiring layer 504 are respectively disposed on the top surface 203 of the first LED die 200 and away from the third LED die 400, so that the first LED die 200 is sandwiched between the first wiring layer 502, the second wiring layer 504, and the third LED die 400. The third and fourth wiring layers 506 and 508 are respectively disposed on the top surface 303 of the second LED die 300 and are spaced apart from the third LED die 400, so that the second LED die 300 is sandwiched between the third and fourth wiring layers 506 and 508. Furthermore, the second wiring layer 504 may extend to cover the top surface 403 of the second LED die 300, and the fourth wiring layer 508 may extend to cover the top surface 403 of the third LED die 400 and be electrically insulated from the second LED die 300.

As shown in FIG3A , the second wiring layer 504 electrically connects the first electrodes 210, 310, and 410 of the first, second, and third LED dies 200, 300, and 400, respectively. The first, third, and fourth wiring layers 502, 506, and 508 electrically connect the second electrodes 212, 312, and 412 of the first, second, and third LED dies 200, 300, and 400, respectively. In some embodiments, the second circuit layer 504 electrically connects the first electrode 210 of the first light-emitting diode die 200, the first electrode 310 of the second light-emitting diode die 300, and the first electrode 410 of the third light-emitting diode die 400, which have the same polarity, so that the first electrode 210 of the first light-emitting diode die 200, the first electrode 310 of the second light-emitting diode die 300, and the first electrode 410 of the third light-emitting diode die 400 are electrically connected to each other (when the first electrode is a cathode, the second circuit layer 504 is considered a common cathode circuit layer). Furthermore, the second electrode 212 of the first LED die 200, the second electrode 312 of the second LED die 300, and the second electrode 412 of the third LED die 400, which have the same polarity, are electrically connected to the first wiring layer 502, the third wiring layer 506, and the fourth wiring layer 508, respectively. In some embodiments, the first wiring layer 502, the third wiring layer 506, and the fourth wiring layer 508 include conductive materials such as chromium (Cr), aluminum (Al), nickel (Ni), gold (Au), platinum (Pt), tin (Sn), copper (Cu), or combinations thereof, and can be formed using a plating process such as evaporation or electroplating, followed by a patterning process.

The protection layer 424 has a plurality of openings (not shown), which are respectively located on the first bonding surface 502T of the first circuit layer 502, the second bonding surface 504T of the second circuit layer 504, the third bonding surface 506T of the third circuit layer 506, and the fourth bonding surface 508T of the fourth circuit layer 508. As shown in FIG. 2 , the vertical projections 502TA and 504TA of the first and second joint surfaces 502T and 504T on the top surface 403 of the third LED die 400 overlap with the first vertical projection 200A and are both separated from the second vertical projection 300A. The vertical projections 506TA and 508TA of the third and fourth joint surfaces 506T and 508T on the top surface 403 of the third LED die 400 overlap with the second vertical projection 300A and are both separated from the first vertical projection 200A. In some embodiments, the first bonding surface 502T, the second bonding surface 504T, the third bonding surface 506T, and the fourth bonding surface 508T may be the bonding surfaces of the first wiring layer 502, the third wiring layer 506, and the fourth wiring layer 508 exposed through the openings in the protective layer 424. Alternatively, the bonding surface may include metal pads (not shown) formed on the first bonding surface 502T, the second bonding surface 504T, the third bonding surface 506T, and the fourth bonding surface 508T. In some embodiments, the first bonding surface 502T, the second bonding surface 504T, the third bonding surface 506T, and the fourth bonding surface 508T are substantially coplanar.

FIG3B is a schematic cross-sectional view taken along line XX' of the pixel structure 550b of the LED device 500 shown in FIG2 according to some embodiments of the present disclosure. Component symbols identical or similar to those in FIG1, 2, and 3A represent identical or similar components. As shown in FIG3B, the pixel structure 550b of the LED device 500 differs from the pixel structure 550a in that the pixel structure 550b further includes a distributed Bragg reflector 418 to increase the luminous efficiency of the LED device 500. The distributed Bragg reflector 418 may be interposed between the protective layer 424 and the first LED die 200, the second LED die 300, and the third LED die 400. In some embodiments, the DBR conformally covers the sidewalls 205 of the first light-emitting diode die 200, the sidewalls 305 of the second light-emitting diode die 300, and the sidewalls 405 of the third light-emitting diode die 400. Furthermore, the DBR 418 covers the portion of the top surface 203 of the first light-emitting diode die 200 not covered by the first electrode 210 and the second electrode 212, as well as the portion of the top surface 303 of the second light-emitting diode die 300 not covered by the first electrode 310 and the second electrode 312. In addition, the DBR 418 contacts the first wiring layer 502, the second wiring layer 504, the third wiring layer 506, and the fourth wiring layer 508. In some embodiments, the DBR 418 includes stacked thin films of two or more homogeneous or heterogeneous materials having different refractive indices. For example, the DBR 418 may be formed of an alternating stack of silicon dioxide (SiO ₂ ) and titanium dioxide (TiO ₂ ), an alternating stack of silicon dioxide (SiO ₂ )/aluminum oxide (Al ₂ O ₃ )/titanium dioxide (TiO ₂ ), or an alternating stack of titanium dioxide (TiO ₂ )/silicon dioxide (SiO ₂ )/tantalum pentoxide (Ta ₂ O ₅ ). In some embodiments, the DBR 418 is formed using a deposition process such as evaporation, atomic layer deposition (ALD), or metal-organic vapor chemical deposition (MOCVD), followed by a patterning process.

The following describes a method for forming the LED device 500. Figures 4A, 5A, 6A, and 7A are top-view diagrams of the LED device 500 at various stages of forming the LED device 500 according to some embodiments of the present disclosure, as shown in Figure 1. Figures 4B, 5B, and 6B are cross-sectional diagrams taken along line A-A' in Figures 4A, 5A, and 6A, respectively, showing cross-sectional diagrams of the LED device 500 according to some embodiments of the present disclosure, as shown in Figure 1, at various stages of forming the LED device 500. FIG7B is an enlarged schematic diagram of pixel region 700 in FIG7A , illustrating the arrangement of first, second, and third LED dies 200, 300, and 400 in pixel structure 550 at an intermediate step in forming LED device 500 according to some embodiments of the present disclosure. FIG7C is a cross-sectional schematic diagram taken along line X-X' in FIG7B , illustrating cross-sectional schematic diagrams at different stages of forming LED device 500 according to some embodiments of the present disclosure, as shown in FIG1 . Component symbols identical or similar to those in FIG1 , 2 , 3A , and 3B indicate identical or similar components. For ease of illustration, Figures 4A, 5A, 6A, and 7A only show the first LED die 200, the second LED die 300, and the third LED die 400. The remaining components (including carriers 250, 350, native substrate 402, first electrodes 210, 310, 410, second electrodes 212, 312, 412, transfer devices 252, 352, insulating layer 406, and transparent bonding layer 414) can be seen in the cross-sectional schematic diagrams of Figures 4B, 5B, 6B, and 7C.

4A, 4B, 5A, 5B, 6A, and 6B, respectively, illustrate a plurality of first LED dies 200 arranged in an array on a carrier 250, a plurality of second LED dies 300 arranged in an array on a carrier 350, and a plurality of third LED dies 400 grown in an array on a native substrate 402. In some embodiments, the spacing between the first LED dies 200, the spacing between the second LED dies 300, and the spacing between the third LED dies 400 can be the same or different.

Next, the transfer devices 252 and 352 may be used to perform a mass transfer process such as stamp transfer to transfer the selected first LED die 200 and second LED die 300 to corresponding positions of the third LED die 400 . As shown in Figures 4A, 4B, 5A, and 5B, downward pressure is applied to the transfer devices 252 and 352, respectively (as indicated by the downward arrows in Figures 4B and 5B). The transfer heads 254 and 354 (e.g., polydimethylsiloxane (PDMS) transfer heads) of the transfer devices 252 and 352 selectively adsorb any number of first LED dies 200 and second LED dies 300 located on the carriers 250 and 350, and transfer them to corresponding positions on the third LED die 400, where they contact the transparent bonding layer 414 for subsequent fixation. For example, based on the pitch of the third LED die 400 array and the corresponding positions of the first LED die 200 and the second LED die 300 on the third LED die 400, the first LED die 200 and the second LED die 300 can be selectively adsorbed (e.g., every other, every other, or other selective methods) and transferred to the top surface 403 of the third LED die 400. This allows one first LED die 200 and one second LED die 300 to be arranged side by side on one third LED die 400 in each pixel region 700, as shown in Figures 7A, 7B, and 7C.

Next, as shown in FIG8 , a deposition process and subsequent patterning process are performed to form a first wiring layer 502, a second wiring layer 504, a third wiring layer 506, and a fourth wiring layer 508, each separated from each other, on the first LED die 200, the second LED die 300, and the third LED die 400. The first wiring layer 502 covers a portion of the top surface 203 of the first LED die 200 and is electrically connected to the second electrode 212 of the first LED die 200. The second circuit layer 504 extends from a portion of the top surface 203 and sidewall 205 of the first LED die 200 to cover a portion of the top surface 403 of the third LED die 400 and a portion of the top surface 303 and sidewall 305 of the second LED die 300, while electrically connecting the first electrode 210 of the first LED die 200, the first electrode 310 of the second LED die 300, and the first electrode 410 of the third LED die 400. The third circuit layer 506 is electrically connected to the second electrode 312 of the second LED die 300. The fourth circuit layer 508 is electrically connected to the second electrode 412 of the third LED die 400 and extends to cover a portion of the top surface 403 of the third LED die 400 .

Next, as shown in FIG3A , a coating process and a subsequent patterning process are performed to form a protective layer 424 covering the first light-emitting diode die 200, the second light-emitting diode die 300, and the third light-emitting diode die 400. Protective layer 424 covers portions of the first wiring layer 502, the second wiring layer 504, the third wiring layer 506, and the fourth wiring layer 508, and has a plurality of openings (not shown) to define the positions of the first bonding surface 502T of the first wiring layer 502, the second bonding surface 504T of the second wiring layer 504, the third bonding surface 506T of the third wiring layer 506, and the fourth bonding surface 508T of the fourth wiring layer 508. After the above-mentioned manufacturing processes, an array of light-emitting diode devices 500 including pixel structures 550a according to some embodiments of the present disclosure is formed.

In some embodiments of the present disclosure, after performing processes similar to those shown in Figures 7A-7C, a deposition process and a subsequent patterning process are performed as shown in Figure 3B to form a distributed Bragg reflector 418 on the first light-emitting diode die 200, the second light-emitting diode die 300, and the third light-emitting diode die 400. The distributed Bragg reflector 418 extends from the sidewall 405 of the third light-emitting diode die 400 to cover the sidewall 205 and a portion of the top surface 203 of the first light-emitting diode die 200, as well as the sidewall 305 and a portion of the top surface 303 of the second light-emitting diode die 300, so that the first electrode 210 and the second electrode 212 of the first light-emitting diode die 200, and the first electrode 310 and the second electrode 212 of the second light-emitting diode die 300 are exposed from the distributed Bragg reflector 418. In some embodiments, the distributed Bragg reflector 418 may be formed before forming the first wiring layer 502, the second wiring layer 504, the third wiring layer 506, and the fourth wiring layer 508. In some other embodiments, the DBR 418 may be formed after forming the first wiring layer 502, the second wiring layer 504, the third wiring layer 506, and the fourth wiring layer 508. After the above processes, an array of LED devices 500 including pixel structures 550b according to some embodiments of the present disclosure is formed.

Figures 9A and 9B are schematic top views of a pixel structure 550a1 of a light-emitting diode device 500 according to some embodiments of the present disclosure. Figure 9A illustrates the arrangement of the first light-emitting diode die 200, the second light-emitting diode die 300, and the third light-emitting diode die 400 in the pixel structure 550a1, along with the first wiring layer 502, the second wiring layer 504, the third wiring layer 506, and the fourth wiring layer 508. Figure 9B illustrates the arrangement of the first junction surface 502T of the first wiring layer 502, the second junction surface 504T of the second wiring layer 504, the third junction surface 506T of the third wiring layer 506, and the fourth junction surface 508T of the fourth wiring layer 508 in the pixel structure 550a1, along with the protective layer 424.

As shown in FIG. 9A , in some embodiments, a first circuit layer 502 electrically connected to the second electrode 212 and a second circuit layer 504 electrically connected to the first electrodes 210, 310, and 410 are respectively disposed on the top surface 203 of the first LED die 200 and away from the third LED die 400. Furthermore, the second circuit layer 504 extends to cover the top surface 303 of the second LED die 300 and the top surface 403 of the third LED die 400. The third circuit layer 506 electrically connected to the second electrode 312 and the fourth circuit layer 508 electrically connected to the second electrode 412 are respectively disposed on the top surface 303 of the second LED die 300 and away from the third LED die 400. Furthermore, the fourth circuit layer 508 extends to cover the top surface 403 of the third LED die 400.

As shown in FIG. 9B , in some embodiments, the vertical projections 502TA and 504TA of the first and second bonding surfaces 502T and 504T corresponding to the opening of the protective layer 424 are completely within the first vertical projection 200A, and the vertical projections 506TA and 508TA of the third and fourth bonding surfaces 506T and 508T corresponding to the opening of the protective layer 424 are completely within the second vertical projection 300A. Furthermore, the first, second, third, and fourth bonding surfaces 502T, 504T, 506T, and 508T are respectively located near the four corners of the pixel structure 550a1.

In some embodiments, since the first conductive type semiconductor layer 404-1 of the semiconductor epitaxial stack structure 404 (refer to FIG. 3A , including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and a light emitting layer (not shown)) of the third light emitting diode die 400 is exposed from the sidewall 405, the common electrode line layer 504 (for example, the second line layer in FIG. 9A ) can be changed. By using a connection method using a common cathode wiring layer (common cathode wiring layer) 504, the first electrode 210 of the first LED die 200 and the first electrode 310 of the second LED die 300 are electrically connected to the first conductivity type semiconductor layer 404-1 of the third LED die 400 via different wiring layers, instead of being electrically connected to the first electrode 410 of the third LED die 400. Figures 10A and 10B are schematic top views of a pixel structure 550a2 of a LED device 500 according to some embodiments of the present disclosure. FIG10A shows the arrangement of the first light-emitting diode die 200, the second light-emitting diode die 300, and the third light-emitting diode die 400 in pixel structure 550a2, and the first wiring layer 502, the second wiring layer 504a1, the third wiring layer 506, the fourth wiring layer 508, and the fifth wiring layer 504a2. FIG10B shows the arrangement of the first junction surface 502T of the first wiring layer 502, the second junction surface 504T of the second wiring layer 504a1, the third junction surface 506T of the third wiring layer 506, and the fourth junction surface 508T of the fourth wiring layer 508 in pixel structure 550a2, and the protective layer 424. Component symbols in the figures that are the same or similar to those in FIG9A and FIG9B represent the same or similar components. As shown in FIG. 10A , pixel structure 550a2 of LED device 500 differs from pixel structure 550a1 in that pixel structure 550a2 uses a second wiring layer 504a1 and a fifth wiring layer 504a2 to electrically connect the first electrode 210 of the first LED die 200 and the first electrode 310 of the second LED die 300 to the first conductivity-type semiconductor layer 404-1 of the semiconductor epitaxial stack structure 404 (see FIG. 3A , which includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and a light-emitting layer (not shown)) of the third LED die 400. In some embodiments, the fifth circuit layer 504a2 is disposed on the top surface 303 of the second LED die 300 and extends to cover the side surface 305 of the second LED die 300 and the third LED die 400. In some embodiments, the fifth circuit layer 504a2 electrically connects the first electrode 310 of the second LED die 300 and the first conductivity type semiconductor layer 404-1 of the third LED die 400. The second wiring layer 504a1 extends to the side surface 205 of the first LED die 200 and the third LED die 400, electrically connecting the first electrode 210 of the first LED die 200 and the first conductivity type semiconductor layer 404-1 of the third LED die 400. Furthermore, the second bonding surface 504T of the pixel structure 550a2 is located on the second wiring layer 504a1. Therefore, as shown in FIG10B , the first bonding surface 502T, the second bonding surface 504T, the third bonding surface 506T, and the fourth bonding surface 508T remain close to the four corners of the pixel structure 550a2.

In some embodiments, the positions of the four junction surfaces of the LED device 500 can be adjusted accordingly based on the placement of the first and second electrodes of the LED die. Figures 11A and 11B are schematic top views of a pixel structure 550a3 of the LED device 500 according to some embodiments of the present disclosure. Figure 11A illustrates the arrangement of the first LED die 200, the second LED die 300, and the third LED die 400 in the pixel structure 550a3, along with the first wiring layer 502, the second wiring layer 504b, the third wiring layer 506, and the fourth wiring layer 508a. FIG11B shows the arrangement of first junction surface 502T of first wiring layer 502, second junction surface 504T of second wiring layer 504b, third junction surface 506T of third wiring layer 506, and fourth junction surface 508T of fourth wiring layer 508a, in conjunction with protective layer 424, in pixel structure 550a3. Component reference numerals identical or similar to those in FIG9A, 9B, 10A, and 10B denote identical or similar components. As shown in FIG. 11A , the pixel structure 550a3 of the LED device 500 differs from the pixel structure 550a1 in that the first electrode 310 of the second LED die 300 in the pixel structure 550a3 is arranged side by side with the first electrode 210 of the first LED die 200 and the first electrode 410 of the third LED 400 along a direction 100 (substantially perpendicular to the long axis of the first LED die 200 and the long axis of the third LED die 200). Therefore, the second wiring layer 504b of the pixel structure 550a3 extends from the top surface 203 of the first LED die 200 along the direction 100 to cover the top surface 403 of the third LED 400 and the top surface 303 of the second LED die 300. Furthermore, in the top view shown in FIG11A , the second wiring layer 504b is substantially strip-shaped, with its two ends located at the end portions of the first LED die 200 and the second LED die 300, respectively. The third wiring layer 506 of the pixel structure 550a3 is located in the middle portion of the third wiring layer 506. The fourth wiring layer 508a of the pixel structure 550a3 extends from the second LED die 300 along direction 100 to cover the top surface 403 of the third LED die 400 and the top surface 203 of the first LED die 200. Furthermore, in the top view shown in FIG11A , the fourth wiring layer 508a is substantially strip-shaped, with its ends located at the end portions of the first LED die 200 and the second LED die 300, respectively. As shown in FIG11B , the first bonding surface 502T and the third bonding surface 506T of the pixel structure 550a3 correspond to the middle portions of the first LED die 200 and the second LED die 300, respectively. The second bonding surface 504T and the fourth bonding surface 508T of the pixel structure 550a3 are respectively close to the diagonal corners of the pixel structure 550a3.

In some embodiments, different sizes of first and second LED dies 200a and 300a can be used, and the circuit layer design can be adapted to position four different bonding surfaces close to the four corners of the pixel structure. Figures 12A and 12B are schematic top views of a pixel structure 550a4 of a LED device 500 according to some embodiments of the present disclosure. Figure 12A illustrates the arrangement of the first, second, and third LED dies 200a, 300a, and 400 in the pixel structure 550a4, along with the first, second, and third wiring layers 502, 504c, 506, and 508b. FIG12B shows the arrangement of first junction surface 502T of first wiring layer 502, second junction surface 504T of second wiring layer 504c, third junction surface 506T of third wiring layer 506, and fourth junction surface 508T of fourth wiring layer 508b, in conjunction with protective layer 424, in pixel structure 550a4. Reference numerals in the figure that are identical or similar to those in FIG9A, 9B, 10A, 10B, 11A, and 10B indicate identical or similar elements. As shown in FIG. 12A , pixel structure 550a4 of LED device 500 differs from pixel structure 550a1 in that the first LED die 200a and second LED die 300a of pixel structure 550a4 are smaller than the first LED die 200 and second LED die 300 shown in FIG. 9A and FIG. 9B , respectively. Therefore, the line width of the portion where the second wiring layer 504c electrically connects to the first electrodes 210, 310, and 410 is smaller than the line width near the corners of pixel structure 550a4. Furthermore, the line width of the portion where the fourth wiring layer 508b electrically connects to the second electrode 412 is smaller than the line width near the corners of pixel structure 550a4. As shown in FIG. 12B , in some embodiments, the vertical projections 502TA of the first and fourth bonding surfaces 502T and 508T corresponding to the openings of the protective layer 424 are partially located within the first vertical projection 200aA. The vertical projections 506TA and 508TA of the second and third bonding surfaces 504T and 506T corresponding to the openings of the protective layer 424 are partially located within the second vertical projection 300aA. The portions of the first and fourth bonding surfaces 502T and 508T located within the first vertical projection 200A are coplanar with the portions of the second and third bonding surfaces 504T and 506T located within the second vertical projection 300aA. Furthermore, the first, second, third, and fourth bonding surfaces 502T, 504T, 506T, and 508T remain close to the four corners of the pixel structure 550a4, respectively.

Figures 13, 14, and 15 are schematic top views of pixel structures 550b1, 550b2, and 550b3 of LED device 500 according to some embodiments of the present disclosure. Pixel structures 550b1, 550b2, and 550b3 differ from pixel structures 550a1, 550a2, and 550a3 in that they further include distributed Bragg reflectors 418a, 418b, and 418c, respectively. As shown in Figure 13, distributed Bragg reflector 418a of pixel structure 550b1 is formed after forming first wiring layer 502, second wiring layer 504, third wiring layer 506, and fourth wiring layer 508. As shown in FIG14 , the distributed Bragg reflector 418b of pixel structure 550b2 is formed after forming the first wiring layer 502, the second wiring layer 504a1, the third wiring layer 506, the fourth wiring layer 508, and the fifth wiring layer 504a2. As shown in FIG15 , the distributed Bragg reflector 418c of pixel structure 550b3 is formed after forming the first wiring layer 502, the second wiring layer 504b, the third wiring layer 506, and the fourth wiring layer 508a.

FIG16 is a schematic top view of pixel structure 550b4 of LED device 500 according to some embodiments of the present disclosure. Pixel structure 550b4 differs from pixel structure 550a4 in that pixel structure 550b4 further includes a distributed Bragg reflector 418d. As shown in FIG16 , distributed Bragg reflector 418d of pixel structure 550b4 is formed before forming first wiring layer 502, second wiring layer 504c, third wiring layer 506, and fourth wiring layer 508b.

FIG17 is a schematic perspective view of an LED device 500a according to some embodiments of the present disclosure, illustrating how a pixel structure 550 with a native substrate 402 ( FIG3A ) is bonded to a circuit substrate 600 and a microcontroller 602. In some embodiments, the LED device 500a further includes a circuit substrate 600 and microcontrollers 602 disposed on the circuit substrate 600. For example, the LED pixel structure array shown in FIG7A is singulated by laser cutting to separate the individual pixel structures 550. Next, a pick-and-place process can be performed, using a pickup head, such as a pick-up needle, to selectively adsorb the independent pixel structure 550 and place it on the circuit substrate 600. The first bonding surface 502T, second bonding surface 504T, third bonding surface 506T, and fourth bonding surface 508T (see FIG. 2 ) of the pixel structure 550 are electrically contacted with corresponding pads (not shown) on the circuit substrate 600. This allows the microcontroller 602 to be electrically connected to the first wiring layer 502, second wiring layer 504, third wiring layer 506, and fourth wiring layer 508 of the pixel structure 550 via the bonding pads and wiring layers (not shown) on the circuit substrate 600, thereby individually controlling different pixel structures 550.

FIG18 is a perspective schematic diagram of an LED device 500b including a circuit substrate 600 and a microcontroller 602 according to some embodiments of the present disclosure, illustrating how a pixel structure 550c, with the native substrate 402 ( FIG3A ) removed, is bonded to the circuit substrate 600 and the microcontroller 602. LED device 500b differs from LED device 500a in that the third LED die in LED device 500b does not include a native substrate. For example, the LED pixel structure array in FIG. 7A is subjected to a substrate removal process called laser lift-off (LLO) to remove the original substrate 402 of the pixel structure array of the LED device 500b and separate it into a plurality of independent pixel structures 550c, thereby further reducing the size of the pixel structure 550c. Next, a mass transfer process, such as stamp transfer, can be performed using, for example, a polydimethylsiloxane (PDMS) transfer head to selectively adsorb the independent pixel structures 550c and place them on the circuit substrate 600. The first bonding surface 502T, second bonding surface 504T, third bonding surface 506T, and fourth bonding surface 508T ( FIG. 2 ) of the pixel structure 550c are electrically contacted with corresponding pads (not shown) on the circuit substrate 600. This allows the micro-control element 602 to be electrically connected to the first wiring layer 502, second wiring layer 504, third wiring layer 506, and fourth wiring layer 508 of the pixel structure 550c via the bonding pads and wiring layers (not shown) on the circuit substrate 600, thereby individually controlling different pixel structures 550c.

Figures 19A, 19B, and 19C are schematic perspective and cross-sectional views of a LED device 500c according to some embodiments of the present disclosure, illustrating how a pixel structure 550 is bonded to a thin-film transistor substrate 610. LED device 500c differs from LED device 500b in that the pixel structure 550 of LED device 500c is bonded to a thin-film transistor substrate 610 to form, for example, a LED display device. In some embodiments, LED device 500 further includes a thin-film transistor substrate 610 disposed on the pixel structure 550. As shown in Figures 19A and 19B, in some embodiments, after forming an array of pixel structures 550 of a light-emitting diode device 500c, a semiconductor process is performed to form a thin film transistor substrate 610 on the pixel structures 550. The thin film transistor substrate 610 includes a plurality of thin film transistors 612a, 612b, 612c and wiring (not shown) corresponding to each pixel structure 550. The thin film transistors 612a, 612b, 612c and wiring are electrically connected to the first junction surface 502T of the first wiring layer 502, the second junction surface 504T of the second wiring layer 504, the third junction surface 506T of the third wiring layer 506, and the fourth junction surface 508T of the fourth wiring layer 508 (Figures 2 and 3A) of the corresponding pixel structure 550, thereby controlling different pixel structures 550.

As shown in Figures 19A and 19C , in some embodiments, an array of pixel structures 550 can be bonded to a fabricated thin-film transistor substrate 610 to form a light-emitting diode device 500c, such as a light-emitting diode display device. In each pixel structure 550 of the light-emitting diode device 500c, the first bonding surface 502T of the first wiring layer 502, the second bonding surface 504T of the second wiring layer 504, the third bonding surface 506T of the third wiring layer 506, and the fourth bonding surface 508T of the fourth wiring layer 508 (Figures 2 and 3A) are electrically connected to corresponding thin-film transistors 612a, 612b, 612c and wiring (not shown), respectively, to control different pixel structures 550.

The disclosed embodiments provide a light-emitting diode device. The device comprises two small or micro light-emitting diode dies stacked side by side on the top surface of a single light-emitting diode die to form a single pixel structure. The circuit layers of each light-emitting diode die are configured so that two of the three anode junctions and the common cathode junction are located above one of the stacked light-emitting diode dies, while the other anode junction and the common cathode junction are located above another of the stacked light-emitting diode dies. Furthermore, the light-emitting surface of the light-emitting diode device is located on the opposite side of the top surface of the lower light-emitting diode die. In some embodiments, the pixel structures of an LED device can be bonded to a circuit substrate equipped with microcontrollers to individually control different pixel structures. In some embodiments, an array of pixel structures of an LED device can be bonded to a thin-film transistor substrate to form, for example, an LED display device, where thin-film transistors on the thin-film transistor substrate individually control different pixel structures. The LED device of the disclosed embodiments utilizes a transfer process to stack two micro-LED dies side by side on another micro- or small-sized LED die. This eliminates the need for complex wafer bonding processes and high-aspect-ratio circuit fabrication. The stacked LED dies can also be pre-binned, further reducing the size of the pixel structure, simplifying the manufacturing process, improving yield, and reducing costs. In some embodiments, the LED device of the disclosed embodiments stacks red and blue LED dies side by side on a green LED die. The brightness of the pixel structure is controlled by the underlying green LED die, thereby increasing the luminous area and brightness. In some embodiments, a design with three anodes and a common cathode can be used. In some embodiments, the polarity of the cathodes and anodes of the three LED dies can be completely reversed to form a design with three cathodes and a common anode.

Although this disclosure is based on the aforementioned embodiments, they are not intended to limit the present invention. Those skilled in the art may make modifications and enhancements within the spirit and scope of the present invention. Therefore, the scope of protection of this disclosure shall be determined by the scope of the appended patent application.

100: Direction 200, 200a: First LED die 203, 303, 403: Top surface 205, 305, 405: Sidewalls 206, 306, 406: Insulation layer 210, 310, 410: First electrode 212, 312, 412: Second electrode 250, 350: Carrier 252, 352: Transfer device 300, 300a: Second LED die 400: Third LED die 401: Light-emitting surface 402: Native substrate 404: Semiconductor epitaxial stack structure 404-1: First conductivity type semiconductor layer 414: Transparent bonding layer 418, 418a, 418b, 418c, 418d: Distributed Bragg reflector 424: Protective layer 200A, 200aA: First vertical projection 300A, 300aA: Second vertical projection 400A: Third top-view area 500, 500a, 500b, 500c: Light-emitting diode device 550, 550a, 550a1, 550a2, 550a3, 550a4, 550b, 550b1, 550b2, 550b3, 550b4, 550c: Pixel structure 502: First circuit layer 504, 504a1, 504b, 504c: Second circuit layer 506: Third wiring layer 508, 508a, 508b: Fourth wiring layer 504a2: Fifth wiring layer 502T: First bonding surface 504T: Second bonding surface 506T: Third bonding surface 508T: Fourth bonding surface 502TA, 504TA, 506TA, 508TA: Vertical projections 600: Circuit substrate 610: Thin-film transistor substrate 602: Microcontroller 700: Pixel area A-A', X-X': Tangent lines R: Red light G: Green light B: Blue light

Figure 1 is a schematic perspective view of a light-emitting diode device according to some embodiments of the present disclosure. Figure 2 is a schematic top view of a light-emitting diode device according to some embodiments of the present disclosure. Figure 3A is a schematic cross-sectional view taken along line XX' of the light-emitting diode device according to some embodiments of the present disclosure shown in Figure 2. Figure 3B is a schematic cross-sectional view taken along line XX' of the light-emitting diode device according to some embodiments of the present disclosure shown in Figure 2. Figures 4A, 5A, 6A, and 7A are schematic top views of the light-emitting diode device according to some embodiments of the present disclosure at different stages of forming the light-emitting diode device shown in Figure 1. Figures 4B, 5B, and 6B are schematic cross-sectional views taken along line A-A' of Figures 4A, 5A, and 6A, respectively, illustrating cross-sectional views at different stages of forming the light-emitting diode device according to some embodiments of the present disclosure, as shown in Figure 1. Figure 7B is an enlarged schematic view of Figure 7A, illustrating the arrangement of light-emitting diode dies in the pixel structure at an intermediate step in forming the light-emitting diode device according to some embodiments of the present disclosure. Figures 7C and 8 are schematic cross-sectional views taken along line X-X' of Figure 7B, illustrating cross-sectional views at different stages of forming the light-emitting diode device according to some embodiments of the present disclosure, as shown in Figure 1. Figures 9A and 9B are schematic top views of LED devices according to some embodiments of the present disclosure, illustrating the arrangement of the LED die, circuit layers, their junctions, and a protective layer within the device. Figures 10A and 10B are schematic top views of LED devices according to some embodiments of the present disclosure, illustrating the arrangement of the LED die, circuit layers, their junctions, and a protective layer within the device. Figures 11A and 11B are schematic top views of LED devices according to some embodiments of the present disclosure, illustrating the arrangement of the LED die, circuit layers, their junctions, and a protective layer within the device. Figures 12A and 12B are schematic top views of LED devices according to some embodiments of the present disclosure, illustrating the arrangement of the LED die, circuit layer, and their bonding surfaces, as well as the protective layer within the device. Figures 13, 14, 15, and 16 are schematic top views of LED devices according to some embodiments of the present disclosure, illustrating the arrangement of the LED die, circuit layer, and distributed Bragg reflector within the device. Figure 17 is a schematic perspective view of an LED device according to some embodiments of the present disclosure, illustrating the bonding of the pixel structure, microcontroller, and circuit substrate within the device with a native substrate. Figure 18 is a schematic perspective view of a light-emitting diode device according to some embodiments of the present disclosure, illustrating how the pixel structure of a light-emitting diode device without a native substrate is bonded to a microcontroller and a circuit substrate. Figures 19A, 19B, and 19C are schematic perspective and cross-sectional views of a light-emitting diode device according to some embodiments of the present disclosure, illustrating how the pixel structure of the light-emitting diode device is bonded to a thin-film transistor substrate.

200: First light-emitting diode die

203, 303, 403: Top

205, 305, 405: Sidewalls

206,306,406: Insulating layer

210, 310, 410: First electrode

212,312,412: Second electrode

300: Second light-emitting diode die

400: Third LED chip

401: Bright side

402: Native substrate

404: Semiconductor epitaxial stacking structure

414: Transparent bonding layer

424: Protective layer

500: LED device

550a: Pixel structure

502: First Line Layer

504: Second circuit layer

506: Third Line Layer

508: Fourth circuit layer

502T: First joint surface

504T: Second joint surface

506T: Third joint surface

508T: Fourth joint surface

R: Red light

G: Green light

B: blue light

X-X’: Tangent

Claims (10)

A light-emitting diode device comprises: A pixel structure comprising: A semiconductor epitaxial stack structure; A first light-emitting diode die disposed on the semiconductor epitaxial stack structure; A second light-emitting diode die disposed on the semiconductor epitaxial stack structure and separated from the first light-emitting diode die; A protective layer covering the semiconductor epitaxial stack structure, the first light-emitting diode die, and the second light-emitting diode die; and A first circuit layer, a second circuit layer, a third circuit layer, and a fourth circuit layer disposed on the semiconductor epitaxial stack structure, separated from each other. The first circuit layer has a first bonding surface, the second circuit layer has a second bonding surface, the third circuit layer has a third bonding surface, and the fourth circuit layer has a fourth bonding surface. The protective layer has a plurality of openings, the openings being located correspondingly on the first bonding surface of the first circuit layer, the second bonding surface of the second circuit layer, the third bonding surface of the third circuit layer, and the fourth bonding surface of the fourth circuit layer, respectively. The first bonding surface, the second bonding surface, the third bonding surface, and the fourth bonding surface are coplanar. A distributed Bragg reflector is interposed between the protective layer and the first and second light-emitting diode dies and the semiconductor epitaxial stack structure. The LED device of claim 1, wherein the first LED die has a first vertical projection on the semiconductor epitaxial stack structure, the second LED die has a second vertical projection on the semiconductor epitaxial stack structure, and the first vertical projection and the second vertical projection do not overlap with each other. The light-emitting diode device of claim 2, wherein the vertical projections of the first joint surface and the second joint surface on the semiconductor epitaxial stack structure overlap with the first vertical projection respectively and are both separated from the second vertical projection, and the vertical projections of the third joint surface and the fourth joint surface on the semiconductor epitaxial stack structure overlap with the second vertical projection respectively and are both separated from the first vertical projection. The light-emitting diode device of claim 1, wherein the second circuit layer electrically connects the semiconductor epitaxial stack structure, the first light-emitting diode die, and the second light-emitting diode die. The light-emitting diode device of claim 4, wherein the first circuit layer is electrically connected to the first light-emitting diode die, the third circuit layer is electrically connected to the second light-emitting diode die, and the fourth circuit layer is electrically connected to the semiconductor epitaxial stack structure. The light-emitting diode device of claim 1 further comprises a transparent bonding layer disposed between the first light-emitting diode die and the semiconductor epitaxial stack structure. The LED device of claim 1, wherein the first LED die emits a first color light, the second LED die emits a second color light, and the first color light and the second color light have different wavelength ranges. The light-emitting diode device of claim 7, wherein the semiconductor epitaxial stack structure emits a third color light, and the third color light has a different wavelength range from the first color light. The LED device of claim 8, wherein the third color light and the second color light have different wavelength ranges. The LED device of claim 8, wherein the wavelength range of the third color light is between the wavelength range of the first color light and the wavelength range of the second color light.