TWI889445B - Pixel driving device - Google Patents

Abstract

A pixel driving device includes a first driving transistor, a second driving transistor, a driving circuit, a control transistor and a control circuit. The first driving transistor is coupled to a pixel light-emitting element. The driving circuit receives a plurality of control signals to control the first driving transistor and the second driving transistor. The control transistor is coupled to the second driving transistor. The control circuit receives a scan signal and the control signals to control the second driving transistor and the control transistor. The driving circuit and the control circuit reset and compensate the first driving transistor and the control transistor according to the control signals. The driving circuit turns on the first driving transistor, the second driving transistor and the pixel light-emitting element according to the control signals. The control circuit turns on the control transistor according to the scan signal and the control signals to turn off the second driving transistor and the pixel light-emitting element.

Description

Pixel driver

The present disclosure relates to an electronic device, and more particularly to a pixel driving device.

In existing displays, the brightness of a light-emitting element (e.g., a light-emitting diode) is related to the size of its driving current, and the size of the driving current is determined by the transistor. However, due to variations in the transistor manufacturing process, the threshold voltage ( _VTH ) of the transistor used to drive each pixel in the display is not the same. As a result, the light-emitting elements in different pixels have different driving currents, resulting in uneven brightness and affecting visual quality. In addition, the driving current is provided by the power supply voltage, and the power supply voltage will have a voltage drop (IR Drop) problem due to the line resistance in the current path, causing the power supply voltage of each pixel to be different, resulting in errors in the driving current.

On the other hand, in order to ensure that the transistor can operate in the saturation region, the conventional pixel driving circuit will configure multiple transistors in the path of the driving current, and the required power supply voltage cross-voltage (V _DD -V _SS ) will increase, resulting in increased power consumption. At the same time, the conventional pixel driving circuit is prone to current waveform distortion at low gray levels due to the longer current rise/fall time, and cannot maintain high luminous efficiency.

Therefore, the present disclosure provides a pixel driving device, including a first driving transistor, a second driving transistor, a driving circuit, a control transistor and a control circuit. The first driving transistor is coupled to the pixel light-emitting element. The second driving transistor is coupled to the first driving transistor. The driving circuit is coupled to the first driving transistor and the second driving transistor, and is used to receive a plurality of control signals to control the first driving transistor and the second driving transistor. The control transistor is coupled to the control end of the second driving transistor. The control circuit is coupled to the control end of the control transistor and the second driving transistor, and is used to receive a scanning signal and these control signals to control the control transistor and the second driving transistor. The driving circuit and the control circuit reset the first driving transistor and the control transistor respectively according to the control signals in the reset phase. The driving circuit and the control circuit compensate the first driving transistor and the control transistor respectively according to the control signals in the compensation phase. The driving circuit turns on the first driving transistor and the second driving transistor according to the control signals in the light-emitting phase, so that the pixel light-emitting element is turned on. The control circuit performs positive feedback on the control transistor and turns on the control transistor according to the scanning signal and the control signals in the light-emitting phase, so as to turn off the second driving transistor, so that the pixel light-emitting element is turned off.

According to an embodiment of the present disclosure, the pixel light-emitting element includes an anode terminal and a cathode terminal, wherein the anode terminal is used to receive a first power supply voltage, and the cathode terminal is coupled to a driving circuit. The first driving transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first driving transistor is coupled to the cathode terminal, and the second terminal of the first driving transistor and the control terminal of the first driving transistor are coupled to the driving circuit. The second driving transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second driving transistor is coupled to the second terminal of the first driving transistor, and the second terminal of the second driving transistor is used to receive a second power supply voltage, and the control terminal of the second driving transistor is coupled to the driving circuit, the control transistor, and the control circuit.

According to an embodiment of the present disclosure, the driving circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The first transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first transistor is used to receive a first reference voltage, the second terminal of the first transistor is coupled to a cathode terminal, and the control terminal of the first transistor is used to receive one of the control signals. The second transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to a cathode terminal, the second terminal of the second transistor is coupled to the control terminal of the first driving transistor, and the control terminal of the second transistor is used to receive a light emission control signal. The third transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the third transistor is coupled to the second terminal of the second transistor, the second terminal of the third transistor is used to receive a second reference voltage, and the control terminal of the third transistor is used to receive one of these control signals. The fourth transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the fourth transistor is coupled to the control terminal of the first drive transistor, the second terminal of the fourth transistor is used to receive a third reference voltage, and the control terminal of the fourth transistor is used to receive one of these control signals. The fifth transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the fifth transistor is coupled to the second terminal of the first drive transistor, the second terminal of the fifth transistor is coupled to the control terminal of the first drive transistor, and the control terminal of the fifth transistor is used to receive one of these control signals. The sixth transistor includes a first terminal, a second terminal and a control terminal, wherein the first terminal of the sixth transistor is used to receive the third reference voltage, the second terminal of the sixth transistor is coupled to the control terminal of the second drive transistor, and the control terminal of the sixth transistor is used to receive one of the control signals.

According to an embodiment of the present disclosure, the driving circuit further includes a first capacitor and a second capacitor. The first capacitor includes a first end and a second end, wherein the first end of the first capacitor is coupled to a first node, the first node is coupled to the second end of the second transistor and the first end of the third transistor, the second end of the first capacitor is coupled to a second node, the second node is coupled to the control end of the first driving transistor and the first end of the fourth transistor. The second capacitor includes a first end and a second end, wherein the first end of the second capacitor is coupled to a third node, the third node is coupled to the control end of the second driving transistor, the second end of the sixth transistor, the control transistor and the control circuit, and the second end of the second capacitor is used to receive a third reference voltage.

According to an embodiment of the present disclosure, the first transistor is turned on according to one of the control signals during the compensation stage, so that the first drive transistor forms a diode-type transistor to compensate the second node, and a voltage of the second node is the first reference voltage minus a critical voltage of the first drive transistor.

According to one embodiment of the present disclosure, the control transistor includes a first end, a second end and a control end, and the second end of the control transistor is coupled to the control end of the second drive transistor. The control circuit includes a seventh transistor, an eighth transistor, a ninth transistor and a tenth transistor. The seventh transistor includes a first end, a second end and a control end, wherein the first end of the seventh transistor is coupled to the first end of the control transistor, the second end of the seventh transistor is used to receive a data voltage, and the control end of the seventh transistor is used to receive one of these control signals. The eighth transistor includes a first end, a second end and a control end, wherein the first end of the eighth transistor is coupled to the second end of the control transistor, the second end of the eighth transistor is coupled to the control end of the control transistor, and the control end of the eighth transistor is used to receive one of these control signals. The ninth transistor includes a first terminal, a second terminal and a control terminal, wherein the first terminal of the ninth transistor is used to receive a third reference voltage, the second terminal of the ninth transistor is coupled to the second terminal of the eighth transistor and the control terminal of the control transistor, and the control terminal of the ninth transistor is used to receive one of the control signals. The tenth transistor includes a first terminal, a second terminal and a control terminal, wherein the first terminal of the tenth transistor is used to receive a fourth reference voltage, the second terminal of the tenth transistor is coupled to the first terminal of the control transistor, and the control terminal of the tenth transistor is used to receive one of the control signals.

According to an embodiment of the present disclosure, the control circuit further includes an eleventh transistor, a twelfth transistor, a thirteenth transistor, and a fourteenth transistor. The eleventh transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the eleventh transistor is coupled to the first terminal of the control transistor, the second terminal of the eleventh transistor is used to receive a fifth reference voltage, the control terminal of the eleventh transistor is coupled to a third node, the third node is coupled to the second terminal of the control transistor and the control terminal of the second drive transistor. The twelfth transistor includes a first terminal, a second terminal, and a control terminal, wherein the first terminal of the twelfth transistor is coupled to the first terminal of the eleventh transistor and the first terminal of the control transistor, and the control terminal of the twelfth transistor is used to receive a light control signal. The thirteenth transistor includes a first terminal, a second terminal and a control terminal, wherein the first terminal of the thirteenth transistor is coupled to the first terminal of the twelfth transistor, the second terminal of the thirteenth transistor is coupled to the second terminal of the twelfth transistor, and the control terminal of the thirteenth transistor is used to receive one of the control signals. The fourteenth transistor includes a first terminal, a second terminal and a control terminal, wherein the first terminal of the fourteenth transistor is coupled to the second terminal of the twelfth transistor, the second terminal of the thirteenth transistor and the control terminal of the fourteenth transistor, and the second terminal of the fourteenth transistor is used to receive the sixth reference voltage.

According to an embodiment of the present disclosure, the control circuit further includes a third capacitor and a fourth capacitor. The third capacitor includes a first end and a second end, wherein the first end of the third capacitor is coupled to the fourth node, the fourth node is coupled to the control end of the control transistor, the second end of the eighth transistor and the second end of the ninth transistor, and the second end of the third capacitor is used to receive a scanning signal. The fourth capacitor includes a first end and a second end, wherein the first end of the fourth capacitor is coupled to the fifth node, the fifth node is coupled to the first end of the control transistor and the first end of the seventh transistor, and the second end of the fourth capacitor is coupled to the sixth node, the sixth node is coupled to the first end of the twelfth transistor, the first end of the thirteenth transistor and the first end of the eleventh transistor.

According to an embodiment of the present disclosure, the seventh transistor and the eighth transistor are turned on according to one of the control signals during the compensation stage, so that the control transistor forms a diode-type transistor to compensate the fourth node, and a voltage of the fourth node is the data voltage minus a critical voltage of the control transistor.

According to one embodiment of the present disclosure, the voltage level of the scanning signal presents a continuous linear change in the light-emitting stage and is coupled to the fourth node, thereby switching the control transistor from off to on, so that the third node is charged to a fourth reference voltage via the fifth node, wherein the twelfth transistor and the fourteenth transistor are turned on according to the light-emitting control signal, and the thirteenth transistor is turned off according to one of these control signals, so that the third node is charged to a sixth reference voltage via the fifth node and the sixth node, thereby turning off the second drive transistor.

The following disclosure provides many different embodiments or examples for implementing different features of the invention provided. The embodiments of components and configurations described below are merely examples and are not intended to be limiting. In addition, for the purpose of simplicity and clarity, the disclosure repeats reference symbols and/or numbers in various examples, which in itself does not limit the relationship between the various embodiments and/or components discussed.

Please refer to FIG. 1 , which is a circuit diagram of a pixel driving device 100 according to an embodiment of the present disclosure. The pixel driving device 100 includes a first driving transistor DT1, a second driving transistor DT2, a driving circuit 110, a control transistor CT, and a control circuit 120. In some embodiments, a display device (not shown) includes a plurality of pixels, and each pixel may include at least one pixel driving device 100.

As shown in FIG1 , the first end of each element is at the top or right, and the second end of each element is at the bottom or left. The pixel light-emitting element L includes a first end and a second end, and the pixel light-emitting element L may be but is not limited to a micro light-emitting diode (Micro Light Emitting Diode, Micro LED), so the first end and the second end of the pixel light-emitting element L may be an anode end and a cathode end, respectively. The anode end of the pixel light-emitting element L is used to receive a first power supply voltage V _DD , and the cathode end of the pixel light-emitting element L is coupled to the driving circuit 110. The first driving transistor DT1 includes a first end, a second end and a control end. The first end of the first driving transistor DT1 is coupled to the cathode end of the pixel light-emitting element L. The second end of the first driving transistor DT1 and the control end of the first driving transistor DT1 are both coupled to the driving circuit 110. The second drive transistor DT2 includes a first end, a second end and a control end. The first end of the second drive transistor DT2 is coupled to the second end of the first drive transistor DT1, the second end of the second drive transistor DT2 is used to receive the second power supply voltage V _SS , and the control end of the second drive transistor DT2 is coupled to the drive circuit 110, the control transistor CT and the control circuit 120. The first drive transistor DT1 and the second drive transistor DT2 can be used to drive the pixel light-emitting element L to conduct and emit light. The drive circuit 110 is coupled to the control end of the first drive transistor DT1 and the control end of the second drive transistor DT2. The control transistor CT is coupled to the control end of the second drive transistor DT2. The control circuit 120 couples the control terminal of the control transistor CT and the control terminal of the second driving transistor DT2.

The driving circuit 110 is used to receive the light-emitting control signal EM, a plurality of control signals (such as the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1] and the control signal S2[n] in FIG1 ), the first reference voltage V _REF1 , the second reference voltage V _REF2 and the third reference voltage V _REF3 , so as to control the first driving transistor DT1 and the second driving transistor DT2. Specifically, the driving circuit 110 can control the first driving transistor DT1 and the second driving transistor DT2 according to the aforementioned signals, and determine the size of the driving current _ID (i.e., the light-emitting brightness of the pixel light-emitting element L) according to the aforementioned reference voltages. The control circuit 120 is used to receive the luminous control signal EM, the scanning signal V _SWEEP , the data voltage V _DATA , a plurality of control signals (such as the control signal S1[n-1], the control signal S1[n] and the control signal S1[n+2] in FIG. 1 ), the third reference voltage V _REF3 , the fourth reference voltage V _REF4 , the fifth reference voltage V _REF5 and the sixth reference voltage V _REF6 , so as to control the control transistor CT and the second driving transistor DT2 . In the embodiment of the present disclosure, the data voltage V _DATA , each reference voltage, the first power voltage V _DD and the second power voltage V _SS can all be direct current voltages, and the data voltage V _DATA is provided to the pixel driving device 100 via a data line. In addition, the voltage values of the reference voltages and the power voltage are, in descending order, the second reference voltage V _REF2 , the fourth reference voltage V _REF4 , the first power voltage V _DD , the sixth reference voltage V _REF6 , the fifth reference voltage V _REF5 , the first reference voltage V _REF1 , the second power voltage V _SS and the third reference voltage V _REF3 .

Please refer to FIG. 1 and FIG. 2 together. FIG. 2 is a timing diagram of various signals in the pixel driving device 100 according to the embodiment of FIG. 1. In the embodiment of the present disclosure, a pixel period TFR of the pixel driving device 100 can be divided into a reset phase RP, a compensation phase CP, a stabilization phase SP, a light-emitting phase EP, and a cut-off phase TP. The pixel driving device 100 can be operated in the reset phase RP, the compensation phase CP, the stabilization phase SP, the light-emitting phase EP, and the cut-off phase TP in sequence, and each phase does not overlap with each other. In addition, the stabilization phase SP may include a first sub-phase SP1 and a second sub-phase SP2, and the light emitting phase EP may include a first sub-phase EP1 and a second sub-phase EP2.

The driving circuit 110 and the control circuit 120 reset the first driving transistor DT1 and the control transistor CT respectively according to the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1] and the control signal S2[n] in the reset phase RP. The driving circuit 110 and the control circuit 120 compensate the first driving transistor DT1 and the control transistor CT respectively according to the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2] and the control signal S2[n] in the compensation phase CP. The driving circuit 110 turns off the first driving transistor DT1 and the control transistor CT according to the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1] and the control signal S2[n] in the stable phase SP. The driving circuit 110 turns on the first driving transistor DT1 and the second driving transistor DT2 according to a plurality of control signals (such as the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1] and the control signal S2[n] in FIG. 1 ) in the light emitting phase EP, so that the pixel light emitting element L is turned on. In the light-emitting phase EP, the control circuit 120 performs positive feedback on the control transistor CT according to the scanning signal V _SWEEP and multiple control signals (such as the control signal S1[n-1], the control signal S1[n] and the control signal S1[n+2] in FIG. 1 ) and turns on the control transistor CT, thereby turning off the second driving transistor DT2, so that the pixel light-emitting element L is turned off.

The pixel driver device 100 has the advantage of compensating the first drive transistor DT1 and the first power supply voltage V _DD through its own circuit structure to eliminate the variation of the critical voltage (V _{TH — DT1} ) of the first drive transistor DT1 and the first power supply voltage V _DD , thereby improving the brightness uniformity. The pixel driver device 100 can also compensate the control transistor CT through its own circuit structure to eliminate the variation of the critical voltage (V _{TH — CT} ) of the control transistor CT, thereby reducing the error of the luminous time. In addition, since the pixel driving device 100 only configures the first driving transistor DT1 and the second driving transistor DT2 on the current path of the driving current _ID , the cross-voltage between the first power voltage V _DD and the second power voltage V _SS can be reduced, thereby achieving the effect of saving power consumption. In particular, the pixel driving device 100 uses the positive feedback circuit structure of the control circuit 120 to turn on the control transistor CT to quickly turn off the second driving transistor DT2, thereby reducing the falling time (Falling Time) of the current waveform of the driving current _ID to improve the accuracy of grayscale control.

In FIG1 , the driving circuit 110 may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, and a sixth transistor T6. The first transistor T1 includes a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor T1 is used to receive a first reference voltage V _REF1 , the second terminal of the first transistor T1 is coupled to the cathode terminal of the pixel light-emitting element L, and the control terminal of the first transistor T1 is used to receive a control signal S1[n]. The second transistor T2 includes a first terminal, a second terminal, and a control terminal. The first terminal of the second transistor T2 is coupled to the cathode terminal of the pixel light-emitting element L, the second terminal of the second transistor T2 is coupled to the control terminal of the first driving transistor DT1, and the control terminal of the second transistor T2 is used to receive a light-emitting control signal EM. The third transistor T3 includes a first terminal, a second terminal, and a control terminal. The first terminal of the third transistor T3 is coupled to the second terminal of the second transistor T2. The second terminal of the third transistor T3 is used to receive the second reference voltage V _REF2 , and the control terminal of the third transistor T3 is used to receive the control signal S2[n]. The fourth transistor T4 includes a first terminal, a second terminal, and a control terminal. The first terminal of the fourth transistor T4 is coupled to the control terminal of the first drive transistor DT1. The second terminal of the fourth transistor T4 is used to receive the third reference voltage V _REF3 , and the control terminal of the fourth transistor T4 is used to receive the control signal S1[n-1]. The fifth transistor T5 includes a first terminal, a second terminal, and a control terminal. The first terminal of the fifth transistor T5 is coupled to the second terminal of the first drive transistor DT1, the second terminal of the fifth transistor T5 is coupled to the control terminal of the first drive transistor DT1, and the control terminal of the fifth transistor T5 is used to receive the control signal S1[n]. The sixth transistor T6 includes a first terminal, a second terminal, and a control terminal. The first terminal of the sixth transistor T6 is used to receive the third reference voltage V _REF3 , the second terminal of the sixth transistor T6 is coupled to the control terminal of the second drive transistor DT2, and the control terminal of the sixth transistor T6 is used to receive the control signal S1[n+1].

In addition, the driving circuit 110 may further include a first capacitor C1 and a second capacitor C2. The first capacitor C1 includes a first end and a second end, the first end of the first capacitor C1 is coupled to the first node N1, and the first node N1 is coupled to the second end of the second transistor T2 and the first end of the third transistor T3. The second end of the first capacitor C1 is coupled to the second node N2, and the second node N2 is coupled to the control end of the first driving transistor DT1 and the first end of the fourth transistor T4. The second capacitor C2 includes a first end and a second end, the first end of the second capacitor C2 is coupled to the third node N3, and the third node N3 is coupled to the control end of the second driving transistor DT2, the second end of the sixth transistor T6, the control transistor CT and the control circuit 120. The second end of the second capacitor C2 is used to receive the third reference voltage V _REF3 .

The control transistor CT includes a first terminal, a second terminal and a control terminal, and the second terminal of the control transistor CT is coupled to the control terminal of the second drive transistor DT2. The control circuit 120 includes a seventh transistor T7, an eighth transistor T8, a ninth transistor T9 and a tenth transistor T10. The seventh transistor T7 includes a first terminal, a second terminal and a control terminal, and the first terminal of the seventh transistor T7 is coupled to the first terminal of the control transistor CT, and the second terminal of the seventh transistor T7 is used to receive the data voltage V _DATA , and the control terminal of the seventh transistor T7 is used to receive the control signal S1[n]. The eighth transistor T8 includes a first terminal, a second terminal and a control terminal, and the first terminal of the eighth transistor T8 is coupled to the second terminal of the control transistor CT, and the second terminal of the eighth transistor T8 is coupled to the control terminal of the control transistor CT, and the control terminal of the eighth transistor T8 is used to receive the control signal S1[n]. The ninth transistor T9 includes a first terminal, a second terminal, and a control terminal. The first terminal of the ninth transistor T9 is used to receive the third reference voltage V _REF3 . The second terminal of the ninth transistor T9 is coupled to the second terminal of the eighth transistor T8 and the control terminal of the control transistor CT. The control terminal of the ninth transistor T9 is used to receive the control signal S1[n-1]. The tenth transistor T10 includes a first terminal, a second terminal, and a control terminal. The first terminal of the tenth transistor T10 is used to receive the fourth reference voltage V _REF4 . The second terminal of the tenth transistor T10 is coupled to the first terminal of the control transistor CT. The control terminal of the tenth transistor T10 is used to receive the control signal S1[n+2].

In addition, the control circuit 120 may further include an eleventh transistor T11, a twelfth transistor T12, a thirteenth transistor T13, and a fourteenth transistor T14. The eleventh transistor T11 includes a first terminal, a second terminal, and a control terminal. The first terminal of the eleventh transistor T11 is coupled to the first terminal of the control transistor CT, and the second terminal of the eleventh transistor T11 is used to receive the fifth reference voltage V _REF5 . The control terminal of the eleventh transistor T11 is coupled to the third node N3, and the third node N3 is coupled to the second terminal of the control transistor CT and the control terminal of the second drive transistor DT2. The twelfth transistor T12 includes a first terminal, a second terminal, and a control terminal. The first terminal of the twelfth transistor T12 is coupled to the first terminal of the eleventh transistor T11 and the first terminal of the control transistor CT, and the control terminal of the twelfth transistor T12 is used to receive the light control signal EM. The thirteenth transistor T13 includes a first terminal, a second terminal and a control terminal, the first terminal of the thirteenth transistor T13 is coupled to the first terminal of the twelfth transistor T12, the second terminal of the thirteenth transistor T13 is coupled to the second terminal of the twelfth transistor T12, and the control terminal of the thirteenth transistor T13 is used to receive the control signal S1[n+2]. The fourteenth transistor T14 includes a first terminal, a second terminal and a control terminal, the first terminal of the fourteenth transistor T14 is coupled to the second terminal of the twelfth transistor T12, the second terminal of the thirteenth transistor T13 and the control terminal of the fourteenth transistor T14, and the second terminal of the fourteenth transistor T14 is used to receive the sixth reference voltage V _REF6 .

Furthermore, the control circuit 120 may further include a third capacitor C3 and a fourth capacitor C4. The third capacitor C3 includes a first end and a second end, the first end of the third capacitor C3 is coupled to the fourth node N4, and the fourth node N4 is coupled to the control end of the control transistor CT, the second end of the eighth transistor T8, and the second end of the ninth transistor T9. The second end of the third capacitor C3 is used to receive the scanning signal V _SWEEP . The fourth capacitor C4 includes a first end and a second end, the first end of the fourth capacitor C4 is coupled to the fifth node N5, and the fifth node N5 is coupled to the first end of the control transistor CT and the first end of the seventh transistor T7. The second end of the fourth capacitor C4 is coupled to the sixth node N6, and the sixth node N6 is coupled to the first end of the twelfth transistor T12, the first end of the thirteenth transistor T13, and the first end of the eleventh transistor T11.

In the embodiment of the present disclosure, the type of each transistor is the same, and the type of the transistor can be a P-type Metal Oxide Semiconductor Field Effect Transistor (PMOS). In other embodiments, only the configuration position of the pixel light-emitting element needs to be changed to between the second driving transistor and the second power voltage, and the magnitude of each reference voltage is adjusted, so that an N-type Metal Oxide Semiconductor Field Effect Transistor (NMOS) can be used as each transistor in the pixel driving device, and still have the same function. The following will be used with diagrams to explain in detail the operation of the pixel driving device 100 at different stages and the corresponding circuit states.

Please refer to FIG. 1 , FIG. 2 , and FIG. 3A to FIG. 3H for the operation of the pixel driving device 100 at each stage when displaying a non-zero grayscale image. It should be noted that, for the sake of convenience, in FIG. 3A to FIG. 3H , a closed transistor is indicated by a cross, and a conductive transistor is indicated by an uncross.

Please refer to FIG. 2 and FIG. 3A together. FIG. 3A is an equivalent circuit diagram of the pixel driving device 100 in the reset phase RP according to the embodiment of FIG. 1. In the reset phase RP, the control signal S1[n-1] and the control signal S2[n] can be set to a low voltage level V _GL , and the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2], the luminous control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH .

Specifically, in the reset phase RP, the driving circuit 110 turns on the fourth transistor T4 according to the control signal S1[n-1] that is pulled low, and resets the control terminal of the first driving transistor DT1 to the third reference voltage V _REF3 through the conduction path of the fourth transistor T4. Similarly, the control circuit 120 turns on the ninth transistor T9 according to the control signal S1[n-1] that is pulled low, and resets the control terminal of the control transistor CT to the third reference voltage V _REF3 through the conduction path of the ninth transistor T9. In addition, the driving circuit 110 turns on the third transistor T3 according to the pulled-down control signal S2[n], and provides the second reference voltage V _REF2 to the first node N1 through the conduction path of the third transistor T3, so that the first node N1 is stabilized at the second reference voltage V _REF2 , wherein the second reference voltage V _REF2 and the third reference voltage V _REF3 are both high voltages.

Please continue to refer to FIG. 2 and FIG. 3B , FIG. 3B is an equivalent circuit diagram of the pixel driving device 100 in the compensation phase CP according to the embodiment of FIG. 1 . In the compensation phase CP, the control signal S1[n] and the control signal S2[n] can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n+1], the control signal S1[n+2], the luminous control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH .

Specifically, in the compensation phase CP, the driving circuit 110 turns on the first transistor T1 according to the pulled-down control signal S1[n], so that the first driving transistor DT1 forms a diode-connected transistor, and writes a voltage to the second node N2. The voltage written in can be the first reference voltage V _REF1 minus the critical voltage of the first driving transistor DT1, as shown in the following formula: ,in is the voltage of the second node N2, is the first reference voltage, is the critical voltage of the first drive transistor DT1. As can be seen from the above formula, the critical voltage of the first drive transistor DT1 can be stored in the second node N2 to compensate the second node N2 (i.e., compensate the first drive transistor DT1). Similarly, the control circuit 120 turns on the seventh transistor T7 and the eighth transistor T8 according to the pulled-down control signal S1[n], so that the control transistor CT forms a diode-connected transistor, and writes a voltage to the fourth node N4. The aforementioned written voltage can be the data voltage V _DATA minus the critical voltage of the control transistor CT, and is shown in the following formula: ,in is the voltage of the fourth node N4, is the data voltage, is the critical voltage of the control transistor CT. The critical voltage of the control transistor CT can be stored in the fourth node N4 to compensate the fourth node N4 (ie, to compensate the control transistor CT). At this time, the first node N1 still maintains a high voltage regulated at the second reference voltage V _REF2 .

Please continue to refer to FIG. 2 and FIG. 3C , FIG. 3C is an equivalent circuit diagram of the pixel driving device 100 in the first sub-phase SP1 of the stable phase SP according to the embodiment of FIG. 1 . In the first sub-phase SP1 of the stable phase SP, the control signal S1[n+1] and the control signal S2[n] can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+2], the luminous control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH .

Specifically, in the first sub-stage SP1 of the stable stage SP, the driving circuit 110 turns on the sixth transistor T6 according to the pulled-down control signal S1[n+1], so the third node N3 is discharged to the third reference voltage V _REF3 , so that the second driving transistor DT2 and the eleventh transistor T11 are turned on. At this time, the sixth node N6 is discharged to the fifth reference voltage V _REF5 .

Please continue to refer to FIG. 2 and FIG. 3D , FIG. 3D is an equivalent circuit diagram of the pixel driving device 100 in the second sub-phase SP2 of the stable phase SP according to the embodiment of FIG. 1 . In the second sub-phase SP2 of the stable phase SP, the control signal S1[n+2] and the control signal S2[n] can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the luminous control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH .

Specifically, in the second sub-stage SP2 of the stable stage SP, the control circuit 120 turns on the tenth transistor T10 according to the control signal S1[n+2] that is pulled low, so the fifth node N5 is charged to the fourth reference voltage V _REF4 . The control circuit 120 turns on the thirteenth transistor T13 according to the control signal S1[n+2] that is pulled low, and the fourteenth transistor T14 is turned on at the same time, so the sixth node N6 is charged to a voltage value between the fifth reference voltage V _REF5 and the sixth reference voltage V _REF6 , wherein the aforementioned voltage value can be expressed as (V _REF5 +V _REF6 )/2.

Please continue to refer to FIG. 2 and FIG. 3E , FIG. 3E is an equivalent circuit diagram of the pixel driving device 100 in the first sub-stage EP1 of the light emitting stage EP according to the embodiment of FIG. 1 . In the first sub-stage EP1 of the light emitting stage EP, the voltage level of the scanning signal V _SWEEP gradually decreases, the light emitting control signal EM can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2] and the control signal S2[n] can be set to a high voltage level V _GH .

Specifically, in the first sub-stage EP1 of the light-emitting stage EP, the driving circuit 110 turns on the second transistor T2 according to the light-emitting control signal EM that is pulled low, so the first node N1 is discharged to a voltage obtained by subtracting the turn-on voltage of the pixel light-emitting element L from the first power voltage V _DD , and it can be expressed as V _DD -V _LED . The turn-on voltage is the voltage difference between the first end and the second end when the pixel light-emitting element L is turned on, and can be but not limited to 0.7 volts (V). At this time, the voltage of the first node N1 (V _DD -V _LED ) is coupled to the second node N2 via the first capacitor C1, and the voltage of the second node N2 can be expressed as V _REF1 -V _{TH_DT1} -|V _DD -V _LED -V _REF2 |. Therefore, the voltage at the control terminal of the first drive transistor DT1 will drop, making the first drive transistor DT1 conductive. Based on the PMOS saturation region current formula , the conduction current of the first drive transistor DT1 can be expressed as the following formula (1): (1).

in is the conduction current of the first drive transistor DT1, is the process parameter of the first driving transistor DT1, is the first power supply voltage, is the conduction voltage of the pixel light-emitting element L, is the first reference voltage, is the second reference voltage, and is the critical voltage of the first driving transistor DT1. Since the driving current _ID of the pixel light emitting element L is equal to the conduction current of the first driving transistor DT1, and it can be known from the above formula (1) that the driving current _ID of the pixel light emitting element L is independent of the critical voltage (V _{TH — DT1} ) of the first driving transistor DT1, the voltage difference (V _LED ) between the first end and the second end when the pixel light emitting element L is turned on, and the first power supply voltage V _DD . Thus, the pixel driving device 100 can use its own circuit configuration to compensate for the critical voltage variation of the first driving transistor DT1 and the voltage drop (IR Drop) of the first power supply voltage V _DD caused by the line resistance in the current path, thereby improving the uniformity of the driving current _ID of the pixel light-emitting element L. At this time, the scanning signal V _SWEEP will slowly decrease, and its voltage variation will be coupled to the fourth node N4 through the third capacitor C3, but the control transistor CT is not turned on in the first sub-stage EP1 of the light-emitting stage EP. On the other hand, the control circuit 120 turns on the twelfth transistor T12 and the fourteenth transistor T14 according to the low luminescence control signal EM, so the sixth node N6 continues to be charged, and its voltage value is between the fifth reference voltage V _REF5 and the sixth reference voltage V _REF6 , and can be expressed as (V _REF5 +V _REF6 )/2.

Please continue to refer to FIG. 2, FIG. 3F and FIG. 3G. FIG. 3F is an equivalent circuit diagram of the pixel driving device 100 in the second sub-stage EP2 of the light-emitting stage EP according to the embodiment of FIG. 1, and FIG. 3G is another equivalent circuit diagram of the pixel driving device 100 in the second sub-stage EP2 of the light-emitting stage EP according to the embodiment of FIG. 1. In the second sub-stage EP2 of the light-emitting stage EP, the voltage level of the scanning signal V _SWEEP continues to decrease, the light-emitting control signal EM can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2] and the control signal S2[n] can be set to a high voltage level V _GH .

In FIG. 3F , the conduction condition of the control transistor CT is that the source-gate voltage difference is greater than the critical voltage (ie, V _{SG — CT} > V _{TH — CT} ), and the conduction condition can be equivalent to the following equations (2) and (3): (2); (3).

in is the fourth reference voltage, is the data voltage, is the critical voltage of the control transistor CT, and is the voltage variation of the scanning signal V _SWEEP . As time goes by, when the voltage variation of the scanning signal V _SWEEP is greater than the voltage difference between the fourth reference voltage V _REF4 and the data voltage V _DATA , the control transistor CT is turned on. It can be seen from equation (3) that the conduction condition of the control transistor CT is independent of the critical voltage (V _{TH_CT} ) of the control transistor CT. The concept of compensation disclosed in the present invention is mainly to eliminate the critical voltage and power supply voltage that are pre-stored when deriving the current formula, so that the pixel driving device 100 can use its own circuit configuration to compensate for the critical voltage of the control transistor CT, thereby improving the variability problem. In the embodiment of the present disclosure, the luminous duration of the pixel luminous element L can be determined by the data voltage V _DATA , and the data voltage V _DATA is controlled by pulse width modulation (PWM), so that the pixel luminous element L can be operated at the optimal luminous efficiency point to reduce power consumption at low gray levels.

In addition, the fifth node N5 and the third node N3 share charge with each other, and the capacitance of the fourth capacitor C4 is greater than the capacitance of the second capacitor C2, so the third node N3 is coupled to a voltage close to the fourth reference voltage V _REF4 . Since the fourth reference voltage V _REF4 is a high voltage, the second drive transistor DT2 and the eleventh transistor T11 are turned off. When the second drive transistor DT2 is turned off, the current cannot flow in the path of the drive current _ID of the pixel light-emitting element L in FIG. 3E , so the pixel light-emitting element L is turned off. When the eleventh transistor T11 is turned off, the sixth node N6 still maintains a voltage value between the fifth reference voltage V _REF5 and the sixth reference voltage V _REF6 , and is still expressed as (V _REF5 +V _REF6 )/2.

In FIG. 3G , the thirteenth transistor T13 is turned off according to the control signal S1[n+2], while the twelfth transistor T12 and the fourteenth transistor T14 remain turned on according to the luminescence control signal EM, and the thirteenth transistor T13 is turned off according to the control signal S1[n+2], so the sixth node N6 is finally charged to the sixth reference voltage V _REF6 . The sixth node N6 will increase its voltage level more than before, and the voltage change of the sixth node N6 is coupled to the fifth node N5 through the fourth capacitor C4, and the voltage of the fifth node N5 can be expressed as V _REF4 +[(V _REF6 -V _REF5 )/2]× At this time, the voltage of the fifth node N5 is coupled to the third node N3, thereby further turning off the second driving transistor DT2 and the eleventh transistor T11.

Specifically, the voltage level of the scanning signal V _SWEEP presents a continuous linear change (i.e., continuously decreases) in the emission phase EP and is coupled to the fourth node N4, thereby switching the control transistor CT from off (as shown in FIG. 3E ) to on (as shown in FIG. 3F ), so that the third node N3 can be charged to the fourth reference voltage V _REF4 via the fifth node N5 . When the sixth node N6 is charged to the sixth reference voltage V _REF6 , the third node N3 can be further charged to the sixth reference voltage V _REF6 via the fifth node N5 and the sixth node N6, so that the second drive transistor DT2 can be turned off more quickly by utilizing the positive feedback circuit architecture, thereby shortening the falling time of the drive current _ID in FIG. 3E and achieving the effect of improving the grayscale control accuracy.

Please continue to refer to FIG. 2 and FIG. 3H , which is an equivalent circuit diagram of the pixel driving device 100 in the cut-off phase TP according to the embodiment of FIG. 1 . In the cut-off phase TP, the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2], the control signal S2[n], the emission control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH , so that all transistors are turned off.

Regarding the operation of each stage of the pixel driving device 100 when displaying a zero grayscale image, please refer to FIG. 1, FIG. 2, FIG. 3A to FIG. 3C, FIG. 3H, FIG. 4A and FIG. 4B. It should be noted that when the pixel driving device 100 displays a zero grayscale image, its reset stage RP, compensation stage CP, first sub-stage SP1 of the stabilization stage SP and cut-off stage TP are the same as those when displaying a non-zero grayscale image (such as FIG. 3A to FIG. 3C, FIG. 3H), so the reset stage RP, compensation stage CP, first sub-stage SP1 of the stabilization stage SP and cut-off stage TP are not described separately.

Please refer to FIG. 2 and FIG. 4A together. FIG. 4A is an equivalent circuit diagram of the second sub-stage SP2 of the stable stage SP when the pixel driving device 100 of the embodiment of FIG. 1 is applied to a zero grayscale image. In the second sub-stage SP2 of the stable stage SP, the control signal S1[n+2] and the control signal S2[n] can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the luminous control signal EM and the scanning signal V _SWEEP can be set to a high voltage level V _GH .

In the second sub-phase SP2 of the stable phase SP, the control circuit 120 turns on the tenth transistor T10 according to the pulled-down control signal S1[n+2], so the fifth node N5 is charged to the fourth reference voltage V _REF4 . Due to the zero grayscale display, the data voltage V _DATA is a low voltage, so the control transistor CT is directly turned on, and the third node N3 is charged to the fourth reference voltage V _REF4 of a relatively high voltage, thereby turning off the second drive transistor DT2 and the eleventh transistor T11.

Please continue to refer to FIG. 2 and FIG. 4B . FIG. 4B is an equivalent circuit diagram of the pixel driving device 100 according to the embodiment of FIG. 1 in the emission phase EP when the pixel driving device 100 is applied to a zero grayscale image. In the emission phase EP, the voltage level of the scanning signal V _SWEEP gradually decreases, the emission control signal EM can be set to a low voltage level V _GL , and the control signal S1[n-1], the control signal S1[n], the control signal S1[n+1], the control signal S1[n+2] and the control signal S2[n] can be set to a high voltage level V _GH . In the light emitting phase EP, since the second driving transistor DT2 is still turned off, no current can flow in the current path of the pixel light emitting element L, so that the pixel light emitting element L is turned off, thereby preventing the pixel light emitting element L from flickering.

Please refer to Figures 1, 5 and 6 together. Figure 5 is a current waveform diagram of the driving current _ID of the pixel driving device 100 according to the embodiment of Figure 1 displaying a high gray level under the gamma curve 2.2, and Figure 6 is a current waveform diagram of the driving current _ID of the pixel driving device 100 according to the embodiment of Figure 1 displaying a low gray level under the gamma curve 2.2. In FIG. 5 , when the pixel driver device 100 displays images of 255, 127, and 32 gray levels, the falling time of the current waveform of the driving current _ID is 2.706 microseconds (μs), 2.612 μs, and 2.163 μs, respectively. It can be seen that the pixel driver device 100 uses the control circuit 120 to turn on the control transistor CT, and uses the positive feedback circuit architecture to quickly turn off the second driving transistor DT2, thereby reducing the falling time of the driving current _ID when the pixel driver device 100 displays each gray level, thereby improving the accuracy of gray level control. In particular, in FIG. 6 , when the pixel driving device 100 displays gray level 0, the driving current _ID is 0 microampere (μA), so the pixel light-emitting element L will not flicker.

Please refer to Figures 1, 7 and 8 together. Figure 7 is a current waveform diagram of the driving current _ID of the pixel driving device 100 according to the embodiment of Figure 1 under the critical voltage variation of the first driving transistor DT1 and the first power supply voltage _VDD variation. Figure 8 is a current waveform diagram of the driving current _ID of the pixel driving device 100 according to the embodiment of Figure 1 under the critical voltage variation of the control transistor CT. In FIG. 7 , curve M1 represents the driving current _ID when the critical voltage variation of the first driving transistor DT1 is -0.5 V and the first power supply voltage _VDD varies by -0.3 V. When the pixel light-emitting element L is turned on, the driving current _ID can be 46.9284 μA, and its error rate is only 3.17% compared to when there is no variation. Curve M2 represents the _driving current ID when the critical voltage of the first driving transistor DT1 varies by -0.5 V and the first power supply voltage _VDD varies by +0.3 V. When the pixel light-emitting element L is turned on, the driving current _ID can be 47.6237 μA, and its error rate is only 1.73% compared to the case of no variation. Curve M3 represents the driving current _ID when the critical voltage of the first driving transistor DT1 does not vary and the first power supply voltage _VDD does not vary. When the pixel light-emitting element L is turned on, the driving current _ID can be 48.4663 μA. It can be seen that the pixel driving device 100 can improve the uniformity of the driving current _ID by compensating the critical voltage variation of the first driving transistor DT1 and the first power supply voltage V _DD through its own circuit structure.

In FIG8 , curve Q1 represents the driving current _ID when the critical voltage variation of the control transistor CT is +0.3 V. Curve Q2 represents the driving current _ID when the critical voltage variation of the control transistor CT is unchanged. Curve Q3 represents the driving current _ID when the critical voltage variation of the control transistor CT is -0.3 V. It can be seen that the pixel driving device 100 can compensate for the critical voltage variation of the control transistor CT through its own circuit structure, so that the luminescence time error of the pixel light-emitting element L is only 0.38 μs and 0.37 μs.

According to the pixel driver disclosed in the present invention, the driving circuit is used to compensate the first driving transistor and the first power supply voltage, and the control circuit is used to compensate the control transistor, so as to eliminate the critical voltage of the first driving transistor and the control transistor and the variation of the first power supply voltage, thereby improving the brightness uniformity and reducing the error of the luminous time. In addition, since the pixel driver only has two transistors configured on the driving current path, the cross voltage between the first power supply voltage and the second power supply voltage can be reduced, thereby achieving the effect of saving power consumption. In particular, the pixel driver utilizes the positive feedback circuit structure of the control circuit to turn off the second drive transistor more quickly, shortening the falling time of the drive current to improve the accuracy of grayscale control.

Although the present disclosure has been disclosed in the above implementation form, it is not intended to limit the present disclosure. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the definition of the attached patent application scope.

100: pixel driving device 110: driving circuit 120: control circuit C1: first capacitor C2: second capacitor C3: third capacitor C4: fourth capacitor CT: control transistor DT1: first driving transistor DT2: second driving transistor EM: light emitting control signal _ID : Driving current L: Pixel light-emitting element M1, M2, M3, Q1, Q2, Q3: Curve N1: First node N2: Second node N3: Third node N4: Fourth node N5: Fifth node N6: Sixth node S1[n-1], S1[n], S1[n+1], S1[n+2], S2[n]: Control signal T1: First transistor T2: Second transistor T3: Third transistor T4: Fourth transistor T5: Fifth transistor T6: Sixth transistor T7: Seventh transistor T8: Eighth transistor T9: Ninth transistor T10: Tenth transistor T11: Eleventh transistor T12: Twelfth transistor T13: Thirteenth transistor T14: Fourteenth transistor V _DD : First power supply voltage V _DATA : Data voltage V _GH : High voltage level V _GL : Low voltage level V _REF1 : First reference voltage V _REF2 : Second reference voltage V _REF3 : Third reference voltage V _REF4 : Fourth reference voltage V _REF5 : Fifth reference voltage V _REF6 : Sixth reference voltage V _SWEEP : Scanning signal V _SS : Second power supply voltage CP: Compensation phase EP: Emission phase EP1, SP1: First sub-phase EP2, SP2: Second sub-phase RP: Reset phase SP: Stabilization phase TP: Cut-off phase TFR: Pixel period

In order to make the above and other purposes, features, advantages and embodiments of the present disclosure more understandable, the attached drawings are described as follows: FIG. 1 is a circuit diagram of a pixel driver according to an embodiment of the present disclosure; FIG. 2 is a timing diagram of each signal in the pixel driver according to the embodiment of FIG. 1; FIG. 3A is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG. 1 in the reset phase; FIG. 3B is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG. 1 in the compensation phase; FIG. 3C is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG. 1 in the first sub-phase of the stable phase; FIG3D is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG1 in the second sub-stage of the stable stage; FIG3E is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG1 in the first sub-stage of the light-emitting stage; FIG3F is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG1 in the second sub-stage of the light-emitting stage; FIG3G is another equivalent circuit diagram of the pixel driver according to the embodiment of FIG1 in the second sub-stage of the light-emitting stage; FIG3H is an equivalent circuit diagram of the pixel driver according to the embodiment of FIG1 in the cut-off stage; FIG4A is an equivalent circuit diagram of the second sub-stage of the stable stage when the pixel driver according to the embodiment of FIG1 is applied to a zero grayscale screen; FIG4B is an equivalent circuit diagram of the luminous stage when the pixel driver according to the embodiment of FIG1 is applied to a zero grayscale screen; FIG5 is a current waveform diagram of the driving current of the pixel driver according to the embodiment of FIG1 showing a high grayscale under the gamma curve 2.2; FIG6 is a current waveform diagram of the driving current of the pixel driver according to the embodiment of FIG1 showing a low grayscale under the gamma curve 2.2; FIG. 7 is a current waveform diagram of the driving current of the pixel driving device according to the embodiment of FIG. 1 under the critical voltage variation of the first driving transistor and the first power supply voltage variation; and FIG. 8 is a current waveform diagram of the driving current of the pixel driving device according to the embodiment of FIG. 1 under the critical voltage variation of the control transistor.

100: Pixel driver

110: Driving circuit

120: Control circuit

C1: first capacitor

C2: Second capacitor

C3: The third capacitor

C4: The fourth capacitor

CT: Control transistor

DT1: First drive transistor

DT2: Second drive transistor

EM: luminous control signal

I _D : Driving current

L: Pixel light-emitting element

N1: First node

N2: Second node

N3: The third node

N4: The fourth node

N5: Fifth Node

N6: Node 6

S1[n-1],S1[n],S1[n+1],S1[n+2],S2[n]: control signal

T1: First transistor

T2: Second transistor

T3: The third transistor

T4: The fourth transistor

T5: The fifth transistor

T6: Sixth transistor

T7: Seventh transistor

T8: The eighth transistor

T9: Ninth transistor

T10: The tenth transistor

T11: Eleventh transistor

T12: twelfth transistor

T13: Thirteenth transistor

T14: Fourteenth transistor

V _DD : First power supply voltage

V _DATA : Data voltage

V _REF1 : First reference voltage

V _REF2 : Second reference voltage

V _REF3 : Third reference voltage

V _REF4 : Fourth reference voltage

V _REF5 : Fifth reference voltage

V _REF6 : Sixth reference voltage

V _SWEEP :Scan signal

V _SS : Second power supply voltage

Claims (8)

A pixel driving device comprises: a first driving transistor coupled to a pixel light-emitting element; a second driving transistor coupled to the first driving transistor; a driving circuit coupled to the first driving transistor and the second driving transistor and used to receive a plurality of control signals to control the first driving transistor and the second driving transistor; a control transistor coupled to a control end of the second driving transistor; and a control circuit coupled to the control transistor and the control end of the second driving transistor and used to receive a scanning signal and the control signals to control the control transistor and the second driving transistor; Wherein, the driving circuit and the control circuit reset the first driving transistor and the control transistor respectively according to the control signals in a reset phase; Wherein, the driving circuit and the control circuit compensate the first driving transistor and the control transistor respectively according to the control signals in a compensation phase; Wherein, the driving circuit turns on the first driving transistor and the second driving transistor according to the control signals in a light-emitting phase, so that the pixel light-emitting element is turned on; Wherein, the control circuit performs positive feedback on the control transistor and turns on the control transistor according to the scanning signal and the control signals in the light-emitting phase, thereby turning off the second driving transistor, so that the pixel light-emitting element is turned off; The pixel light-emitting element includes an anode terminal and a cathode terminal, the anode terminal is used to receive a first power voltage, the cathode terminal is coupled to the driving circuit, the first driving transistor includes a first terminal, a second terminal and a control terminal, the first terminal of the first driving transistor is coupled to the cathode terminal, the second terminal of the first driving transistor and the control terminal of the first driving transistor are coupled to the cathode terminal, and the cathode terminal of the first driving transistor is coupled to the cathode terminal. Coupled to the drive circuit, the second drive transistor includes a first end, a second end and the control end, the first end of the second drive transistor is coupled to the second end of the first drive transistor, the second end of the second drive transistor is used to receive a second power supply voltage, and the control end of the second drive transistor is coupled to the drive circuit, the control transistor and the control circuit; Wherein, the driving circuit comprises: A first transistor, comprising a first end, a second end and a control end, wherein the first end of the first transistor is used to receive a first reference voltage, the second end of the first transistor is coupled to the cathode end, and the control end of the first transistor is used to receive one of the control signals; A second transistor, comprising a first end, a second end and a control end, wherein the first end of the second transistor is coupled to the cathode end, the second end of the second transistor is coupled to the control end of the first driving transistor, and the control end of the second transistor is used to receive a light-emitting control signal; A third transistor, comprising a first end, a second end and a control end, wherein the first end of the third transistor is coupled to the second end of the second transistor, the second end of the third transistor is used to receive a second reference voltage, and the control end of the third transistor is used to receive one of the control signals; A fourth transistor, comprising a first end, a second end and a control end, wherein the first end of the fourth transistor is coupled to the control end of the first drive transistor, the second end of the fourth transistor is used to receive a third reference voltage, and the control end of the fourth transistor is used to receive one of the control signals; A fifth transistor, comprising a first end, a second end and a control end, wherein the first end of the fifth transistor is coupled to the second end of the first drive transistor, the second end of the fifth transistor is coupled to the control end of the first drive transistor, and the control end of the fifth transistor is used to receive one of the control signals; and A sixth transistor, comprising a first end, a second end and a control end, wherein the first end of the sixth transistor is used to receive the third reference voltage, the second end of the sixth transistor is coupled to the control end of the second drive transistor, and the control end of the sixth transistor is used to receive one of the control signals. The pixel driving device as described in claim 1, wherein the driving circuit further comprises: a first capacitor, comprising a first end and a second end, wherein the first end of the first capacitor is coupled to a first node, the first node is coupled to the second end of the second transistor and the first end of the third transistor, the second end of the first capacitor is coupled to a second node, the second node is coupled to the control end of the first driving transistor and the first end of the fourth transistor; and a second capacitor, comprising a first end and a second end, wherein the first end of the second capacitor is coupled to a third node, the third node is coupled to the control end of the second driving transistor, the second end of the sixth transistor, the control transistor and the control circuit, and the second end of the second capacitor is used to receive the third reference voltage. A pixel driving device as described in claim 2, wherein the first transistor is turned on according to one of the control signals during the compensation stage, so that the first driving transistor forms a diode-type transistor to compensate the second node, and a voltage of the second node is the first reference voltage minus a critical voltage of the first driving transistor. A pixel driving device as described in claim 1, wherein the control transistor comprises a first end, a second end and a control end, the second end of the control transistor is coupled to the control end of the second drive transistor, and the control circuit comprises: A seventh transistor, comprising a first end, a second end and a control end, wherein the first end of the seventh transistor is coupled to the first end of the control transistor, the second end of the seventh transistor is used to receive a data voltage, and the control end of the seventh transistor is used to receive one of the control signals; An eighth transistor, comprising a first end, a second end and a control end, wherein the first end of the eighth transistor is coupled to the second end of the control transistor, the second end of the eighth transistor is coupled to the control end of the control transistor, and the control end of the eighth transistor is used to receive one of the control signals; A ninth transistor, comprising a first end, a second end and a control end, wherein the first end of the ninth transistor is used to receive the third reference voltage, the second end of the ninth transistor is coupled to the second end of the eighth transistor and the control end of the control transistor, and the control end of the ninth transistor is used to receive one of the control signals; and A tenth transistor, comprising a first end, a second end and a control end, wherein the first end of the tenth transistor is used to receive a fourth reference voltage, the second end of the tenth transistor is coupled to the first end of the control transistor, and the control end of the tenth transistor is used to receive one of the control signals. The pixel driving device as described in claim 4, wherein the control circuit further comprises: An eleventh transistor, comprising a first end, a second end and a control end, wherein the first end of the eleventh transistor is coupled to the first end of the control transistor, the second end of the eleventh transistor is used to receive a fifth reference voltage, the control end of the eleventh transistor is coupled to a third node, the third node is coupled to the second end of the control transistor and the control end of the second drive transistor; A twelfth transistor, comprising a first end, a second end and a control end, wherein the first end of the twelfth transistor is coupled to the first end of the eleventh transistor and the first end of the control transistor, and the control end of the twelfth transistor is used to receive the light control signal; A thirteenth transistor, comprising a first end, a second end and a control end, wherein the first end of the thirteenth transistor is coupled to the first end of the twelfth transistor, the second end of the thirteenth transistor is coupled to the second end of the twelfth transistor, and the control end of the thirteenth transistor is used to receive one of the control signals; and A fourteenth transistor, comprising a first end, a second end and a control end, wherein the first end of the fourteenth transistor is coupled to the second end of the twelfth transistor, the second end of the thirteenth transistor and the control end of the fourteenth transistor, and the second end of the fourteenth transistor is used to receive a sixth reference voltage. The pixel driving device as described in claim 5, wherein the control circuit further comprises: a third capacitor, comprising a first end and a second end, wherein the first end of the third capacitor is coupled to a fourth node, the fourth node is coupled to the control end of the control transistor, the second end of the eighth transistor and the second end of the ninth transistor, and the second end of the third capacitor is used to receive the scanning signal; and a fourth capacitor, comprising a first end and a second end, wherein the first end of the fourth capacitor is coupled to a fifth node, the fifth node is coupled to the first end of the control transistor and the first end of the seventh transistor, and the second end of the fourth capacitor is coupled to a sixth node, the sixth node is coupled to the first end of the twelfth transistor, the first end of the thirteenth transistor and the first end of the eleventh transistor. The pixel driving device as described in claim 6, wherein the seventh transistor and the eighth transistor are turned on according to one of the control signals in the compensation stage, so that the control transistor forms a diode-type transistor to compensate the fourth node, and a voltage of the fourth node is the data voltage minus a critical voltage of the control transistor. A pixel driving device as described in claim 6, wherein a voltage level of the scanning signal presents a continuous linear change in the light-emitting phase and is coupled to the fourth node, thereby switching the control transistor from off to on, so that the third node is charged to the fourth reference voltage via the fifth node, wherein the twelfth transistor and the fourteenth transistor are turned on according to the light-emitting control signal, and the thirteenth transistor is turned off according to one of the control signals, so that the third node is charged to the sixth reference voltage via the fifth node and the sixth node, thereby turning off the second driving transistor.

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