TWI881612B - Adaptive multi-area frame rate system and adaptive multi-area frame rate display method - Google Patents

Abstract

An adaptive multi-area frame rate display system and the method employed. The method includes: dividing a display panel into a plurality of display areas and setting a plurality of compensation parameter sets corresponding to a plurality of frame rate; receiving the display stream data; controlling the display areas of the display panel to display images corresponding to the display stream data; performing multi-area frame rate calculation operations to obtain frame rate of each of the display areas; and, for each display area, applying the compensation parameter set to which the frame rate of each display area corresponds, so as to compensate subsequent images displayed in each display area.

Description

Adaptive multi-zone frame update frequency display system and adaptive multi-zone frame update frequency display method

The present invention relates to a display system, and in particular to an adaptive multi-zone frame update frequency display system and an adaptive multi-zone frame update frequency display method.

With the advancement of display technology, more and more displays can support higher picture refresh rates to support higher frame rates, making the display smoother and improving the user's visual experience. However, with the increase in display frame rates, the power consumption of the display has also increased significantly.

The present invention provides an adaptive multi-region frame update frequency display system. The system includes: a display panel, which is divided into a plurality of display regions; an application processor, which provides a display stream data, wherein the display stream data includes a plurality of partial region display stream data corresponding to the plurality of display regions; and a display driver chip, which couples the display panel and the application processor, receives the display stream data and calculates to obtain the respective frame update frequencies of the plurality of display regions, wherein the display driver chip further selects a plurality of compensation parameter sets corresponding to the plurality of display regions according to the respective frame update frequencies of the plurality of display regions, so as to compensate the plurality of partial region display stream data corresponding to the plurality of display regions.

In one embodiment of the present invention, the display driver chip sets the position, size and total number of the multiple display areas according to at least one of the multiple specifications corresponding to the display panel. The multiple specifications include: the total number of multiple data lines of the display panel; and the total number of multiple scan lines of the display panel.

In one embodiment of the present invention, in the operation of calculating the frame update frequency of each of the multiple display areas, the display driver chip calculates the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle.

In one embodiment of the present invention, the display driver chip sets multiple area count registers corresponding to the multiple display areas according to the divided display areas. In the operation of calculating the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle: after each display of the latest image frame of the display stream data, the area count register of each display area counts the total number of times each display area is updated in the past preset statistical cycle as the area update number, wherein the display driver chip calculates the frame update frequency of each display area according to the area update number of each display area and the preset statistical cycle.

In one embodiment of the present invention, the display driver chip calculates the frame update frequency (MAFR(i)) of the i-th display area according to the following formula:

Wherein Ci is the area update times of _{the i-th display area; Pprset is the preset statistical period; FURmax} is _the maximum _frame update frequency of the display panel.

In one embodiment of the present invention, the display driver chip sets a plurality of frame count registers respectively corresponding to the plurality of display areas according to the divided plurality of display areas, wherein each frame count register has a plurality of bits, the total number of the plurality of bits corresponds to the length of the preset statistical cycle, and the plurality of bit values recorded by the plurality of bits respectively indicate the update status of the plurality of image frames in the past preset statistical cycle, wherein whenever the image of a display area is updated in the latest image frame, the frame count register corresponding to the display area is discarded. The bit value corresponding to the earliest image frame among the plurality of bit values is shifted so that the bit corresponding to the latest image frame is empty, and the first value is recorded to the bit corresponding to the latest image frame, wherein whenever the image of a display area is not updated in the latest image frame, the frame count register corresponding to the display area discards the bit value corresponding to the earliest image frame among the plurality of bit values, shifts the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and the second value is recorded to the bit corresponding to the latest image frame.

In one embodiment of the present invention, in the operation of counting the total number of times each display area is updated in the past preset statistical cycle, the area count register of each display area accumulates multiple bit values recorded by the corresponding frame count register to obtain a sum, wherein the area count register of each display area records the sum, wherein the sum is the total number of times each display area is updated in the past preset statistical cycle.

In one embodiment of the present invention, the display driver chip sets the length of the preset statistical cycle according to the maximum frame update frequency of the display panel, wherein the maximum frame update frequency is a multiple of the preset statistical cycle.

In one embodiment of the present invention, the display driver chip issues a forced update instruction every preset statistical cycle to control the display panel to update the images of all display areas every preset statistical cycle.

In one embodiment of the present invention, the display driver chip further calculates the frame update frequency of each of the multiple display areas at one of the following times: after the image of each image frame of the display stream data is displayed; when the display driver chip receives a command from the application processor to perform local scanning or power saving mode; when the display driver chip determines that the display panel is displaying an image and no touch operation is detected within a predetermined time; and when the display driver chip receives a local scanning instruction from the application processor and no touch operation is detected within another predetermined time.

Another embodiment of the present invention provides an adaptive multi-zone frame update frequency display method for an adaptive multi-zone frame update frequency display system. The system includes a display panel, an application processor, and a display driver chip. The method includes: dividing the display panel into multiple display areas via the display driver chip; providing a display stream data via the application processor, wherein the display stream data includes multiple regional display stream data corresponding to the multiple display areas; receiving the display stream data from the application processor via the display driver chip and calculating the frame update frequency of each of the multiple display areas; and selecting multiple compensation parameter sets corresponding to the multiple display areas via the display driver chip according to the frame update frequency of each of the multiple display areas to compensate the multiple regional display stream data corresponding to the multiple display areas.

In one embodiment of the present invention, the method further includes: setting the position, size and total number of the multiple display areas according to at least one of the multiple specifications corresponding to the display panel. The multiple specifications include: the total number of multiple data lines of the display panel; and the total number of multiple scan lines of the display panel.

In one embodiment of the present invention, the step of calculating the frame update frequency of each of the multiple display areas includes: calculating the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle.

In an embodiment of the present invention, the method further comprises: setting a plurality of area counting registers respectively corresponding to the plurality of display areas according to the divided plurality of display areas via the display driver chip. The step of calculating the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle includes: after displaying the latest image frame of the display stream data each time, the total number of times each display area is updated in the past preset statistical cycle is counted as the regional update number through the regional count register of each display area; and the frame update frequency of each display area is calculated according to the regional update number of each display area and the preset statistical cycle through the display driver chip.

In one embodiment of the present invention, the method further comprises: calculating the frame update frequency (MAFR(i)) of the i-th display area via the display driver chip according to the following formula:

Wherein Ci is the area update times of _{the i-th display area; Pprset is the preset statistical period; FURmax} is _the maximum _frame update frequency of the display panel.

In one embodiment of the present invention, the method further comprises: setting, via the display driver chip, a plurality of frame count registers respectively corresponding to the plurality of display areas according to the divided plurality of display areas, wherein each frame count register has a plurality of bits, the total number of the plurality of bits corresponds to the length of the preset statistical cycle, and the plurality of bit values recorded by the plurality of bits respectively indicate the update status of the plurality of image frames in the past preset statistical cycle; whenever the image of a display area is updated in the latest image frame, the frame count register corresponding to the display area is set to update the image frame of the plurality of image frames in the past preset statistical cycle; , discard the bit value corresponding to the earliest image frame among the plurality of bit values, shift the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and record the first value to the bit corresponding to the latest image frame; and whenever the image of a display area is not updated in the latest image frame, discard the bit value corresponding to the earliest image frame among the plurality of bit values through the frame count register corresponding to the display area, shift the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and record the second value to the bit corresponding to the latest image frame.

In one embodiment of the present invention, the step of counting the total number of times each display area is updated in the past preset statistical cycle includes: accumulating multiple bit values recorded in the corresponding frame count register through the regional count register of each display area to obtain a sum; and recording the sum through the regional count register of each display area, wherein the sum is the total number of times each display area is updated in the past preset statistical cycle.

In one embodiment of the present invention, the method further includes: setting the length of the preset statistical cycle according to the maximum frame update frequency of the display panel via the display driver chip, wherein the maximum frame update frequency is a multiple of the preset statistical cycle.

In one embodiment of the present invention, the method further includes: issuing a forced update instruction via the display driver chip every preset statistical cycle to control the display panel to update the images of all display areas every preset statistical cycle.

In one embodiment of the present invention, the method further includes: calculating the frame update frequency of each of the plurality of display areas via the display driver chip at one of the following times: after the image of each image frame of the display stream data is displayed; when the display driver chip receives a command from the application processor to perform a local scan or power saving mode; when the display driver chip determines that the display panel is displaying an image and no touch operation is detected within a predetermined time; and when the display driver chip receives a local scan instruction from the application processor and no touch operation is detected within another predetermined time.

Based on the above, the adaptive multi-zone frame update frequency display system and the adaptive multi-zone frame update frequency display method provided by the present invention can adaptively obtain the frame update frequency of each display area and apply the corresponding optical compensation parameters. In this system, even if the application processor or the host processor does not specify the specific frame update frequency of each display area, the display driver chip can still adaptively calculate the current frame update frequency of each display area and apply the corresponding compensation parameter set, thereby omitting the need for external control. Therefore, the need for the application processor (AP) to issue instructions to instruct each display area to refresh is eliminated, making the entire display process more autonomous and efficient, simplifying the operation process, reducing resource consumption and improving display efficiency, and effectively overcoming the problems existing in traditional methods, that is, while saving energy, a large amount of resources must be invested in compensation and adjustment.

10: Adaptive multi-zone frame update frequency display system

100: Display driver chip

200: Application processor

300: Display panel

110: Control circuit unit

120: Frame count register

121, 125, 1210, 121-1~121-6: frame count register

130, 130 _A1 , 130 _A2 , 130 _A3 : Regional count registers

140: Compensation circuit unit

150: Buffer memory

160: Timing driver

170: Drive circuit unit

180: Data transmission interface

S210, S220, S230, S240: Process steps of adaptive multi-zone frame update frequency display method

SD: Display streaming data

SD(1)~SD(N): Area display stream data

CG(1)~CG(N): Compensation parameter set

B310, B320, B330(1)~B330(N), B340, B340(1)~B340, B350(1)~B350(N): Operation of the adaptive multi-zone frame update frequency display method

IMG1, RI: Data (First Image, First Risk Information)

A ₁₁ ~A _MN , A1~A14: Display area

C1, C3, C6, C _A1 , C _A2 , C _A3 : Compensation parameter set

SCR: Screen display

IMG1, IMG2, IMG3: Partial screen image

MAFR _A1 , MAFR _A2 , MAFR _A2 : Frame update frequency register/calculated frame update frequency

FIG1A is a block diagram of an adaptive multi-zone frame update frequency display system according to an embodiment of the present invention.

FIG. 1B is a block diagram of a display driver chip according to an embodiment of the present invention.

FIG2 is a flowchart of an operation of an adaptive multi-zone frame update frequency display method according to an embodiment of the present invention.

FIG3A is a schematic diagram of device interaction of an adaptive multi-zone frame update frequency display system according to an embodiment of the present invention.

FIG3B is a schematic diagram of the operation of an adaptive multi-zone frame update frequency display method according to an embodiment of the present invention.

FIG4 is a schematic diagram of multiple display areas of a display panel according to an embodiment of the present invention.

FIG5 is a schematic diagram of a frame count register according to an embodiment of the present invention.

FIG6 is a schematic diagram of a frame count register recording screen updates according to an embodiment of the present invention.

FIG. 7 is a schematic diagram showing how to calculate the frame update frequency based on multiple bit values of a frame count register according to an embodiment of the present invention.

FIG8 is a schematic diagram of applying multiple sets of compensation parameter sets corresponding to multi-zone frame update frequencies to multiple screen portions according to an embodiment of the present invention.

FIG9A is a schematic diagram of a screen update instruction sequence according to an embodiment of the present invention.

FIG9B is a schematic diagram of another screen update instruction sequence according to another embodiment of the present invention.

FIG. 10 is a schematic diagram showing the number of block updates after implementing another screen update instruction sequence according to another embodiment of the present invention.

FIG. 11 is a timing diagram of multiple display areas using a multi-area frame update frequency according to an embodiment of the present invention.

In the current screen update technology, the method of updating different areas of the display at different frequencies is gradually becoming the mainstream. One of the purposes of this approach is to save energy. For example, when the main area of the screen may be updated at a frequency of 120Hz due to displaying video, the information at the top and bottom of the screen does not need to be updated at a high frequency like dynamic images. Therefore, the screen update speed of some areas can be reduced, such as 10Hz and 1Hz, to achieve the purpose of saving power. It is worth noting that the update instructions for these areas are issued by the application processor, which means that specific areas will only be updated when necessary. Considering the maximization of energy efficiency, only when the screen of a specific area on the panel needs to be updated, the area will be driven, thereby avoiding unnecessary energy consumption.

In addition, taking a handheld device as an example, since the application processor needs to instruct the frame rate of different areas on the display panel, the panel driver circuit can reduce the frame rate of the panel to achieve the above purpose. However, if the application processor does not provide the panel driver circuit with information about the frame rate, the panel driver circuit may not be able to achieve the above effect.

Furthermore, for specific display technologies, such as OLED panels, different frame refresh rates will lead to changes in optical compensation. For example, for frame refresh rates of 120Hz and 1Hz, the required gamma values may be different. In other words, when the multi-zone driven display function is adopted, it is also necessary to adjust to the appropriate optical compensation accordingly.

However, although this technology has advantages in terms of energy, it also introduces some challenges. Especially in common usage scenarios of mobile phones, due to the existence of various possible combinations of regions and frame update frequencies, the application processor needs to bear additional computing burdens. It not only needs to determine the frame update frequency of each region in real time, but also needs to dynamically adjust the compensation strategy for each region, which undoubtedly consumes a lot of processing resources and time.

That is to say, although the traditional area-driven operation has improved energy efficiency, it increases the computational burden of the application processor, especially when the frame update frequency of each area and the corresponding compensation strategy need to be determined in real time. In addition, OLED panels require different optical compensation at different frame update frequencies, which increases the complexity of the system. Therefore, how to reduce the computational burden of the application processor and ensure that optical compensation is effectively applied to display areas with different frame update frequencies while ensuring energy efficiency has become one of the problems solved by this disclosure.

Please refer to FIG. 1A . In this embodiment, the adaptive multi-zone frame update frequency display system 10 includes a display driver chip (Display Driver Integrated Circuit, DDIC) 100, an application processor (Application Processor, AP) 200, and a display panel 300. The display driver chip 100 is electrically connected to the application processor 200 and the display panel 300. The display panel 300 is used to display the screen. The application processor 200 is used to provide display stream data. The display stream data includes multiple image frame data arranged according to the timing of each frame. In one embodiment, the application processor 200 can also be replaced by a microcontroller (MCU) or a general-purpose processor.

Referring to FIG. 1B , in this embodiment, the display driver chip 100 includes a control circuit unit 110, a frame count register 120, a region count register 130, a compensation circuit unit 140, a buffer memory 150, a timing driver 160, a driver circuit unit 170, and a data transmission interface 180. The control circuit unit 110 is electrically connected to other components.

The control circuit unit 110 is used to control the overall operation of the display driver chip 100. The frame count register 120 is used to record the update status of each display area in each frame. The region count register 130 is used to record the number of image frame updates of each display area within a preset statistical cycle. Through the frame count register 120 and the region count register 130, the control circuit unit 110 can estimate the frame update frequency of different regions on the display panel 300 without being informed by the application processor 200. In other words, the control circuit unit 110 does not need information from the application processor 200, but only estimates the relative frame update frequency of different areas on the display panel 300 based on the display stream data transmitted by the application processor 200 via the MIPI interface. For example, when executing a specific application, the image information received by the display panel 300 from the application processor 200 is divided into two parts, the upper part is the streaming image, and its frame update frequency is 120Hz, and the lower part is the user message, and its frame update frequency is 5Hz.

Since the application processor 200 does not transmit the frame update frequency information to the display driver chip 100, the control circuit unit 110 can only know that the upper half of the display panel 300 is continuously updated through the frame count register 120 and the region count register 130, and the image in the lower half area is not continuously updated. When the control circuit unit 110 estimates the frame update frequency of the lower half area of the display panel 300, the estimated frame update frequency may be 10Hz. Although this may be different from the 5Hz frame update frequency in the data transmitted by the application processor 200, it is enough to significantly reduce the power consumption. Although the control circuit unit 110 cannot accurately estimate the frame update frequency of the display panel 300 at the beginning, but as time goes by, the frame update frequency of the display stream data can be estimated more accurately.

The compensation circuit unit 140 is used to store various compensation parameter sets, each of which includes different types of compensation parameters, such as Gamma, deMURA, source voltage compensation, gate voltage compensation, chroma, brightness, contrast, initialization voltage Vinit, gate timing compensation, and source timing compensation. Each compensation parameter set is set to correspond to one or more frame update frequencies. In one embodiment, the compensation circuit unit 140 directly records a mapping table so that the control circuit unit 110 can query the compensation parameter set corresponding to the specified frame update frequency according to the specified frame update frequency. In short, the compensation parameter set can correspond to a frame update frequency or a frame update frequency range. When the control circuit unit 110 determines that the frame update frequencies of different display areas on the display are different, different compensation parameter settings will be used.

The buffer memory 150 is used to temporarily store data, such as part of the received image stream data, the current frame update frequency of each display area, the compensation parameter set of each display area, etc. The buffer memory 150 is, for example, a dynamic random access memory (DRAM), a static random access memory (SRAM), etc.

The timing driver 160 is used to transmit the control signal from the control circuit unit 110 to the driving circuit unit 170 to control the driving circuit unit 170 for transmitting display data to multiple pixels of the display panel 300, and then transmit the display data to the corresponding data line and drive the corresponding scanning line according to the timing. The data transmission interface 180 is used to electrically connect with the application processor 200 to establish a data connection to transmit data.

The control circuit unit 110, the frame count register 120, the regional count register 130, and the compensation circuit unit 140 may be hardware with logic and computing capabilities. For example, a programmable microprocessor, an application specific integrated circuit (ASIC), a programmable logic device (PLD), or other similar devices.

In another embodiment, the frame count register 120, the regional count register 130, and the compensation circuit unit 140 can all be implemented as software or firmware code modules to be executed by the controlled circuit unit 110 to achieve corresponding functions.

The display panel 300 may include, for example, an organic light emitting diode (OLED) display, or other types of displays, such as a liquid crystal display (LCD), a light emitting diode display (LED), or a field effect emission display (FED). The display panel 300 may also include a resistive, capacitive, or other type of touch sensing device for forming a portion of the display panel 200. In this embodiment, the display panel 300 includes a plurality of scan lines and a plurality of data lines, and each intersection of the scan line and the data line corresponds to one or more pixels.

Please refer to FIG. 2 . In step S210 , the display driver chip 100 divides the display panel 300 into a plurality of display areas. In addition, in one embodiment, the display driver chip 100 further sets a plurality of compensation parameter sets corresponding to a plurality of frame update frequencies.

Specifically, the display driver chip 100 sets the position, size and total number of the multiple display areas according to at least one of the multiple specifications corresponding to the display panel 300. The multiple specifications include: the total number of multiple data lines of the display panel 300; and the total number of multiple scan lines of the display panel 300. For example, referring to FIG. 4 , the display driver chip 100 can divide the display panel 300 into MxN display areas A ₁₁ ~A _MN . N can be 1, 2 or other positive integers; M is a positive integer. For example, each display area can be set to include a maximum of m scan lines and a maximum of n data lines according to the capabilities supported by the display driver or the underlying hardware. That is, in the most extreme example, each display area has only one scan line and one data line. In another embodiment, the display driver chip 100 regards the display panel 300 as a display area (having all scan lines and data lines). In addition, the size of each area can be the same or different from each other, and the present invention is not limited thereto.

Next, in step S220, the application processor 200 is used to provide a display stream data, wherein the display stream data includes a plurality of regional display stream data corresponding to the plurality of display regions.

Next, in step S220, the display driver chip 100 receives display stream data from the application processor 200 and calculates the frame update frequency of each of the multiple display areas.

In this embodiment, the display driver chip 100 controls the multiple display areas of the display panel 300 to display images corresponding to the display stream data. It should be noted that in one embodiment, when the display system 10 performs the first display operation (e.g., the first image frame) after power-on, the display driver chip 100 can use a preset compensation parameter set to display the screen of all display areas. Then, as the display operation time passes, each display area is dynamically and adaptively adjusted to a suitable compensation parameter set.

Specifically, in the operation of calculating the frame update frequencies of the multiple display areas, the display driver chip 100 calculates the frame update frequencies of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle. In this embodiment, in the operation of calculating the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle, after each display of the latest image frame of the display stream data, the region count register 130 of each display area counts the total number of times each display area is updated in the past preset statistical cycle as the region update number, wherein the display driver chip 100 calculates the frame update frequency of each display area according to the region update number of each display area and the preset statistical cycle.

In this embodiment, the display driver chip 100 calculates the frame update frequency (MAFR(i)) of the i-th display area according to the following formula.

Wherein Ci is _the region update number of the ith display region ; Pprset is the preset statistical period; FURmax is _the maximum frame rate of the display panel. The actual value _of the maximum frame rate (also called the maximum refresh rate) is determined according to the specifications of each display panel 300.

In this embodiment, the display driver chip 100 sets the length of the preset statistical cycle according to the maximum frame update frequency of the display panel 300, wherein the maximum frame update frequency is a multiple of the preset statistical cycle. For example, when the maximum frame update frequency is 120 Hz, the preset statistical cycle P _prset can be set to 6, 12, 24, 120, etc. frames. In this embodiment, the display driver chip 100 uses the frame count register 120 and the region count register 130 to record the image update status of the multiple display regions in the past preset statistical cycle to obtain the region update times Ci of _each display region.

In more detail, the display driver chip 100 sets a plurality of frame count registers 120 corresponding to the plurality of display areas respectively according to the divided plurality of display areas. Each frame count register 120 has a plurality of bits, the total number of the plurality of bits corresponds to the length of the preset statistical cycle (for example, corresponding to the preset statistical cycle with a length of 6 frames, the frame count register 120 has a total of 6 bits), and the plurality of bit values recorded by the plurality of bits respectively indicate the update status of the plurality of image frames in the past preset statistical cycle.

For example, referring to FIG. 5 , assuming that the current image is the Tth frame, the frame count register 120 corresponding to one display area has a total of 6 bits, wherein the total number of bits corresponds to the length of a preset statistical cycle (eg, 6 frames). The first bit is used to record the update status of the T-1 frame (the most recent image frame in the past) (e.g., the image of the display area is updated at the T-1 frame, recorded as the first value "1"); the second bit is used to record the update status of the T-2 frame (e.g., the image of the display area is not updated at the T-2 frame, recorded as the second value "0"); and so on, the third to sixth bits respectively record the update status of the T-3 frame to the T-6 frame of the display area (i.e., "0", "0", "0", "0"). The received display stream data will indicate which data line and scan line the display driver chip 100 should write or update in each frame. In this way, the display driver chip can also determine which scan lines will be updated, and further determine whether the display area to which the updated scan lines belong is updated. In one embodiment, if a display area contains multiple scan lines, and any of the scan lines is updated in the Tth frame, then the display driver chip 100 determines that the image of this display area is updated once in the Tth frame. In another embodiment, the display driver chip 100 can set a preset threshold value. When multiple scan lines in a display area exceeding the preset threshold value are updated in the Tth frame, then the display driver chip 100 determines that the image of this display area is updated once in the Tth frame.

In addition, whenever the image of a display area is updated in the latest image frame, the frame count register 120 corresponding to the display area discards the bit value corresponding to the earliest image frame among the multiple bit values, shifts the remaining multiple bit values so that the bit corresponding to the latest image frame is empty, and records the first value to the bit corresponding to the latest image frame. Whenever the image of a display area is not updated in the latest image frame, the frame count register 120 corresponding to the display area discards the bit value corresponding to the earliest image frame among the multiple bit values, shifts the remaining multiple bit values so that the bit corresponding to the latest image frame is empty, and records the second value to the bit corresponding to the latest image frame.

For example, please refer to FIG. 6. For display area A1, it is assumed that according to the received display stream data, the image of display area A1 is not updated from frame T to frame T+2, and the image of display area A1 is updated from frame T+3 to frame T+5. The corresponding generated screen update instruction sequence indicates that the scan line of display area A1 is not driven (e.g., "0") from frame T to frame T+2, and the scan line of display area A1 is driven (e.g., "1") from frame T+3 to frame T+5. In addition, it is further assumed that the bit value recorded in the frame count register 121 corresponding to display area A1 is "100000".

In this example, as shown in FIG6 , when the image stream data of the Tth frame is displayed, the display area A1 does not perform image update, the frame count register 121 discards the bit value of the last bit, shifts the remaining bit values, and correspondingly records the second value "0" to the first bit (gray background part), and becomes the frame count register 121-1, and the bit value recorded therein is "010000". Similarly, when displaying the image stream data of the T+1 frame, the display area A1 does not perform image update, the frame count register 121-1 shifts the original bit value, and correspondingly records the second value "0" to the first bit, and becomes the frame count register 121-2, the bit value recorded is "001000"; when displaying the image stream data of the T+2 frame, the display area A1 does not perform image update, the frame count register 121-2 shifts the original bit value, and correspondingly records the second value "0" to the first bit, and becomes the frame count register 121-3, the bit value recorded is "000100".

When displaying the image stream data of the T+3 frame, the display area A1 is updated, the frame count register 121-3 shifts the original bit value, and correspondingly records the first value "1" to the first bit, which becomes the frame count register 121-4, and the recorded bit value is "100010"; when displaying the image stream data of the T+4 frame, the display area A1 is updated, the frame count register 121-4 shifts the original bit value, The first value "1" is recorded to the first bit correspondingly, and becomes the frame count register 121-5, and the bit value recorded is "110001"; when displaying the image stream data of the T+5th frame, the display area A1 performs image update, the frame count register 121-5 shifts the original bit value, and the first value "1" is recorded to the first bit correspondingly, and becomes the frame count register 121-6, and the bit value recorded is "111000".

In this way, according to the above mechanism, the frame count register 120 can effectively record the image update status of the corresponding display area in the past preset statistical cycle.

That is, by using this binary registration system, the update history of each display area within a specified frame time range (preset statistical cycle) can be quickly and effectively determined. Then, the area count register 130 of each display area can count the total number of times each display area has been updated in the past preset statistical cycle as the area update number according to the multiple bit values of the corresponding frame count register.

In more detail, the region count register 130 of each display region accumulates the multiple bit values recorded by the corresponding frame count register 120 to obtain a sum. The region count register 130 of each display region records the sum, wherein the sum is the total number of times each display region is updated in the past preset statistical cycle (i.e., the number of regional updates of the corresponding display region). The number of bits of the region count register 130 depends on the length of the preset statistical cycle. For example, if the length of the preset statistical cycle is 12 frames, the region count register 130 can be set to a 4-bit value.

For example, referring to FIG. 7 , it is assumed that the maximum frame update frequency of the display panel 300 is 120 Hz, and the default statistical cycle is 6 frames. In addition, it is further assumed that the multiple bit values recorded by the frame count register 121 corresponding to the display area A1 are "100000"; the multiple bit values recorded by the frame count register 125 corresponding to the display area A5 are "111111"; and the multiple bit values recorded by the frame count register 1210 corresponding to the display area A10 are "101010".

In this example, the area count register 130 corresponding to the display area A1 will perform cumulative operations on each bit value of the frame count register 121 with a multiple bit value of "100000", that is, 1+0+0+0+0+0, to obtain the final sum "1", which is the area update number of the display area A1 and can be used to calculate the frame update frequency of the display area A1. The calculated result is 20Hz (1/6*120=20).

By analogy, the regional counting register 130 corresponding to the display area A5 will perform cumulative operations on each bit value of the frame counting register 125 with a multiple bit value of "111111" to obtain the final sum "6", which can be used to calculate the frame update frequency of the display area A5, and the calculated result is 120Hz: the regional counting register 130 corresponding to the display area A10 will perform cumulative operations on each bit value of the frame counting register 1210 with a multiple bit value of "101010" to obtain the final sum "3", which can be used to calculate the frame update frequency of the display area A10, and the calculated result is 60Hz.

Please return to FIG. 2 . After obtaining the frame update frequency of each display area, in step S240 , the display driver chip 100 selects a plurality of compensation parameter sets corresponding to the plurality of display areas according to the frame update frequencies of the plurality of display areas, so as to compensate the plurality of regional display stream data corresponding to the plurality of display areas. That is, the display driver chip 100 applies the compensation parameter set corresponding to the frame update frequency of each display area to each display area, so as to adjust/compensate the regional display stream data corresponding to each display area, and then compensate the image subsequently displayed by each display area. In this way, the display driver chip 100 can effectively determine the frame update frequency of each display area through the above process steps when the outside world (such as the application processor 200) does not provide the frame update frequency of each display area, and make corresponding compensation for the subsequent display screen.

For example, please refer to FIG. 8 . In this example, it is assumed that the screen image SCR displayed by the display system displays images IMG1 to IMG3 corresponding to the first to third parts respectively. Among them, image IMG1 displays the interface or function bar of the video application; image IMG2 displays the video screen played by the video application; image IMG3 is the chat room message area corresponding to the video screen displayed by the video application. In addition, it is further assumed that the maximum frame refresh rate of the display panel is 120 Hz; the resolution of the display panel is 1080x2376, that is, it has 1080 data lines and 2376 scan lines. In addition, it is assumed that the default statistical cycle is 6, and the screen image SCR is displayed through the 14 divided display areas A1~A14, where each display area has a maximum of 170 scan lines (each with 1080 data lines).

As shown in Figure 8, the least frequently updated image IMG1 corresponds to display areas A1 and A2; the most frequently updated image IMG2 corresponds to display areas A3 to A9; and image IMG3 corresponds to display areas A10 to A14. In addition, it is assumed that the number of area updates counted for display areas A1 and A2 of image IMG1 is 1; the number of area updates counted for display areas A3 to A9 of image IMG2 is 6; and the number of area updates counted for display areas A10 to A14 of image IMG3 is 3.

According to the above example, the display driver chip 100 can correspondingly calculate that the frame update frequency of the display areas A1 and A2 of the image IMG1 is 20 Hz; the frame update frequency of the display areas A3 to A9 of the image IMG2 is 120 Hz; and the frame update frequency of the display areas A10 to A14 of the image IMG3 is 60 Hz. Next, the display driver chip 100 can set the compensation parameter set of the display areas A1 and A2 of the image IMG1 to C1 corresponding to the frame update frequency of 20Hz; set the compensation parameter set of the display areas A3~A9 of the image IMG2 to C6 corresponding to the frame update frequency of 120Hz; set the compensation parameter set of the display areas A10~A14 of the image IMG3 to C3 corresponding to the frame update frequency of 60Hz.

3A and 3B are used to illustrate the process flow of the adaptive multi-zone frame update frequency system and the adaptive multi-zone frame update frequency display method of the present invention from another perspective. As shown in FIG3A and FIG3B , initially, an image source, such as an application processor 200 , transmits display stream data SD to a display driver chip 100 . The control circuit (not shown) in the display driver chip 100 generates a plurality of regional display stream data SD(1), SD(2), ..., SD(N) corresponding to a plurality of display areas (e.g., area 1 to area N of the display panel 300) according to the display stream data SD (e.g., the display stream data SD(1), SD(2), ..., SD(N) can be generated by dividing the display stream data SD according to the plurality of display areas), which are provided to the corresponding plurality of display areas. In this embodiment, the division of the display area and the corresponding division of the display stream data can be completed by the control circuit not shown in FIG. 3A. In another embodiment, the control circuit can be a timing driver 160.

In addition, through the regional counting algorithm, the frame count register 120 of the display driver chip 100 continuously records the frame update times (B310) of each display region, so that the regional count register 130 can count the regional update times (B320) of each display region. Afterwards, the display driver chip 100 will calculate the frame update frequency (B330(1)~B330(N)) of each display region according to the regional update times of each display region through the calculation method described in the embodiment of FIG. 7. Then, the compensation circuit unit 140 applies the corresponding different compensation parameter sets (B340) according to the different frame update frequencies of each region. For example, the compensation parameter set CG(1)~CG(N) corresponding to area 1~N is applied to the display stream data SD(1)~SD(N) corresponding to area 1~N (B340(1)~B340(N)) to adjust the display stream data SD(1)~SD(N) of each display area. Then, the display panel 300 receives the adjusted display stream data SD(1)~SD(N) to display the adjusted display stream data in each display area (B350(1)~B350(N)), thereby compensating the image displayed in area 1~area N.

Please refer to FIG. 9A . In one embodiment, the display driver chip 100 controls the update of each display area according to the received display stream data. For example, as shown in FIG. 9A , the display driver chip 100 inputs display data to the data line in the display area A1 in the 3rd, 7th, and 12th frames according to the display stream data. In addition, the display driver chip 100 indicates (“1”) to update the scan line in the display area A1 in the 3rd, 7th, and 12th frames according to the screen update instruction sequence generated by the display stream data.

In another embodiment, in order to maintain the minimum display quality, the display driver chip 100 implements a forced update every fixed time interval (e.g., a preset statistical cycle) to maintain basic image quality. For example, one or more frames are designated as the main refresh frames within a specific interval, that is, a mechanism is used to ensure the minimum frame update frequency. For example, it is stipulated that the first frame of every 6 frames must force refresh all scan lines in all display areas. The subsequent 5 frames will refresh the corresponding scan lines of different display areas according to the received display stream data. The display driver chip 100 can use an oscillator and a main frequency to handle timing operations.

For example, please refer to FIG. 9B, which is similar to the example of FIG. 9A, except that in the example of FIG. 9B, each default statistical cycle will be forced to refresh once (using a forced update command). For example, in the 1st frame to the 6th frame of the first default statistical cycle, the 1st frame is selected to execute the forced update command (gray background) to update all display areas (even if no data is input to the display area A1 in the 1st frame). Similarly, in the 7th frame to the 12th frame of the first default statistical cycle, the 7th frame (the first frame) is selected to execute the forced update command (gray background) to update all display areas. It should be noted that the present invention is not limited to the number of forced update commands each default statistical cycle has and the timing of execution.

The existence of the forced update mechanism will affect the number of area updates for each display area. Please refer to Figure 10. By setting the main frequency of the display driver chip 100, the time of the display system can be divided into frames, and at least one forced update is implemented per fixed cycle. In other words, a fixed cycle will have two parts, one with a forced update frame and one with an adaptive multi-area frame rate (MAFR). That is, the MAFR frame will be between the forced update frames.

Continuing with the example of FIG. 9B , assume that the update status of the 1st to 12th frames is “1, 0, 1, 0, 0, 0, 1, 1, 1, 1, 1”. In addition, assume that at the 1st frame, the number of regional updates is 6, and the default statistical cycle is 6 frames. In the above case, the number of regional updates counted after the 2nd frame is “5, 5, 4, 3, 2, 2, 3, 3, 4, 5, 6”. For example, at the 6th frame, the number of regional updates corresponding to the display area A1 is the sum of the update status of the 1st to 6th frames, that is, 1+0+1+0+0+0=2. At the 7th frame, due to the forced update command, the update status is "1", and the corresponding area update times are the sum of the update statuses of the 2nd to 7th frames, "2", and so on.

In this embodiment, when the multi-zone frame frequency compensation is initially run, the regional update times of all display regions are reset to the maximum value corresponding to the preset statistical cycle. For example, the preset statistical cycle is 6 frames, and the regional update times are reset to 6. In this way, when the multi-zone frame frequency compensation is initially run, the display driver chip 100 can use the compensation parameter set with the highest frame update frequency for initial compensation.

Please refer to Figure 11. It is assumed that the main frequency of the display driver chip is one cycle of 6 frames, the default statistical cycle is 6 frames, and the maximum frame update frequency is 60Hz. In addition, it is assumed that the display panel is divided into three display areas A1~A3, and the display driver chip 100 is set to correspond to a frame update frequency of 60Hz~40Hz, and the compensation parameter set is C3; the corresponding frame update frequency is 30Hz~20Hz, and the compensation parameter set is C2; the corresponding frame update frequency is 10Hz, and the compensation parameter set is C1.

In this embodiment, according to the received display stream data, the 1st frame to the 7th frame have image data (such as image data in MIPI protocol format) that need to be transmitted to the display area A2 for screen display/update.

As shown in FIG. 11 , in the initial first frame, the area count registers 130 _A1 ~130 _A3 corresponding to the display areas A1 ~A3 are all reset to 6; the frame update frequency (MAFR _A1 ~MAFR _A3 ) is calculated to be 60 Hz; and the compensation parameter set is C3. Then, in the 2nd to 6th frames, since only the display area A2 needs to display new image data, the images displayed by the display areas A1 and A3 do not need to be updated, and the area update times recorded in the area count registers 130 _A1 and 130 _A3 corresponding to the display areas A1 and A3 are reduced to 5~1; the frame update frequency (MAFR _A1 , MAFR _A3 ) is calculated to be 50Hz~10Hz; and the compensation parameter set is C3~C1.

Then, in the next cycle, the main frequency returns to 1, that is, entering the 7th frame, only the display area A2 needs to display new image data, and the images displayed by the display areas A1 and A3 do not need to be updated, but all display areas A1~A3 will be issued a forced update command. In this case, the area update times recorded by the area count registers 130 _A1 and 130 _A3 corresponding to the display areas A1 and A3 respectively are 1; the frame update frequency (MAFR _A1 , MAFR _A3 ) are both calculated to be 10Hz; and the compensation parameter set is C1.

It should be noted that in this embodiment, the display driver chip 100 is set to issue a forced update command to all display areas in the initial several frames (e.g., 3) to update all display areas at once, but the present invention is not limited to this. For example, in another embodiment, only the initial first frame will issue a forced update command to all display areas to update all display areas at once.

It should be noted that in the 4th to 6th frames, since only the display area A2 needs to be updated (because there is new display data), the power consumption for updating the display areas A1 and A3 can be saved, achieving the energy-saving effect of multi-area frame update frequency.

It is worth mentioning that, in addition to the time point after each image frame of the display stream data is displayed, the display driver chip 100 can perform the multi-region frame update frequency calculation operation to obtain the frame update frequency of each display area, the display driver chip 100 can perform the multi-region frame update frequency calculation operation at other time points. These other time points include: when the display driver chip receives a command from the application processor to perform local scanning or power saving mode; when the display driver chip determines that the display panel is displaying an image and no touch operation is detected within a predetermined time; and when the display driver chip receives a local scan instruction from the application processor and no touch operation is detected within another predetermined time.

After obtaining the calculated frame update frequency, during the next frame period or after N frame intervals, the display driver chip 100 will adjust the voltage level of the corresponding scan signal or gate signal according to the frame update frequency determined for each display area or scan line. This precise control enables the display driver chip 100 to achieve the goal of controlling whether the corresponding scan line or the scan line in a specific area should be updated, thereby saving energy consumption by avoiding updating the entire area.

Based on the above, the adaptive multi-zone frame update frequency display system and the adaptive multi-zone frame update frequency display method provided by the present invention can adaptively obtain the frame update frequency of each display area and apply the corresponding optical compensation parameters. In this system, even if the application processor or the host processor does not specify the specific frame update frequency of each display area, the display driver chip can still adaptively calculate the current frame update frequency of each display area and apply the corresponding compensation parameter set, thereby omitting the need for external control. Therefore, the need for the application processor (AP) to issue instructions to instruct each display area to refresh is eliminated, making the entire display process more autonomous and efficient, simplifying the operation process, reducing resource consumption and improving display efficiency, and effectively overcoming the problems existing in traditional methods, that is, while saving energy, a large amount of resources must be invested in compensation and adjustment.

S210, S220, S230, S240: Process steps of adaptive multi-zone frame update frequency display method

Claims (20)

An adaptive multi-region frame update frequency display system includes: a display panel divided into multiple display regions; an application processor providing a display stream data, wherein the display stream data includes multiple regional display stream data corresponding to the multiple display regions; a display driver chip coupling the display panel and the application processor, receiving the display stream data and calculating the respective frame update frequencies of the multiple display regions, wherein the display driver chip further selects multiple compensation parameter sets corresponding to the multiple display regions according to the respective frame update frequencies of the multiple display regions to compensate the multiple regional display stream data corresponding to the multiple display regions. An adaptive multi-zone frame refresh rate display system as described in claim 1, wherein the display driver chip sets the position, size and total number of the multiple display areas according to at least one of the multiple specifications corresponding to the display panel, the multiple specifications including: the total number of multiple data lines of the display panel; and the total number of multiple scan lines of the display panel. The adaptive multi-zone frame update frequency display system as described in claim 1, wherein in the operation of calculating the frame update frequency of each of the multiple display areas, the display driver chip calculates the frame update frequency of each of the multiple display areas according to the image update status of the multiple display areas in the past preset statistical cycle. The adaptive multi-zone frame update frequency display system as described in claim 3, wherein the display driver chip sets a plurality of zone counter registers corresponding to the plurality of display areas according to the divided plurality of display areas, wherein the frame update frequencies of the plurality of display areas are calculated according to the image update status of the plurality of display areas in the past preset statistical cycle. In operation: After each display of the latest image frame of the display stream data, the region count register of each display region counts the total number of times each display region has been updated in the past preset statistical cycle as the region update number, wherein the display driver chip calculates the frame update frequency of each display region according to the region update number of each display region and the preset statistical cycle. The adaptive multi-zone frame update frequency display system as described in claim 4, wherein the display driver chip calculates the frame update frequency (MAFR(i)) of the i-th display region according to the following formula:

Wherein Ci is the area update times of _{the i-th display area; Pprset is the preset statistical period; FURmax} is _the maximum _frame update frequency of the display panel. The adaptive multi-region frame update frequency display system as described in claim 4, wherein the display driver chip sets a plurality of frame count registers corresponding to the plurality of display regions according to the divided plurality of display regions, wherein each frame count register has a plurality of bits, the total number of the plurality of bits corresponds to the length of the preset statistical cycle, and the plurality of bit values recorded by the plurality of bits respectively indicate the update status of a plurality of image frames in the past preset statistical cycle, wherein whenever the image of a display region is updated in the latest image frame, the frame count register corresponding to the display region is updated. The frame count register discards the bit value corresponding to the earliest image frame among the plurality of bit values, shifts the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and records the first value to the bit corresponding to the latest image frame, wherein whenever the image of a display area is not updated in the latest image frame, the frame count register corresponding to the display area discards the bit value corresponding to the earliest image frame among the plurality of bit values, shifts the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and records the second value to the bit corresponding to the latest image frame. An adaptive multi-region frame update frequency display system as described in claim 6, wherein in the operation of counting the total number of times each display region is updated in the past preset statistical cycle, the region count register of each display region accumulates the multiple bit values recorded by the corresponding frame count register to obtain a sum, wherein the region count register of each display region records the sum, wherein the sum is the total number of times each display region is updated in the past preset statistical cycle. An adaptive multi-zone frame update frequency display system as described in claim 3, wherein the display driver chip sets the length of the preset statistical cycle according to the maximum frame update frequency of the display panel, wherein the maximum frame update frequency is a multiple of the preset statistical cycle. As described in claim 3, the adaptive multi-zone frame update frequency display system, wherein the display driver chip issues a forced update instruction every preset statistical cycle to control the display panel to update the images of all display areas every preset statistical cycle. The adaptive multi-zone frame update frequency display system as described in claim 1, wherein the display driver chip further calculates the frame update frequency of each of the multiple display areas at one of the following times: after the image of each image frame of the display stream data is displayed; when the display driver chip receives a command from the application processor to perform local scanning or power saving mode; when the display driver chip determines that the display panel is displaying an image and no touch operation is detected within a predetermined time; and when the display driver chip receives a local scan instruction from the application processor and no touch operation is detected within another predetermined time. An adaptive multi-zone frame update frequency display method is used for an adaptive multi-zone frame update frequency display system, wherein the system includes a display panel, an application processor and a display driver chip, and the method includes: dividing the display panel into multiple display areas via the display driver chip; providing a display stream data via the application processor, wherein the display stream data includes corresponding to the multiple display areas Multiple regional display stream data; receiving the display stream data from the application processor via the display driver chip and calculating the frame update frequency of each of the multiple display regions; and selecting multiple compensation parameter sets corresponding to the multiple display regions according to the frame update frequency of each of the multiple display regions via the display driver chip to compensate the multiple regional display stream data corresponding to the multiple display regions. The adaptive multi-zone frame refresh rate display method as described in claim 11 further includes: setting the position, size and total number of the multiple display areas according to at least one of the multiple specifications corresponding to the display panel, the multiple specifications including: the total number of multiple data lines of the display panel; and the total number of multiple scan lines of the display panel. In the adaptive multi-region frame update frequency display method as described in claim 11, the step of calculating the frame update frequency of each of the multiple display regions includes: calculating the frame update frequency of each of the multiple display regions according to the image update status of the multiple display regions in the past preset statistical cycle. The adaptive multi-region frame update frequency display method as described in claim 13 further comprises: setting a plurality of region counter registers respectively corresponding to the plurality of display regions according to the divided plurality of display regions via the display driver chip, wherein the frame update frequency of each of the plurality of display regions is calculated according to the image update status of the plurality of display regions in the past preset statistical cycle. The steps include: after displaying the latest image frame of the display stream data each time, the total number of times each display area is updated in the past preset statistical cycle is counted as the regional update number through the regional count register of each display area; and the frame update frequency of each display area is calculated according to the regional update number of each display area and the preset statistical cycle through the display driver chip. The adaptive multi-zone frame update frequency display method as described in claim 14 further comprises: calculating the frame update frequency (MAFR(i)) of the i-th display region via the display driver chip according to the following formula:

Wherein Ci is the area update times of _{the i-th display area; Pprset is the preset statistical period; FURmax} is _the maximum _frame update frequency of the display panel. The adaptive multi-region frame update frequency display method as described in claim 14 further comprises: setting a plurality of frame count registers respectively corresponding to the plurality of display regions according to the divided plurality of display regions via the display driver chip, wherein each frame count register has a plurality of bits, the total number of the plurality of bits corresponds to the length of the preset statistical cycle, and the plurality of bit values recorded by the plurality of bits respectively indicate the update status of the plurality of image frames in the past preset statistical cycle; whenever the image of a display region is updated in the latest image frame, the frame count register corresponding to the display region is set to the refresh rate register; A counting register discards the bit value corresponding to the earliest image frame among the plurality of bit values, shifts the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and records the first value to the bit corresponding to the latest image frame; and whenever the image of a display area is not updated in the latest image frame, the bit value corresponding to the earliest image frame among the plurality of bit values is discarded through the frame counting register corresponding to the display area, shifts the remaining plurality of bit values so that the bit corresponding to the latest image frame is empty, and records the second value to the bit corresponding to the latest image frame. The adaptive multi-region frame update frequency display method as described in claim 16, wherein the step of counting the total number of times each display region is updated in the past preset statistical cycle includes: accumulating multiple bit values recorded in the corresponding frame count register through the region count register of each display region to obtain a sum; and recording the sum through the region count register of each display region, wherein the sum is the total number of times each display region is updated in the past preset statistical cycle. The adaptive multi-zone frame update frequency display method as described in claim 13 further includes: The length of the preset statistical cycle is set according to the maximum frame update frequency of the display panel via the display driver chip, wherein the maximum frame update frequency is a multiple of the preset statistical cycle. The adaptive multi-zone frame update frequency display method as described in claim 13 further includes: issuing a forced update instruction via the display driver chip every preset statistical cycle to control the display panel to update the images of all display areas every preset statistical cycle. The adaptive multi-zone frame update frequency display method as described in claim 11 further includes: calculating the frame update frequency of each of the multiple display areas via the display driver chip at one of the following times: after the image of each image frame of the display stream data is displayed; when the display driver chip receives a command from the application processor to perform local scanning or power saving mode; when the display driver chip determines that the display panel is displaying an image and no touch operation is detected within a predetermined time; and when the display driver chip receives a local scan instruction from the application processor and no touch operation is detected within another predetermined time.

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