TWI872061B - Method for manufacturing the thin film transistor - Google Patents

Abstract

The present invention provides a top-gate thin film transistor with high mobility and a method for manufacturing a top-gate thin film transistor with high mobility.

A top-gate thin film transistor having a mobility of 12 cm ² /Vs or more, preferably 18 cm ² /Vs or more; and a method for manufacturing the top-gate thin film transistor, comprising the following steps: (A) step: coating a metal oxide semiconductor layer forming composition on a substrate and firing to form a metal oxide semiconductor layer (a), and patterning and etching the layer (a); (B) step: forming an insulating layer (b) on the metal oxide semiconductor layer (a), and coating a dielectric layer (d) on the layer (b); (C) step: patterning and etching the metal oxide semiconductor layer (c); (D) step: using the metal oxide semiconductor layer (c) as a mask pattern to etch the underlying insulating layer (b); (E) step: irradiating the substrate with excimer laser light or YAG laser light.

Description

Method for manufacturing thin film transistors

The present invention relates to novel thin film transistors and their manufacturing methods.

In recent years, a method for manufacturing thin film transistors using a coating method to form a metal oxide semiconductor layer has been proposed to replace the conventional film forming techniques of evaporation, sputtering or CVD (e.g., Patent Documents 1 to 3).

[Prior Art Literature] [Patent Literature]

[Patent Document 1] International Publication No. 2012/014885

[Patent Document 2] International Publication No. 2009/081862

[Patent Document 3] Japanese Patent Publication No. 2010-0983035

Compared with the previous methods such as sputtering method using vacuum film forming equipment, the film formation using coating method can be realized with simpler structure (steps, equipment) and low cost. In addition to high productivity, it is also considered to be promising for large-area film formation and more complex pattern film formation. Therefore, the application of coating method to film formation of each layer constituting thin film transistors has been reviewed, not only for semiconductor layer film formation.

However, in thin film transistors generally manufactured by coating, it is difficult to realize a channel layer with high mobility, and thus difficult to realize thin film transistors, due to various important factors such as impurities from the previous driver used in the formation of the semiconductor layer, incomplete formation of metal oxides, and difficulty in activating the channel layer.

The subject of the present invention is to provide a top-gate thin film transistor with a high mobility of 12 cm ² /Vs or more, preferably 18 cm ² /Vs or more, and a method for manufacturing the top-gate thin film transistor with high mobility.

As a result of repeated and active research to solve the above-mentioned problems, the inventors of the present invention have found that by irradiating a metal oxide semiconductor layer with excimer laser light or YAG laser light, especially by combining UV light irradiation with excimer laser light or YAG laser light irradiation, the metal oxide semiconductor layer is converted into an electrode (conductor) and a channel layer with high mobility, thereby forming a top-gate thin film transistor with high mobility, thereby completing the present invention.

That is, the first aspect of the present invention is to provide a top-gate thin film transistor having a mobility greater than 12 cm ² /Vs.

The second aspect is related to the first aspect, in a top-gate thin film transistor, wherein the mobility is 18 cm ² /Vs or more.

The third viewpoint is related to the top-gate thin film transistor of the first viewpoint or the second viewpoint, wherein the top-gate thin film transistor is a top contact type or a bottom contact type.

The fourth aspect is a top-gate thin film transistor related to any one of the first to third aspects, wherein the top-gate thin film transistor has a fluorine-containing polysiloxane film as a gate insulating film.

The fifth aspect is a top-gate thin film transistor related to any one of the first to fourth aspects, which is a thin film transistor formed on a glass substrate, a silicon substrate or a flexible substrate.

As a sixth aspect, it is a top-gate thin film transistor related to any one of the first to fifth aspects, wherein the thin film transistor comprises a metal oxide semiconductor layer, and the metal oxide semiconductor layer comprises an oxide of at least one metal atom selected from the group consisting of indium, tin, zinc, gallium and aluminum.

As a seventh aspect, it is a top-gate thin film transistor related to the sixth aspect, wherein the metal oxide semiconductor layer comprises a layer of at least one metal oxide selected from the group consisting of zinc oxide-gallium-zinc, indium-gallium oxide, indium-tin-zinc oxide, gallium-zinc oxide, indium-tin oxide, indium-zinc oxide, tin-zinc oxide, zinc oxide and tin oxide.

As an eighth aspect, a method for manufacturing a top-gate thin film transistor includes the following steps (A) to (E): (A) step: coating a metal oxide semiconductor layer forming composition on a substrate and sintering it to form a metal oxide semiconductor layer (a), and patterning and etching the layer (a); (B) step: forming an insulating layer (b) on the patterned and etched metal oxide semiconductor layer (a), and forming a dielectric layer (d) on the layer (b). ) is coated with a metal oxide semiconductor layer forming composition and fired to form a metal oxide semiconductor layer (c), (C) is a step of patterning and etching the metal oxide semiconductor layer (c), (D) is a step of etching the lower insulating layer (b) using the patterned and etched metal oxide semiconductor layer (c) as a mask pattern, and (E) is a step of irradiating an excimer laser light or a YAG laser light from above the substrate.

As the 9th aspect, it is a method for manufacturing a top-gate thin film transistor related to the 8th aspect, wherein the insulating layer (b) formed in step (B) is a fluorine-containing polysiloxane film.

As the 10th aspect, it is a method for manufacturing a top-gate thin film transistor related to the 8th aspect or the 9th aspect, wherein the step (E) is the step (E’) of simultaneously irradiating UV light and excimer laser light or YAG laser light from above the substrate.

As the 11th aspect, it is a method for manufacturing a top-gate thin film transistor related to the 8th aspect or the 9th aspect, wherein the step (E) is a step (E”) of irradiating UV light from above the substrate and then irradiating excimer laser light or YAG laser light.

As a twelfth aspect, it is a method for manufacturing a top-gate type thin film transistor related to any one of the eighth to eleventh aspects, wherein the composition for forming the metal oxide semiconductor layer comprises a metal salt, a first amide compound, and a solvent mainly composed of water.

The 13th aspect is a method for manufacturing a top-gate thin film transistor related to any one of the 8th to 12th aspects, wherein in the aforementioned step (A) and step (B), the metal oxide semiconductor layer forming composition is rotationally coated under the same or different conditions and sequence, and heat-treated at 110°C to 180°C for 0.1 minute to 30 minutes, and the coating and heat-treatment operations are repeated 1 to 10 times, and then the metal oxide semiconductor layer (a) and the metal oxide semiconductor layer (c) are formed by heating at 250°C to 350°C for 0.1 hour to 120 hours.

As a 14th aspect, a method for manufacturing a top-gate thin film transistor related to any one of the 8th to 13th aspects, wherein in the aforementioned step (E), excimer laser light with a wavelength of 150nm-380nm is irradiated at 50mJ/ ^cm2-150mJ / ^cm2 for 1ns-120ns.

As a 15th aspect, a method for manufacturing a top-gate thin film transistor related to any one of the 8th to 13th aspects, wherein in the aforementioned step (E), YAG laser light with a wavelength of 250nm-400nm is irradiated at 50mJ/ ^cm2-150mJ / ^cm2 for 1ns-120ns.

The 16th aspect is a method for manufacturing a top-gate thin film transistor related to any one of the 10th to 15th aspects, wherein in the aforementioned step (E), UV light with a wavelength of 150nm to 350nm is irradiated for 1 minute to 120 minutes.

According to the present invention, a device having a lattice thickness of 12 cm ² /Vs or more, 18 cm ² /Vs or more, 20 cm ² /Vs or more, or 30 cm ² /Vs or more, for example, 12 ^{cm 2} /Vs to 80 cm ² /Vs, 12 cm ² /Vs to 70 cm ² /Vs, 12 cm ² /Vs to 60 cm ² /Vs, 18 cm ² /Vs to 80 cm ² /Vs, 18 cm ^{2 /Vs to 70 cm 2} /Vs, 18 cm ² /Vs to 60 cm ² /Vs, 18 cm ² /Vs to 50 cm ² /Vs, 18 cm ² /Vs to 50 cm ² /Vs, 20 cm ² /Vs to 80 cm ² /Vs, 20 cm ² /Vs to 70 cm ² /Vs, 20 cm ² /Vs to 60 cm ² /Vs, /Vs, 30cm ² /Vs~80cm ² /Vs, 30cm ² /Vs~70cm ² /Vs, 30cm ² /Vs~60cm ² /Vs, 30cm ² /Vs~50cm ² /Vs, and 30cm ² /Vs~50cm ² /Vs.

According to the manufacturing method of the present invention, the metal oxide semiconductor layer is activated by excimer laser light irradiation or YAG laser light irradiation, and is transformed into a channel layer with high mobility. The metal oxide semiconductor layer is then irradiated with UV light to transform it into a conductor (electrode), thereby manufacturing a top-gate thin film transistor with high mobility.

[Figure 1] is a cross-sectional view showing the structure A manufactured in the embodiment.

[Figure 2] is a cross-sectional view showing a top-gate thin film transistor manufactured in an embodiment.

[Figure 3] is a graph showing the transfer characteristics of the top-gate thin film transistor manufactured in Example 1.

[Figure 4] is a graph showing the transfer characteristics of the top-gate thin film transistor manufactured in Example 7.

[Figure 5] is a diagram showing steps (A) to (E) in the manufacturing method of the top-gate thin film transistor of the present invention.

[Figure 6] shows a general top-gate thin film transistor. Figure 6 (a) shows the cross-section of the top-contact type structure, and Figure 6 (b) shows the cross-section of the bottom-contact type structure.

[Top-gate thin film transistor]

The thin film transistor (TFT) targeted by the present invention is a top-gate thin film transistor having a mobility of 12 cm ² /Vs or more, preferably 18 cm ² /Vs or more. For example, the top-gate thin film transistor targeted by the present invention has a high mobility in the range of 12 cm ² /Vs to 60 cm ² /Vs, 18 cm ² /Vs to 50 cm ² /Vs, or 18 cm ² /Vs to 40 cm ² /Vs.

Thin film transistors (TFTs) are classified by the positional relationship between semiconductors and electrodes (conductors). The top-gate thin film transistors that the present invention targets, in which the gate electrode is arranged on the upper side of the semiconductor layer, include top-contact type structures in which the source electrode and the drain electrode are arranged on the upper side of the semiconductor layer, and bottom-contact type structures in which the electrodes are arranged on the lower side of the semiconductor layer. The top-gate thin film transistors of the present invention include both top-contact type and bottom-contact type.

FIG6 is a schematic diagram showing an example of a general top-gate thin film transistor, showing a cross-sectional view of a top contact type (FIG6(a)) structure and a cross-sectional view of a bottom contact type (FIG6(b)) structure.

The example of Figure 6(a) is to form a semiconductor layer 2 (channel 2a) on a substrate 1, and to form a drain electrode 3 and a source electrode 4 on the semiconductor layer 2. Then, a gate insulating film 5 is formed on the semiconductor layer 2, the drain electrode 3, and the source electrode 4, and a gate electrode 6 is arranged thereon.

In the example of FIG6(b), drain electrode 3 and source electrode 4 are formed on substrate 1, and semiconductor layer 2 (channel 2a) is formed in a manner of covering these electrodes. Then, gate insulating film 5 is formed on semiconductor layer 2, and gate electrode 6 is arranged thereon.

The substrate for forming thin film transistors is not particularly limited, and examples thereof include silicon substrates, metal substrates, gallium substrates, transparent electrode substrates, organic film substrates, plastic substrates, glass substrates, etc. More specific examples include plastic films such as polyimide, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, etc., stainless steel foil, glass, etc. In addition, it can also be a semiconductor substrate with circuit elements such as wiring layers or transistors. Furthermore, it can be a flexible substrate (such as a flexible substrate), etc. Among them, glass substrates, silicon substrates, flexible substrates, etc. can be preferably used.

The thin film transistor of the present invention includes a metal oxide semiconductor layer as a semiconductor layer, and the semiconductor layer includes an oxide of at least one metal atom selected from the group consisting of Li, Be, B, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Rb, Sr, Y, Zr, Nb, Mo, Cd, In, Ir, Sn, Sb, Cs, Ba, La, Hf, Ta, W, Tl, Pb, Bi, Ce, Pr, Nd, Pm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. Preferably, the metal oxide semiconductor layer comprises an oxide of at least one metal atom selected from the group consisting of indium (In), tin (Sn), zinc (Zn), gallium (Ga) and aluminum (Al).

In a preferred embodiment, the metal oxide semiconductor layer includes, for example, indium gallium zinc oxide, indium gallium oxide, indium tin zinc oxide, gallium zinc oxide, indium tin oxide, indium zinc oxide, tin zinc oxide, zinc _oxide , tin oxide, that is, InGaZnOx, _InGaOx , _InSnZnOx , _GaZnOx , _InSnOx , _InZnOx , _SnZnOx (all x>0), ZnO, _SnO2 , etc.

The above-mentioned metal oxide semiconductor layer can be formed by vacuum methods such as CVD, sputtering, pulse laser deposition, vacuum evaporation, etc., or by the coating method described later.

After the metal oxide semiconductor layer is formed, it can also be irradiated with excimer laser light or YAG laser light.

Examples of electrode materials (gate electrode, source electrode, drain electrode) used for thin film transistors include metals such as gold, silver, copper, aluminum, molybdenum, titanium, or alloys of Mg/Cu, Mg/Ag, Mg/Al, Mg/In, metal oxides such as _SnO2 , _InO2 , _ZnO , _InO2‧SnO2 (ITO), _InO2‧ZnO (IZO), _Sb2O5‧SnO2 (ATO), inorganic materials such as carbon _black , fullerenes, _carbon nanotubes, organic π-conjugated polymers such as polythiophene, polyaniline, polypyrrole, polyfluorene, and their derivatives. The electrode materials may be used alone, but a plurality of materials may be used in combination for the purpose of increasing the field effect mobility of the thin film transistor, increasing the on/off ratio, or controlling the threshold voltage. Furthermore, different electrode materials may be used for the gate electrode, source electrode, and drain electrode.

As a method for forming such electrodes, conventional techniques such as vacuum evaporation and sputtering can be used, and in order to simplify the manufacturing method, spray coating, printing, inkjet coating, etc. can also be used. As described later, the present invention can transform the metal oxide semiconductor layer into a conductor by ultraviolet irradiation to form an electrode.

In addition, as a gate insulating film, examples include inorganic insulating films such as silicon oxide, silicon nitride, aluminum oxide, einsteinium oxide, yttrium oxide, etc., and organic insulating films such as polyimide, polymethyl methacrylate, polyvinylphenol, benzocyclobutene, polysiloxane (such as polysiloxane), etc., which may also contain halogen elements. For example, a fluorine-containing polysiloxane film (including a fluorine-modified polysiloxane film, etc.) is used as a gate insulating film.

A single gate insulating film can be used alone, but multiple films can also be used in combination to improve the field effect transition of thin film transistors, improve the on/off ratio, or control the threshold voltage.

The above-mentioned gate insulating film can be formed by conventional techniques such as vacuum evaporation and sputtering, but in order to simplify the manufacturing method, a coating method such as spray coating, printing, and inkjet coating can also be used. In the case of using a silicon substrate as a substrate, the gate insulating film can also be formed by utilizing thermal oxidation. In the case of the coating method, in order to improve the film-forming property of the insulating film forming coating liquid on the substrate, the insulating film forming coating liquid can also contain a surfactant.

[Manufacturing method of top-gate thin film transistor]

The manufacturing method of the top-gate thin film transistor of the present invention includes the manufacturing method of the following steps (A) to (E).

(A) Step: coating a metal oxide semiconductor layer forming composition on a substrate and firing to form a metal oxide semiconductor layer (a), and patterning and etching the layer (a); (B) Step: forming an insulating layer (b) on the patterned and etched metal oxide semiconductor layer (a), coating a metal oxide semiconductor layer forming composition on the layer (b) and firing; Step (C): patterning and etching the metal oxide semiconductor layer (c); Step (D): using the patterned and etched metal oxide semiconductor layer (c) as a mask pattern to etch the underlying insulating layer (b); Step (E): irradiating the substrate with excimer laser light or YAG laser light.

Furthermore, step (E) may be step (E’) of irradiating UV light and excimer laser light or YAG laser light.

Furthermore, step (E) may be step (E”) of irradiating with excimer laser light or YAG laser light after irradiating with UV light.

The schematic diagrams of each of these steps are shown in Figure 5.

Each step is described in detail below.

<(A) Steps>

This step is to coat a metal oxide semiconductor layer forming composition on a substrate and sinter it to form a metal oxide semiconductor layer (a), and then pattern and etch the metal oxide semiconductor layer (a) (refer to step 5 (A)).

The substrate for forming the metal oxide semiconductor layer (a) is not particularly limited, and examples thereof include the various substrates mentioned above as substrates for forming thin film transistors.

The metal oxide semiconductor layer forming composition used in this step may be, for example, a composition comprising a metal salt, a first amide compound, and a solvent mainly composed of water.

Examples of the first amide compound include compounds represented by the following general formula (I).

In formula (I), ^R1 represents a hydrogen atom; a linear or branched alkyl group having 1 to 6 carbon atoms; an oxygen atom bonded to a hydrogen atom or a linear or branched alkyl group having 1 to 6 carbon atoms; or a nitrogen atom bonded to a hydrogen atom, an oxygen atom, or a linear or branched alkyl group having 1 to 6 carbon atoms.

In the above R ¹ , the oxygen atom bonded to a hydrogen atom or a linear or branched alkyl group having 1 to 6 carbon atoms is -OH or -OR ² (R ² is a linear or branched alkyl group having 1 to 6 carbon atoms).

The nitrogen atom bonded to a hydrogen atom, an oxygen atom or a linear or branched alkyl group having 1 to 6 carbon atoms is, for example, -NH ₂ , -NHR ³ or -NR ⁴ R ⁵ (R ³ , R ⁴ and R ⁵ are independently a linear or branched alkyl group having 1 to 6 carbon atoms).

The first amide compound is not limited to the compounds represented by the general formula (I). Specific examples of the first amide compound include acetamide, acetylurea, acrylamide, hexamethylenediamine, acetaldehyde semicarbazone, azodicarboximide, 4-amino-2,3,5,6-tetrafluorobenzamide, β-alanine amide hydrochloride, L-alanine amide hydrochloride, benzamide, benzyl urea, biurea, acetylurea, butylamide, 3-bromoacrylamide, butylurea, 3,5-bis(trifluoromethane) Benzamide, t-butyl carbamate, hexaneamide, ammonium carbamate, ethyl carbamate, 2-chloroacetamide, 2-chloroethyl urea, crotonamide, 2-cyanoacetamide, butyl carbamate, isopropyl carbamate, methyl carbamate, cyanoacetyl urea, cyclopropanecarboxamide, cyclohexyl urea, 2,2-dichloroacetamide, dicyanamide phosphate , guanidine sulfate, 1,1-dimethylurea, 2,2-dimethoxyacrylamide, ethyl urea, fluoroacetamide, formamide, fumaric acid amide, glycine amide hydrochloride, hydroxyurea, uric acid, 2-hydroxyethyl urea, heptafluorobutylamide, 2-hydroxyisobutylamide, isobutyric acid amide, lactic acid amide, maleamide, malonic acid amide, 1-methyl Urea, nitrourea, oxamic acid, ethyl oxamic acid, oxalamide, oxalic acid hydrazide, butyl oxalate, phenylurea, phenylenediamine, propionamide, pivalic acid amide, pentafluorobenzamide, pentafluoropropionamide, semicarbazide hydrochloride, succinamide, trichloroacetamide, trifluoroacetamide, urea nitrate, urea, valeramide, etc. Among them, formamide, urea, and ammonium carbamate are preferred.

You can use one type or a combination of two or more types.

The metal salt is exemplified by a metal selected from the group consisting of Li, Be, B, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Rb, Sr, Y, Zr, Nb, Mo, Cd, In, Ir, Sn, Sb, Cs, Ba, La, Hf, Ta, W, Tl, Pb, Bi, Ce, Pr, Nd, Pm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. The metals cited above are preferably at least one metal selected from the group consisting of indium (In), tin (Sn), zinc (Zn), gallium (Ga) and aluminum (Al), particularly preferably any one of indium (In), tin (Sn) and zinc (Zn), and more preferably gallium (Ga) or aluminum (Al).

The above metal salt is preferably an inorganic acid salt. As the inorganic acid salt, for example, at least one selected from the group consisting of nitrates, sulfates, phosphates, carbonates, bicarbonates, borates, hydrochlorides and hydrofluorides can be used. These salts can also be in the form of hydrates. Based on the viewpoint that the heat treatment (sintering) after coating the metal oxide semiconductor layer forming composition can be performed at a lower temperature, hydrochlorides and nitrates are preferably used as the inorganic acid salt.

In addition, when the above-mentioned metal oxide semiconductor layer forming composition contains a plurality of metals, the ratio (composition ratio) of each metal is not particularly limited as long as the desired metal oxide semiconductor layer can be formed, but for example, the molar ratio of the metal contained in the salt of In or a metal salt selected from Sn (metal A), the metal contained in the salt of a metal salt selected from Zn (metal B), and the metal contained in the metal salt of Ga or Al (metal C) preferably satisfies metal A:metal B:metal C=1:0.05~1:0~1. For example, when a preferred nitrate is used as the metal salt, the nitrate of each metal is dissolved in a solvent containing water as the main component, which will be described in detail later, so that the molar ratio is metal A: metal B: metal C = 1: 0.05~1: 0~1, and then the aqueous solution containing the first amide of the above general formula (I) is prepared to prepare a composition for forming a metal oxide semiconductor layer.

The solvent of the metal oxide semiconductor layer forming composition is mainly water. The so-called water-based solvent refers to a main solvent, that is, a solvent in which 50% by mass or more of the solvent is water. The solvent used in the metal oxide semiconductor layer forming composition can be mainly water, and water alone or a mixed solvent of water and an organic solvent can be used. Specific examples of the organic solvent contained other than water include propylene glycol monomethyl ether, propylene glycol monomethyl ether acetate, propylene glycol monopropyl ether, methyl ethyl ketone, ethyl lactate, cyclohexanone, γ-butyrolactone, N-methyl-2-pyrrolidone, N,N-dimethylformamide, N,N-dimethylacetamide, N-methylcaprolactamide, dimethyl sulfoxide, tetramethyl urea, pyridine, dimethyl sulfoxide, hexamethyl sulfoxide, methanol, ethanol, 1-propanol, isopropanol. , n-butanol, 2-butanol, tert-butanol, 1-pentanol, 2-pentanol, 3-pentanol, n-hexanol, cyclohexanol, 2-methyl-2-butanol, 3-methyl-2-butanol, 2-methyl-1-butanol, 3-methyl-1-butanol, 2-methyl-1-pentanol, 2-methyl-2-pentanol, 2-methyl-3-pentanol, 3-methyl-1-pentanol, 3-methyl-2-pentanol, 3-methyl-3-pentanol, 4-methyl-1-pentanol , 4-methyl-2-pentanol, 2,2-dimethyl-3-pentanol, 2,3-dimethyl-3-pentanol, 2,4-dimethyl-3-pentanol, 4,4-dimethyl-2-pentanol, 3-ethyl-3-pentanol, 1-heptanol, 2-heptanol, 3-heptanol, 2-methyl-2-hexanol, 2-methyl-3-hexanol, 5-methyl-1-hexanol, 5-methyl-2-hexanol, 2-ethyl-1-hexanol, 4-methyl-3-heptanol , 6-methyl-2-heptanol, 1-octanol, 2-octanol, 3-octanol, 2-propyl-1-pentanol, 2,4,4-trimethyl-1-pentanol, 2,6- dimethyl-4-heptanol, 3-ethyl-2,2-dimethyl-pentanol, 1-nonanol, 2-nonanol, 3,5,5-trimethyl-1-hexanol, 1-decanol, 2-decanol, 4-decanol, 3,7-dimethyl-1-octanol, 3,7-dimethyl-3-octanol, etc. These organic solvents may be used in combination of two or more.

The solid concentration in the metal oxide semiconductor layer forming composition is 0.1 mass % or more, preferably 0.3 mass % or more, and more preferably 0.5 mass % or more. The solid concentration is 30.0 mass % or less, preferably 20.0 mass % or less, and more preferably 15.0 mass % or less. In addition, the so-called solid concentration is the total concentration of the metal salt and the first amide compound.

The method for producing the metal oxide semiconductor layer-forming composition is not particularly limited. For example, the metal salt and the first amide compound can be mixed in a solvent mainly composed of water.

In order to adjust the pH of the composition, acids such as nitric acid, sulfuric acid, phosphoric acid, carbonic acid, boric acid, hydrochloric acid, and hydrofluoric acid may be added as needed.

After the above-mentioned metal oxide semiconductor layer forming composition is coated on the substrate to form a thin film, a dense amorphous metal oxide semiconductor layer can be formed by firing. In addition, before the firing step, in order to remove the residual solvent in advance, a drying step using heat treatment at 110°C to 180°C for 0.1 minute to 30 minutes can also be performed as a pre-treatment.

The method of coating the metal oxide semiconductor layer forming composition onto the substrate can be applied by known methods, such as spin coating, immersion coating, screen printing, roll coating, inkjet coating, die nozzle coating, transfer printing, spraying, slit coating, etc. The thickness of the thin film obtained by coating the metal oxide semiconductor layer forming composition by various coating methods is 1nm~1μm, preferably 10nm~100nm.

After the thin film is formed, a drying step is performed as necessary, and then a firing step is performed. By firing the thin film, the metal salt in the thin film (composition for forming a metal oxide semiconductor layer) undergoes an oxidation reaction, and an amorphous metal oxide semiconductor layer can be produced. That is, a semiconductor layer is formed including an oxide of a metal constituting the above-mentioned metal salt (for example, indium gallium zinc oxide, indium gallium oxide, indium tin zinc oxide, gallium zinc oxide, indium tin oxide, indium _zinc oxide, tin zinc oxide, zinc oxide, tin oxide, that is, for example, _InGaZnOx , _InGaOx , InSnZnOx, _GaZnOx , _InSnOx , _InZnOx , _SnZnOx (all x>0), ZnO, _SnO2 , etc.).

The firing temperature can be set to 250°C to 500°C, for example, 250°C to 350°C. Furthermore, by using the above-mentioned specific metal oxide semiconductor layer forming composition, a dense amorphous metal oxide semiconductor layer can be formed even at a lower temperature than the conventional firing temperature of 300°C or more. The firing time is not particularly limited, but is, for example, 0.1 hours to 120 hours.

The film can be fired using conventional atmospheric pressure plasma devices or microwave heating devices, or devices such as heating plates, IR furnaces, and ovens. The above-mentioned specific metal oxide semiconductor layer formation composition can also be applied to low-temperature firing temperatures below 300°C, and from the perspective of high productivity, wide availability, and the use of cheaper heating devices, it is more advantageous to use heating plates, IR furnaces, ovens, etc.

Moreover, the sintering of the aforementioned film can be carried out not only in air or in an oxidizing environment such as oxygen, but also in an inert gas such as nitrogen, helium, and argon.

The thickness of the metal oxide semiconductor layer (a) thus obtained is not particularly limited, but can be, for example, 5nm to 100nm.

Furthermore, if the desired thickness cannot be obtained by a single coating/firing process, the coating/firing process can be repeated until the desired film thickness is reached, and the coating/drying step can be repeated until the desired film thickness is reached, and then the firing step can be performed.

Next, the obtained metal oxide semiconductor layer (a) is patterned and etched to process the metal oxide semiconductor layer into a desired shape. As a patterning method, there is a method of etching with hydrochloric acid or the like using a photoresist as a mask. Unnecessary photoresist can be removed by an organic solvent or ashing.

<(B) Step>

This step is to form an insulating layer (b) as a gate insulating film on the patterned and etched metal oxide semiconductor layer (a), and then coat the metal oxide semiconductor layer forming composition on the layer (b) and sinter it to form a metal oxide semiconductor layer (c) (refer to step (B) in Figure 5).

As the method for forming the insulating layer (b) (gate insulating film), there are methods of forming by sputtering, vacuum evaporation, and chemical vapor deposition using plasma (plasma CVD) as described above. Examples of the CVD method include film formation using SiN _x or film formation and oxidation of SiH ₄ .

In addition, a coating type oxide film made by various coating methods using a pre-driving solution with silicon dioxide as the main component can be cited as an example. As the pre-driving solution with silicon dioxide as the main component, for example, polysilicone can be used for amino modification, epoxy modification, carboxyl modification, carbitol modification, methacrylic acid modification, hydroxyl modification, phenol modification, fluorine modification, etc., which can be used to introduce functional groups into the polysilicone skeleton.

A surfactant may be added to the aforementioned drive solution containing silicon dioxide as the main component. As the surfactant, anionic surfactants, cationic surfactants, amphoteric surfactants, and non-ionic surfactants may be used.

Examples of anionic surfactants include carboxylates such as aliphatic monocarboxylates, polyoxyethylene alkyl ether carboxylates, N-acyl sarcosine, N-acyl glutamate, dialkyl sulfosuccinates, alkane sulfonates, α-olefin sulfonates, linear alkylbenzene sulfonates, alkyl (branched) benzene sulfonates, naphthalene sulfonate-formaldehyde condensates, alkyl naphthalene sulfonates, N-methyl-N-acyl taurine, etc., sulfate esters such as alkyl sulfates, polyoxyethylene alkyl ether sulfates, and fat sulfates, and phosphate esters such as alkyl phosphates, polyoxyethylene alkyl ether phosphates, and polyoxyethylene alkylphenyl ether phosphates.

Examples of cationic surfactants include alkylamine salts such as monoalkylamine salts, dialkylamine salts, trialkylamine salts, and quaternary ammonium salts such as halogenated (fluorinated, chlorinated, brominated, or iodinated) alkyltrimethylammonium, halogenated (fluorinated, chlorinated, brominated, or iodinated) dialkyldimethylammonium, and halogenated (fluorinated, chlorinated, brominated, or iodinated) alkylbenzylammonium.

Examples of amphoteric surfactants include carboxy betaine types such as alkyl betaine, fatty acid amide propyl betaine, 2-alkyl imidazoline derivatives such as 2-alkyl-N-carboxymethyl-N-hydroxyethyl imidazolinium betaine, glycine types such as alkyl (or dialkyl) diethyl triaminoacetic acid, and amine oxide types such as alkyl amine oxide.

Examples of non-ionic surfactants include esters such as glycerol fatty acid esters, sorbitan fatty acid esters, and sucrose fatty acid esters, ethers such as polyoxyethylene alkyl ethers, polyoxyethylene alkylphenyl ethers, and polyoxyethylene polyoxypropylene glycols, ester ethers such as fatty acid polyethylene glycols and fatty acid polyoxyethylene sorbitan, and alkanolamides such as fatty acid alkanolamides.

Some or all of the hydrogen atoms in the alkyl chains of these surfactants may also be replaced by halogen atoms.

A preferred example of the insulating layer (b) (gate insulating layer) is a fluorine-containing polysiloxane film. The fluorine-containing polysiloxane film is obtained by coating and firing a material containing fluorinated polysiloxane, fluorine-modified modified polysiloxane, or polysiloxane containing a fluorine surfactant. That is, the fluorine-containing polysiloxane film refers not only to a state in which a part of the polysiloxane structure is substituted by fluorine atoms, but also to a state in which a fluorine-containing additive (surfactant, etc.) is contained in the film.

The fluorinated polysiloxane film can be formed using a water-soluble composition with a solid content of 0.1% to 50% by mass, or 0.1% to 40% by mass, or 0.1% to 30% by mass, or 1% to 20% by mass, or 5% to 20% by mass, such as fluorinated polysiloxane, fluorine-modified modified polysiloxane, or polysiloxane containing a fluorinated surfactant as a solid content.

More specifically, the water-soluble composition is applied to the metal oxide semiconductor layer (a) formed on the substrate by spin coating, dried at 110°C to 180°C for 0.1 minute to 30 minutes, and then fired at 250°C to 350°C for 0.1 hour to 10 hours to obtain a fluorine-containing polysiloxane film with a film thickness of, for example, 10nm to 500nm, 50nm to 400nm, or 100nm to 300nm.

After the insulating layer (b) is formed, a metal oxide semiconductor layer forming composition is coated on the layer (b) and fired to form a metal oxide semiconductor layer (c). The (c) layer can be formed with the same material, sequence and thickness as the metal oxide semiconductor layer (a) in the aforementioned <(A) step>.

<(C) Steps>

This step is a step for patterning and etching the metal oxide semiconductor layer (c), which can be implemented in the same sequence as the patterning and etching of the metal oxide semiconductor layer (a) in the aforementioned <(A) step> (refer to FIG. 5 (C) step).

<(D) Step>

This step uses the patterned and etched metal oxide semiconductor layer (c) as a mask pattern to etch the underlying insulating layer (b) to obtain an insulating layer (b) of the desired shape (refer to step (D) in Figure 5).

The etching of the insulating layer (b) can be performed by appropriately selecting dry etching or wet etching according to the material constituting the insulating layer (b). For example, a reactive ion etching device can be used for the etching.

<(E)Step>

This step is a step of irradiating excimer laser light or YAG laser light from above the substrate, that is, from above the layered structure (metal oxide semiconductor layer (a) - insulating layer (b) - metal oxide semiconductor layer (c)) formed on the substrate (refer to step (E) in Figure 5).

This step is preferably implemented as a step of irradiating UV light in addition to excimer laser light or YAG laser light [(E’) step].

This step is preferably implemented as a step of irradiating with excimer laser light or YAG laser light after irradiating with UV light [(E”) step].

The wavelength, irradiation time, or energy of the excimer laser light, YAG laser light, or UV light can be appropriately selected according to the composition and thickness of the metal oxide semiconductor layer being irradiated.

For example, the irradiation of excimer laser light can be performed with 50 mJ/cm ² to 150 mJ/cm ² of excimer laser light having a wavelength of 150 nm to 380 nm for 1 nanosecond to 120 nanoseconds.

For example, the irradiation of YAG laser light can be implemented with 50mJ/ ^cm2 ~150mJ/ ^cm2 of YAG laser light with a wavelength of 250nm~400nm for 1 nanosecond~120 nanoseconds.

And the UV light irradiation can be implemented, for example, by irradiating UV light with a wavelength of 150nm to 350nm for 1 minute to 120 minutes.

After the above step (E), the semiconductor layer is transformed into a channel layer with high mobility by irradiating excimer laser light or YAG laser light. The metal oxide layer exposed on the surface is transformed into a conductor (electrode) by irradiating UV light.

As mentioned above, in the above step (E), irradiation with excimer laser light or YAG laser light is necessary. Moreover, the above step (E) can be performed in step (E’) of irradiating UV light and excimer laser light or YAG laser light. Furthermore, in step (E), step (E”) of irradiating with excimer laser light or YAG laser light after irradiating with UV light can also be performed.

[Implementation example]

The present invention is described in more detail with the following examples, but the present invention is not limited to these examples. In addition, the various measuring devices used in the examples are as follows.

Method for determining migration degree

The mobility of the thin film transistors manufactured in the embodiment and the comparative example was measured using a semiconductor parameter analyzer Agilent 4156C.

Under the condition of drain voltage of 0.1V and TFT size of 90μm channel width and 10μm channel length, the change of drain current when gate voltage changes from -20V to +20V is measured and the migration degree (unit: ^cm2 /Vs) is calculated.

Illumination measurement method for low-pressure mercury lamps

The illumination of the low-pressure mercury lamp used in the embodiment is measured by connecting an illumination meter (model 306) manufactured by OAI to a probe with a sensitivity peak at 253.7nm. The main emission spectrum of the low-pressure mercury lamp is 185nm and 254nm, and the illumination ratio is set to 15:85. The illumination measured by model 306 (illumination at 254nm) is divided by 0.85 as the illumination of the low-pressure mercury lamp.

Preparation of metal oxide semiconductor layer forming composition (precursor solution) 1

0.90 g of indium nitrate (III) trihydrate (manufactured by Aldrich, 99.999% trace metal basis), 0.23 g of zinc nitrate hexahydrate (manufactured by Aldrich, 99.999% trace metal basis), and 0.09 g of formamide (manufactured by Tokyo Chemical Industry Co., Ltd., 98.5%) were added to 8.78 g of ultrapure water, and the solution was stirred until it became completely transparent. The aqueous solution was used as the metal oxide semiconductor layer forming composition 1.

Production of structure A

On a silicon substrate with a 100nm silicon oxide film, a metal oxide semiconductor layer-forming composition 1 was coated at 4,000rpm using a spin coater, and dried at 150℃ for 10 minutes to obtain an oxide semiconductor precursor layer. Then, the coating using a spin coater and drying at 150℃ for 10 minutes were repeated 4 times as one cycle, and finally an annealing treatment was performed at 300℃ for 60 minutes using a hot plate to obtain an oxide semiconductor layer A composed of InZnO with a film thickness of 50nm.

Next, a photoresist is applied on the upper part of the oxide semiconductor layer A for exposure and development to form a resist pattern. The resist pattern is used as a mask, and the oxide semiconductor layer A is immersed in a 0.01M hydrochloric acid aqueous solution for 5 minutes for etching. After the etching treatment, a stripping solution is used to remove the residual photoresist on the upper part of the oxide semiconductor layer A.

Next, a spin coater is used to form a 200nm thick fluorinated polysiloxane film as a gate insulating film on the upper portion of the oxide semiconductor layer A. The firing temperature is 300°C.

Next, a metal oxide semiconductor layer forming composition 1 was applied to the upper portion of the gate insulating film at 4,000 rpm using a spin coater, and dried at 150°C for 10 minutes to obtain an oxide semiconductor precursor layer. Next, the coating using the spin coater and the drying at 150°C for 10 minutes were repeated 4 times, and finally an annealing treatment was performed at 300°C for 60 minutes using a hot plate, and an oxide semiconductor layer B made of InZnO with a film thickness of 50 nm was obtained.

Next, a photoresist is applied on the upper part of the oxide semiconductor layer B for exposure and development to form a resist pattern. The resist pattern is used as a mask to etch the oxide semiconductor layer B in a 0.01M hydrochloric acid aqueous solution in the same manner as above. After etching, a stripping solution is used to remove the residual photoresist on the upper part of the oxide semiconductor layer B.

Next, a reactive ion etching device is used to dry etch the gate insulating film using the oxide semiconductor layer B as a mask. The process gas is a mixture of _CF4 and Ar.

In the dry etching step, the unmasked polysiloxane and photoresist on the oxide semiconductor B are completely removed to obtain structure A.

Figure 1 shows a schematic diagram (cross-section) of structure A.

Example 1 Fabrication and evaluation of top-gate thin film transistor (1)

Using a low-pressure mercury lamp (UV ozone cleaner UV1 manufactured by SAMCO, illumination 15mW/cm ² , wavelength 185nm~254nm), the structure A was continuously irradiated with ultraviolet light for 60 minutes (54J/cm ² ) in an atmospheric environment. During the ultraviolet irradiation, the structure A was heated to 115°C using a heating plate.

Next, using a KrF excimer laser-annealing device, in an atmospheric environment, the structure A was irradiated with KrF excimer laser (wavelength 248nm) for 9 nanoseconds at an irradiation energy of 120mJ/ ^cm2 . The peak output at this time was 13.3MW/ ^cm2 .

In the structure A subjected to the ultraviolet irradiation and excimer laser irradiation treatment, the resistance of the oxide semiconductor layer B and the exposed portion of the oxide semiconductor layer A is greatly reduced and they become conductors, functioning as electrodes. On the other hand, the region of the oxide semiconductor layer A covered by the gate insulating film functions as a semiconductor (channel). That is, as shown in FIG. 2 , the oxide semiconductor layer B exposed on the surface functions as a gate electrode, and the oxide semiconductor layer A (a portion) exposed on the surface functions as a source electrode or a drain electrode (the source electrode and the drain electrode are not particularly distinguished), and as a result, a top-gate type thin film transistor can be manufactured.

The transfer characteristics of the top-gate thin film transistor manufactured in Example 1 are shown in FIG3. The mobility of the top-gate thin film transistor manufactured in Example 1 is 35.94 cm ² /Vs.

Example 2 Fabrication and evaluation of top-gate thin film transistors

Using structure A, a top-gate thin film transistor having the structure shown in FIG2 (cross-sectional view) was fabricated under the same conditions as in Example 1 except that the irradiation condition of KrF excimer laser was set to 140 mJ/ ^{cm2 (} peak output 15.6 MW/cm2). The mobility of the top-gate thin film transistor fabricated in Example 2 was 31.59 ^cm2 /Vs.

Example 3 Fabrication and evaluation of top-gate thin film transistors

Using structure A, a top-gate thin film transistor having the structure (cross-sectional view) shown in FIG. ² was fabricated under the same conditions as Example 1 except that the irradiation conditions of KrF excimer laser were set to 100 mJ/cm 2 (peak output 11.1 MW/cm ² ) under vacuum conditions. The mobility of the top-gate thin film transistor fabricated in Example 3 was 41.75 cm ² /Vs.

Example 4 Fabrication and evaluation of top-gate thin film transistors

Using structure A, a top-gate thin film transistor having the structure shown in FIG2 (cross-sectional view) was fabricated under the same conditions as in Example 1 except that the irradiation conditions of KrF excimer laser were set to 120 mJ/ ^cm2 (peak output 13.3 MW/ ^cm2 ) under vacuum. The mobility of the top-gate thin film transistor fabricated in Example 4 was 45.56 ^cm2 /Vs.

Example 5 Fabrication and evaluation of top-gate thin film transistors

Using structure A, a top-gate thin film transistor having the structure shown in FIG2 (cross-sectional view) was fabricated under the same conditions as in Example 1 except that the irradiation conditions of KrF excimer laser were set to 140 mJ/ ^cm2 (peak output 15.6 MW/ ^cm2 ) under vacuum. The mobility of the top-gate thin film transistor fabricated in Example 5 was 18.38 ^cm2 /Vs.

Example 6 Fabrication and evaluation of top-gate thin film transistors

Using structure A, a top-gate thin film transistor having the structure (cross-sectional view) shown in FIG. ² was fabricated under the same conditions as Example 1 except that the irradiation conditions of KrF excimer laser were set to 120 mJ/cm 2 (peak output 13.3 MW/cm ² ) in a nitrogen environment. The mobility of the top-gate thin film transistor fabricated in Example 6 was 27.78 cm ² /Vs.

Reference Example 1 Fabrication and evaluation of top-gate thin film transistors

Using a low-pressure mercury lamp (UV ozone cleaner UV1 manufactured by SAMCO, illuminance 15mW/ ^cm2 ), the structure A was continuously irradiated with ultraviolet rays for 60 minutes (54J/ ^cm2 ) in an atmospheric environment. During the ultraviolet irradiation, the structure A was heated to 115°C using a heating plate.

In the structure A subjected to only ultraviolet irradiation treatment, the resistance of the exposed portions of the oxide semiconductor layer B and the oxide semiconductor layer A is greatly reduced and they function as electrodes. The region of the oxide semiconductor layer A covered by the gate insulating film functions as a semiconductor (channel). That is, in Reference Example 1, a top-gate thin film transistor having the structure (cross-sectional view) shown in the previous FIG. 2 can also be manufactured. However, the mobility of the top-gate thin film transistor manufactured in Reference Example 1 is 14.33 cm ² /Vs, and it is not possible to manufacture the top-gate thin film transistor with good performance having a mobility exceeding 18 cm ² /Vs obtained in Examples 1 to 6.

Comparison Example 1

The oxide semiconductor layer B of structure A (not irradiated with UV rays or excimer laser) was regarded as a gate electrode, and the exposed portion of oxide semiconductor layer A was regarded as a source electrode and a drain electrode. The performance of structure A treated as a top-gate thin film transistor was evaluated, and its migration was 0.01 cm ² /Vs.

Example 7 Fabrication and evaluation of top-gate thin film transistors

Using a low-pressure mercury lamp (UV ozone cleaner UV1 manufactured by SAMCO, illuminance 15mW/cm ² , wavelength 185nm~254nm) in an atmospheric environment, the structure A was continuously irradiated with ultraviolet light for 60 minutes (54J/cm ² ). During the ultraviolet light irradiation, the structure A was heated to 115°C using a heating plate.

Next, a YAG laser device (COHERENT, MATRIX 355-1-60) was used to irradiate structure A with an irradiation energy of 120 mJ/cm ² in an atmospheric environment. The pulse width of the YAG laser (wavelength 355 nm) was less than 25 nanoseconds, the frequency was 60 kHz, the irradiation time was 4 minutes, and the intensity was 0.5 mW/cm ² .

In the structure A subjected to the above-mentioned ultraviolet irradiation and YAG laser irradiation treatment, the resistance of the oxide semiconductor layer B and the exposed portion of the oxide semiconductor layer A is greatly reduced and they become conductors, functioning as electrodes. On the other hand, the region of the oxide semiconductor layer A covered by the gate insulating film functions as a semiconductor (channel). That is, as shown in FIG2 , the oxide semiconductor layer B exposed on the surface functions as a gate electrode, and the oxide semiconductor layer A (part) exposed on the surface functions as a source electrode or a drain electrode (the source electrode and the drain electrode are not specifically distinguished), and as a result, a top-gate type thin film transistor can be manufactured.

The transfer characteristics of the top-gate thin film transistor manufactured in Example 7 are shown in FIG4 . The mobility of the top-gate thin film transistor manufactured in Example 7 is 12.18 cm ² /Vs. Although the mobility is the same as that of Reference Example 1, a more stable transfer characteristic is obtained.

Claims (9)

A method for manufacturing a top-gate thin film transistor comprises the following steps (A) to (E): (A) step: coating a metal oxide semiconductor layer forming composition on a substrate and sintering it to form a metal oxide semiconductor layer (a), and patterning and etching the layer (a); (B) step: forming an insulating layer (b) on the patterned and etched metal oxide semiconductor layer (a), and coating a gold layer on the layer (b); (C) step: patterning and etching the metal oxide semiconductor layer (c); (D) step: using the patterned and etched metal oxide semiconductor layer (c) as a mask pattern to etch the underlying insulating layer (b); (E) step: irradiating the substrate with excimer laser light or YAG laser light. The manufacturing method of the top-gate type thin film transistor as claimed in claim 1, wherein the insulating layer (b) formed in step (B) is a fluorine-containing polysiloxane film. The manufacturing method of the top-gate thin film transistor of claim 1, wherein step (E) is step (E’) of simultaneously irradiating UV light and excimer laser light or YAG laser light from above the substrate. The manufacturing method of the top-gate thin film transistor of claim 1, wherein step (E) is a step (E”) of irradiating UV light from above the substrate and then irradiating excimer laser light or YAG laser light. A method for manufacturing a top-gate thin film transistor as claimed in claim 1, wherein the composition for forming the metal oxide semiconductor layer comprises a metal salt, a first amide compound and a solvent mainly composed of water. The manufacturing method of the top-gate type thin film transistor of claim 1, wherein in the aforementioned step (A) and step (B), the metal oxide semiconductor layer forming composition is rotationally coated under the same or different conditions and sequence, and heat-treated at 110°C to 180°C for 0.1 minute to 30 minutes, and the coating and heat-treatment operations are repeated 1 to 10 times, and then the metal oxide semiconductor layer (a) and the metal oxide semiconductor layer (c) are respectively formed by heating at 250°C to 350°C for 0.1 hour to 120 hours. The method for manufacturing a top-gate thin film transistor of claim 1, wherein in the aforementioned step (E), an excimer laser light having a wavelength of 150nm-380nm is irradiated at 50mJ/ ^cm2-150mJ / ^cm2 for 1ns-120ns. The method for manufacturing a top-gate thin film transistor of claim 1, wherein in the aforementioned step (E), YAG laser light with a wavelength of 250nm-400nm is irradiated at 50mJ/ ^cm2-150mJ / ^cm2 for 1ns-120ns. A method for manufacturing a top-gate thin film transistor as claimed in any one of claims 3 to 8, wherein in the aforementioned step (E), UV light with a wavelength of 150nm to 350nm is irradiated for 1 minute to 120 minutes.