TWI864671B - Driving current compensation method and current compensation device - Google Patents

Abstract

A driving current compensation method includes following steps of: obtaining an original current curve of a first pixel of a panel; measuring a first current curve of the first pixel and a second current curve of a second pixel adjacent to the first pixel; determining whether a first node of the first current curve exceeds a limit range; if the first node exceeds the limit range, determining the first node is a divergent point and determining whether a second node in the second current curve corresponding to the same gray scale as the first node exceeds the limit range; if the second node does not exceed the limit range, replacing the first node with the second node to generate a third current curve; inputting an original gray-scale to the original current curve to calculate a target current so as to map the target current to the third current curve to obtain a compensation gray-scale ; inputting a gray-scale compensation voltage to the first pixel to compensate a driving current of the first pixel according to the compensation gray-scale.

Description

Driving current compensation method and current compensation device

This case involves a compensation method and an electronic device. Specifically, this case involves a driving current compensation method and a current compensation device.

When current timing controllers measure the driving current data of pixel circuits, it is easy for the external compensation algorithm of the pixel circuit to make errors due to noise or serious degradation of the driving current curve of the pixel circuit.

Therefore, the above technology still has many defects, and it is necessary for practitioners in this field to develop other suitable drive current compensation methods.

One aspect of the present case involves a driving current compensation method. The driving current compensation method includes the following steps: obtaining an initial current curve of a first pixel of a panel; measuring a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; determining whether a first node of the first degradation current curve exceeds a first limit range; if the first node exceeds the first limit range, determining the first node as a divergence point, and determining whether a second node in the second degradation current curve corresponding to the same gray level as the first node is a divergence point; whether the second node exceeds the second limit range; if the second node does not exceed the second limit range, the first node of the first degraded current curve is replaced according to the second node of the second degraded current curve to generate a third degraded current curve; the original grayscale is input to the initial current curve to calculate the target current; the target current is mapped to the third degraded current curve to obtain a compensation grayscale; and the grayscale compensation voltage is input to the first pixel according to the compensation grayscale to compensate the driving current of the first pixel.

Another aspect of the case involves a driving current compensation method. The driving current compensation method includes the following steps: obtaining an initial current curve of a first pixel of a panel; measuring a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; determining whether a first slope between a first node and a second node of the first degradation current curve is lower than a first preset slope, the first node corresponding to a first gray scale, and the second node corresponding to a second gray scale; if the first slope is lower than the first preset slope, determining the first node as a divergence point, and determining whether a first slope between a third node and a fourth node of the second degradation current curve is lower than a first preset slope; whether the second slope of the first pixel is lower than the second preset slope, the third node corresponds to the first grayscale, and the fourth node corresponds to the second grayscale; if the second slope is not lower than the second preset slope, the first node of the first degraded current curve is replaced by the third node of the second degraded current curve to generate a third degraded current curve; the original grayscale is input to the initial current curve to calculate the target current, and the target current is mapped to the third degraded current curve to obtain a compensation grayscale; and the grayscale compensation voltage is input to the first pixel according to the compensation grayscale to compensate the driving current of the first pixel.

Another aspect of the present case involves a current compensation device. The current compensation device includes a panel and a timing controller. The panel includes a first pixel and a second pixel. The first pixel and the second pixel are adjacent. The timing controller is coupled to the first pixel and the second pixel, and is used to store an initial current curve of the first pixel. The timing controller is used to measure a first degradation current curve of the first pixel and a second degradation current curve of the second pixel. The timing controller is used to determine whether a first node of the first degradation current curve exceeds a first limit range. If the first node exceeds the first limit range, the timing controller is used to determine that the first node is a divergence point, and to determine whether a second node in the second degradation current curve corresponding to the same gray level as the first node exceeds a second limit range. If the second node does not exceed the second limit range, the timing controller is used to replace the first node of the first degraded current curve according to the second node of the second degraded current curve to generate a third degraded current curve. The timing controller is used to input the original grayscale to the initial current curve to calculate the target current. The timing controller is used to map the target current to the third degraded current curve to obtain a compensation grayscale. The timing controller is used to input a grayscale compensation voltage to the first pixel according to the compensation grayscale to compensate the driving current of the first pixel.

In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides a driving current compensation method and a current compensation device, which compensates the current curves of adjacent pixels to each other, thereby providing a grayscale compensation voltage of the compensation pixel from the outside to compensate the driving current of the pixel.

The following will clearly illustrate the spirit of the present invention with diagrams and detailed descriptions. After understanding the embodiments of the present invention, any person with ordinary knowledge in the relevant technical field can make changes and modifications based on the techniques taught by the present invention without departing from the spirit and scope of the present invention.

The terms used herein are only for describing specific embodiments and are not intended to be limiting of the present invention. Singular forms such as "a", "this", "here", "this" and "the" as used herein also include plural forms.

The words "include", "including", "have", "contain", etc. used in this article are open terms, meaning including but not limited to.

The terms used in this document generally have the ordinary meanings of each term used in this field, in the context of this case and in the specific context, unless otherwise specified. Certain terms used to describe this case will be discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art in describing this case.

FIG. 1 is a circuit block diagram of a current compensation device 100 according to some embodiments of the present invention. In some embodiments, referring to FIG. 1, the current compensation device 100 includes a panel 110, a timing controller 120, a gate driver 130, a source driver 140, and a sensing circuit 150. The panel 110 includes a first pixel P1, a second pixel P2 to an N-th pixel PN, a plurality of gate lines (e.g., a gate line G1 to an N-th gate line GN), a plurality of data lines (e.g., a data line DL1, a data line DL2 to an N-th data line DLN), and a signal line L1 to an N-th signal line LN. The first pixel P1 and the second pixel P2 are adjacent to each other.

The gate driver 130 is coupled to the first pixel P1, the second pixel P2 to the Nth pixel PN through a plurality of gate lines. The source driver 140 is coupled to the first pixel P1, the second pixel P2 to the Nth pixel PN through a plurality of data lines. The timing controller 120 is indirectly coupled to the first pixel P1, the second pixel P2 to the Nth pixel PN through the source driver 140 and the plurality of data lines. The sensing circuit 150 is coupled to the first pixel P1, the second pixel P2 to the Nth pixel PN through the signal line L1 to the Nth signal line LN, and is used to sense a plurality of sensing driving currents of the first pixel P1, the second pixel P2 to the Nth pixel PN.

FIG. 2 is an enlarged schematic diagram of a pixel area Z in the current compensation device 100 of FIG. 1 according to some embodiments of the present invention. In some embodiments, please refer to FIG. 1 and FIG. 2, FIG. 2 is an enlarged schematic diagram of a pixel area Z in the current compensation device 100 of FIG. 1. The first pixel P1 of FIG. 2 corresponds to the first pixel P1 of the current compensation device 100 of FIG. 1. The second pixel P2 of FIG. 2 corresponds to the second pixel P2 of the current compensation device 100 of FIG. 1.

In some embodiments, referring to FIG. 1 and FIG. 2 , the first pixel P1 generates a sensing driving current SI1, and transmits the sensing driving current SI1 back to the timing controller 120 through the signal line L1 via the sensing circuit 150. The timing controller 120 is used to output a compensation grayscale (not shown) according to the sensing driving current SI1, thereby outputting a grayscale compensation voltage Vdata1 to the first pixel P1 according to the compensation grayscale (not shown) to compensate the driving current I1 of the first pixel P1.

Similarly, the second pixel P2 adjacent to the first pixel P1 generates a sensing driving current SI2, and transmits it back to the timing controller 120 through the signal line L2 via the sensing circuit 150. The timing controller 120 is used to output a compensation grayscale (not shown) according to the sensing driving current SI2, thereby outputting a grayscale compensation voltage Vdata2 to the second pixel P2 according to the compensation grayscale (not shown) to compensate the driving current I2 of the second pixel P2.

In some embodiments, referring to FIG. 1 and FIG. 2 , the plurality of transistors of the first pixel P1 include P-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS). The plurality of transistors of the second pixel P2 include P-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS).

In some embodiments, referring to FIG. 1 and FIG. 2 , the plurality of transistors of the first pixel P1 include N-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS). The plurality of transistors of the second pixel P2 include N-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS).

It should be noted that the internal pixel circuits of the first pixel P1 and the second pixel P2 are not limited to the embodiments shown in the drawings of this case.

FIG. 3A and FIG. 3B are schematic diagrams of the step flow of the driving current compensation method 300 according to some embodiments of the present invention. In some embodiments, in order to make the driving current compensation method 300 of the present invention easy to understand, please refer to FIG. 1 to FIG. 4B together. FIG. 4A is a schematic diagram of a first degradation current curve C1 of the sensing driving current SI1 of the first pixel P1 of FIG. 2 according to some embodiments of the present invention. FIG. 4B is a schematic diagram of a second degradation current curve C2 of the sensing driving current SI2 of the second pixel P2 of FIG. 2 according to some embodiments of the present invention. In some embodiments, the driving current compensation method 300 can be executed by the current compensation device 100 of FIG. 1.

In step 310, an initial current curve of a first pixel of the panel is obtained.

In some embodiments, referring to FIGS. 1 to 3B , the timing controller 120 is used to obtain an initial current curve (not shown) of the first pixel P1 stored in a memory (not shown) of the current compensation device 100 .

In step 320, a first degradation current curve of a first pixel and a second degradation current curve of a second pixel adjacent to the first pixel are measured.

In some embodiments, referring to FIG. 1 to FIG. 4B , the timing controller 120 is used to store an initial current curve of the first pixel P1 (not shown in the figure). The timing controller 120 is used to measure a first degraded current curve C1 of the first pixel P1 and a second degraded current curve C2 of the second pixel P2.

In some embodiments, the first degradation current curve C1 includes nodes N1 to N5. Nodes N1 to N5 correspond to different gray levels (e.g., gray levels GL1 to GL5). The second degradation current curve C2 includes nodes N6 to N10. Nodes N6 to N10 correspond to different gray levels (e.g., gray levels GL1 to GL5). It should be noted that node N1 of the first degradation current curve C1 and node N6 of the second degradation current curve C2 correspond to the same gray level GL1. Nodes N2 and N7 correspond to the same gray level GL2. Nodes N3 and N8 correspond to the same gray level GL3. Nodes N4 and N9 correspond to the same gray level GL4. Node N5 and node N10 correspond to the same grayscale. In some embodiments, the number of grayscale levels includes 256. In some embodiments, the number of grayscale levels includes ²ⁿ , where n is a positive integer.

In step 330, it is determined whether the first node of the first degradation current curve exceeds a first limit range.

In some embodiments, please refer to Figures 1, 2, 3A and 4A, the timing controller 120 is used to determine whether the first node of the first degradation current curve C1 (for example, node N1 to node N5) exceeds the first limit range (i.e., the range squeezed by the upper limit UL1 and the lower limit LL1). If the first node of the first degradation current curve C1 does not exceed the first limit range, the timing controller 120 executes step 331. If the first node of the first degradation current curve C1 exceeds the first limit range, the timing controller 120 executes step 340. It should be noted that the timing controller 120 is used to determine whether all nodes on the first degradation current curve C1 exceed the first limit range.

Step 331, outputting the gray level of the first node of the first degraded current curve. In some embodiments, please refer to Figures 1, 2, 3A and 4A. If the first node of the first degraded current curve C1 (e.g., node N1 to node N3, node N5) does not exceed the first limit range, the timing controller 120 is used to output the gray level of the first node of the first degraded current curve C1 (e.g., node N1 to node N3, node N5) (e.g., gray level GL1 to gray level GL3, gray level GL5).

In step 340, it is determined whether the second node corresponding to the same gray level as the first node in the second degradation current curve exceeds the second limit range.

In some embodiments, according to the above step 330, if the first node (e.g., node N4) exceeds the first limit range (e.g., upper limit UL1), the timing controller 120 is used to determine that the first node is a divergence point, and determine whether the second node (e.g., node N9) corresponding to the same gray level (e.g., gray level GL4) as the first node (e.g., node N4) in the second degradation current curve C2 exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).

Next, if the second node corresponding to the same gray level as the first node in the second degraded current curve C2 exceeds the second limit range, the timing controller 120 executes step 341. If the second node (e.g., node N9) corresponding to the same gray level (e.g., gray level GL4) as the first node (e.g., node N4) in the second degraded current curve C2 does not exceed the second limit range, the timing controller 120 executes step 350.

In step 341, the compensation grayscale is stopped, and the voltage of the original grayscale is input to the first pixel. In some embodiments, please refer to Figures 1 and 2, the timing controller 120 is used to stop obtaining the compensation grayscale (not shown in the figure), and the voltage of the original grayscale is input to the first pixel P1 as the grayscale compensation voltage Vdata1.

In step 350, the first node of the first degradation current curve is replaced by the second node of the second degradation current curve to generate a third degradation current curve.

In some embodiments, please refer to FIG. 1, FIG. 2, FIG. 3B and FIG. 4B. If the second node (e.g., node N9) does not exceed the second limit range, the timing controller 120 is used to replace the first node (e.g., node N4) of the first degradation current curve C1 with the second node (e.g., node N9) of the second degradation current curve C2 to generate a third degradation current curve (not shown).

In step 360, the original grayscale is input to the initial current curve to calculate the target current.

In some embodiments, please refer to Figures 1 to 4B, the timing controller 120 is used to input the original gray level (not shown in the figure) to the initial current curve (not shown in the figure) to calculate the target current (not shown in the figure).

In step 370, the target current is mapped to the third degradation current curve to obtain a compensation gray level. In some embodiments, referring to FIGS. 1 to 3B, the timing controller 120 is used to map the target current (not shown) to the third degradation current curve (not shown) to obtain a compensation gray level (not shown).

In step 380, a grayscale compensation voltage is input to the first pixel according to the compensation grayscale to compensate the driving current of the first pixel. In some embodiments, referring to FIG. 1 to FIG. 3B, the timing controller 120 is used to input a grayscale compensation voltage Vdata1 to the first pixel P1 according to the compensation grayscale (not shown) to compensate the driving current I1 of the first pixel P1. Similarly, the method in which the timing controller 120 compensates the second pixel P2 is similar to the method in which the timing controller 120 compensates the first pixel P1, and will not be described in detail here.

FIG. 5A is a schematic diagram of a first degradation current curve C1 and an initial current curve OC1 of the first pixel P1 of FIG. 2 according to some embodiments of the present invention. FIG. 5B is a schematic diagram of a second degradation current curve C2 and an initial current curve OC2 of the second pixel P2 of FIG. 2 according to some embodiments of the present invention.

In some embodiments, please refer to FIG. 5A , the upper limit UL1 can be adjusted to one of the upper limit UL1’ and the upper limit UL1’’. In some embodiments, the lower limit LL1 can be adjusted to one of the lower limit LL1’ and the lower limit LL1’’. The upper limit UL1 and the lower limit LL1 of the first limit range can be adjusted according to actual needs and are not limited to the embodiments of this case. The initial current curve OC1 is the current curve of the first pixel P1 just out of the factory. The first degradation current curve C1 is the current curve of the first pixel P1 running for a period of time.

In some embodiments, please refer to FIG. 5B , the upper limit UL2 can be adjusted to one of the upper limit UL2’ and the upper limit UL2’’. In some embodiments, the lower limit LL2 can be adjusted to one of the lower limit LL2’ and the lower limit LL2’’. The upper limit UL2 and the lower limit LL2 of the second limit range can be adjusted according to actual needs and are not limited to the embodiments of this case. The initial current curve OC2 is the current curve of the second pixel P2 just out of the factory. The second degradation current curve C2 is the current curve of the second pixel P2 after running for a period of time.

In some embodiments, please refer to FIG. 5A and FIG. 5B , the first limit range of the first degradation current curve C1 and the second limit range of the second degradation current curve C2 may be the same or different. It should be noted that, since the first pixel P1 and the second pixel P2 are adjacent pixels, the initial current curve OC1 and the initial current curve OC2. In practice, the initial current curve OC1 and the initial current curve OC2 may have slight differences due to process errors.

FIG. 6A is a schematic diagram of a third degradation current curve C3 of the first pixel P1 of FIG. 2 according to some embodiments of the present invention. FIG. 5B is a schematic diagram of a degradation current curve C4 of the second pixel P2 of FIG. 2 according to some embodiments of the present invention.

In some embodiments, please refer to Figure 1, Figure 4A, Figure 4B, and Figure 6A. If the second node (for example, node N9) of the second degradation current curve C2 does not exceed the second limit range, the timing controller 120 is used to replace the first node (for example, node N4) of the first degradation current curve C1 according to the second node (for example, node N9) of the second degradation current curve C2 to generate a third degradation current curve C3 as shown in Figure 6A, wherein the node N4 of the first degradation current curve C1 in Figure 6A is replaced by the node N4' of the third degradation current curve C3 in Figure 6A.

In some embodiments, please refer to FIG. 1, FIG. 4A, FIG. 4B, and FIG. 6B, the timing controller 120 is further used to determine whether the second node (e.g., node N6 to node N10) of the second degradation current curve C2 exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).

Next, if the second node (e.g., node N7) exceeds the first limit range (e.g., lower limit LL2), the timing controller 120 is used to determine that the second node (e.g., node N7) is a divergence point, and determine whether the first node (e.g., node N2) corresponding to the same gray level (e.g., gray level GL2) as the second node (e.g., node N7) in the first degradation current curve C1 exceeds the first limit range (i.e., the range squeezed by the upper limit UL1 and the lower limit LL1).

Furthermore, please refer to FIG. 1, FIG. 4A, FIG. 4B, and FIG. 6B. If the first node (e.g., node N2) does not exceed the second limit range, the timing controller 120 is used to replace the second node (e.g., node N7) of the second degradation current curve C1 according to the first node (e.g., node N2) of the first degradation current curve C1 to generate the degradation current curve C4 shown in FIG. 6B, wherein the node N7 of the second degradation current curve C2 of FIG. 4B is replaced by the node N7' of the degradation current curve C4 of FIG. 6B.

FIG. 7 is a schematic diagram of the initial current curve OC1 and the third degradation current curve C3 of the first pixel P1 according to some embodiments of the present invention. The embodiment of FIG. 7 is the third degradation current curve C3 of the first pixel P1 in FIG. 5A plus the initial current curve OC1 of the first pixel P1.

In some embodiments, referring to FIG. 1 , FIG. 2 , and FIG. 7 , the timing controller 120 is used to input the original gray level GL _O to the initial current curve OC1 to calculate the target current _IT . The timing controller 120 is used to map the target current _IT to the third degraded current curve C3 to obtain the compensation gray level GL _T. The timing controller 120 is used to input the gray level compensation voltage Vdata1 to the first pixel P1 according to the compensation gray level GL _T to compensate the driving current I1 of the first pixel P1.

In some embodiments, the timing controller 120 is further configured to determine whether the target current _IT can be mapped from the initial current curve OC1 to the third degraded current curve C3. If the target current _IT can be mapped from the initial current curve OC1 to the third degraded current curve C3, the compensation gray level GL _T is obtained.

FIG. 8 is a schematic diagram of an initial current curve OC1 and a degraded current curve C5 of a first pixel P1 according to some embodiments of the present invention. In some embodiments, referring to FIG. 1, FIG. 2 and FIG. 8, the timing controller 120 is used to input the original gray level GL _O to the initial current curve OC1 to calculate the target current _IT . The timing controller 120 is used to map the target current _IT to the degraded current curve C5 to obtain the compensation gray level GL _T , thereby outputting the gray level compensation voltage Vdata1 shown in FIG. 2 according to the compensation gray level GL _T.

In some embodiments, the timing controller 120 is further used to determine whether the target current _IT can be mapped from the initial current curve OC1 to the degraded current curve C5. If the target current _IT cannot be mapped from the initial current curve OC1 to the degraded current curve C5, the timing controller 120 is used to set the highest grayscale voltage as the grayscale compensation voltage Vdata1 shown in FIG. 2. In some embodiments, the color depth is 8 bits, and its grayscale range is from the 0th to the 255th. The total number of grayscales is 256. The highest grayscale voltage here is the voltage value corresponding to the 255th grayscale in the data voltage output by the panel 110 of the current compensation device 100 in FIG. 1. In some embodiments, the color depth is n bits, and the number of gray levels is ²ⁿ , where n is a positive integer. The highest gray level voltage here is the voltage value corresponding to the ^2n- 1th gray level in the data voltage output by the panel 110 of the current compensation device 100 in FIG. 1.

It should be noted that the degraded current curve C5 is a curve after the nodes of the first degraded current curve C1 are determined to be divergent points and replaced. It should be further noted that due to the serious degradation of the degraded current curve C5, the nodes above the node N13 of the initial current curve OC1 cannot correspond to the degraded current curve C5.

FIG. 9A and FIG. 10A are schematic diagrams of a degradation current curve C6 of the sensing driving current SI1 of the first pixel P1 of FIG. 2 according to some embodiments of the present invention. FIG. 9B and FIG. 10B are schematic diagrams of a degradation current curve C7 of the sensing driving current SI2 of the second pixel P2 of FIG. 2 according to some embodiments of the present invention. Both the degradation current curve C6 and the degradation current curve C7 include a plurality of line segments.

In some embodiments, referring to FIG. 1 , FIG. 2 and FIG. 9A , the timing controller 120 is used to determine whether the nodes (eg, nodes N21 to N25 ) of the degradation current curve C6 exceed the first limit range (ie, the range between the upper limit UL1 and the lower limit LL1 ).

Next, if the node N23 exceeds the first limit range (e.g., the upper limit UL1), the timing controller 120 is used to determine that the node N23 is a divergence point, and to determine whether the node N28 corresponding to the same gray level (e.g., gray level GL3) as the node N23 in the degradation current curve C7 exceeds the second limit range (i.e., the range squeezed by the upper limit UL2 and the lower limit LL2).

Furthermore, please refer to Figures 1, 2, 9A to 10B. If the node N28 exceeds the second limit range, the timing controller 120 is used to determine that the node N28 is a divergence point, and sets the node N23 to zero, and sets the two line segments connected to the node N23 among the multiple line segments of the degradation current curve C6 of the first pixel P1 (i.e., line segment N22N23 and line segment N23N24) as the stop compensation interval to generate the degradation current curve C6 as shown in Figure 10A.

In addition, please refer to Figures 1, 2, 9A to 10B. The timing controller 120 is used to set the node N28 to zero, and set the two line segments connected to the node N28 (i.e., line segment N27N28 and line segment N28N29) among the multiple line segments of the degradation current curve C7 of the second pixel P1 as the stop compensation interval to generate the degradation current curve C7 as shown in Figure 10B.

FIG. 11 is a schematic diagram of the initial current curve OC1 and the degradation current curve C8 of the first pixel P1 according to some embodiments of the present invention. The embodiment of FIG. 10A is that the node N23' of the degradation current curve C6 is the divergence point, and the embodiment of FIG. 10B is that the node N28' of the degradation current curve C7 is the divergence point. Therefore, the two adjacent line segments connected to the node N23' are set as the stop compensation interval A2 to generate the degradation current curve C8 shown in FIG. 11.

Next, please refer to Figures 1, 2 and 11. If the target current _IT is mapped from the initial current curve OC1 to the stop compensation interval A2 of the degradation current curve C8, and the slope of the degradation current curve C8 is abnormal, the timing controller 120 is used to stop obtaining the compensation grayscale (not shown in the figure) and use the voltage of the original grayscale _GLO as the grayscale compensation voltage Vdata1 to input to the first pixel P1, so as to compensate the driving current I1 of the first pixel P1.

If the target current _IT is mapped from the initial current curve OC1 to outside the stop compensation interval A2 of the degradation current curve C8 (i.e., interval A1 and interval A3), a compensation grayscale (not shown in the figure) is obtained, and a grayscale compensation voltage Vdata1 is output according to the compensation grayscale (not shown in the figure) to compensate the driving current I1 of the first pixel P1.

FIG. 12A and FIG. 12B are schematic diagrams of the step flow of the driving current compensation method 400 according to some embodiments of the present invention. In some embodiments, in order to make the driving current compensation method 400 of the present invention easier to understand, please refer to FIG. 1, FIG. 2, FIG. 4A and FIG. 4B together. In some embodiments, the driving current compensation method 400 can be executed by the current compensation device 100 of FIG. 1.

In step 410, an initial current curve of the first pixel of the panel is obtained. In some embodiments, please refer to Figures 1, 2, 4A, 4B and 12A, the timing controller 120 is used to obtain the initial current curve of the first pixel P1 stored in the memory (not shown) of the current compensation device 100 (not shown in the figure).

In step 420, a first degradation current curve of a first pixel and a second degradation current curve of a second pixel adjacent to the first pixel are measured.

In some embodiments, referring to FIG. 1, FIG. 2, FIG. 4A, FIG. 4B, and FIG. 12A, the timing controller 120 is used to store the initial current curve of the first pixel P1. The timing controller 120 is used to measure the first degradation current curve C1 of the first pixel P1 and the second degradation current curve C2 of the second pixel P2.

In step 430, it is determined whether the first slope between the first node and the second node of the first degraded current curve is lower than the first preset slope.

In some embodiments, please refer to FIG. 1, FIG. 4A and FIG. 12A, the timing controller 120 is further used to determine whether the first slope between the first node (e.g., node N4) and the second node (e.g., node N5) of the first degradation current curve C1 is lower than the first preset slope. The first node (e.g., node N4) corresponds to the first gray level (e.g., gray level GL4). The second node (e.g., node N5) corresponds to the second gray level (e.g., gray level GL5).

Next, if the first slope is not lower than the first preset slope, the timing controller 120 executes step 431. If the first slope is lower than the first preset slope, the timing controller 120 executes step 440. It should be noted that the timing controller 120 is used to determine whether the slopes between all nodes on the first degradation current curve C1 exceed the first preset slope.

Step 431, outputting the gray level of the first node of the first degraded current curve. In some embodiments, please refer to Figures 1, 2, 4A and 12A. If the first node of the first degraded current curve C1 (e.g., node N1 to node N3, node N5) does not exceed the first limit range, the timing controller 120 is used to output the gray level of the first node of the first degraded current curve C1 (e.g., node N1 to node N3, node N5) (e.g., gray level GL1 to gray level GL3, gray level GL5).

In step 440, it is determined whether the second slope between the third node and the fourth node of the second degradation current curve is lower than the second preset slope. In some embodiments, according to the above step 430, please refer to Figure 4B and Figure 12A. If the first slope is lower than the first preset slope, the first node is determined to be a divergence point, and it is determined whether the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second degradation current curve C2 is lower than the second preset slope. The third node (e.g., node N9) corresponds to the first grayscale (e.g., grayscale GL4). The fourth node (e.g., node 10) corresponds to the second grayscale (e.g., grayscale GL5).

Next, if the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second degraded current curve C2 is lower than the second preset slope, the timing controller 120 executes step 441. If the second slope between the third node (e.g., node N9) and the fourth node (e.g., node N10) of the second degraded current curve C2 is not lower than the second preset slope, the timing controller 120 executes step 450.

In step 441, the compensation gray level is stopped, and the voltage of the original gray level is input to the first pixel. In some embodiments, please refer to FIG. 1 and FIG. 12A, the timing controller 120 is used to stop obtaining the compensation gray level (not shown in the figure) and input the voltage of the original gray level (not shown in the figure) to the first pixel P1.

In step 450, the first node of the first degradation current curve is replaced by the third node of the second degradation current curve to generate a third degradation current curve. In some embodiments, please refer to Figures 1, 2, 4B and 12B. If the second slope is not lower than the second preset slope, the first node of the first degradation current curve C1 (e.g., node N4) is replaced by the third node of the second degradation current curve C2 (e.g., node N9) to generate a third degradation current curve (not shown). It should be noted that the first preset slope and the second preset slope can be the same or different, and can be designed according to actual needs.

In step 460, the original grayscale is input to the initial current curve to calculate the target current.

In some embodiments, please refer to Figures 1, 2, 4B and 12B, the timing controller 120 is used to input the original grayscale to the initial current curve (not shown in the figure) to calculate the target current (not shown in the figure).

In step 470, the target current is mapped to the third degraded current curve to obtain a compensation gray level. In some embodiments, please refer to Figures 1, 2, 4B and 12B, the timing controller 120 is used to map the target current (not shown) to the third degraded current curve (not shown) to obtain a gray level compensation voltage (not shown).

In step 480, a grayscale compensation voltage is input to the first pixel according to the compensation grayscale to compensate the driving current of the first pixel. In some embodiments, please refer to Figures 1, 2, 4B and 12B, the timing controller 120 is used to input a grayscale compensation voltage Vdata1 to the first pixel P1 according to the compensation grayscale (not shown in the figure) to compensate the driving current I1 of the first pixel P1. Similarly, the method in which the timing controller 120 compensates the second pixel P2 is similar to the method in which the timing controller 120 compensates the first pixel P1, which will not be described in detail here.

In some embodiments, the current compensation device 100 of the present invention is used to independently execute the driving current compensation method 300. In some embodiments, the current compensation device 100 of the present invention is used to independently execute the driving current compensation method 400.

In some embodiments, the current compensation device 100 of the present invention can simultaneously execute the driving current compensation method 300 and the driving current compensation method 400, that is, it can simultaneously determine whether multiple nodes of the degraded current curve exceed the limit range and whether the slope of the line segment between the nodes exceeds the preset slope.

FIG. 13 is a schematic diagram of the initial current curve OC and the degraded current curve C9 of the first pixel P1 of FIG. 2 according to some embodiments of the present invention. In some embodiments, please refer to FIG. 1, FIG. 2 and FIG. 13. The multiple nodes of the degraded current curve C9 do not exceed the limit range (i.e., the range squeezed by the upper limit UL and the lower limit LL), but the slope of the curve segment of the degraded current curve C9 is lower than the preset slope. Therefore, the concave curve segment is set as the above-mentioned stop compensation interval. The values of the initial current curve OC and the degraded current curve C9 of FIG. 13 are listed below.

Please refer to Table 1 and Figure 13. The embodiment of Figure 13 is the degradation current curve of any pixel of the panel 110 of Figure 1 with a color depth of 12 bits, and the number of gray levels is 4096. The degradation current curve of Figure 13 C9 The curve segment between gray level 880 and gray level 3104 is the stop compensation interval (not shown in the figure), and the voltage of the original gray level (not shown in the figure) is used as the gray level compensation voltage (not shown in the figure). Except for the stop compensation interval (not shown in the figure), the initial current meander OC is mapped to the degraded current curve C9 according to the target current (not shown in the figure) to obtain the compensation gray level (not shown in the figure), so as to obtain the gray level compensation voltage (not shown in the figure) according to the compensation gray level (not shown in the figure).

According to the above-mentioned embodiments, this case provides a driving current compensation method and a current compensation device, by which the current curves of adjacent pixels compensate each other, so as to provide a grayscale compensation voltage of the compensation pixel from the outside to compensate the driving current of the pixel. In addition, if part of the current curves of adjacent pixels cannot compensate each other, the original grayscale voltage is input.

Although this case is disclosed as above with detailed embodiments, this case does not exclude other feasible embodiments. Therefore, the scope of protection of this case shall be defined by the scope of the attached patent application, and shall not be limited by the aforementioned embodiments.

For those skilled in the art, various modifications and improvements can be made to the present invention without departing from the spirit and scope of the present invention. Based on the above embodiments, all modifications and improvements made to the present invention are also covered by the protection scope of the present invention.

100: Current compensation device

110: Panel

120: Timing controller

130: Gate driver

140: Source driver

150: Sensing circuit

P1~PN: pixels

DL1~DLN: data line

G1~GN: Gate line

Z: Pixel area

L1~LN: signal line

I1~I2: driving current

SI1~SI2: Sense drive current

Vdata1~Vdata2: Grayscale compensation voltage

C1~C9: Degradation current curve

N1~N30,N4’,N7’,N23’,N28’: nodes

UL, UL1, UL1’, UL1”, UL2, UL2’, UL2”: upper limit

LL, LL1, LL1’, LL1”, LL2, LL2’, LL2”: lower limit

GL1~GL5: Grayscale

OC, OC1~OC2: Initial current curve

GL _O : Original Grayscale

GL _T : Compensation Gray Level

I _T : Target current

A1,A3: Interval

A2: Stop compensation interval

300:Methods

310~380: Steps

400:Method

410~480: Steps

The content of the present invention can be better understood by referring to the implementation methods in the subsequent paragraphs and the following figures: Figure 1 is a schematic diagram of a circuit block of a current compensation device according to some embodiments of the present invention; Figure 2 is an enlarged schematic diagram of a pixel area of a current compensation device according to some embodiments of the present invention; Figures 3A and 3B are schematic diagrams of the step flow of a driving current compensation method according to some embodiments of the present invention; Figure 4A is a schematic diagram of a current curve of a pixel according to some embodiments of the present invention; Figure 4B is a schematic diagram of a current curve of a pixel according to some embodiments of the present invention; Figure 5A is a schematic diagram of a current curve of a pixel according to some embodiments of the present invention; Figure 5B is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 6A is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 6B is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 7 is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 8 is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 9A is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 9B is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 10A is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; Figure 10B is a schematic diagram of a current curve of a pixel drawn according to some embodiments of the present invention; FIG. 11 is a schematic diagram of a current curve of a pixel according to some embodiments of the present invention; FIG. 12A and FIG. 12B are schematic diagrams of the step flow of a driving current compensation method according to some embodiments of the present invention; and FIG. 13 is a schematic diagram of a current curve of a pixel according to some embodiments of the present invention.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

OC1: Initial current curve C3: Degraded current curve N1~N3, N5, N11~N15, N4': Node GL1~ GL5: Gray level GL _O : Original gray level GL _T : Compensated gray level I _T : Target current

Claims (10)

A driving current compensation method includes: Obtaining an initial current curve of a first pixel of a panel; Measuring a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; Determining whether a first node of the first degradation current curve exceeds a first limit range; If the first node exceeds the first limit range, determining the first node to be a divergence point, and determining whether a second node in the second degradation current curve corresponding to the same gray level as the first node exceeds a second limit range; If the second node does not exceed the second limit range, replacing the first node of the first degradation current curve according to the second node of the second degradation current curve to generate a third degradation current curve; Input an original grayscale to the initial current curve to calculate a target current; Map the target current to the third degraded current curve to obtain a compensation grayscale; and Input a grayscale compensation voltage to the first pixel according to the compensation grayscale to compensate a driving current of the first pixel. The driving current compensation method as described in claim 1, wherein the step of mapping the target current to the third degraded current curve to obtain the compensation gray level includes: Determining whether the target current can be mapped from the initial current curve to the third degraded current curve; and If the target current can be mapped from the initial current curve to the third degraded current curve, obtaining the compensation gray level. The driving current compensation method as described in claim 2, wherein the step of mapping the target current to the third degraded current curve to obtain the compensation grayscale further includes: if the target current cannot be mapped from the initial current curve to the third degraded current curve, setting a maximum grayscale voltage as the grayscale compensation voltage, wherein the maximum grayscale voltage includes a voltage value corresponding to the ²ⁿ -1th grayscale level in a data voltage output by the panel, where n is a positive integer. The driving current compensation method as described in claim 1, wherein the first degradation current curve includes a plurality of line segments, wherein if the first node exceeds the first limit range, the first node is determined to be the divergence point, and the step of determining whether the second node corresponding to the same gray level as the first node in the second degradation current curve exceeds the second limit range includes: If the second node exceeds the second limit range, the second node is determined to be the divergence point, and the first node and the second node are set to zero, and the two line segments connected to the first node in the line segments of the first degradation current curve are set as a stop compensation interval to generate the third degradation current curve. The driving current compensation method as described in claim 4, wherein the step of mapping the target current to the third degraded current curve to obtain the compensation grayscale includes: If the target current is mapped from the initial current curve to the stop compensation interval of the third degraded current curve, then stop obtaining the compensation grayscale, and use a voltage value of the original grayscale to input to the first pixel to compensate the driving current of the first pixel; and If the target current is mapped from the initial current curve to the stop compensation interval of the third degraded current curve, then obtain the compensation grayscale to compensate the driving current of the first pixel. A driving current compensation method comprises: Obtaining an initial current curve of a first pixel of a panel; Measuring a first degradation current curve of the first pixel and a second degradation current curve of a second pixel adjacent to the first pixel; Determining whether a first slope between a first node and a second node of the first degradation current curve is lower than a first preset slope, wherein the first node corresponds to a first grayscale, wherein the second node corresponds to a second grayscale; If the first slope is lower than the first preset slope, determining the first node to be a divergence point, and determining whether a second slope between a third node and a fourth node of the second degradation current curve is lower than a second preset slope, wherein the third node corresponds to the first grayscale, wherein the fourth node corresponds to the second grayscale; If the second slope is not lower than the second preset slope, the first node of the first degraded current curve is replaced by the third node of the second degraded current curve to generate a third degraded current curve; Input an original grayscale to the initial current curve to calculate a target current; Map the target current to the third degraded current curve to obtain a compensation grayscale; and Input a grayscale compensation voltage to the first pixel according to the compensation grayscale to compensate a driving current of the first pixel. The driving current compensation method as described in claim 6, wherein the step of mapping the target current to the third degraded current curve to obtain the compensation gray level includes: Determining whether the target current can be mapped from the initial current curve to the third degraded current curve; and If the target current can be mapped from the initial current curve to the third degraded current curve, obtaining the compensation gray level. The driving current compensation method as described in claim 7, wherein the step of mapping the target current to the third degraded current curve to obtain the compensation grayscale further includes: if the target current cannot be mapped from the initial current curve to the third degraded current curve, setting a maximum grayscale voltage as the grayscale compensation voltage, wherein the maximum grayscale voltage includes a voltage value corresponding to the ²ⁿ -1th grayscale level in a data voltage output by the panel, where n is a positive integer. A current compensation device comprises: a panel comprising: a first pixel; and a second pixel, wherein the first pixel and the second pixel are adjacent to each other; and a timing controller coupled to the first pixel and the second pixel and used to store an initial current curve of the first pixel, wherein the timing controller is used to measure a first degradation current curve of the first pixel and a second degradation current curve of the second pixel, wherein the timing controller is used to determine whether a first node of the first degradation current curve exceeds a first limit range, wherein if the first node exceeds the first limit range, the timing controller is used to determine that the first node is a divergence point, and determine whether a second node in the second degradation current curve corresponding to the same gray level as the first node exceeds a second limit range. limit range, wherein if the second node does not exceed the second limit range, the timing controller is used to replace the first node of the first degraded current curve according to the second node of the second degraded current curve to generate a third degraded current curve, wherein the timing controller is used to input an original grayscale to the initial current curve to calculate a target current, wherein the timing controller is used to map the target current to the third degraded current curve to obtain a compensation grayscale, wherein the timing controller is used to input a grayscale compensation voltage to the first pixel according to the compensation grayscale to compensate a driving current of the first pixel. A current compensation device as described in claim 9, wherein the first degraded current curve includes a plurality of line segments, wherein if the second node exceeds the second limit range, the timing controller is used to determine that the second node is the divergence point, and sets the first node and the second node to zero, and sets the two interval line segments connected to the first node in the first degraded current curve as a stop compensation interval to generate the third degraded current curve, wherein if the target current is mapped from the initial current curve When the compensation stop interval of the third degradation current curve is reached, the timing controller stops obtaining the compensation gray level and uses a voltage value of the original gray level to input into the first pixel to compensate for the driving current of the first pixel. If the target current is mapped from the initial current curve to outside the compensation stop interval of the third degradation current curve, the timing controller obtains the compensation gray level to compensate for the driving current of the first pixel according to the compensation gray level.

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