TWI862281B - Micro-electro-mechanical system package and fabrication method thereof - Google Patents

Abstract

A MEMS package includes an interconnect structure disposed on a wafer. A first device substrate including a first MEMS device and a second device substrate including a second MEMS device are laterally separated from each other, disposed on the wafer and bonded to the interconnect structure. A first cap substrate with a first cavity is bonded to the first device substrate. A second cap substrate with a second cavity is bonded to the second device substrate. A getter is disposed on the interconnect structure and directly under the second MEMS device. The first cavity has a first pressure, and the second cavity has a second pressure lower than the first pressure.

Description

Micro-electromechanical package and manufacturing method thereof

The present disclosure relates to a micro-electromechanical system (MEMS) package, and more particularly to a MEMS package comprising different MEMS components, each of which has different pressures in its corresponding cavities, and a method for manufacturing the MEMS package.

Microelectromechanical (MEMS) devices are miniature components that integrate mechanical and electrical components to sense physical quantities and/or interact with the surrounding environment. MEMS devices such as accelerometers, gyroscopes, pressure sensors, and microphones have been widely used in many modern electronic products. For example, inertial measurement units (IMUs) composed of accelerometers and/or gyroscopes are common in tablets, cars, or smartphones. For some applications, it is necessary to integrate various MEMS components into a MEMS package. However, for different MEMS components that require different pressures, these MEMS components need to be manufactured separately under different environmental pressures and then packaged together. Therefore, the current MEMS packaging process is relatively complex and requires a relatively large footprint.

In view of this, the present disclosure provides a microelectromechanical system (MEMS) package and a manufacturing method thereof to overcome the shortcomings of current MEMS packages. The MEMS package disclosed herein includes a getter disposed on an interconnect structure located on a wafer, and the getter is located directly below a MEMS component that requires a relatively high vacuum, thereby reducing the pressure in a cavity directly above the MEMS component. The MEMS package includes different MEMS components, and different cavities corresponding to the different MEMS components have different pressures, and MEMS components corresponding to different pressures can be manufactured and packaged simultaneously on the same wafer. Therefore, compared to current MEMS packages, the entire manufacturing process of the MEMS package disclosed herein is simplified, and it occupies a smaller area.

According to an embodiment of the present disclosure, a micro-electromechanical package is provided, including a wafer, an interconnection structure, a protective layer, a first component substrate, a second component substrate, a first cover plate, a second cover plate, and an air getter. The interconnection structure is arranged on the wafer, and the protective layer is arranged on the interconnection structure. The first component substrate includes a first micro-electromechanical component, which is arranged on the wafer and bonded to the interconnection structure. The second component substrate includes a second micro-electromechanical component, which is laterally separated from the first component substrate, arranged on the wafer and bonded to the interconnection structure. The first cover plate has a first cavity and is bonded to the first component substrate. The second cover plate has a second cavity and is bonded to the second component substrate. The air getter is arranged on the interconnection structure and in the opening of the protective layer, and is located directly below the second micro-electromechanical component. In addition, the first cavity has a first pressure, and the second cavity has a second pressure lower than the first pressure.

According to an embodiment of the present disclosure, a method for manufacturing a micro-electromechanical package is provided, comprising the following steps: providing a cover wafer, in which a first cavity and a second cavity are formed; providing a component wafer, and bonding the component wafer to the cover wafer; patterning the component wafer to form a first micro-electromechanical component and a second micro-electromechanical component that are laterally separated from each other, wherein the first cavity corresponds to the first micro-electromechanical component, and the second cavity corresponds to the second micro-electromechanical component; providing A wafer having an interconnect structure formed thereon; forming a getter on the interconnect structure; bonding the component wafer to the interconnect structure on the wafer under a first pressure, wherein both the first cavity and the second cavity have the first pressure, and the getter is located directly below the second micro-electromechanical component; and activating the getter to reduce the first pressure in the second cavity to a second pressure, wherein the first cavity has the first pressure and the second cavity has the second pressure lower than the first pressure.

In order to make the features of the present disclosure clear and easy to understand, embodiments are specifically cited below and described in detail with reference to the accompanying drawings.

The present disclosure provides several different embodiments that can be used to implement different features of the present disclosure. For the purpose of simplifying the description, the present disclosure also describes examples of specific components and layouts. The purpose of providing these embodiments is only for illustration and not for any limitation. For example, the description below of "a first feature is formed on or above a second feature" may mean "the first feature is in direct contact with the second feature" or "there are other features between the first feature and the second feature", so that the first feature and the second feature are not in direct contact. In addition, various embodiments in the present disclosure may use repeated reference symbols and/or text annotations. These repeated reference symbols and annotations are used to make the description more concise and clear, and are not used to indicate the relationship between different embodiments and/or configurations.

In addition, for the spatially related descriptive terms mentioned in the present disclosure, such as "below", "low", "down", "above", "above", "up", "top", "bottom" and similar terms, for the convenience of description, their usage is to describe the relative relationship between one element or feature and another (or multiple) elements or features in the drawings. In addition to the orientation shown in the drawings, these spatially related terms are also used to describe the possible orientations of the MEMS package during use and operation. As the orientation of the MEMS package is different (rotated 90 degrees or other orientations), the spatially related descriptions used to describe its orientation should also be interpreted in a similar manner.

Although the present disclosure uses the terms first, second, third, etc. to describe various elements, components, regions, layers, and/or blocks, it should be understood that these elements, components, regions, layers, and/or blocks should not be limited by these terms. These terms are only used to distinguish a certain element, component, region, layer, and/or block from another element, component, region, layer, and/or block, and they themselves do not mean or represent any previous sequence of the element, nor do they represent the arrangement order of a certain element and another element, or the order in the manufacturing method. Therefore, without departing from the scope of the specific embodiments of the present disclosure, the first element, component, region, layer, or block discussed below can also be referred to as the second element, component, region, layer, or block.

The terms "about" or "substantially" mentioned in this disclosure generally mean within 20% of a given value or range, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. It should be noted that the quantities provided in the specification are approximate quantities, that is, in the absence of a specific description of "about" or "substantially", the meaning of "about" or "substantially" can still be implied.

The terms "coupled", "coupled", and "electrically connected" mentioned in this disclosure include any direct and indirect electrical connection means. For example, if the text describes a first component coupled to a second component, it means that the first component can be directly electrically connected to the second component, or indirectly electrically connected to the second component through other devices or connection means.

Although the invention disclosed herein is described below by means of specific embodiments, the inventive principle of the invention disclosed herein can also be applied to other embodiments. In addition, in order not to obscure the inventive spirit of the invention disclosed herein, certain details will be omitted, and the omitted details belong to the knowledge scope of a person with ordinary knowledge in the relevant technical field.

The present disclosure relates to a microelectromechanical (MEMS) package and a method for manufacturing the same, wherein the MEMS package includes different MEMS components having different pressures in their respective cavities, and these MEMS components are manufactured and packaged simultaneously on the same wafer. In the MEMS package of the present disclosure, a getter is disposed on an interconnect structure located on the wafer, and the getter is located directly below the MEMS component requiring a higher vacuum, thereby reducing the pressure in the cavity directly above the MEMS component. In some embodiments, the MEMS package includes an inertial measurement unit (IMU), which includes an accelerometer having a low vacuum or atmospheric pressure and a gyroscope having a high vacuum. Compared to current MEMS packages, the entire manufacturing process of the MEMS package of the present disclosure is more simplified, and the MEMS package occupies a smaller area.

FIG. 1 is a cross-sectional schematic diagram of a MEMS package 100 according to an embodiment of the present disclosure, wherein the MEMS package 100 includes various MEMS components that are laterally separated from each other and packaged simultaneously on the same wafer. In some embodiments, the MEMS package 100 includes a first component substrate 120A and a second component substrate 120B, wherein the first component substrate 120A includes a first MEMS component 122 located in a first MEMS region 100A, and the second component substrate 120B includes a second MEMS component 124 located in a second MEMS region 100B, wherein the first MEMS region 100A and the second MEMS region 100B are separated by a scribe line SL. The first component substrate 120A and the second component substrate 120B are laterally separated from each other, and both are disposed on the same wafer 130, and both are bonded to an interconnect structure 132 formed on the wafer 130. The wafer 130 may include a plurality of complementary metal oxide semiconductor (CMOS) transistors or other devices formed therein, and the interconnect structure 132 includes a plurality of metal layers, a plurality of inter-metal dielectric (IMD) layers, and a plurality of vias in the IMD layer to connect two metal layers. The metal layer includes a top electrode layer 131, and the IMD layer includes a top dielectric layer 133 disposed below the top electrode layer 131. In addition, a passivation layer 134 is disposed on the interconnect structure 132, and the passivation layer 134 has a plurality of openings to expose conductive pads, a bonding area, and portions of the top electrode layer 131 or the top dielectric layer 133 of the interconnect structure 132, respectively.

In the micro-electromechanical package 100, the first MEMS element 122 and the second MEMS element 124 require different vacuum levels, and the MEMS structures of the two are different. The first MEMS element 122 and the second MEMS element 124 may each include various components, such as standoff bumps, grooves, proof masses, etc., and the planar layout of these components in the first MEMS element 122 is different from the planar layout in the second MEMS element. In order to make the figure concise and easy to understand, the MEMS structures of the first MEMS element 122 and the second MEMS element 124 are simplified in FIG. 1. For example, the first MEMS element 122 includes a plurality of grooves 123, and the second MEMS element 124 includes a plurality of grooves 125, wherein the planar layout of the grooves 123 is different from the planar layout of the grooves 125. In some embodiments, the first MEMS element 122 may be an accelerometer requiring low vacuum or atmospheric pressure, and the second MEMS element 124 may be a gyroscope requiring high vacuum, but is not limited thereto.

In addition, a first bonding sealing ring 126A is disposed on the bottom surface of the first element substrate 120A, and a second bonding sealing ring 126B is disposed on the bottom surface of the second element substrate 120B. The first bonding sealing ring 126A and the second bonding sealing ring 126B are bonded to the interconnection structure 132 by a bonding material 128, thereby bonding the first element substrate 120A and the second element substrate 120B to the wafer 130. The first bonding sealing ring 126A and the first element substrate 120A can be an integrally formed structure and have the same composition, such as silicon. The second bonding sealing ring 126B and the second element substrate 120B can also be an integrally formed structure and have the same composition, such as silicon. The bonding material 128 is composed of, for example, germanium (Ge) to form a eutectic bonding with the top electrode layer 131 of the interconnect structure 132. The first bonding sealing ring 126A, the second bonding sealing ring 126B and the bonding material 128 are all disposed in the bonding region of the interconnect structure 132.

In addition, the MEMS package 100 includes a first cover plate 110A and a second cover plate 110B. The first cover plate 110A has a first cavity 112 located directly above the first MEMS element 122 , and the second cover plate 110B has a second cavity 114 located directly above the second MEMS element 124 . The first cover plate 110A and the second cover plate 110B may have the same composition, such as silicon. The first cover plate 110A is bonded to the first component substrate 120A via the bonding layer 111, and the second cover plate 110B is also bonded to the second component substrate 120B via the bonding layer 111. The bonding layer 111 is arranged between the first component substrate 120A and the first cover plate 110A, and the bonding layer 111 is also arranged between the second component substrate 120B and the second cover plate 110B. In some embodiments, the bonding layer 111 may further extend into the first cavity 112 and the second cavity 114, and the bonding layer 111 may be conformally disposed on the sidewalls and the bottom surface of the first cavity 112 and the second cavity 114. The bonding layer 111 may be composed of, for example, silicon oxide. In some embodiments, a conductive layer 117 may be disposed on the surface of the first cover plate 110A and the second cover plate 110B. The conductive layer 117 may be a patterned conductive layer and electrically coupled to the first MEMS element 122, the second MEMS element 124 and the interconnect structure 132. The conductive layer 117 may be composed of, for example, aluminum (Al).

According to some embodiments of the present disclosure, the MEMS package 100 includes a getter 140B disposed on the interconnect structure 132 and directly below the second MEMS element 124. After being activated, the getter 140B can absorb gas in the second cavity 114, such as H ₂ , N ₂ , CO, CO ₂ or H ₂ O, thereby reducing the pressure in the second cavity 114, so that the first cavity 112 has a first pressure P1, and the second cavity 114 has a second pressure P2 lower than the first pressure P1. For example, the first pressure P1 can be a low vacuum or atmospheric pressure required by the first MEMS element 122, such as an accelerometer, and the second pressure P2 can be a high vacuum required by the second MEMS element 124, such as a gyroscope. In addition, when the first element substrate 120A and the second element substrate 120B are bonded to the interconnect structure 132, the getter 140B can be activated by heat treatment during the bonding process. For example, the getter 140B can be activated at a temperature of about 150°C to about 450°C. In some embodiments, the getter 140B can be composed of Ti, Ti-based alloys, Zr-based alloys, Zr-V-based alloys, Zr-Co-based alloys, or other suitable materials that can be used to absorb gas in the cavity of the micro-electromechanical package. Among them, the Ti-based alloy is, for example, Ti-Zr, Ti-Mo or Ti-Zr-V, the Zr-based alloy is, for example, Zr-Al, Zr-C or Zr-Fe, the Zr-V-based alloy is, for example, Zr-V-Fe or Zr-V-Mn, and the Zr-Co-based alloy is, for example, Zr-Co, Zr-Co-Ce or Zr-Co-La. In addition, the getter 140B may be a thin film having a thickness of about 1 μm to about 10 μm, or may be a thick film having a thickness of about 10 μm to about 1000 μm. In addition, the getter 140B may have a pattern corresponding to the planar layout of the trench 125 of the second MEMS element 124 .

In one embodiment, the getter 140B is disposed in the opening of the protective layer 134 and the getter 140B contacts the top surface of the top electrode layer 131 . The getter 140B can be electrically connected to the interconnect structure 132 through the top electrode layer 131 . In another embodiment, the getter 140B may be disposed on the same plane as the top electrode layer 131, and the getter 140B may contact the top surface of the top dielectric layer 133, and the getter 140B may be electrically connected to the interconnect structure 132 via vias in the top dielectric layer 133, or may be electrically connected to the interconnect structure 132 via portions of the top electrode layer 131 connected to the getter 140B. In some embodiments, the getter 140B may be configured as a conductive stopper of the second MEMS element 124, and the position of the getter 140B may correspond to the mass of the second MEMS element 124. In addition, the vertical projection area of the getter 140B overlaps with the vertical projection area of the second cavity 114. In some embodiments, the vertical projection area of the getter 140B is greater than or equal to the vertical projection area of the second cavity 114, thereby effectively absorbing the gas in the second cavity 114 to provide a high vacuum for the second MEMS element 124. In other embodiments, when the second MEMS element 124 requires a medium vacuum, the vertical projection area of the getter 140B may be smaller than the vertical projection area of the second cavity 114.

FIG. 2 is a cross-sectional schematic diagram of another embodiment of the present disclosure of a micro-electromechanical system package 100. The micro-electromechanical system package 100 of FIG. 2 includes a third component substrate 120C, which includes a third MEMS component 126 and is located in a third MEMS region 100C. The first MEMS region 100A and the third MEMS region 100C are separated by a scribe line SL. The details of each component in the first MEMS region 100A can refer to the description of FIG. 1 above, which will not be repeated here. The third element substrate 120C is also disposed on the same wafer 130 and bonded to the interconnect structure 132. The third MEMS element 126 requires a different vacuum degree from the first MEMS element 122, and the MEMS structure of the third MEMS element 126 is different from the MEMS structure of the first MEMS element 122. The third MEMS element 126 may include components such as support bumps, grooves, and mass blocks, and the planar layout of these components in the third MEMS element 126 is different from the planar layout in the first MEMS element 122. In order to make the diagram concise and easy to understand, the MEMS structures of the first MEMS element 122 and the third MEMS element 126 are simplified in FIG. 2. For example, the third MEMS element 126 includes a plurality of trenches 127, and the planar layout of the trenches 127 is different from the planar layout of the plurality of trenches 123 in the first MEMS element 122. In some embodiments, the third MEMS element 126 may be a gyroscope requiring high vacuum or medium vacuum, or an accelerometer requiring medium vacuum.

In addition, a third bonding seal ring 126C is disposed on the bottom surface of the third element substrate 120C, and the third bonding seal ring 126C is also bonded to the interconnection structure 132 through a bonding material 128. The third bonding seal ring 126C and the third element substrate 120C can be an integrally formed structure and have the same composition, such as silicon. In addition, the micro-electromechanical package 100 includes a third cover plate 110C, which has a third cavity 116 located directly above the third MEMS element 126, and the composition of the third cover plate 110C can be silicon. The third cover plate 110C is bonded to the third element substrate 120C through a bonding layer 111, and the bonding layer 111 is disposed between the third element substrate 120C and the third cover plate 110C. In addition, the bonding layer 111 may extend into the third cavity 116 to be disposed in a longitudinal direction on the sidewall and bottom surface of the third cavity 116. In addition, a conductive layer 117 may be disposed on the surface of the third cover plate 110C, which may be a patterned conductive layer electrically coupled to the third MEMS element 126.

As shown in FIG. 2 , in one embodiment, the MEMS package 100 includes a getter 140C disposed on the interconnect structure 132 and directly below the third MEMS element 126. The getter 140C can absorb the gas in the third cavity 116 after being activated, thereby reducing the pressure in the third cavity 116. In addition, the getter 140C can have a pattern corresponding to the groove 127 of the third MEMS element 126, so that the gas in the third cavity 116 is effectively absorbed through the groove 127 and multiple small areas of the getter 140C, so that the third pressure P3 of the third cavity 116 is lower than the first pressure P1 of the first cavity 112. For example, the third pressure P3 can be a medium vacuum required by the third MEMS element 126 such as a gyroscope or an accelerometer. In addition, when the first element substrate 120A and the third element substrate 120C are bonded to the interconnect structure 132, the getter 140C can be activated by heat treatment during the bonding process. For example, the getter 140C can be activated at a temperature of about 150° C. to about 450° C. In some embodiments, the composition of the getter 140C includes Ti, Ti-based alloys, Zr-based alloys, Zr-V-based alloys, Zr-Co-based alloys, or other suitable materials that can be used to absorb gas in the cavity of the MEMS package.

FIG. 3 is a cross-sectional schematic diagram of a MEMS package 100 according to another embodiment of the present disclosure. The MEMS package 100 in FIG. 3 includes a second MEMS area 100B and a third MEMS area 100C separated by a cutting line SL. The details of the components in the second MEMS area 100B and the third MEMS area 100C can refer to the description of the aforementioned FIG. 1 and FIG. 2, which will not be repeated here. The getter 140B located directly below the second MEMS element 124 can allow the second cavity 114 to have a second pressure P2, and the getter 140C located directly below the third MEMS element 126 can allow the third cavity 116 to have a third pressure P3, wherein the third pressure P3 is different from the second pressure P2. In addition, the second MEMS element 124 can be a gyroscope requiring a high vacuum, and the third MEMS element 126 can be a gyroscope or an accelerometer requiring a medium vacuum.

In some other embodiments, the MEMS package 100 may include a first MEMS area 100A, a second MEMS area 100B, and a third MEMS area 100C separated from each other by a scribe line SL, wherein the first cavity 112 located directly above the first MEMS element 122 has a first pressure P1, the second cavity 114 located directly above the second MEMS element 124 has a second pressure P2, and the third cavity 116 located directly above the third MEMS element 126 has a third pressure P3, and the third pressure P3 is different from the second pressure P2 and lower than the first pressure P1. According to some embodiments of the present disclosure, the MEMS package includes different MEMS elements, and the respective cavities corresponding to these MEMS elements have different pressures. By setting a getter, these MEMS elements can be packaged on the same wafer at the same time.

FIG. 4, FIG. 5, FIG. 6, FIG. 7 and FIG. 8 are cross-sectional schematic diagrams of some stages of a manufacturing method of a micro-electromechanical system package 100 according to an embodiment of the present disclosure. Referring to FIG. 4, in step S101, a cover wafer 110, such as a silicon wafer, is first provided, and then a first cavity 112 and a second cavity 114 are formed on the surface of the cover wafer 110 by an etching process. Then, a bonding layer 111 is formed on the cover wafer 110 and in the first cavity 112 and the second cavity 114 in a longitudinal direction to wrap the cover wafer 110. The bonding layer 111 is composed of, for example, silicon oxide, and the bonding layer 111 can be formed by a thermal oxidation process or a deposition process.

Next, still referring to FIG. 4 , in step S103, a device wafer 120, such as a silicon wafer, is provided, and the device wafer 120 is bonded to the cover wafer 110 by melt bonding to cover the first cavity 112 and the second cavity 114. Afterwards, the device wafer 120 is thinned by grinding or etching, and then patterned by photolithography and etching processes to form a first bonding sealing ring 126A, a second bonding sealing ring 126B and a support bump (not shown) on the surface of the device wafer 120. Afterwards, still referring to FIG. 4 , in step S105, a bonding material 128 such as Ge is formed on the first bonding sealing ring 126A and the second bonding sealing ring 126B through a deposition and patterning process. Then, the device wafer 120 is patterned through a photolithography and etching process to simultaneously form a first MEMS element 122 and a second MEMS element 124 that are laterally separated from each other, wherein the first MEMS element 122 is located directly above the first cavity 112, and the second MEMS element 124 is located directly above the second cavity 114. The first MEMS element 122 includes a plurality of trenches 123 connected to the first cavity 112, and the second MEMS element 124 includes a plurality of trenches 125 connected to the second cavity 114. In addition, by patterning the device wafer 120, a pre-cut line 121 is formed in the device wafer 120 at the scribe line SL between the first MEMS region 100A and the second MEMS region 100B. After step S105, a structure A is obtained, wherein the device wafer 120 includes a first MEMS element 122 and a second MEMS element 124, and the device wafer 120 is bonded to the cover wafer 110 having the first cavity 112 and the second cavity 114 formed therein.

Referring to FIG. 5 , in step S201, a wafer 130 is provided, on which an interconnection structure 132 is formed. The wafer 130 is, for example, a CMOS wafer, and the interconnection structure 132 includes a plurality of metal layers, a plurality of IMD layers, and a plurality of vias in the IMD layer for connecting two metal layers. In addition, the metal layer includes a top electrode layer 131, and the IMD layer includes a top dielectric layer 133 disposed below the top electrode layer 131. In addition, a protective layer 134 is deposited on the interconnection structure 132, and the composition of the protective layer 134 is, for example, silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof.

Next, still referring to FIG. 5 , in step S203A, the protective layer 134 is patterned by photolithography and etching processes to form a plurality of openings 135-1, 135-2, and 135-3. In one embodiment, the opening 135-1 exposes a portion of the top electrode layer 131, and a getter may be subsequently formed on a portion of the top electrode layer 131. In another embodiment, the opening 135-1 exposes a portion of the top dielectric layer 133, and a getter may be subsequently formed on a portion of the top dielectric layer 133. The bonding area of the interconnect structure 132 is exposed through the opening 135-2, and is subsequently used for bonding with the first bonding sealing ring 126A and the second bonding sealing ring 126B. In addition, the conductive pad of the interconnect structure 132 is exposed through the opening 135-3.

Then, still referring to FIG. 5, in step S205A, a patterned sacrificial layer 150 is formed on the protective layer 134. In one embodiment, the patterned sacrificial layer 150 may be a patterned photoresist formed by a photolithography process. In another embodiment, the patterned sacrificial layer 150 may be composed of a dielectric material having etching selectivity to the protective layer 134, and the patterned sacrificial layer 150 may be formed by photolithography and etching processes. The patterned sacrificial layer 150 has an opening 151 to expose a portion of the interconnect structure 132, and the patterned sacrificial layer 150 covers the openings 135-2 and 135-3 of the protection layer 134, wherein the opening 151 corresponds to the opening 135-1 of the protection layer 134. In some embodiments, the opening 151 exposes a portion of the top electrode layer 131 or a portion of the top dielectric layer 133, and a getter may be formed on the exposed portion later.

Next, referring to FIG. 6 , in step S207A, a getter material layer 140 is deposited on the patterned sacrificial layer 150 and in the opening 151, and a portion of the getter material layer 140 located in the opening 151 is deposited on the interconnect structure 132 to form a getter 140B. The getter material layer 140 may be composed of Ti, Ti-based alloy, Zr-based alloy, Zr-V-based alloy, Zr-Co-based alloy or other appropriate getter materials, such as Ti-Zr, Ti-Mo, Ti-Zr-V, Zr-Al, Zr-C, Zr-Fe, Zr-V-Fe, Zr-V-Mn, Zr-Co, Zr-Co-Ce or Zr-Co-La, but is not limited thereto. In addition, the thickness of the getter material layer 140 may be about 1 μm to about 1000 μm. Then, still referring to FIG. 6 , in step S209A, the patterned sacrificial layer 150 is stripped by a soaking or etching process to remove the getter material layer 140 deposited on the patterned sacrificial layer 150 together, thereby leaving the getter 140B on the interconnect structure 132, and the getter 140B contacts the top electrode layer 131 or the top dielectric layer 133. In addition, the getter 140B is electrically connected to the interconnect structure 132. The vertical projection area of the getter 140B may be the same as the vertical projection area of the second cavity 114, and the shape of the getter 140B is the same as the shape of the opening 151 when viewed from a top view. In some embodiments, the patterned sacrificial layer 150 may have a plurality of openings corresponding to the trenches 125 of the second MEMS element 124 to form a getter 140C as shown in FIG. 2, which has a pattern corresponding to the trenches 125 of the second MEMS element 124. After step S209A, a structure B is obtained, in which the getter 140B or the getter 140C is formed on the interconnect structure 132, and the interconnect structure 132 is formed on the wafer 130. In this embodiment, the getter 140B or the getter 140C is formed using a lift-off process.

Next, referring to FIG. 7, in step S301, the structure A obtained in step S105 of FIG. 4 is turned upside down and bonded to the structure B obtained in step S209A of FIG. 6. The device wafer 120 is bonded to the interconnect structure 132 on the wafer 130 at the first pressure P1, so that the first cavity 112 and the second cavity 114 both have the first pressure P1. In addition, the bonding material 128 on the first bonding sealing ring 126A and the second bonding sealing ring 126B is bonded to the bonding region of the interconnect structure 132 by eutectic bonding. During the bonding process, the getter 140B located directly below the second MEMS element 124 can be activated by heat treatment to absorb the gas in the second cavity 114, thereby reducing the first pressure P1 in the second cavity 114 to the second pressure P2. At the same time, the pressure in the first cavity 112 is still maintained at the first pressure P1, so that the first cavity 112 has the first pressure P1, and the second cavity 114 has the second pressure P2 lower than the first pressure P1. In addition, the getter 140B may be activated at a temperature of about 150° C. to about 450° C., depending on the material of the getter 140B. In some embodiments, the activation temperature of the getter 140B may be lower than the temperature of the bonding process of the device wafer 120 and the wafer 130, so that the getter 140B is activated during the bonding process. In some other embodiments, the activation temperature of the getter 140B may be higher than the temperature of the bonding process of the device wafer 120 and the wafer 130, and the getter 140B may be activated by other heat treatment after the bonding process.

Referring to FIG. 7 , in step S301, the cover wafer 110 has a thickness T1, and a bonding layer 111 is formed on the cover wafer 110 and in the first cavity 112 and the second cavity 114 in a longitudinal direction to encapsulate the cover wafer 110. Then, still referring to FIG. 7 , in step S303, the cover wafer 110 is thinned by back grinding or dry etching, so that the bonding layer 111 on the back side of the cover wafer 110 is also removed, and the thickness of the cover wafer 110 is reduced from the thickness T1 to the thickness T2.

Thereafter, referring to FIG. 8 , in step S305, a conductive layer 117 such as an aluminum layer is deposited on the back side of the cover wafer 110, and the conductive layer 117 is patterned by photolithography and etching processes. Next, still referring to FIG. 8 , in step S307, a portion of the cover wafer 110 and a portion of the device wafer 120 located at the scribe line SL are removed by a dicing process to expose the conductive pad on the interconnect structure 132, thereby forming a first cover plate 110A having a first cavity 112 and a second cover plate 110B having a second cavity 114 that are separated from each other. In addition, a first device substrate 120A having a first MEMS element 122 and a second device substrate 120B having a second MEMS element 124 that are separated from each other are also formed. The first element substrate 120A and the second element substrate 120B are packaged on the same wafer 130 at the same time to complete the MEMS package 100 of FIG. 1 , wherein the first cavity 112 located directly above the first MEMS element 122 has a first pressure P1, and the second cavity 114 located directly above the second MEMS element 124 has a second pressure P2 lower than the first pressure P1.

FIG. 9 and FIG. 10 are cross-sectional schematic diagrams of some stages of forming a getter 140B on an interconnect structure 132 on a wafer 130 according to another embodiment of the present disclosure. After step S201 of FIG. 5, referring to FIG. 9, in step S203B, the protective layer 134 is patterned by photolithography and a first etching process to form an opening 135-1, which exposes a portion of the interconnect structure 132. In one embodiment, a portion of the top electrode layer 131 is exposed through the opening 135-1, and a getter is subsequently formed thereon. In another embodiment, a portion of the top dielectric layer 133 is exposed through the opening 135-1, and a getter is subsequently formed thereon.

Next, still referring to FIG. 9, in step S205B, a getter material layer 140 is deposited on the protective layer 134, and a portion 140-1 of the getter material layer 140 is deposited in the opening 135-1 and on the interconnect structure 132. The composition and thickness of the getter material layer 140 can be referred to the description of step S207A in FIG. 6, which will not be repeated here. Then, still referring to FIG. 9, in step S207B, a patterned photoresist 160 is formed on a portion 140-1 of the getter material layer 140 located in the second MEMS region 100B.

Thereafter, referring to FIG. 10 , in step S209B, the getter material layer 140 is etched using the patterned photoresist 160 as an etching mask, so that a portion 140-1 of the getter material layer 140 is patterned to form a getter 140B on the interconnect structure 132 of the second MEMS region 100B, and the getter 140B contacts the top electrode layer 131 or the top dielectric layer 133. In addition, the getter 140B is electrically connected to the interconnect structure 132. In one embodiment, the vertical projection area of the getter 140B may be the same as the vertical projection area of the second cavity 114. When viewed from a top view, the shape of the getter 140B is the same as the shape of the patterned photoresist 160. In some embodiments, the patterned photoresist 160 has a plurality of openings, and the pattern of the patterned photoresist 160 corresponds to the trench 125 of the second MEMS element 124, so as to form a getter 140C as shown in FIG. 2, which has a pattern corresponding to the trench 125 of the second MEMS element 124. In the present embodiment, the getter 140B or the getter 140C is formed on the interconnect structure 132 using a dry etching process.

Next, still referring to FIG. 10 , in step S211B, the protective layer 134 is patterned by photolithography and a second etching process to form other openings 135-2 and 135-3, thereby exposing the conductive pad and the bonding area of the interconnect structure 132. In step S211B, a structure B is obtained, in which the getter 140B or the getter 140C is formed on the interconnect structure 132, and the interconnect structure 132 is formed on the wafer 130.

In some embodiments, the MEMS package 100 of FIG. 1 may be completed by steps S101 to S105 of FIG. 4, step S201 of FIG. 5, steps S203B to S211B of FIG. 9 and FIG. 10, and steps S301 to S307 of FIG. 7 and FIG. 8. In addition, the MEMS package 100 of FIG. 2 and FIG. 3 and the MEMS package including the first MEMS region 100A, the second MEMS region 100B, and the third MEMS region 100C may be manufactured by the steps of FIG. 4 to FIG. 10.

According to some embodiments of the present disclosure, a MEMS package includes different MEMS components, each of which has a different pressure in its corresponding cavity, and these MEMS components are manufactured and packaged simultaneously on the same wafer. Therefore, compared with the current MEMS package, the entire manufacturing process of the MEMS package disclosed in the present disclosure is more simplified, and the MEMS package occupies a smaller area. In addition, the MEMS package disclosed in the present disclosure does not require the use of wire bonding, thereby reducing parasitic effects.

In addition, the disclosed MEMS package includes a getter disposed on an interconnect structure on a CMOS wafer, and the getter is located directly below a MEMS component that requires high vacuum, and the getter can be activated to reduce the pressure in a cavity directly above the MEMS component that requires high vacuum. According to an embodiment of the disclosed invention, the process of forming the getter is compatible with the process of the CMOS wafer, and the activation of the getter can utilize the bonding process of the MEMS package, thereby reducing the manufacturing cost and time of the MEMS package. In addition, the disclosed MEMS package can be applied to one-axis, two-axis, three-axis, and six-axis inertial measurement units (IMUs) and MEMS components. The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the patent application of the present invention shall fall within the scope of the present invention.

100: MEMS package 100A: first MEMS area 100B: second MEMS area 100C: third MEMS area SL: cutting line 110: cover wafer 110A: first cover plate 110B: second cover plate 110C: third cover plate 111: bonding layer 112: first cavity 114: second cavity 116: third cavity 117: conductive layer 120: component wafer 120A: first component substrate 120B: second component substrate 120C: third component substrate 121: pre-cut line 122: first MEMS component 123, 125, 127: trench 124: second MEMS component 126: third MEMS component 126A: first bonding seal ring 126B: second bonding seal ring 126C: third bonding seal ring 128: bonding material 130: wafer 131: top electrode layer 132: interconnect structure 133: top dielectric layer 134: protective layer 135-1, 135-2, 135-3: opening 140: getter material layer 140-1: part of getter material layer 140B, 140C: getter 150: patterned sacrificial layer 151: opening 160: patterned photoresist A, B: structure T1, T2: thickness S101, S103, S105, S201, S203A, S205A, S207A, S209A, S203B, S205B, S207B, S209B, S211B, S301, S303, S305, S307: Step

In order to make the following easier to understand, the drawings and their detailed text descriptions can be referred to at the same time when reading this disclosure. Through the specific embodiments in this article and referring to the corresponding drawings, the specific embodiments of the present disclosure are explained in detail, and the working principle of the specific embodiments of the present disclosure is explained. In addition, for the sake of clarity, the features in the drawings may not be drawn according to the actual scale, so the size of some features in some drawings may be deliberately enlarged or reduced. Figure 1 is a cross-sectional schematic diagram of a microelectromechanical (MEMS) package drawn according to an embodiment of the present disclosure. Figure 2 is a cross-sectional schematic diagram of a MEMS package drawn according to another embodiment of the present disclosure. Figure 3 is a cross-sectional schematic diagram of a MEMS package drawn according to another embodiment of the present disclosure. Figures 4, 5, 6, 7 and 8 are cross-sectional schematic diagrams of some stages of a method for manufacturing a MEMS package according to an embodiment of the present disclosure. Figures 9 and 10 are cross-sectional schematic diagrams of some stages of forming a getter on an interconnect structure located on a wafer according to another embodiment of the present disclosure.

100: MEMS packaging

100A: First MEMS area

100B: Second MEMS area

SL: Cutting Road

110A: First cover plate

110B: Second cover plate

111: Bonding layer

112: First cavity

114: Second cavity

117: Conductive layer

120A: First component substrate

120B: Second component substrate

122: First micro-electromechanical component

123, 125: Groove

124: Second micro-electromechanical component

126A: First key sealing ring

126B: Second key sealing ring

128: Bonding materials

130: Wafer

131: Top electrode layer

132: Interconnection structure

133: Top dielectric layer

134: Protective layer

140B: Getter

Claims (20)

A micro-electromechanical package, comprising: a wafer; an interconnection structure disposed on the wafer; a protective layer disposed on the interconnection structure; a first component substrate, comprising a first micro-electromechanical component, disposed on the wafer and bonded to the interconnection structure; a second component substrate, comprising a second micro-electromechanical component, laterally separated from the first component substrate, disposed on the wafer and bonded to the interconnection structure; a first cover plate, having a first cavity and bonded to the first component substrate; a second cover plate, having a second cavity and bonded to the second component substrate; and a getter, disposed in an opening of the protective layer and on the interconnection structure, and located directly below the second micro-electromechanical component, The first cavity has a first pressure, and the second cavity has a second pressure lower than the first pressure. A microelectromechanical package as described in claim 1, wherein the first microelectromechanical component includes an accelerometer and the second microelectromechanical component includes a gyroscope. A micro-electromechanical package as described in claim 1, wherein the interconnect structure includes a top electrode layer, the protective layer is disposed on the top electrode layer, and the getter is in contact with the top electrode layer. A microelectromechanical package as described in claim 1, wherein the interconnect structure includes a top dielectric layer disposed below a top electrode layer, and the getter is in contact with the top dielectric layer. A microelectromechanical package as claimed in claim 1, wherein the getter is electrically connected to the interconnect structure. A micro-electromechanical package as described in claim 1, wherein the vertical projection area of the getter overlaps with the vertical projection area of the second cavity. A micro-electromechanical package as described in claim 1, wherein the second micro-electromechanical component includes a plurality of grooves, and the getter has a pattern corresponding to the plurality of grooves of the second micro-electromechanical component. A micro-electromechanical package as described in claim 1, wherein the getter comprises Ti, a Ti-based alloy, a Zr-based alloy, a Zr-V-based alloy or a Zr-Co-based alloy. A micro-electromechanical package as described in claim 1, wherein the getter is configured as a conductive barrier to the second micro-electromechanical component. The MEMS package as described in claim 1 further comprises: a third component substrate, including a third MEMS component, laterally separated from the first component substrate and the second component substrate, disposed on the wafer and bonded to the interconnection structure; a third cover plate, having a third cavity and bonded to the third component substrate; and another getter, disposed on the interconnection structure and located directly below the third MEMS component, wherein the third cavity has a third pressure different from the second pressure and lower than the first pressure. A method for manufacturing a microelectromechanical package, comprising: providing a cover wafer having a first cavity and a second cavity formed in the cover wafer; providing a component wafer; bonding the component wafer to the cover wafer; patterning the component wafer to form a first microelectromechanical component and a second microelectromechanical component laterally separated from each other, wherein the first microelectromechanical component corresponds to the first cavity, and the second microelectromechanical component corresponds to the second cavity; providing a wafer having an interconnect structure formed on the wafer; forming a getter on the interconnect structure; bonding the component wafer to the interconnect structure on the wafer at a first pressure, wherein the first cavity and the second cavity both have the first pressure, and the getter is located directly below the second microelectromechanical component; and Activating the getter to reduce the first pressure in the second cavity to a second pressure, wherein the first cavity has the first pressure and the second cavity has the second pressure lower than the first pressure. A method for manufacturing a microelectromechanical package as described in claim 11, wherein the interconnect structure includes a top electrode layer formed on a top dielectric layer, and the getter is formed in contact with the top electrode layer or the top dielectric layer. A method for manufacturing a micro-electromechanical system package as described in claim 11, wherein the getter is electrically connected to the interconnect structure. A method for manufacturing a micro-electromechanical package as described in claim 11, wherein the getter includes Ti, a Ti-based alloy, a Zr-based alloy, a Zr-V-based alloy or a Zr-Co-based alloy. A method for manufacturing a microelectromechanical package as described in claim 11, wherein forming the getter comprises: forming a protective layer on the interconnect structure; patterning the protective layer through an etching process to form an opening to expose a portion of the interconnect structure; forming a patterned sacrificial layer on the protective layer to expose the portion of the interconnect structure; depositing a getter material layer on the patterned sacrificial layer and the portion of the interconnect structure; and removing the patterned sacrificial layer to form the getter, wherein the vertical projection area of the getter overlaps the vertical projection area of the second cavity. A method for manufacturing a microelectromechanical system package as described in claim 15, wherein before depositing the getter material layer, other openings of the protective layer are formed by the etching process to expose a conductive pad and a bonding area of the interconnect structure, and the patterned sacrificial layer covers the other openings of the protective layer. A method for manufacturing a microelectromechanical package as described in claim 11, wherein forming the getter comprises: forming a protective layer on the interconnect structure; patterning the protective layer through a first etching process to form an opening exposing a portion of the interconnect structure; depositing a getter material layer on the protective layer and the portion of the interconnect structure; and patterning the getter material layer to form the getter, wherein the vertical projection area of the getter overlaps the vertical projection area of the second cavity. A method for manufacturing a micro-electromechanical system package as described in claim 17, wherein after forming the getter, the protective layer is patterned by a second etching process to form other openings exposing a conductive pad and a bonding area of the interconnect structure. A method for manufacturing a MEMS package as described in claim 11, wherein forming the getter comprises: depositing a getter material layer on the interconnect structure; and patterning the getter material layer to form the getter having a pattern, wherein the second MEMS component comprises a plurality of trenches, and the pattern of the getter corresponds to the plurality of trenches of the second MEMS component. The manufacturing method of the micro-electromechanical package as described in claim 11 further includes: Removing a portion of the cover wafer and a portion of the component wafer located at a cutting line to form a first cover plate having the first cavity, a second cover plate having the second cavity, a first component substrate including the first micro-electromechanical component, and a second component substrate including the second micro-electromechanical component.

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